Alvaro Cassinelli / Mbed 2 deprecated skinGames_II

save loops

Dependencies:   mbed

hardwareIO/adc.cpp@1:3be7b7d050f4, 2014-12-02 (annotated)

Committer:
mbedalvaro
Date:
Tue Dec 02 08:29:59 2014 +0000
Revision:
1:3be7b7d050f4
Parent:
0:df6fdd9b99f0 
updated

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbedalvaro 0:df6fdd9b99f0 1 /* mbed Library - ADC
mbedalvaro 0:df6fdd9b99f0 2 * Copyright (c) 2010, sblandford
mbedalvaro 0:df6fdd9b99f0 3 * released under MIT license http://mbed.org/licence/mit
mbedalvaro 0:df6fdd9b99f0 4 */
mbedalvaro 0:df6fdd9b99f0 5 #include "mbed.h"
mbedalvaro 0:df6fdd9b99f0 6 #include "adc.h"
mbedalvaro 0:df6fdd9b99f0 7
mbedalvaro 0:df6fdd9b99f0 8
mbedalvaro 0:df6fdd9b99f0 9 ADC adc(ADC_SAMPLE_RATE, 1);
mbedalvaro 0:df6fdd9b99f0 10
mbedalvaro 0:df6fdd9b99f0 11 ADC *ADC::instance;
mbedalvaro 0:df6fdd9b99f0 12
mbedalvaro 0:df6fdd9b99f0 13 ADC::ADC(int sample_rate, int cclk_div)
mbedalvaro 0:df6fdd9b99f0 14 {
mbedalvaro 0:df6fdd9b99f0 15
mbedalvaro 0:df6fdd9b99f0 16 int i, adc_clk_freq, pclk, clock_div, max_div=1;
mbedalvaro 0:df6fdd9b99f0 17
mbedalvaro 0:df6fdd9b99f0 18 //Work out CCLK
mbedalvaro 0:df6fdd9b99f0 19 adc_clk_freq=CLKS_PER_SAMPLE*sample_rate;
mbedalvaro 0:df6fdd9b99f0 20 int m = (LPC_SC->PLL0CFG & 0xFFFF) + 1;
mbedalvaro 0:df6fdd9b99f0 21 int n = (LPC_SC->PLL0CFG >> 16) + 1;
mbedalvaro 0:df6fdd9b99f0 22 int cclkdiv = LPC_SC->CCLKCFG + 1;
mbedalvaro 0:df6fdd9b99f0 23 int Fcco = (2 * m * XTAL_FREQ) / n;
mbedalvaro 0:df6fdd9b99f0 24 int cclk = Fcco / cclkdiv;
mbedalvaro 0:df6fdd9b99f0 25
mbedalvaro 0:df6fdd9b99f0 26 //Power up the ADC
mbedalvaro 0:df6fdd9b99f0 27 LPC_SC->PCONP |= (1 << 12);
mbedalvaro 0:df6fdd9b99f0 28 //Set clock at cclk / 1.
mbedalvaro 0:df6fdd9b99f0 29 LPC_SC->PCLKSEL0 &= ~(0x3 << 24);
mbedalvaro 0:df6fdd9b99f0 30 switch (cclk_div) {
mbedalvaro 0:df6fdd9b99f0 31 case 1:
mbedalvaro 0:df6fdd9b99f0 32 LPC_SC->PCLKSEL0 |= 0x1 << 24;
mbedalvaro 0:df6fdd9b99f0 33 break;
mbedalvaro 0:df6fdd9b99f0 34 case 2:
mbedalvaro 0:df6fdd9b99f0 35 LPC_SC->PCLKSEL0 |= 0x2 << 24;
mbedalvaro 0:df6fdd9b99f0 36 break;
mbedalvaro 0:df6fdd9b99f0 37 case 4:
mbedalvaro 0:df6fdd9b99f0 38 LPC_SC->PCLKSEL0 |= 0x0 << 24;
mbedalvaro 0:df6fdd9b99f0 39 break;
mbedalvaro 0:df6fdd9b99f0 40 case 8:
mbedalvaro 0:df6fdd9b99f0 41 LPC_SC->PCLKSEL0 |= 0x3 << 24;
mbedalvaro 0:df6fdd9b99f0 42 break;
mbedalvaro 0:df6fdd9b99f0 43 default:
mbedalvaro 0:df6fdd9b99f0 44 fprintf(stderr, "Warning: ADC CCLK clock divider must be 1, 2, 4 or 8. %u supplied.\n",
mbedalvaro 0:df6fdd9b99f0 45 cclk_div);
mbedalvaro 0:df6fdd9b99f0 46 fprintf(stderr, "Defaulting to 1.\n");
mbedalvaro 0:df6fdd9b99f0 47 LPC_SC->PCLKSEL0 |= 0x1 << 24;
mbedalvaro 0:df6fdd9b99f0 48 break;
mbedalvaro 0:df6fdd9b99f0 49 }
mbedalvaro 0:df6fdd9b99f0 50 pclk = cclk / cclk_div;
mbedalvaro 0:df6fdd9b99f0 51 clock_div=pclk / adc_clk_freq;
mbedalvaro 0:df6fdd9b99f0 52
mbedalvaro 0:df6fdd9b99f0 53 if (clock_div > 0xFF) {
mbedalvaro 0:df6fdd9b99f0 54 fprintf(stderr, "Warning: Clock division is %u which is above 255 limit. Re-Setting at limit.\n",
mbedalvaro 0:df6fdd9b99f0 55 clock_div);
mbedalvaro 0:df6fdd9b99f0 56 clock_div=0xFF;
mbedalvaro 0:df6fdd9b99f0 57 }
mbedalvaro 0:df6fdd9b99f0 58 if (clock_div == 0) {
mbedalvaro 0:df6fdd9b99f0 59 fprintf(stderr, "Warning: Clock division is 0. Re-Setting to 1.\n");
mbedalvaro 0:df6fdd9b99f0 60 clock_div=1;
mbedalvaro 0:df6fdd9b99f0 61 }
mbedalvaro 0:df6fdd9b99f0 62
mbedalvaro 0:df6fdd9b99f0 63 _adc_clk_freq=pclk / clock_div;
mbedalvaro 0:df6fdd9b99f0 64 if (_adc_clk_freq > MAX_ADC_CLOCK) {
mbedalvaro 0:df6fdd9b99f0 65 fprintf(stderr, "Warning: Actual ADC sample rate of %u which is above %u limit\n",
mbedalvaro 0:df6fdd9b99f0 66 _adc_clk_freq / CLKS_PER_SAMPLE, MAX_ADC_CLOCK / CLKS_PER_SAMPLE);
mbedalvaro 0:df6fdd9b99f0 67 while ((pclk / max_div) > MAX_ADC_CLOCK) max_div++;
mbedalvaro 0:df6fdd9b99f0 68 fprintf(stderr, "Maximum recommended sample rate is %u\n", (pclk / max_div) / CLKS_PER_SAMPLE);
mbedalvaro 0:df6fdd9b99f0 69 }
mbedalvaro 0:df6fdd9b99f0 70
mbedalvaro 0:df6fdd9b99f0 71 LPC_ADC->ADCR =
mbedalvaro 0:df6fdd9b99f0 72 ((clock_div - 1 ) << 8 ) | //Clkdiv
mbedalvaro 0:df6fdd9b99f0 73 ( 1 << 21 ); //A/D operational
mbedalvaro 0:df6fdd9b99f0 74
mbedalvaro 0:df6fdd9b99f0 75 //Default no channels enabled
mbedalvaro 0:df6fdd9b99f0 76 LPC_ADC->ADCR &= ~0xFF;
mbedalvaro 0:df6fdd9b99f0 77 //Default NULL global custom isr
mbedalvaro 0:df6fdd9b99f0 78 _adc_g_isr = NULL;
mbedalvaro 0:df6fdd9b99f0 79 //Initialize arrays
mbedalvaro 0:df6fdd9b99f0 80 for (i=7; i>=0; i--) {
mbedalvaro 0:df6fdd9b99f0 81 _adc_data[i] = 0;
mbedalvaro 0:df6fdd9b99f0 82 _adc_isr[i] = NULL;
mbedalvaro 0:df6fdd9b99f0 83 }
mbedalvaro 0:df6fdd9b99f0 84
mbedalvaro 0:df6fdd9b99f0 85
mbedalvaro 0:df6fdd9b99f0 86 //* Attach IRQ
mbedalvaro 0:df6fdd9b99f0 87 instance = this;
mbedalvaro 0:df6fdd9b99f0 88 NVIC_SetVector(ADC_IRQn, (uint32_t)&_adcisr);
mbedalvaro 0:df6fdd9b99f0 89
mbedalvaro 0:df6fdd9b99f0 90 //Disable global interrupt
mbedalvaro 0:df6fdd9b99f0 91 LPC_ADC->ADINTEN &= ~0x100;
mbedalvaro 0:df6fdd9b99f0 92
mbedalvaro 0:df6fdd9b99f0 93 };
mbedalvaro 0:df6fdd9b99f0 94
mbedalvaro 0:df6fdd9b99f0 95 void ADC::_adcisr(void)
mbedalvaro 0:df6fdd9b99f0 96 {
mbedalvaro 0:df6fdd9b99f0 97 instance->adcisr();
mbedalvaro 0:df6fdd9b99f0 98 }
mbedalvaro 0:df6fdd9b99f0 99
mbedalvaro 0:df6fdd9b99f0 100
mbedalvaro 0:df6fdd9b99f0 101 void ADC::adcisr(void)
mbedalvaro 0:df6fdd9b99f0 102 {
mbedalvaro 0:df6fdd9b99f0 103 uint32_t stat;
mbedalvaro 0:df6fdd9b99f0 104 int chan;
mbedalvaro 0:df6fdd9b99f0 105
mbedalvaro 0:df6fdd9b99f0 106 // Read status
mbedalvaro 0:df6fdd9b99f0 107 stat = LPC_ADC->ADSTAT;
mbedalvaro 0:df6fdd9b99f0 108 //Scan channels for over-run or done and update array
mbedalvaro 0:df6fdd9b99f0 109 if (stat & 0x0101) _adc_data[0] = LPC_ADC->ADDR0;
mbedalvaro 0:df6fdd9b99f0 110 if (stat & 0x0202) _adc_data[1] = LPC_ADC->ADDR1;
mbedalvaro 0:df6fdd9b99f0 111 if (stat & 0x0404) _adc_data[2] = LPC_ADC->ADDR2;
mbedalvaro 0:df6fdd9b99f0 112 if (stat & 0x0808) _adc_data[3] = LPC_ADC->ADDR3;
mbedalvaro 0:df6fdd9b99f0 113 if (stat & 0x1010) _adc_data[4] = LPC_ADC->ADDR4;
mbedalvaro 0:df6fdd9b99f0 114 if (stat & 0x2020) _adc_data[5] = LPC_ADC->ADDR5;
mbedalvaro 0:df6fdd9b99f0 115 if (stat & 0x4040) _adc_data[6] = LPC_ADC->ADDR6;
mbedalvaro 0:df6fdd9b99f0 116 if (stat & 0x8080) _adc_data[7] = LPC_ADC->ADDR7;
mbedalvaro 0:df6fdd9b99f0 117
mbedalvaro 0:df6fdd9b99f0 118 // Channel that triggered interrupt
mbedalvaro 0:df6fdd9b99f0 119 chan = (LPC_ADC->ADGDR >> 24) & 0x07;
mbedalvaro 0:df6fdd9b99f0 120 //User defined interrupt handlers
mbedalvaro 0:df6fdd9b99f0 121 if (_adc_isr[chan] != NULL)
mbedalvaro 0:df6fdd9b99f0 122 _adc_isr[chan](_adc_data[chan]);
mbedalvaro 0:df6fdd9b99f0 123 if (_adc_g_isr != NULL)
mbedalvaro 0:df6fdd9b99f0 124 _adc_g_isr(chan, _adc_data[chan]);
mbedalvaro 0:df6fdd9b99f0 125 return;
mbedalvaro 0:df6fdd9b99f0 126 }
mbedalvaro 0:df6fdd9b99f0 127
mbedalvaro 0:df6fdd9b99f0 128 int ADC::_pin_to_channel(PinName pin) {
mbedalvaro 0:df6fdd9b99f0 129 int chan;
mbedalvaro 0:df6fdd9b99f0 130 switch (pin) {
mbedalvaro 0:df6fdd9b99f0 131 case p15://=p0.23 of LPC1768
mbedalvaro 0:df6fdd9b99f0 132 default:
mbedalvaro 0:df6fdd9b99f0 133 chan=0;
mbedalvaro 0:df6fdd9b99f0 134 break;
mbedalvaro 0:df6fdd9b99f0 135 case p16://=p0.24 of LPC1768
mbedalvaro 0:df6fdd9b99f0 136 chan=1;
mbedalvaro 0:df6fdd9b99f0 137 break;
mbedalvaro 0:df6fdd9b99f0 138 case p17://=p0.25 of LPC1768
mbedalvaro 0:df6fdd9b99f0 139 chan=2;
mbedalvaro 0:df6fdd9b99f0 140 break;
mbedalvaro 0:df6fdd9b99f0 141 case p18://=p0.26 of LPC1768
mbedalvaro 0:df6fdd9b99f0 142 chan=3;
mbedalvaro 0:df6fdd9b99f0 143 break;
mbedalvaro 0:df6fdd9b99f0 144 case p19://=p1.30 of LPC1768
mbedalvaro 0:df6fdd9b99f0 145 chan=4;
mbedalvaro 0:df6fdd9b99f0 146 break;
mbedalvaro 0:df6fdd9b99f0 147 case p20://=p1.31 of LPC1768
mbedalvaro 0:df6fdd9b99f0 148 chan=5;
mbedalvaro 0:df6fdd9b99f0 149 break;
mbedalvaro 0:df6fdd9b99f0 150 }
mbedalvaro 0:df6fdd9b99f0 151 return(chan);
mbedalvaro 0:df6fdd9b99f0 152 }
mbedalvaro 0:df6fdd9b99f0 153
mbedalvaro 0:df6fdd9b99f0 154 PinName ADC::channel_to_pin(int chan) {
mbedalvaro 0:df6fdd9b99f0 155 const PinName pin[8]={p15, p16, p17, p18, p19, p20, p15, p15};
mbedalvaro 0:df6fdd9b99f0 156
mbedalvaro 0:df6fdd9b99f0 157 if ((chan < 0) || (chan > 5))
mbedalvaro 0:df6fdd9b99f0 158 fprintf(stderr, "ADC channel %u is outside range available to MBED pins.\n", chan);
mbedalvaro 0:df6fdd9b99f0 159 return(pin[chan & 0x07]);
mbedalvaro 0:df6fdd9b99f0 160 }
mbedalvaro 0:df6fdd9b99f0 161
mbedalvaro 0:df6fdd9b99f0 162
mbedalvaro 0:df6fdd9b99f0 163 int ADC::channel_to_pin_number(int chan) {
mbedalvaro 0:df6fdd9b99f0 164 const int pin[8]={15, 16, 17, 18, 19, 20, 0, 0};
mbedalvaro 0:df6fdd9b99f0 165
mbedalvaro 0:df6fdd9b99f0 166 if ((chan < 0) || (chan > 5))
mbedalvaro 0:df6fdd9b99f0 167 fprintf(stderr, "ADC channel %u is outside range available to MBED pins.\n", chan);
mbedalvaro 0:df6fdd9b99f0 168 return(pin[chan & 0x07]);
mbedalvaro 0:df6fdd9b99f0 169 }
mbedalvaro 0:df6fdd9b99f0 170
mbedalvaro 0:df6fdd9b99f0 171
mbedalvaro 0:df6fdd9b99f0 172 uint32_t ADC::_data_of_pin(PinName pin) {
mbedalvaro 0:df6fdd9b99f0 173 //If in burst mode and at least one interrupt enabled then
mbedalvaro 0:df6fdd9b99f0 174 //take all values from _adc_data
mbedalvaro 0:df6fdd9b99f0 175 if (burst() && (LPC_ADC->ADINTEN & 0x3F)) {
mbedalvaro 0:df6fdd9b99f0 176 return(_adc_data[_pin_to_channel(pin)]);
mbedalvaro 0:df6fdd9b99f0 177 } else {
mbedalvaro 0:df6fdd9b99f0 178 //Return current register value or last value from interrupt
mbedalvaro 0:df6fdd9b99f0 179 switch (pin) {
mbedalvaro 0:df6fdd9b99f0 180 case p15://=p0.23 of LPC1768
mbedalvaro 0:df6fdd9b99f0 181 default:
mbedalvaro 0:df6fdd9b99f0 182 return(LPC_ADC->ADINTEN & 0x01?_adc_data[0]:LPC_ADC->ADDR0);
mbedalvaro 0:df6fdd9b99f0 183 case p16://=p0.24 of LPC1768
mbedalvaro 0:df6fdd9b99f0 184 return(LPC_ADC->ADINTEN & 0x02?_adc_data[1]:LPC_ADC->ADDR1);
mbedalvaro 0:df6fdd9b99f0 185 case p17://=p0.25 of LPC1768
mbedalvaro 0:df6fdd9b99f0 186 return(LPC_ADC->ADINTEN & 0x04?_adc_data[2]:LPC_ADC->ADDR2);
mbedalvaro 0:df6fdd9b99f0 187 case p18://=p0.26 of LPC1768:
mbedalvaro 0:df6fdd9b99f0 188 return(LPC_ADC->ADINTEN & 0x08?_adc_data[3]:LPC_ADC->ADDR3);
mbedalvaro 0:df6fdd9b99f0 189 case p19://=p1.30 of LPC1768
mbedalvaro 0:df6fdd9b99f0 190 return(LPC_ADC->ADINTEN & 0x10?_adc_data[4]:LPC_ADC->ADDR4);
mbedalvaro 0:df6fdd9b99f0 191 case p20://=p1.31 of LPC1768
mbedalvaro 0:df6fdd9b99f0 192 return(LPC_ADC->ADINTEN & 0x20?_adc_data[5]:LPC_ADC->ADDR5);
mbedalvaro 0:df6fdd9b99f0 193 }
mbedalvaro 0:df6fdd9b99f0 194 }
mbedalvaro 0:df6fdd9b99f0 195 }
mbedalvaro 0:df6fdd9b99f0 196
mbedalvaro 0:df6fdd9b99f0 197 //Enable or disable an ADC pin
mbedalvaro 0:df6fdd9b99f0 198 void ADC::setup(PinName pin, int state) {
mbedalvaro 0:df6fdd9b99f0 199 int chan;
mbedalvaro 0:df6fdd9b99f0 200 chan=_pin_to_channel(pin);
mbedalvaro 0:df6fdd9b99f0 201 if ((state & 1) == 1) {
mbedalvaro 0:df6fdd9b99f0 202 switch(pin) {
mbedalvaro 0:df6fdd9b99f0 203 case p15://=p0.23 of LPC1768
mbedalvaro 0:df6fdd9b99f0 204 default:
mbedalvaro 0:df6fdd9b99f0 205 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 14);
mbedalvaro 0:df6fdd9b99f0 206 LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 14;
mbedalvaro 0:df6fdd9b99f0 207 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 14);
mbedalvaro 0:df6fdd9b99f0 208 LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 14;
mbedalvaro 0:df6fdd9b99f0 209 break;
mbedalvaro 0:df6fdd9b99f0 210 case p16://=p0.24 of LPC1768
mbedalvaro 0:df6fdd9b99f0 211 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 16);
mbedalvaro 0:df6fdd9b99f0 212 LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 16;
mbedalvaro 0:df6fdd9b99f0 213 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 16);
mbedalvaro 0:df6fdd9b99f0 214 LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 16;
mbedalvaro 0:df6fdd9b99f0 215 break;
mbedalvaro 0:df6fdd9b99f0 216 case p17://=p0.25 of LPC1768
mbedalvaro 0:df6fdd9b99f0 217 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 18);
mbedalvaro 0:df6fdd9b99f0 218 LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 18;
mbedalvaro 0:df6fdd9b99f0 219 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 18);
mbedalvaro 0:df6fdd9b99f0 220 LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 18;
mbedalvaro 0:df6fdd9b99f0 221 break;
mbedalvaro 0:df6fdd9b99f0 222 case p18://=p0.26 of LPC1768:
mbedalvaro 0:df6fdd9b99f0 223 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 20);
mbedalvaro 0:df6fdd9b99f0 224 LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 20;
mbedalvaro 0:df6fdd9b99f0 225 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 20);
mbedalvaro 0:df6fdd9b99f0 226 LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 20;
mbedalvaro 0:df6fdd9b99f0 227 break;
mbedalvaro 0:df6fdd9b99f0 228 case p19://=p1.30 of LPC1768
mbedalvaro 0:df6fdd9b99f0 229 LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 28);
mbedalvaro 0:df6fdd9b99f0 230 LPC_PINCON->PINSEL3 |= (unsigned int)0x3 << 28;
mbedalvaro 0:df6fdd9b99f0 231 LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 28);
mbedalvaro 0:df6fdd9b99f0 232 LPC_PINCON->PINMODE3 |= (unsigned int)0x2 << 28;
mbedalvaro 0:df6fdd9b99f0 233 break;
mbedalvaro 0:df6fdd9b99f0 234 case p20://=p1.31 of LPC1768
mbedalvaro 0:df6fdd9b99f0 235 LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 30);
mbedalvaro 0:df6fdd9b99f0 236 LPC_PINCON->PINSEL3 |= (unsigned int)0x3 << 30;
mbedalvaro 0:df6fdd9b99f0 237 LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 30);
mbedalvaro 0:df6fdd9b99f0 238 LPC_PINCON->PINMODE3 |= (unsigned int)0x2 << 30;
mbedalvaro 0:df6fdd9b99f0 239 break;
mbedalvaro 0:df6fdd9b99f0 240 }
mbedalvaro 0:df6fdd9b99f0 241 //Only one channel can be selected at a time if not in burst mode
mbedalvaro 0:df6fdd9b99f0 242 if (!burst()) LPC_ADC->ADCR &= ~0xFF;
mbedalvaro 0:df6fdd9b99f0 243 //Select channel
mbedalvaro 0:df6fdd9b99f0 244 LPC_ADC->ADCR |= (1 << chan);
mbedalvaro 0:df6fdd9b99f0 245 }
mbedalvaro 0:df6fdd9b99f0 246 else {
mbedalvaro 0:df6fdd9b99f0 247 switch(pin) {
mbedalvaro 0:df6fdd9b99f0 248 case p15://=p0.23 of LPC1768
mbedalvaro 0:df6fdd9b99f0 249 default:
mbedalvaro 0:df6fdd9b99f0 250 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 14);
mbedalvaro 0:df6fdd9b99f0 251 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 14);
mbedalvaro 0:df6fdd9b99f0 252 break;
mbedalvaro 0:df6fdd9b99f0 253 case p16://=p0.24 of LPC1768
mbedalvaro 0:df6fdd9b99f0 254 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 16);
mbedalvaro 0:df6fdd9b99f0 255 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 16);
mbedalvaro 0:df6fdd9b99f0 256 break;
mbedalvaro 0:df6fdd9b99f0 257 case p17://=p0.25 of LPC1768
mbedalvaro 0:df6fdd9b99f0 258 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 18);
mbedalvaro 0:df6fdd9b99f0 259 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 18);
mbedalvaro 0:df6fdd9b99f0 260 break;
mbedalvaro 0:df6fdd9b99f0 261 case p18://=p0.26 of LPC1768:
mbedalvaro 0:df6fdd9b99f0 262 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 20);
mbedalvaro 0:df6fdd9b99f0 263 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 20);
mbedalvaro 0:df6fdd9b99f0 264 break;
mbedalvaro 0:df6fdd9b99f0 265 case p19://=p1.30 of LPC1768
mbedalvaro 0:df6fdd9b99f0 266 LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 28);
mbedalvaro 0:df6fdd9b99f0 267 LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 28);
mbedalvaro 0:df6fdd9b99f0 268 break;
mbedalvaro 0:df6fdd9b99f0 269 case p20://=p1.31 of LPC1768
mbedalvaro 0:df6fdd9b99f0 270 LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 30);
mbedalvaro 0:df6fdd9b99f0 271 LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 30);
mbedalvaro 0:df6fdd9b99f0 272 break;
mbedalvaro 0:df6fdd9b99f0 273 }
mbedalvaro 0:df6fdd9b99f0 274 LPC_ADC->ADCR &= ~(1 << chan);
mbedalvaro 0:df6fdd9b99f0 275 }
mbedalvaro 0:df6fdd9b99f0 276 }
mbedalvaro 0:df6fdd9b99f0 277 //Return channel enabled/disabled state
mbedalvaro 0:df6fdd9b99f0 278 int ADC::setup(PinName pin) {
mbedalvaro 0:df6fdd9b99f0 279 int chan;
mbedalvaro 0:df6fdd9b99f0 280
mbedalvaro 0:df6fdd9b99f0 281 chan = _pin_to_channel(pin);
mbedalvaro 0:df6fdd9b99f0 282 return((LPC_ADC->ADCR & (1 << chan)) >> chan);
mbedalvaro 0:df6fdd9b99f0 283 }
mbedalvaro 0:df6fdd9b99f0 284
mbedalvaro 0:df6fdd9b99f0 285 //Select channel already setup
mbedalvaro 0:df6fdd9b99f0 286 void ADC::select(PinName pin) {
mbedalvaro 0:df6fdd9b99f0 287 int chan;
mbedalvaro 0:df6fdd9b99f0 288
mbedalvaro 0:df6fdd9b99f0 289 //Only one channel can be selected at a time if not in burst mode
mbedalvaro 0:df6fdd9b99f0 290 if (!burst()) LPC_ADC->ADCR &= ~0xFF;
mbedalvaro 0:df6fdd9b99f0 291 //Select channel
mbedalvaro 0:df6fdd9b99f0 292 chan = _pin_to_channel(pin);
mbedalvaro 0:df6fdd9b99f0 293 LPC_ADC->ADCR |= (1 << chan);
mbedalvaro 0:df6fdd9b99f0 294 }
mbedalvaro 0:df6fdd9b99f0 295
mbedalvaro 0:df6fdd9b99f0 296 //Enable or disable burst mode
mbedalvaro 0:df6fdd9b99f0 297 void ADC::burst(int state) {
mbedalvaro 0:df6fdd9b99f0 298 if ((state & 1) == 1) {
mbedalvaro 0:df6fdd9b99f0 299 if (startmode(0) != 0)
mbedalvaro 0:df6fdd9b99f0 300 fprintf(stderr, "Warning. startmode is %u. Must be 0 for burst mode.\n", startmode(0));
mbedalvaro 0:df6fdd9b99f0 301 LPC_ADC->ADCR |= (1 << 16);
mbedalvaro 0:df6fdd9b99f0 302 }
mbedalvaro 0:df6fdd9b99f0 303 else
mbedalvaro 0:df6fdd9b99f0 304 LPC_ADC->ADCR &= ~(1 << 16);
mbedalvaro 0:df6fdd9b99f0 305 }
mbedalvaro 0:df6fdd9b99f0 306 //Return burst mode state
mbedalvaro 0:df6fdd9b99f0 307 int ADC::burst(void) {
mbedalvaro 0:df6fdd9b99f0 308 return((LPC_ADC->ADCR & (1 << 16)) >> 16);
mbedalvaro 0:df6fdd9b99f0 309 }
mbedalvaro 0:df6fdd9b99f0 310
mbedalvaro 0:df6fdd9b99f0 311 //Set startmode and edge
mbedalvaro 0:df6fdd9b99f0 312 void ADC::startmode(int mode, int edge) {
mbedalvaro 0:df6fdd9b99f0 313 int lpc_adc_temp;
mbedalvaro 0:df6fdd9b99f0 314
mbedalvaro 0:df6fdd9b99f0 315 //Reset start mode and edge bit,
mbedalvaro 0:df6fdd9b99f0 316 lpc_adc_temp = LPC_ADC->ADCR & ~(0x0F << 24);
mbedalvaro 0:df6fdd9b99f0 317 //Write with new values
mbedalvaro 0:df6fdd9b99f0 318 lpc_adc_temp |= ((mode & 7) << 24) | ((edge & 1) << 27);
mbedalvaro 0:df6fdd9b99f0 319 LPC_ADC->ADCR = lpc_adc_temp;
mbedalvaro 0:df6fdd9b99f0 320 }
mbedalvaro 0:df6fdd9b99f0 321
mbedalvaro 0:df6fdd9b99f0 322 //Return startmode state according to mode_edge=0: mode and mode_edge=1: edge
mbedalvaro 0:df6fdd9b99f0 323 int ADC::startmode(int mode_edge){
mbedalvaro 0:df6fdd9b99f0 324 switch (mode_edge) {
mbedalvaro 0:df6fdd9b99f0 325 case 0:
mbedalvaro 0:df6fdd9b99f0 326 default:
mbedalvaro 0:df6fdd9b99f0 327 return((LPC_ADC->ADCR >> 24) & 0x07);
mbedalvaro 0:df6fdd9b99f0 328 case 1:
mbedalvaro 0:df6fdd9b99f0 329 return((LPC_ADC->ADCR >> 27) & 0x01);
mbedalvaro 0:df6fdd9b99f0 330 }
mbedalvaro 0:df6fdd9b99f0 331 }
mbedalvaro 0:df6fdd9b99f0 332
mbedalvaro 0:df6fdd9b99f0 333 //Start ADC conversion
mbedalvaro 0:df6fdd9b99f0 334 void ADC::start(void) {
mbedalvaro 0:df6fdd9b99f0 335 startmode(1,0);
mbedalvaro 0:df6fdd9b99f0 336 }
mbedalvaro 0:df6fdd9b99f0 337
mbedalvaro 0:df6fdd9b99f0 338
mbedalvaro 0:df6fdd9b99f0 339 //Set interrupt enable/disable for pin to state
mbedalvaro 0:df6fdd9b99f0 340 void ADC::interrupt_state(PinName pin, int state) {
mbedalvaro 0:df6fdd9b99f0 341 int chan;
mbedalvaro 0:df6fdd9b99f0 342
mbedalvaro 0:df6fdd9b99f0 343 chan = _pin_to_channel(pin);
mbedalvaro 0:df6fdd9b99f0 344 if (state == 1) {
mbedalvaro 0:df6fdd9b99f0 345 LPC_ADC->ADINTEN &= ~0x100;
mbedalvaro 0:df6fdd9b99f0 346 LPC_ADC->ADINTEN |= 1 << chan;
mbedalvaro 0:df6fdd9b99f0 347 /* Enable the ADC Interrupt */
mbedalvaro 0:df6fdd9b99f0 348 NVIC_EnableIRQ(ADC_IRQn);
mbedalvaro 0:df6fdd9b99f0 349 } else {
mbedalvaro 0:df6fdd9b99f0 350 LPC_ADC->ADINTEN &= ~( 1 << chan );
mbedalvaro 0:df6fdd9b99f0 351 //Disable interrrupt if no active pins left
mbedalvaro 0:df6fdd9b99f0 352 if ((LPC_ADC->ADINTEN & 0xFF) == 0)
mbedalvaro 0:df6fdd9b99f0 353 NVIC_DisableIRQ(ADC_IRQn);
mbedalvaro 0:df6fdd9b99f0 354 }
mbedalvaro 0:df6fdd9b99f0 355 }
mbedalvaro 0:df6fdd9b99f0 356
mbedalvaro 0:df6fdd9b99f0 357 //Return enable/disable state of interrupt for pin
mbedalvaro 0:df6fdd9b99f0 358 int ADC::interrupt_state(PinName pin) {
mbedalvaro 0:df6fdd9b99f0 359 int chan;
mbedalvaro 0:df6fdd9b99f0 360
mbedalvaro 0:df6fdd9b99f0 361 chan = _pin_to_channel(pin);
mbedalvaro 0:df6fdd9b99f0 362 return((LPC_ADC->ADINTEN >> chan) & 0x01);
mbedalvaro 0:df6fdd9b99f0 363 }
mbedalvaro 0:df6fdd9b99f0 364
mbedalvaro 0:df6fdd9b99f0 365
mbedalvaro 0:df6fdd9b99f0 366 //Attach custom interrupt handler replacing default
mbedalvaro 0:df6fdd9b99f0 367 void ADC::attach(void(*fptr)(void)) {
mbedalvaro 0:df6fdd9b99f0 368 //* Attach IRQ
mbedalvaro 0:df6fdd9b99f0 369 NVIC_SetVector(ADC_IRQn, (uint32_t)fptr);
mbedalvaro 0:df6fdd9b99f0 370 }
mbedalvaro 0:df6fdd9b99f0 371
mbedalvaro 0:df6fdd9b99f0 372 //Restore default interrupt handler
mbedalvaro 0:df6fdd9b99f0 373 void ADC::detach(void) {
mbedalvaro 0:df6fdd9b99f0 374 //* Attach IRQ
mbedalvaro 0:df6fdd9b99f0 375 instance = this;
mbedalvaro 0:df6fdd9b99f0 376 NVIC_SetVector(ADC_IRQn, (uint32_t)&_adcisr);
mbedalvaro 0:df6fdd9b99f0 377 }
mbedalvaro 0:df6fdd9b99f0 378
mbedalvaro 0:df6fdd9b99f0 379
mbedalvaro 0:df6fdd9b99f0 380 //Append interrupt handler for pin to function isr
mbedalvaro 0:df6fdd9b99f0 381 void ADC::append(PinName pin, void(*fptr)(uint32_t value)) {
mbedalvaro 0:df6fdd9b99f0 382 int chan;
mbedalvaro 0:df6fdd9b99f0 383
mbedalvaro 0:df6fdd9b99f0 384 chan = _pin_to_channel(pin);
mbedalvaro 0:df6fdd9b99f0 385 _adc_isr[chan] = fptr;
mbedalvaro 0:df6fdd9b99f0 386 }
mbedalvaro 0:df6fdd9b99f0 387
mbedalvaro 0:df6fdd9b99f0 388 //Append interrupt handler for pin to function isr
mbedalvaro 0:df6fdd9b99f0 389 void ADC::unappend(PinName pin) {
mbedalvaro 0:df6fdd9b99f0 390 int chan;
mbedalvaro 0:df6fdd9b99f0 391
mbedalvaro 0:df6fdd9b99f0 392 chan = _pin_to_channel(pin);
mbedalvaro 0:df6fdd9b99f0 393 _adc_isr[chan] = NULL;
mbedalvaro 0:df6fdd9b99f0 394 }
mbedalvaro 0:df6fdd9b99f0 395
mbedalvaro 0:df6fdd9b99f0 396 //Unappend global interrupt handler to function isr
mbedalvaro 0:df6fdd9b99f0 397 void ADC::append(void(*fptr)(int chan, uint32_t value)) {
mbedalvaro 0:df6fdd9b99f0 398 _adc_g_isr = fptr;
mbedalvaro 0:df6fdd9b99f0 399 }
mbedalvaro 0:df6fdd9b99f0 400
mbedalvaro 0:df6fdd9b99f0 401 //Detach global interrupt handler to function isr
mbedalvaro 0:df6fdd9b99f0 402 void ADC::unappend() {
mbedalvaro 0:df6fdd9b99f0 403 _adc_g_isr = NULL;
mbedalvaro 0:df6fdd9b99f0 404 }
mbedalvaro 0:df6fdd9b99f0 405
mbedalvaro 0:df6fdd9b99f0 406 //Set ADC offset
mbedalvaro 0:df6fdd9b99f0 407 void offset(int offset) {
mbedalvaro 0:df6fdd9b99f0 408 LPC_ADC->ADTRM &= ~(0x07 << 4);
mbedalvaro 0:df6fdd9b99f0 409 LPC_ADC->ADTRM |= (offset & 0x07) << 4;
mbedalvaro 0:df6fdd9b99f0 410 }
mbedalvaro 0:df6fdd9b99f0 411
mbedalvaro 0:df6fdd9b99f0 412 //Return current ADC offset
mbedalvaro 0:df6fdd9b99f0 413 int offset(void) {
mbedalvaro 0:df6fdd9b99f0 414 return((LPC_ADC->ADTRM >> 4) & 0x07);
mbedalvaro 0:df6fdd9b99f0 415 }
mbedalvaro 0:df6fdd9b99f0 416
mbedalvaro 0:df6fdd9b99f0 417 //Return value of ADC on pin
mbedalvaro 0:df6fdd9b99f0 418 int ADC::read(PinName pin) {
mbedalvaro 0:df6fdd9b99f0 419 //Reset DONE and OVERRUN flags of interrupt handled ADC data
mbedalvaro 0:df6fdd9b99f0 420 _adc_data[_pin_to_channel(pin)] &= ~(((uint32_t)0x01 << 31) | ((uint32_t)0x01 << 30));
mbedalvaro 0:df6fdd9b99f0 421 //Return value
mbedalvaro 0:df6fdd9b99f0 422 return((_data_of_pin(pin) >> 4) & 0xFFF);
mbedalvaro 0:df6fdd9b99f0 423 }
mbedalvaro 0:df6fdd9b99f0 424
mbedalvaro 0:df6fdd9b99f0 425 //Return DONE flag of ADC on pin
mbedalvaro 0:df6fdd9b99f0 426 int ADC::done(PinName pin) {
mbedalvaro 0:df6fdd9b99f0 427 return((_data_of_pin(pin) >> 31) & 0x01);
mbedalvaro 0:df6fdd9b99f0 428 }
mbedalvaro 0:df6fdd9b99f0 429
mbedalvaro 0:df6fdd9b99f0 430 //Return OVERRUN flag of ADC on pin
mbedalvaro 0:df6fdd9b99f0 431 int ADC::overrun(PinName pin) {
mbedalvaro 0:df6fdd9b99f0 432 return((_data_of_pin(pin) >> 30) & 0x01);
mbedalvaro 0:df6fdd9b99f0 433 }
mbedalvaro 0:df6fdd9b99f0 434
mbedalvaro 0:df6fdd9b99f0 435 int ADC::actual_adc_clock(void) {
mbedalvaro 0:df6fdd9b99f0 436 return(_adc_clk_freq);
mbedalvaro 0:df6fdd9b99f0 437 }
mbedalvaro 0:df6fdd9b99f0 438
mbedalvaro 0:df6fdd9b99f0 439 int ADC::actual_sample_rate(void) {
mbedalvaro 0:df6fdd9b99f0 440 return(_adc_clk_freq / CLKS_PER_SAMPLE);
mbedalvaro 0:df6fdd9b99f0 441 }