Laser Sensing Display for UI interfaces in the real world

Dependencies:   mbed

Fork of skinGames_forktest by Alvaro Cassinelli

Committer:
mbedalvaro
Date:
Sun Sep 23 10:11:43 2012 +0000
Revision:
31:5f039cbddee8
this is quite nice, but  I am going to make a deep modification of the bouncing principle: instead of depending on the penetration, it will just be a factor over the speed (perfect elastic bouncing being factorElastic=1, and perfectly absorption=0);

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbedalvaro 31:5f039cbddee8 1 /* mbed Library - ADC
mbedalvaro 31:5f039cbddee8 2 * Copyright (c) 2010, sblandford
mbedalvaro 31:5f039cbddee8 3 * released under MIT license http://mbed.org/licence/mit
mbedalvaro 31:5f039cbddee8 4 */
mbedalvaro 31:5f039cbddee8 5 #include "mbed.h"
mbedalvaro 31:5f039cbddee8 6 #include "adc.h"
mbedalvaro 31:5f039cbddee8 7
mbedalvaro 31:5f039cbddee8 8
mbedalvaro 31:5f039cbddee8 9 ADC adc(ADC_SAMPLE_RATE, 1);
mbedalvaro 31:5f039cbddee8 10
mbedalvaro 31:5f039cbddee8 11 ADC *ADC::instance;
mbedalvaro 31:5f039cbddee8 12
mbedalvaro 31:5f039cbddee8 13 ADC::ADC(int sample_rate, int cclk_div)
mbedalvaro 31:5f039cbddee8 14 {
mbedalvaro 31:5f039cbddee8 15
mbedalvaro 31:5f039cbddee8 16 int i, adc_clk_freq, pclk, clock_div, max_div=1;
mbedalvaro 31:5f039cbddee8 17
mbedalvaro 31:5f039cbddee8 18 //Work out CCLK
mbedalvaro 31:5f039cbddee8 19 adc_clk_freq=CLKS_PER_SAMPLE*sample_rate;
mbedalvaro 31:5f039cbddee8 20 int m = (LPC_SC->PLL0CFG & 0xFFFF) + 1;
mbedalvaro 31:5f039cbddee8 21 int n = (LPC_SC->PLL0CFG >> 16) + 1;
mbedalvaro 31:5f039cbddee8 22 int cclkdiv = LPC_SC->CCLKCFG + 1;
mbedalvaro 31:5f039cbddee8 23 int Fcco = (2 * m * XTAL_FREQ) / n;
mbedalvaro 31:5f039cbddee8 24 int cclk = Fcco / cclkdiv;
mbedalvaro 31:5f039cbddee8 25
mbedalvaro 31:5f039cbddee8 26 //Power up the ADC
mbedalvaro 31:5f039cbddee8 27 LPC_SC->PCONP |= (1 << 12);
mbedalvaro 31:5f039cbddee8 28 //Set clock at cclk / 1.
mbedalvaro 31:5f039cbddee8 29 LPC_SC->PCLKSEL0 &= ~(0x3 << 24);
mbedalvaro 31:5f039cbddee8 30 switch (cclk_div) {
mbedalvaro 31:5f039cbddee8 31 case 1:
mbedalvaro 31:5f039cbddee8 32 LPC_SC->PCLKSEL0 |= 0x1 << 24;
mbedalvaro 31:5f039cbddee8 33 break;
mbedalvaro 31:5f039cbddee8 34 case 2:
mbedalvaro 31:5f039cbddee8 35 LPC_SC->PCLKSEL0 |= 0x2 << 24;
mbedalvaro 31:5f039cbddee8 36 break;
mbedalvaro 31:5f039cbddee8 37 case 4:
mbedalvaro 31:5f039cbddee8 38 LPC_SC->PCLKSEL0 |= 0x0 << 24;
mbedalvaro 31:5f039cbddee8 39 break;
mbedalvaro 31:5f039cbddee8 40 case 8:
mbedalvaro 31:5f039cbddee8 41 LPC_SC->PCLKSEL0 |= 0x3 << 24;
mbedalvaro 31:5f039cbddee8 42 break;
mbedalvaro 31:5f039cbddee8 43 default:
mbedalvaro 31:5f039cbddee8 44 fprintf(stderr, "Warning: ADC CCLK clock divider must be 1, 2, 4 or 8. %u supplied.\n",
mbedalvaro 31:5f039cbddee8 45 cclk_div);
mbedalvaro 31:5f039cbddee8 46 fprintf(stderr, "Defaulting to 1.\n");
mbedalvaro 31:5f039cbddee8 47 LPC_SC->PCLKSEL0 |= 0x1 << 24;
mbedalvaro 31:5f039cbddee8 48 break;
mbedalvaro 31:5f039cbddee8 49 }
mbedalvaro 31:5f039cbddee8 50 pclk = cclk / cclk_div;
mbedalvaro 31:5f039cbddee8 51 clock_div=pclk / adc_clk_freq;
mbedalvaro 31:5f039cbddee8 52
mbedalvaro 31:5f039cbddee8 53 if (clock_div > 0xFF) {
mbedalvaro 31:5f039cbddee8 54 fprintf(stderr, "Warning: Clock division is %u which is above 255 limit. Re-Setting at limit.\n",
mbedalvaro 31:5f039cbddee8 55 clock_div);
mbedalvaro 31:5f039cbddee8 56 clock_div=0xFF;
mbedalvaro 31:5f039cbddee8 57 }
mbedalvaro 31:5f039cbddee8 58 if (clock_div == 0) {
mbedalvaro 31:5f039cbddee8 59 fprintf(stderr, "Warning: Clock division is 0. Re-Setting to 1.\n");
mbedalvaro 31:5f039cbddee8 60 clock_div=1;
mbedalvaro 31:5f039cbddee8 61 }
mbedalvaro 31:5f039cbddee8 62
mbedalvaro 31:5f039cbddee8 63 _adc_clk_freq=pclk / clock_div;
mbedalvaro 31:5f039cbddee8 64 if (_adc_clk_freq > MAX_ADC_CLOCK) {
mbedalvaro 31:5f039cbddee8 65 fprintf(stderr, "Warning: Actual ADC sample rate of %u which is above %u limit\n",
mbedalvaro 31:5f039cbddee8 66 _adc_clk_freq / CLKS_PER_SAMPLE, MAX_ADC_CLOCK / CLKS_PER_SAMPLE);
mbedalvaro 31:5f039cbddee8 67 while ((pclk / max_div) > MAX_ADC_CLOCK) max_div++;
mbedalvaro 31:5f039cbddee8 68 fprintf(stderr, "Maximum recommended sample rate is %u\n", (pclk / max_div) / CLKS_PER_SAMPLE);
mbedalvaro 31:5f039cbddee8 69 }
mbedalvaro 31:5f039cbddee8 70
mbedalvaro 31:5f039cbddee8 71 LPC_ADC->ADCR =
mbedalvaro 31:5f039cbddee8 72 ((clock_div - 1 ) << 8 ) | //Clkdiv
mbedalvaro 31:5f039cbddee8 73 ( 1 << 21 ); //A/D operational
mbedalvaro 31:5f039cbddee8 74
mbedalvaro 31:5f039cbddee8 75 //Default no channels enabled
mbedalvaro 31:5f039cbddee8 76 LPC_ADC->ADCR &= ~0xFF;
mbedalvaro 31:5f039cbddee8 77 //Default NULL global custom isr
mbedalvaro 31:5f039cbddee8 78 _adc_g_isr = NULL;
mbedalvaro 31:5f039cbddee8 79 //Initialize arrays
mbedalvaro 31:5f039cbddee8 80 for (i=7; i>=0; i--) {
mbedalvaro 31:5f039cbddee8 81 _adc_data[i] = 0;
mbedalvaro 31:5f039cbddee8 82 _adc_isr[i] = NULL;
mbedalvaro 31:5f039cbddee8 83 }
mbedalvaro 31:5f039cbddee8 84
mbedalvaro 31:5f039cbddee8 85
mbedalvaro 31:5f039cbddee8 86 //* Attach IRQ
mbedalvaro 31:5f039cbddee8 87 instance = this;
mbedalvaro 31:5f039cbddee8 88 NVIC_SetVector(ADC_IRQn, (uint32_t)&_adcisr);
mbedalvaro 31:5f039cbddee8 89
mbedalvaro 31:5f039cbddee8 90 //Disable global interrupt
mbedalvaro 31:5f039cbddee8 91 LPC_ADC->ADINTEN &= ~0x100;
mbedalvaro 31:5f039cbddee8 92
mbedalvaro 31:5f039cbddee8 93 };
mbedalvaro 31:5f039cbddee8 94
mbedalvaro 31:5f039cbddee8 95 void ADC::_adcisr(void)
mbedalvaro 31:5f039cbddee8 96 {
mbedalvaro 31:5f039cbddee8 97 instance->adcisr();
mbedalvaro 31:5f039cbddee8 98 }
mbedalvaro 31:5f039cbddee8 99
mbedalvaro 31:5f039cbddee8 100
mbedalvaro 31:5f039cbddee8 101 void ADC::adcisr(void)
mbedalvaro 31:5f039cbddee8 102 {
mbedalvaro 31:5f039cbddee8 103 uint32_t stat;
mbedalvaro 31:5f039cbddee8 104 int chan;
mbedalvaro 31:5f039cbddee8 105
mbedalvaro 31:5f039cbddee8 106 // Read status
mbedalvaro 31:5f039cbddee8 107 stat = LPC_ADC->ADSTAT;
mbedalvaro 31:5f039cbddee8 108 //Scan channels for over-run or done and update array
mbedalvaro 31:5f039cbddee8 109 if (stat & 0x0101) _adc_data[0] = LPC_ADC->ADDR0;
mbedalvaro 31:5f039cbddee8 110 if (stat & 0x0202) _adc_data[1] = LPC_ADC->ADDR1;
mbedalvaro 31:5f039cbddee8 111 if (stat & 0x0404) _adc_data[2] = LPC_ADC->ADDR2;
mbedalvaro 31:5f039cbddee8 112 if (stat & 0x0808) _adc_data[3] = LPC_ADC->ADDR3;
mbedalvaro 31:5f039cbddee8 113 if (stat & 0x1010) _adc_data[4] = LPC_ADC->ADDR4;
mbedalvaro 31:5f039cbddee8 114 if (stat & 0x2020) _adc_data[5] = LPC_ADC->ADDR5;
mbedalvaro 31:5f039cbddee8 115 if (stat & 0x4040) _adc_data[6] = LPC_ADC->ADDR6;
mbedalvaro 31:5f039cbddee8 116 if (stat & 0x8080) _adc_data[7] = LPC_ADC->ADDR7;
mbedalvaro 31:5f039cbddee8 117
mbedalvaro 31:5f039cbddee8 118 // Channel that triggered interrupt
mbedalvaro 31:5f039cbddee8 119 chan = (LPC_ADC->ADGDR >> 24) & 0x07;
mbedalvaro 31:5f039cbddee8 120 //User defined interrupt handlers
mbedalvaro 31:5f039cbddee8 121 if (_adc_isr[chan] != NULL)
mbedalvaro 31:5f039cbddee8 122 _adc_isr[chan](_adc_data[chan]);
mbedalvaro 31:5f039cbddee8 123 if (_adc_g_isr != NULL)
mbedalvaro 31:5f039cbddee8 124 _adc_g_isr(chan, _adc_data[chan]);
mbedalvaro 31:5f039cbddee8 125 return;
mbedalvaro 31:5f039cbddee8 126 }
mbedalvaro 31:5f039cbddee8 127
mbedalvaro 31:5f039cbddee8 128 int ADC::_pin_to_channel(PinName pin) {
mbedalvaro 31:5f039cbddee8 129 int chan;
mbedalvaro 31:5f039cbddee8 130 switch (pin) {
mbedalvaro 31:5f039cbddee8 131 case p15://=p0.23 of LPC1768
mbedalvaro 31:5f039cbddee8 132 default:
mbedalvaro 31:5f039cbddee8 133 chan=0;
mbedalvaro 31:5f039cbddee8 134 break;
mbedalvaro 31:5f039cbddee8 135 case p16://=p0.24 of LPC1768
mbedalvaro 31:5f039cbddee8 136 chan=1;
mbedalvaro 31:5f039cbddee8 137 break;
mbedalvaro 31:5f039cbddee8 138 case p17://=p0.25 of LPC1768
mbedalvaro 31:5f039cbddee8 139 chan=2;
mbedalvaro 31:5f039cbddee8 140 break;
mbedalvaro 31:5f039cbddee8 141 case p18://=p0.26 of LPC1768
mbedalvaro 31:5f039cbddee8 142 chan=3;
mbedalvaro 31:5f039cbddee8 143 break;
mbedalvaro 31:5f039cbddee8 144 case p19://=p1.30 of LPC1768
mbedalvaro 31:5f039cbddee8 145 chan=4;
mbedalvaro 31:5f039cbddee8 146 break;
mbedalvaro 31:5f039cbddee8 147 case p20://=p1.31 of LPC1768
mbedalvaro 31:5f039cbddee8 148 chan=5;
mbedalvaro 31:5f039cbddee8 149 break;
mbedalvaro 31:5f039cbddee8 150 }
mbedalvaro 31:5f039cbddee8 151 return(chan);
mbedalvaro 31:5f039cbddee8 152 }
mbedalvaro 31:5f039cbddee8 153
mbedalvaro 31:5f039cbddee8 154 PinName ADC::channel_to_pin(int chan) {
mbedalvaro 31:5f039cbddee8 155 const PinName pin[8]={p15, p16, p17, p18, p19, p20, p15, p15};
mbedalvaro 31:5f039cbddee8 156
mbedalvaro 31:5f039cbddee8 157 if ((chan < 0) || (chan > 5))
mbedalvaro 31:5f039cbddee8 158 fprintf(stderr, "ADC channel %u is outside range available to MBED pins.\n", chan);
mbedalvaro 31:5f039cbddee8 159 return(pin[chan & 0x07]);
mbedalvaro 31:5f039cbddee8 160 }
mbedalvaro 31:5f039cbddee8 161
mbedalvaro 31:5f039cbddee8 162
mbedalvaro 31:5f039cbddee8 163 int ADC::channel_to_pin_number(int chan) {
mbedalvaro 31:5f039cbddee8 164 const int pin[8]={15, 16, 17, 18, 19, 20, 0, 0};
mbedalvaro 31:5f039cbddee8 165
mbedalvaro 31:5f039cbddee8 166 if ((chan < 0) || (chan > 5))
mbedalvaro 31:5f039cbddee8 167 fprintf(stderr, "ADC channel %u is outside range available to MBED pins.\n", chan);
mbedalvaro 31:5f039cbddee8 168 return(pin[chan & 0x07]);
mbedalvaro 31:5f039cbddee8 169 }
mbedalvaro 31:5f039cbddee8 170
mbedalvaro 31:5f039cbddee8 171
mbedalvaro 31:5f039cbddee8 172 uint32_t ADC::_data_of_pin(PinName pin) {
mbedalvaro 31:5f039cbddee8 173 //If in burst mode and at least one interrupt enabled then
mbedalvaro 31:5f039cbddee8 174 //take all values from _adc_data
mbedalvaro 31:5f039cbddee8 175 if (burst() && (LPC_ADC->ADINTEN & 0x3F)) {
mbedalvaro 31:5f039cbddee8 176 return(_adc_data[_pin_to_channel(pin)]);
mbedalvaro 31:5f039cbddee8 177 } else {
mbedalvaro 31:5f039cbddee8 178 //Return current register value or last value from interrupt
mbedalvaro 31:5f039cbddee8 179 switch (pin) {
mbedalvaro 31:5f039cbddee8 180 case p15://=p0.23 of LPC1768
mbedalvaro 31:5f039cbddee8 181 default:
mbedalvaro 31:5f039cbddee8 182 return(LPC_ADC->ADINTEN & 0x01?_adc_data[0]:LPC_ADC->ADDR0);
mbedalvaro 31:5f039cbddee8 183 case p16://=p0.24 of LPC1768
mbedalvaro 31:5f039cbddee8 184 return(LPC_ADC->ADINTEN & 0x02?_adc_data[1]:LPC_ADC->ADDR1);
mbedalvaro 31:5f039cbddee8 185 case p17://=p0.25 of LPC1768
mbedalvaro 31:5f039cbddee8 186 return(LPC_ADC->ADINTEN & 0x04?_adc_data[2]:LPC_ADC->ADDR2);
mbedalvaro 31:5f039cbddee8 187 case p18://=p0.26 of LPC1768:
mbedalvaro 31:5f039cbddee8 188 return(LPC_ADC->ADINTEN & 0x08?_adc_data[3]:LPC_ADC->ADDR3);
mbedalvaro 31:5f039cbddee8 189 case p19://=p1.30 of LPC1768
mbedalvaro 31:5f039cbddee8 190 return(LPC_ADC->ADINTEN & 0x10?_adc_data[4]:LPC_ADC->ADDR4);
mbedalvaro 31:5f039cbddee8 191 case p20://=p1.31 of LPC1768
mbedalvaro 31:5f039cbddee8 192 return(LPC_ADC->ADINTEN & 0x20?_adc_data[5]:LPC_ADC->ADDR5);
mbedalvaro 31:5f039cbddee8 193 }
mbedalvaro 31:5f039cbddee8 194 }
mbedalvaro 31:5f039cbddee8 195 }
mbedalvaro 31:5f039cbddee8 196
mbedalvaro 31:5f039cbddee8 197 //Enable or disable an ADC pin
mbedalvaro 31:5f039cbddee8 198 void ADC::setup(PinName pin, int state) {
mbedalvaro 31:5f039cbddee8 199 int chan;
mbedalvaro 31:5f039cbddee8 200 chan=_pin_to_channel(pin);
mbedalvaro 31:5f039cbddee8 201 if ((state & 1) == 1) {
mbedalvaro 31:5f039cbddee8 202 switch(pin) {
mbedalvaro 31:5f039cbddee8 203 case p15://=p0.23 of LPC1768
mbedalvaro 31:5f039cbddee8 204 default:
mbedalvaro 31:5f039cbddee8 205 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 14);
mbedalvaro 31:5f039cbddee8 206 LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 14;
mbedalvaro 31:5f039cbddee8 207 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 14);
mbedalvaro 31:5f039cbddee8 208 LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 14;
mbedalvaro 31:5f039cbddee8 209 break;
mbedalvaro 31:5f039cbddee8 210 case p16://=p0.24 of LPC1768
mbedalvaro 31:5f039cbddee8 211 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 16);
mbedalvaro 31:5f039cbddee8 212 LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 16;
mbedalvaro 31:5f039cbddee8 213 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 16);
mbedalvaro 31:5f039cbddee8 214 LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 16;
mbedalvaro 31:5f039cbddee8 215 break;
mbedalvaro 31:5f039cbddee8 216 case p17://=p0.25 of LPC1768
mbedalvaro 31:5f039cbddee8 217 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 18);
mbedalvaro 31:5f039cbddee8 218 LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 18;
mbedalvaro 31:5f039cbddee8 219 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 18);
mbedalvaro 31:5f039cbddee8 220 LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 18;
mbedalvaro 31:5f039cbddee8 221 break;
mbedalvaro 31:5f039cbddee8 222 case p18://=p0.26 of LPC1768:
mbedalvaro 31:5f039cbddee8 223 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 20);
mbedalvaro 31:5f039cbddee8 224 LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 20;
mbedalvaro 31:5f039cbddee8 225 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 20);
mbedalvaro 31:5f039cbddee8 226 LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 20;
mbedalvaro 31:5f039cbddee8 227 break;
mbedalvaro 31:5f039cbddee8 228 case p19://=p1.30 of LPC1768
mbedalvaro 31:5f039cbddee8 229 LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 28);
mbedalvaro 31:5f039cbddee8 230 LPC_PINCON->PINSEL3 |= (unsigned int)0x3 << 28;
mbedalvaro 31:5f039cbddee8 231 LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 28);
mbedalvaro 31:5f039cbddee8 232 LPC_PINCON->PINMODE3 |= (unsigned int)0x2 << 28;
mbedalvaro 31:5f039cbddee8 233 break;
mbedalvaro 31:5f039cbddee8 234 case p20://=p1.31 of LPC1768
mbedalvaro 31:5f039cbddee8 235 LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 30);
mbedalvaro 31:5f039cbddee8 236 LPC_PINCON->PINSEL3 |= (unsigned int)0x3 << 30;
mbedalvaro 31:5f039cbddee8 237 LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 30);
mbedalvaro 31:5f039cbddee8 238 LPC_PINCON->PINMODE3 |= (unsigned int)0x2 << 30;
mbedalvaro 31:5f039cbddee8 239 break;
mbedalvaro 31:5f039cbddee8 240 }
mbedalvaro 31:5f039cbddee8 241 //Only one channel can be selected at a time if not in burst mode
mbedalvaro 31:5f039cbddee8 242 if (!burst()) LPC_ADC->ADCR &= ~0xFF;
mbedalvaro 31:5f039cbddee8 243 //Select channel
mbedalvaro 31:5f039cbddee8 244 LPC_ADC->ADCR |= (1 << chan);
mbedalvaro 31:5f039cbddee8 245 }
mbedalvaro 31:5f039cbddee8 246 else {
mbedalvaro 31:5f039cbddee8 247 switch(pin) {
mbedalvaro 31:5f039cbddee8 248 case p15://=p0.23 of LPC1768
mbedalvaro 31:5f039cbddee8 249 default:
mbedalvaro 31:5f039cbddee8 250 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 14);
mbedalvaro 31:5f039cbddee8 251 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 14);
mbedalvaro 31:5f039cbddee8 252 break;
mbedalvaro 31:5f039cbddee8 253 case p16://=p0.24 of LPC1768
mbedalvaro 31:5f039cbddee8 254 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 16);
mbedalvaro 31:5f039cbddee8 255 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 16);
mbedalvaro 31:5f039cbddee8 256 break;
mbedalvaro 31:5f039cbddee8 257 case p17://=p0.25 of LPC1768
mbedalvaro 31:5f039cbddee8 258 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 18);
mbedalvaro 31:5f039cbddee8 259 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 18);
mbedalvaro 31:5f039cbddee8 260 break;
mbedalvaro 31:5f039cbddee8 261 case p18://=p0.26 of LPC1768:
mbedalvaro 31:5f039cbddee8 262 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 20);
mbedalvaro 31:5f039cbddee8 263 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 20);
mbedalvaro 31:5f039cbddee8 264 break;
mbedalvaro 31:5f039cbddee8 265 case p19://=p1.30 of LPC1768
mbedalvaro 31:5f039cbddee8 266 LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 28);
mbedalvaro 31:5f039cbddee8 267 LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 28);
mbedalvaro 31:5f039cbddee8 268 break;
mbedalvaro 31:5f039cbddee8 269 case p20://=p1.31 of LPC1768
mbedalvaro 31:5f039cbddee8 270 LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 30);
mbedalvaro 31:5f039cbddee8 271 LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 30);
mbedalvaro 31:5f039cbddee8 272 break;
mbedalvaro 31:5f039cbddee8 273 }
mbedalvaro 31:5f039cbddee8 274 LPC_ADC->ADCR &= ~(1 << chan);
mbedalvaro 31:5f039cbddee8 275 }
mbedalvaro 31:5f039cbddee8 276 }
mbedalvaro 31:5f039cbddee8 277 //Return channel enabled/disabled state
mbedalvaro 31:5f039cbddee8 278 int ADC::setup(PinName pin) {
mbedalvaro 31:5f039cbddee8 279 int chan;
mbedalvaro 31:5f039cbddee8 280
mbedalvaro 31:5f039cbddee8 281 chan = _pin_to_channel(pin);
mbedalvaro 31:5f039cbddee8 282 return((LPC_ADC->ADCR & (1 << chan)) >> chan);
mbedalvaro 31:5f039cbddee8 283 }
mbedalvaro 31:5f039cbddee8 284
mbedalvaro 31:5f039cbddee8 285 //Select channel already setup
mbedalvaro 31:5f039cbddee8 286 void ADC::select(PinName pin) {
mbedalvaro 31:5f039cbddee8 287 int chan;
mbedalvaro 31:5f039cbddee8 288
mbedalvaro 31:5f039cbddee8 289 //Only one channel can be selected at a time if not in burst mode
mbedalvaro 31:5f039cbddee8 290 if (!burst()) LPC_ADC->ADCR &= ~0xFF;
mbedalvaro 31:5f039cbddee8 291 //Select channel
mbedalvaro 31:5f039cbddee8 292 chan = _pin_to_channel(pin);
mbedalvaro 31:5f039cbddee8 293 LPC_ADC->ADCR |= (1 << chan);
mbedalvaro 31:5f039cbddee8 294 }
mbedalvaro 31:5f039cbddee8 295
mbedalvaro 31:5f039cbddee8 296 //Enable or disable burst mode
mbedalvaro 31:5f039cbddee8 297 void ADC::burst(int state) {
mbedalvaro 31:5f039cbddee8 298 if ((state & 1) == 1) {
mbedalvaro 31:5f039cbddee8 299 if (startmode(0) != 0)
mbedalvaro 31:5f039cbddee8 300 fprintf(stderr, "Warning. startmode is %u. Must be 0 for burst mode.\n", startmode(0));
mbedalvaro 31:5f039cbddee8 301 LPC_ADC->ADCR |= (1 << 16);
mbedalvaro 31:5f039cbddee8 302 }
mbedalvaro 31:5f039cbddee8 303 else
mbedalvaro 31:5f039cbddee8 304 LPC_ADC->ADCR &= ~(1 << 16);
mbedalvaro 31:5f039cbddee8 305 }
mbedalvaro 31:5f039cbddee8 306 //Return burst mode state
mbedalvaro 31:5f039cbddee8 307 int ADC::burst(void) {
mbedalvaro 31:5f039cbddee8 308 return((LPC_ADC->ADCR & (1 << 16)) >> 16);
mbedalvaro 31:5f039cbddee8 309 }
mbedalvaro 31:5f039cbddee8 310
mbedalvaro 31:5f039cbddee8 311 //Set startmode and edge
mbedalvaro 31:5f039cbddee8 312 void ADC::startmode(int mode, int edge) {
mbedalvaro 31:5f039cbddee8 313 int lpc_adc_temp;
mbedalvaro 31:5f039cbddee8 314
mbedalvaro 31:5f039cbddee8 315 //Reset start mode and edge bit,
mbedalvaro 31:5f039cbddee8 316 lpc_adc_temp = LPC_ADC->ADCR & ~(0x0F << 24);
mbedalvaro 31:5f039cbddee8 317 //Write with new values
mbedalvaro 31:5f039cbddee8 318 lpc_adc_temp |= ((mode & 7) << 24) | ((edge & 1) << 27);
mbedalvaro 31:5f039cbddee8 319 LPC_ADC->ADCR = lpc_adc_temp;
mbedalvaro 31:5f039cbddee8 320 }
mbedalvaro 31:5f039cbddee8 321
mbedalvaro 31:5f039cbddee8 322 //Return startmode state according to mode_edge=0: mode and mode_edge=1: edge
mbedalvaro 31:5f039cbddee8 323 int ADC::startmode(int mode_edge){
mbedalvaro 31:5f039cbddee8 324 switch (mode_edge) {
mbedalvaro 31:5f039cbddee8 325 case 0:
mbedalvaro 31:5f039cbddee8 326 default:
mbedalvaro 31:5f039cbddee8 327 return((LPC_ADC->ADCR >> 24) & 0x07);
mbedalvaro 31:5f039cbddee8 328 case 1:
mbedalvaro 31:5f039cbddee8 329 return((LPC_ADC->ADCR >> 27) & 0x01);
mbedalvaro 31:5f039cbddee8 330 }
mbedalvaro 31:5f039cbddee8 331 }
mbedalvaro 31:5f039cbddee8 332
mbedalvaro 31:5f039cbddee8 333 //Start ADC conversion
mbedalvaro 31:5f039cbddee8 334 void ADC::start(void) {
mbedalvaro 31:5f039cbddee8 335 startmode(1,0);
mbedalvaro 31:5f039cbddee8 336 }
mbedalvaro 31:5f039cbddee8 337
mbedalvaro 31:5f039cbddee8 338
mbedalvaro 31:5f039cbddee8 339 //Set interrupt enable/disable for pin to state
mbedalvaro 31:5f039cbddee8 340 void ADC::interrupt_state(PinName pin, int state) {
mbedalvaro 31:5f039cbddee8 341 int chan;
mbedalvaro 31:5f039cbddee8 342
mbedalvaro 31:5f039cbddee8 343 chan = _pin_to_channel(pin);
mbedalvaro 31:5f039cbddee8 344 if (state == 1) {
mbedalvaro 31:5f039cbddee8 345 LPC_ADC->ADINTEN &= ~0x100;
mbedalvaro 31:5f039cbddee8 346 LPC_ADC->ADINTEN |= 1 << chan;
mbedalvaro 31:5f039cbddee8 347 /* Enable the ADC Interrupt */
mbedalvaro 31:5f039cbddee8 348 NVIC_EnableIRQ(ADC_IRQn);
mbedalvaro 31:5f039cbddee8 349 } else {
mbedalvaro 31:5f039cbddee8 350 LPC_ADC->ADINTEN &= ~( 1 << chan );
mbedalvaro 31:5f039cbddee8 351 //Disable interrrupt if no active pins left
mbedalvaro 31:5f039cbddee8 352 if ((LPC_ADC->ADINTEN & 0xFF) == 0)
mbedalvaro 31:5f039cbddee8 353 NVIC_DisableIRQ(ADC_IRQn);
mbedalvaro 31:5f039cbddee8 354 }
mbedalvaro 31:5f039cbddee8 355 }
mbedalvaro 31:5f039cbddee8 356
mbedalvaro 31:5f039cbddee8 357 //Return enable/disable state of interrupt for pin
mbedalvaro 31:5f039cbddee8 358 int ADC::interrupt_state(PinName pin) {
mbedalvaro 31:5f039cbddee8 359 int chan;
mbedalvaro 31:5f039cbddee8 360
mbedalvaro 31:5f039cbddee8 361 chan = _pin_to_channel(pin);
mbedalvaro 31:5f039cbddee8 362 return((LPC_ADC->ADINTEN >> chan) & 0x01);
mbedalvaro 31:5f039cbddee8 363 }
mbedalvaro 31:5f039cbddee8 364
mbedalvaro 31:5f039cbddee8 365
mbedalvaro 31:5f039cbddee8 366 //Attach custom interrupt handler replacing default
mbedalvaro 31:5f039cbddee8 367 void ADC::attach(void(*fptr)(void)) {
mbedalvaro 31:5f039cbddee8 368 //* Attach IRQ
mbedalvaro 31:5f039cbddee8 369 NVIC_SetVector(ADC_IRQn, (uint32_t)fptr);
mbedalvaro 31:5f039cbddee8 370 }
mbedalvaro 31:5f039cbddee8 371
mbedalvaro 31:5f039cbddee8 372 //Restore default interrupt handler
mbedalvaro 31:5f039cbddee8 373 void ADC::detach(void) {
mbedalvaro 31:5f039cbddee8 374 //* Attach IRQ
mbedalvaro 31:5f039cbddee8 375 instance = this;
mbedalvaro 31:5f039cbddee8 376 NVIC_SetVector(ADC_IRQn, (uint32_t)&_adcisr);
mbedalvaro 31:5f039cbddee8 377 }
mbedalvaro 31:5f039cbddee8 378
mbedalvaro 31:5f039cbddee8 379
mbedalvaro 31:5f039cbddee8 380 //Append interrupt handler for pin to function isr
mbedalvaro 31:5f039cbddee8 381 void ADC::append(PinName pin, void(*fptr)(uint32_t value)) {
mbedalvaro 31:5f039cbddee8 382 int chan;
mbedalvaro 31:5f039cbddee8 383
mbedalvaro 31:5f039cbddee8 384 chan = _pin_to_channel(pin);
mbedalvaro 31:5f039cbddee8 385 _adc_isr[chan] = fptr;
mbedalvaro 31:5f039cbddee8 386 }
mbedalvaro 31:5f039cbddee8 387
mbedalvaro 31:5f039cbddee8 388 //Append interrupt handler for pin to function isr
mbedalvaro 31:5f039cbddee8 389 void ADC::unappend(PinName pin) {
mbedalvaro 31:5f039cbddee8 390 int chan;
mbedalvaro 31:5f039cbddee8 391
mbedalvaro 31:5f039cbddee8 392 chan = _pin_to_channel(pin);
mbedalvaro 31:5f039cbddee8 393 _adc_isr[chan] = NULL;
mbedalvaro 31:5f039cbddee8 394 }
mbedalvaro 31:5f039cbddee8 395
mbedalvaro 31:5f039cbddee8 396 //Unappend global interrupt handler to function isr
mbedalvaro 31:5f039cbddee8 397 void ADC::append(void(*fptr)(int chan, uint32_t value)) {
mbedalvaro 31:5f039cbddee8 398 _adc_g_isr = fptr;
mbedalvaro 31:5f039cbddee8 399 }
mbedalvaro 31:5f039cbddee8 400
mbedalvaro 31:5f039cbddee8 401 //Detach global interrupt handler to function isr
mbedalvaro 31:5f039cbddee8 402 void ADC::unappend() {
mbedalvaro 31:5f039cbddee8 403 _adc_g_isr = NULL;
mbedalvaro 31:5f039cbddee8 404 }
mbedalvaro 31:5f039cbddee8 405
mbedalvaro 31:5f039cbddee8 406 //Set ADC offset
mbedalvaro 31:5f039cbddee8 407 void offset(int offset) {
mbedalvaro 31:5f039cbddee8 408 LPC_ADC->ADTRM &= ~(0x07 << 4);
mbedalvaro 31:5f039cbddee8 409 LPC_ADC->ADTRM |= (offset & 0x07) << 4;
mbedalvaro 31:5f039cbddee8 410 }
mbedalvaro 31:5f039cbddee8 411
mbedalvaro 31:5f039cbddee8 412 //Return current ADC offset
mbedalvaro 31:5f039cbddee8 413 int offset(void) {
mbedalvaro 31:5f039cbddee8 414 return((LPC_ADC->ADTRM >> 4) & 0x07);
mbedalvaro 31:5f039cbddee8 415 }
mbedalvaro 31:5f039cbddee8 416
mbedalvaro 31:5f039cbddee8 417 //Return value of ADC on pin
mbedalvaro 31:5f039cbddee8 418 int ADC::read(PinName pin) {
mbedalvaro 31:5f039cbddee8 419 //Reset DONE and OVERRUN flags of interrupt handled ADC data
mbedalvaro 31:5f039cbddee8 420 _adc_data[_pin_to_channel(pin)] &= ~(((uint32_t)0x01 << 31) | ((uint32_t)0x01 << 30));
mbedalvaro 31:5f039cbddee8 421 //Return value
mbedalvaro 31:5f039cbddee8 422 return((_data_of_pin(pin) >> 4) & 0xFFF);
mbedalvaro 31:5f039cbddee8 423 }
mbedalvaro 31:5f039cbddee8 424
mbedalvaro 31:5f039cbddee8 425 //Return DONE flag of ADC on pin
mbedalvaro 31:5f039cbddee8 426 int ADC::done(PinName pin) {
mbedalvaro 31:5f039cbddee8 427 return((_data_of_pin(pin) >> 31) & 0x01);
mbedalvaro 31:5f039cbddee8 428 }
mbedalvaro 31:5f039cbddee8 429
mbedalvaro 31:5f039cbddee8 430 //Return OVERRUN flag of ADC on pin
mbedalvaro 31:5f039cbddee8 431 int ADC::overrun(PinName pin) {
mbedalvaro 31:5f039cbddee8 432 return((_data_of_pin(pin) >> 30) & 0x01);
mbedalvaro 31:5f039cbddee8 433 }
mbedalvaro 31:5f039cbddee8 434
mbedalvaro 31:5f039cbddee8 435 int ADC::actual_adc_clock(void) {
mbedalvaro 31:5f039cbddee8 436 return(_adc_clk_freq);
mbedalvaro 31:5f039cbddee8 437 }
mbedalvaro 31:5f039cbddee8 438
mbedalvaro 31:5f039cbddee8 439 int ADC::actual_sample_rate(void) {
mbedalvaro 31:5f039cbddee8 440 return(_adc_clk_freq / CLKS_PER_SAMPLE);
mbedalvaro 31:5f039cbddee8 441 }