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TARGET_NUCLEO_F746ZG/TARGET_STM/TARGET_STM32F7/i2c_device.h@134:ad3be0349dc5, 2017-01-16 (annotated)
- Committer:
- <>
- Date:
- Mon Jan 16 12:05:23 2017 +0000
- Revision:
- 134:ad3be0349dc5
- Parent:
- 132:9baf128c2fab
Release 134 of the mbed library
Ports for Upcoming Targets
Fixes and Changes
3488: Dev stm i2c v2 unitary functions https://github.com/ARMmbed/mbed-os/pull/3488
3492: Fix #3463 CAN read() return value https://github.com/ARMmbed/mbed-os/pull/3492
3503: [LPC15xx] Ensure that PWM=1 is resolved correctly https://github.com/ARMmbed/mbed-os/pull/3503
3504: [LPC15xx] CAN implementation improvements https://github.com/ARMmbed/mbed-os/pull/3504
3539: NUCLEO_F412ZG - Add support of TRNG peripheral https://github.com/ARMmbed/mbed-os/pull/3539
3540: STM: SPI: Initialize Rx in spi_master_write https://github.com/ARMmbed/mbed-os/pull/3540
3438: K64F: Add support for SERIAL ASYNCH API https://github.com/ARMmbed/mbed-os/pull/3438
3519: MCUXpresso: Fix ENET driver to enable interrupts after interrupt handler is set https://github.com/ARMmbed/mbed-os/pull/3519
3544: STM32L4 deepsleep improvement https://github.com/ARMmbed/mbed-os/pull/3544
3546: NUCLEO-F412ZG - Add CAN peripheral https://github.com/ARMmbed/mbed-os/pull/3546
3551: Fix I2C driver for RZ/A1H https://github.com/ARMmbed/mbed-os/pull/3551
3558: K64F UART Asynch API: Fix synchronization issue https://github.com/ARMmbed/mbed-os/pull/3558
3563: LPC4088 - Fix vector checksum https://github.com/ARMmbed/mbed-os/pull/3563
3567: Dev stm32 F0 v1.7.0 https://github.com/ARMmbed/mbed-os/pull/3567
3577: Fixes linking errors when building with debug profile https://github.com/ARMmbed/mbed-os/pull/3577
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 132:9baf128c2fab | 1 | /* mbed Microcontroller Library |
<> | 132:9baf128c2fab | 2 | ******************************************************************************* |
<> | 132:9baf128c2fab | 3 | * Copyright (c) 2015, STMicroelectronics |
<> | 132:9baf128c2fab | 4 | * All rights reserved. |
<> | 132:9baf128c2fab | 5 | * |
<> | 132:9baf128c2fab | 6 | * Redistribution and use in source and binary forms, with or without |
<> | 132:9baf128c2fab | 7 | * modification, are permitted provided that the following conditions are met: |
<> | 132:9baf128c2fab | 8 | * |
<> | 132:9baf128c2fab | 9 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 132:9baf128c2fab | 10 | * this list of conditions and the following disclaimer. |
<> | 132:9baf128c2fab | 11 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 132:9baf128c2fab | 12 | * this list of conditions and the following disclaimer in the documentation |
<> | 132:9baf128c2fab | 13 | * and/or other materials provided with the distribution. |
<> | 132:9baf128c2fab | 14 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
<> | 132:9baf128c2fab | 15 | * may be used to endorse or promote products derived from this software |
<> | 132:9baf128c2fab | 16 | * without specific prior written permission. |
<> | 132:9baf128c2fab | 17 | * |
<> | 132:9baf128c2fab | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 132:9baf128c2fab | 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 132:9baf128c2fab | 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 132:9baf128c2fab | 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
<> | 132:9baf128c2fab | 22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
<> | 132:9baf128c2fab | 23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
<> | 132:9baf128c2fab | 24 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
<> | 132:9baf128c2fab | 25 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
<> | 132:9baf128c2fab | 26 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
<> | 132:9baf128c2fab | 27 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 132:9baf128c2fab | 28 | ******************************************************************************* |
<> | 132:9baf128c2fab | 29 | */ |
<> | 132:9baf128c2fab | 30 | #ifndef MBED_I2C_DEVICE_H |
<> | 132:9baf128c2fab | 31 | #define MBED_I2C_DEVICE_H |
<> | 132:9baf128c2fab | 32 | |
<> | 132:9baf128c2fab | 33 | #include "cmsis.h" |
<> | 132:9baf128c2fab | 34 | |
<> | 132:9baf128c2fab | 35 | #ifdef __cplusplus |
<> | 132:9baf128c2fab | 36 | extern "C" { |
<> | 132:9baf128c2fab | 37 | #endif |
<> | 132:9baf128c2fab | 38 | |
<> | 132:9baf128c2fab | 39 | #ifdef DEVICE_I2C |
<> | 132:9baf128c2fab | 40 | |
<> | 132:9baf128c2fab | 41 | #define I2C_IP_VERSION_V2 |
<> | 132:9baf128c2fab | 42 | |
<> | 132:9baf128c2fab | 43 | #define I2C_IT_ALL (I2C_IT_ERRI|I2C_IT_TCI|I2C_IT_STOPI|I2C_IT_NACKI|I2C_IT_ADDRI|I2C_IT_RXI|I2C_IT_TXI) |
<> | 132:9baf128c2fab | 44 | |
<> | 132:9baf128c2fab | 45 | /* Family specifc settings for clock source */ |
<> | 132:9baf128c2fab | 46 | #define I2CAPI_I2C1_CLKSRC RCC_I2C1CLKSOURCE_PCLK1 |
<> | 132:9baf128c2fab | 47 | #define I2CAPI_I2C2_CLKSRC RCC_I2C2CLKSOURCE_PCLK1 |
<> | 132:9baf128c2fab | 48 | #define I2CAPI_I2C3_CLKSRC RCC_I2C3CLKSOURCE_PCLK1 |
<> | 132:9baf128c2fab | 49 | #define I2CAPI_I2C4_CLKSRC RCC_I2C4CLKSOURCE_PCLK1 |
<> | 132:9baf128c2fab | 50 | |
<> | 132:9baf128c2fab | 51 | /* Provide the suitable timing depending on requested frequencie */ |
<> | 134:ad3be0349dc5 | 52 | static inline uint32_t get_i2c_timing(int hz) |
<> | 132:9baf128c2fab | 53 | { |
<> | 132:9baf128c2fab | 54 | uint32_t tim = 0; |
<> | 132:9baf128c2fab | 55 | /* |
<> | 132:9baf128c2fab | 56 | Values calculated with I2C_Timing_Configuration tool (excel file) |
<> | 132:9baf128c2fab | 57 | * Standard mode (up to 100 kHz) |
<> | 132:9baf128c2fab | 58 | * Fast Mode (up to 400 kHz) |
<> | 132:9baf128c2fab | 59 | * Fast Mode Plus (up to 1 MHz) |
<> | 132:9baf128c2fab | 60 | Below values obtained with: |
<> | 132:9baf128c2fab | 61 | - I2Cx clock source = APB1CLK = 54 MHz |
<> | 132:9baf128c2fab | 62 | - Analog filter delay = ON |
<> | 132:9baf128c2fab | 63 | - Digital filter coefficient = 0 |
<> | 132:9baf128c2fab | 64 | */ |
<> | 132:9baf128c2fab | 65 | switch (hz) { |
<> | 132:9baf128c2fab | 66 | case 100000: |
<> | 132:9baf128c2fab | 67 | tim = 0x10916998; // Standard mode with Rise time = 120ns, Fall time = 120ns |
<> | 132:9baf128c2fab | 68 | break; |
<> | 132:9baf128c2fab | 69 | case 400000: |
<> | 132:9baf128c2fab | 70 | tim = 0x00B11B54; // Fast Mode with Rise time = 120ns, Fall time = 120ns |
<> | 132:9baf128c2fab | 71 | break; |
<> | 132:9baf128c2fab | 72 | case 1000000: |
<> | 132:9baf128c2fab | 73 | tim = 0x0090091B; // Fast Mode Plus with Rise time = 120ns, Fall time = 10ns |
<> | 132:9baf128c2fab | 74 | break; |
<> | 132:9baf128c2fab | 75 | default: |
<> | 132:9baf128c2fab | 76 | break; |
<> | 132:9baf128c2fab | 77 | } |
<> | 132:9baf128c2fab | 78 | return tim; |
<> | 132:9baf128c2fab | 79 | } |
<> | 132:9baf128c2fab | 80 | |
<> | 132:9baf128c2fab | 81 | #ifdef __cplusplus |
<> | 132:9baf128c2fab | 82 | } |
<> | 132:9baf128c2fab | 83 | #endif |
<> | 132:9baf128c2fab | 84 | |
<> | 132:9baf128c2fab | 85 | #endif // DEVICE_I2C |
<> | 132:9baf128c2fab | 86 | |
<> | 132:9baf128c2fab | 87 | #endif |