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TARGET_NUCLEO_F746ZG/TARGET_STM/TARGET_STM32F7/i2c_device.h@132:9baf128c2fab, 2016-12-20 (annotated)
- Committer:
- <>
- Date:
- Tue Dec 20 15:36:52 2016 +0000
- Revision:
- 132:9baf128c2fab
- Child:
- 134:ad3be0349dc5
Release 132 of the mbed library
Ports for Upcoming Targets
3241: Add support for FRDM-KW41 https://github.com/ARMmbed/mbed-os/pull/3241
3291: Adding mbed enabled Maker board with NINA-B1 and EVA-M8Q https://github.com/ARMmbed/mbed-os/pull/3291
Fixes and Changes
3062: TARGET_STM :USB device FS https://github.com/ARMmbed/mbed-os/pull/3062
3213: STM32: Refactor us_ticker.c + hal_tick.c files https://github.com/ARMmbed/mbed-os/pull/3213
3288: Dev spi asynch l0l1 https://github.com/ARMmbed/mbed-os/pull/3288
3289: Bug fix of initial value of interrupt edge in "gpio_irq_init" function. https://github.com/ARMmbed/mbed-os/pull/3289
3302: STM32F4 AnalogIn - Clear VBATE and TSVREFE bits before configuring ADC channels https://github.com/ARMmbed/mbed-os/pull/3302
3320: STM32 - Add ADC_VREF label https://github.com/ARMmbed/mbed-os/pull/3320
3321: no HSE available by default for NUCLEO_L432KC https://github.com/ARMmbed/mbed-os/pull/3321
3352: ublox eva nina - fix line endings https://github.com/ARMmbed/mbed-os/pull/3352
3322: DISCO_L053C8 doesn't support LSE https://github.com/ARMmbed/mbed-os/pull/3322
3345: STM32 - Remove TIM_IT_UPDATE flag in HAL_Suspend/ResumeTick functions https://github.com/ARMmbed/mbed-os/pull/3345
3309: [NUC472/M453] Fix CI failed tests https://github.com/ARMmbed/mbed-os/pull/3309
3157: [Silicon Labs] Adding support for EFR32MG1 wireless SoC https://github.com/ARMmbed/mbed-os/pull/3157
3301: I2C - correct return values for write functions (docs) - part 1 https://github.com/ARMmbed/mbed-os/pull/3301
3303: Fix #2956 #2939 #2957 #2959 #2960: Add HAL_DeInit function in gpio_irq destructor https://github.com/ARMmbed/mbed-os/pull/3303
3304: STM32L476: no HSE is present in NUCLEO and DISCO boards https://github.com/ARMmbed/mbed-os/pull/3304
3318: Register map changes for RevG https://github.com/ARMmbed/mbed-os/pull/3318
3317: NUCLEO_F429ZI has integrated LSE https://github.com/ARMmbed/mbed-os/pull/3317
3312: K64F: SPI Asynch API implementation https://github.com/ARMmbed/mbed-os/pull/3312
3324: Dev i2c common code https://github.com/ARMmbed/mbed-os/pull/3324
3369: Add CAN2 missing pins for connector CN12 https://github.com/ARMmbed/mbed-os/pull/3369
3377: STM32 NUCLEO-L152RE Update system core clock to 32MHz https://github.com/ARMmbed/mbed-os/pull/3377
3378: K66F: Enable LWIP feature https://github.com/ARMmbed/mbed-os/pull/3378
3382: [MAX32620] Fixing serial readable function. https://github.com/ARMmbed/mbed-os/pull/3382
3399: NUCLEO_F103RB - Add SERIAL_FC feature https://github.com/ARMmbed/mbed-os/pull/3399
3409: STM32L1 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3409
3416: Renames i2c_api.c for STM32F1 targets to fix IAR exporter https://github.com/ARMmbed/mbed-os/pull/3416
3348: Fix frequency function of CAN driver. https://github.com/ARMmbed/mbed-os/pull/3348
3366: NUCLEO_F412ZG - Add new platform https://github.com/ARMmbed/mbed-os/pull/3366
3379: STM32F0 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3379
3393: ISR register never re-evaluated in HAL_DMA_PollForTransfer for STM32F4 https://github.com/ARMmbed/mbed-os/pull/3393
3408: STM32F7 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3408
3411: STM32L0 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3411
3424: STM32F4 - FIX to add the update of hdma->State variable https://github.com/ARMmbed/mbed-os/pull/3424
3427: Fix stm i2c slave https://github.com/ARMmbed/mbed-os/pull/3427
3429: Fix stm i2c fix init https://github.com/ARMmbed/mbed-os/pull/3429
3434: [NUC472/M453] Fix stuck in lp_ticker_init and other updates https://github.com/ARMmbed/mbed-os/pull/3434
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 132:9baf128c2fab | 1 | /* mbed Microcontroller Library |
<> | 132:9baf128c2fab | 2 | ******************************************************************************* |
<> | 132:9baf128c2fab | 3 | * Copyright (c) 2015, STMicroelectronics |
<> | 132:9baf128c2fab | 4 | * All rights reserved. |
<> | 132:9baf128c2fab | 5 | * |
<> | 132:9baf128c2fab | 6 | * Redistribution and use in source and binary forms, with or without |
<> | 132:9baf128c2fab | 7 | * modification, are permitted provided that the following conditions are met: |
<> | 132:9baf128c2fab | 8 | * |
<> | 132:9baf128c2fab | 9 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 132:9baf128c2fab | 10 | * this list of conditions and the following disclaimer. |
<> | 132:9baf128c2fab | 11 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 132:9baf128c2fab | 12 | * this list of conditions and the following disclaimer in the documentation |
<> | 132:9baf128c2fab | 13 | * and/or other materials provided with the distribution. |
<> | 132:9baf128c2fab | 14 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
<> | 132:9baf128c2fab | 15 | * may be used to endorse or promote products derived from this software |
<> | 132:9baf128c2fab | 16 | * without specific prior written permission. |
<> | 132:9baf128c2fab | 17 | * |
<> | 132:9baf128c2fab | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 132:9baf128c2fab | 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 132:9baf128c2fab | 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 132:9baf128c2fab | 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
<> | 132:9baf128c2fab | 22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
<> | 132:9baf128c2fab | 23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
<> | 132:9baf128c2fab | 24 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
<> | 132:9baf128c2fab | 25 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
<> | 132:9baf128c2fab | 26 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
<> | 132:9baf128c2fab | 27 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 132:9baf128c2fab | 28 | ******************************************************************************* |
<> | 132:9baf128c2fab | 29 | */ |
<> | 132:9baf128c2fab | 30 | #ifndef MBED_I2C_DEVICE_H |
<> | 132:9baf128c2fab | 31 | #define MBED_I2C_DEVICE_H |
<> | 132:9baf128c2fab | 32 | |
<> | 132:9baf128c2fab | 33 | #include "cmsis.h" |
<> | 132:9baf128c2fab | 34 | |
<> | 132:9baf128c2fab | 35 | #ifdef __cplusplus |
<> | 132:9baf128c2fab | 36 | extern "C" { |
<> | 132:9baf128c2fab | 37 | #endif |
<> | 132:9baf128c2fab | 38 | |
<> | 132:9baf128c2fab | 39 | #ifdef DEVICE_I2C |
<> | 132:9baf128c2fab | 40 | |
<> | 132:9baf128c2fab | 41 | #define I2C_IP_VERSION_V2 |
<> | 132:9baf128c2fab | 42 | |
<> | 132:9baf128c2fab | 43 | #define I2C_IT_ALL (I2C_IT_ERRI|I2C_IT_TCI|I2C_IT_STOPI|I2C_IT_NACKI|I2C_IT_ADDRI|I2C_IT_RXI|I2C_IT_TXI) |
<> | 132:9baf128c2fab | 44 | |
<> | 132:9baf128c2fab | 45 | /* Family specifc settings for clock source */ |
<> | 132:9baf128c2fab | 46 | #define I2CAPI_I2C1_CLKSRC RCC_I2C1CLKSOURCE_PCLK1 |
<> | 132:9baf128c2fab | 47 | #define I2CAPI_I2C2_CLKSRC RCC_I2C2CLKSOURCE_PCLK1 |
<> | 132:9baf128c2fab | 48 | #define I2CAPI_I2C3_CLKSRC RCC_I2C3CLKSOURCE_PCLK1 |
<> | 132:9baf128c2fab | 49 | #define I2CAPI_I2C4_CLKSRC RCC_I2C4CLKSOURCE_PCLK1 |
<> | 132:9baf128c2fab | 50 | |
<> | 132:9baf128c2fab | 51 | /* Provide the suitable timing depending on requested frequencie */ |
<> | 132:9baf128c2fab | 52 | inline uint32_t get_i2c_timing(int hz) |
<> | 132:9baf128c2fab | 53 | { |
<> | 132:9baf128c2fab | 54 | uint32_t tim = 0; |
<> | 132:9baf128c2fab | 55 | /* |
<> | 132:9baf128c2fab | 56 | Values calculated with I2C_Timing_Configuration tool (excel file) |
<> | 132:9baf128c2fab | 57 | * Standard mode (up to 100 kHz) |
<> | 132:9baf128c2fab | 58 | * Fast Mode (up to 400 kHz) |
<> | 132:9baf128c2fab | 59 | * Fast Mode Plus (up to 1 MHz) |
<> | 132:9baf128c2fab | 60 | Below values obtained with: |
<> | 132:9baf128c2fab | 61 | - I2Cx clock source = APB1CLK = 54 MHz |
<> | 132:9baf128c2fab | 62 | - Analog filter delay = ON |
<> | 132:9baf128c2fab | 63 | - Digital filter coefficient = 0 |
<> | 132:9baf128c2fab | 64 | */ |
<> | 132:9baf128c2fab | 65 | switch (hz) { |
<> | 132:9baf128c2fab | 66 | case 100000: |
<> | 132:9baf128c2fab | 67 | tim = 0x10916998; // Standard mode with Rise time = 120ns, Fall time = 120ns |
<> | 132:9baf128c2fab | 68 | break; |
<> | 132:9baf128c2fab | 69 | case 400000: |
<> | 132:9baf128c2fab | 70 | tim = 0x00B11B54; // Fast Mode with Rise time = 120ns, Fall time = 120ns |
<> | 132:9baf128c2fab | 71 | break; |
<> | 132:9baf128c2fab | 72 | case 1000000: |
<> | 132:9baf128c2fab | 73 | tim = 0x0090091B; // Fast Mode Plus with Rise time = 120ns, Fall time = 10ns |
<> | 132:9baf128c2fab | 74 | break; |
<> | 132:9baf128c2fab | 75 | default: |
<> | 132:9baf128c2fab | 76 | break; |
<> | 132:9baf128c2fab | 77 | } |
<> | 132:9baf128c2fab | 78 | return tim; |
<> | 132:9baf128c2fab | 79 | } |
<> | 132:9baf128c2fab | 80 | |
<> | 132:9baf128c2fab | 81 | #ifdef __cplusplus |
<> | 132:9baf128c2fab | 82 | } |
<> | 132:9baf128c2fab | 83 | #endif |
<> | 132:9baf128c2fab | 84 | |
<> | 132:9baf128c2fab | 85 | #endif // DEVICE_I2C |
<> | 132:9baf128c2fab | 86 | |
<> | 132:9baf128c2fab | 87 | #endif |