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TARGET_TB_SENSE_12/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_mpu.h@159:7130f322cb7e, 2017-12-21 (annotated)
- Committer:
- mbed_official
- Date:
- Thu Dec 21 18:20:02 2017 +0000
- Revision:
- 159:7130f322cb7e
- Parent:
- 142:4eea097334d6
mbed library version 157
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Anna Bridge |
142:4eea097334d6 | 1 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 2 | * @file em_mpu.h |
Anna Bridge |
142:4eea097334d6 | 3 | * @brief Memory protection unit (MPU) peripheral API |
mbed_official | 159:7130f322cb7e | 4 | * @version 5.3.3 |
Anna Bridge |
142:4eea097334d6 | 5 | ******************************************************************************* |
mbed_official | 159:7130f322cb7e | 6 | * # License |
Anna Bridge |
142:4eea097334d6 | 7 | * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b> |
Anna Bridge |
142:4eea097334d6 | 8 | ******************************************************************************* |
Anna Bridge |
142:4eea097334d6 | 9 | * |
Anna Bridge |
142:4eea097334d6 | 10 | * Permission is granted to anyone to use this software for any purpose, |
Anna Bridge |
142:4eea097334d6 | 11 | * including commercial applications, and to alter it and redistribute it |
Anna Bridge |
142:4eea097334d6 | 12 | * freely, subject to the following restrictions: |
Anna Bridge |
142:4eea097334d6 | 13 | * |
Anna Bridge |
142:4eea097334d6 | 14 | * 1. The origin of this software must not be misrepresented; you must not |
Anna Bridge |
142:4eea097334d6 | 15 | * claim that you wrote the original software. |
Anna Bridge |
142:4eea097334d6 | 16 | * 2. Altered source versions must be plainly marked as such, and must not be |
Anna Bridge |
142:4eea097334d6 | 17 | * misrepresented as being the original software. |
Anna Bridge |
142:4eea097334d6 | 18 | * 3. This notice may not be removed or altered from any source distribution. |
Anna Bridge |
142:4eea097334d6 | 19 | * |
Anna Bridge |
142:4eea097334d6 | 20 | * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no |
Anna Bridge |
142:4eea097334d6 | 21 | * obligation to support this Software. Silicon Labs is providing the |
Anna Bridge |
142:4eea097334d6 | 22 | * Software "AS IS", with no express or implied warranties of any kind, |
Anna Bridge |
142:4eea097334d6 | 23 | * including, but not limited to, any implied warranties of merchantability |
Anna Bridge |
142:4eea097334d6 | 24 | * or fitness for any particular purpose or warranties against infringement |
Anna Bridge |
142:4eea097334d6 | 25 | * of any proprietary rights of a third party. |
Anna Bridge |
142:4eea097334d6 | 26 | * |
Anna Bridge |
142:4eea097334d6 | 27 | * Silicon Labs will not be liable for any consequential, incidental, or |
Anna Bridge |
142:4eea097334d6 | 28 | * special damages, or any other relief, or for any claim by any third party, |
Anna Bridge |
142:4eea097334d6 | 29 | * arising from your use of this Software. |
Anna Bridge |
142:4eea097334d6 | 30 | * |
Anna Bridge |
142:4eea097334d6 | 31 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 32 | |
Anna Bridge |
142:4eea097334d6 | 33 | #ifndef EM_MPU_H |
Anna Bridge |
142:4eea097334d6 | 34 | #define EM_MPU_H |
Anna Bridge |
142:4eea097334d6 | 35 | |
Anna Bridge |
142:4eea097334d6 | 36 | #include "em_device.h" |
Anna Bridge |
142:4eea097334d6 | 37 | |
Anna Bridge |
142:4eea097334d6 | 38 | #if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1) |
Anna Bridge |
142:4eea097334d6 | 39 | #include "em_assert.h" |
Anna Bridge |
142:4eea097334d6 | 40 | |
Anna Bridge |
142:4eea097334d6 | 41 | #include <stdbool.h> |
Anna Bridge |
142:4eea097334d6 | 42 | |
Anna Bridge |
142:4eea097334d6 | 43 | #ifdef __cplusplus |
Anna Bridge |
142:4eea097334d6 | 44 | extern "C" { |
Anna Bridge |
142:4eea097334d6 | 45 | #endif |
Anna Bridge |
142:4eea097334d6 | 46 | |
Anna Bridge |
142:4eea097334d6 | 47 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 48 | * @addtogroup emlib |
Anna Bridge |
142:4eea097334d6 | 49 | * @{ |
Anna Bridge |
142:4eea097334d6 | 50 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 51 | |
Anna Bridge |
142:4eea097334d6 | 52 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 53 | * @addtogroup MPU |
Anna Bridge |
142:4eea097334d6 | 54 | * @{ |
Anna Bridge |
142:4eea097334d6 | 55 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 56 | |
Anna Bridge |
142:4eea097334d6 | 57 | /** @anchor MPU_CTRL_PRIVDEFENA |
Anna Bridge |
142:4eea097334d6 | 58 | * Argument to MPU_enable(). Enables priviledged |
Anna Bridge |
142:4eea097334d6 | 59 | * access to default memory map. */ |
Anna Bridge |
142:4eea097334d6 | 60 | #define MPU_CTRL_PRIVDEFENA MPU_CTRL_PRIVDEFENA_Msk |
Anna Bridge |
142:4eea097334d6 | 61 | |
Anna Bridge |
142:4eea097334d6 | 62 | /** @anchor MPU_CTRL_HFNMIENA |
Anna Bridge |
142:4eea097334d6 | 63 | * Argument to MPU_enable(). Enables MPU during hard fault, |
Anna Bridge |
142:4eea097334d6 | 64 | * NMI, and FAULTMASK handlers. */ |
Anna Bridge |
142:4eea097334d6 | 65 | #define MPU_CTRL_HFNMIENA MPU_CTRL_HFNMIENA_Msk |
Anna Bridge |
142:4eea097334d6 | 66 | |
Anna Bridge |
142:4eea097334d6 | 67 | /******************************************************************************* |
Anna Bridge |
142:4eea097334d6 | 68 | ******************************** ENUMS ************************************ |
Anna Bridge |
142:4eea097334d6 | 69 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 70 | |
Anna Bridge |
142:4eea097334d6 | 71 | /** |
Anna Bridge |
142:4eea097334d6 | 72 | * Size of an MPU region. |
Anna Bridge |
142:4eea097334d6 | 73 | */ |
mbed_official | 159:7130f322cb7e | 74 | typedef enum { |
Anna Bridge |
142:4eea097334d6 | 75 | mpuRegionSize32b = 4, /**< 32 byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 76 | mpuRegionSize64b = 5, /**< 64 byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 77 | mpuRegionSize128b = 6, /**< 128 byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 78 | mpuRegionSize256b = 7, /**< 256 byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 79 | mpuRegionSize512b = 8, /**< 512 byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 80 | mpuRegionSize1Kb = 9, /**< 1K byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 81 | mpuRegionSize2Kb = 10, /**< 2K byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 82 | mpuRegionSize4Kb = 11, /**< 4K byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 83 | mpuRegionSize8Kb = 12, /**< 8K byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 84 | mpuRegionSize16Kb = 13, /**< 16K byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 85 | mpuRegionSize32Kb = 14, /**< 32K byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 86 | mpuRegionSize64Kb = 15, /**< 64K byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 87 | mpuRegionSize128Kb = 16, /**< 128K byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 88 | mpuRegionSize256Kb = 17, /**< 256K byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 89 | mpuRegionSize512Kb = 18, /**< 512K byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 90 | mpuRegionSize1Mb = 19, /**< 1M byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 91 | mpuRegionSize2Mb = 20, /**< 2M byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 92 | mpuRegionSize4Mb = 21, /**< 4M byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 93 | mpuRegionSize8Mb = 22, /**< 8M byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 94 | mpuRegionSize16Mb = 23, /**< 16M byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 95 | mpuRegionSize32Mb = 24, /**< 32M byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 96 | mpuRegionSize64Mb = 25, /**< 64M byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 97 | mpuRegionSize128Mb = 26, /**< 128M byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 98 | mpuRegionSize256Mb = 27, /**< 256M byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 99 | mpuRegionSize512Mb = 28, /**< 512M byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 100 | mpuRegionSize1Gb = 29, /**< 1G byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 101 | mpuRegionSize2Gb = 30, /**< 2G byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 102 | mpuRegionSize4Gb = 31 /**< 4G byte region size. */ |
Anna Bridge |
142:4eea097334d6 | 103 | } MPU_RegionSize_TypeDef; |
Anna Bridge |
142:4eea097334d6 | 104 | |
Anna Bridge |
142:4eea097334d6 | 105 | /** |
Anna Bridge |
142:4eea097334d6 | 106 | * MPU region access permission attributes. |
Anna Bridge |
142:4eea097334d6 | 107 | */ |
mbed_official | 159:7130f322cb7e | 108 | typedef enum { |
Anna Bridge |
142:4eea097334d6 | 109 | mpuRegionNoAccess = 0, /**< No access what so ever. */ |
Anna Bridge |
142:4eea097334d6 | 110 | mpuRegionApPRw = 1, /**< Priviledged state R/W only. */ |
Anna Bridge |
142:4eea097334d6 | 111 | mpuRegionApPRwURo = 2, /**< Priviledged state R/W, User state R only. */ |
Anna Bridge |
142:4eea097334d6 | 112 | mpuRegionApFullAccess = 3, /**< R/W in Priviledged and User state. */ |
Anna Bridge |
142:4eea097334d6 | 113 | mpuRegionApPRo = 5, /**< Priviledged R only. */ |
Anna Bridge |
142:4eea097334d6 | 114 | mpuRegionApPRo_URo = 6 /**< R only in Priviledged and User state. */ |
Anna Bridge |
142:4eea097334d6 | 115 | } MPU_RegionAp_TypeDef; |
Anna Bridge |
142:4eea097334d6 | 116 | |
Anna Bridge |
142:4eea097334d6 | 117 | /******************************************************************************* |
Anna Bridge |
142:4eea097334d6 | 118 | ******************************* STRUCTS *********************************** |
Anna Bridge |
142:4eea097334d6 | 119 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 120 | |
Anna Bridge |
142:4eea097334d6 | 121 | /** MPU Region init structure. */ |
mbed_official | 159:7130f322cb7e | 122 | typedef struct { |
Anna Bridge |
142:4eea097334d6 | 123 | bool regionEnable; /**< MPU region enable. */ |
Anna Bridge |
142:4eea097334d6 | 124 | uint8_t regionNo; /**< MPU region number. */ |
Anna Bridge |
142:4eea097334d6 | 125 | uint32_t baseAddress; /**< Region baseaddress. */ |
Anna Bridge |
142:4eea097334d6 | 126 | MPU_RegionSize_TypeDef size; /**< Memory region size. */ |
mbed_official | 159:7130f322cb7e | 127 | MPU_RegionAp_TypeDef accessPermission; /**< Memory access permissions. */ |
Anna Bridge |
142:4eea097334d6 | 128 | bool disableExec; /**< Disable execution. */ |
Anna Bridge |
142:4eea097334d6 | 129 | bool shareable; /**< Memory shareable attribute. */ |
Anna Bridge |
142:4eea097334d6 | 130 | bool cacheable; /**< Memory cacheable attribute. */ |
Anna Bridge |
142:4eea097334d6 | 131 | bool bufferable; /**< Memory bufferable attribute. */ |
Anna Bridge |
142:4eea097334d6 | 132 | uint8_t srd; /**< Memory subregion disable bits. */ |
Anna Bridge |
142:4eea097334d6 | 133 | uint8_t tex; /**< Memory type extension attributes. */ |
Anna Bridge |
142:4eea097334d6 | 134 | } MPU_RegionInit_TypeDef; |
Anna Bridge |
142:4eea097334d6 | 135 | |
Anna Bridge |
142:4eea097334d6 | 136 | /** Default configuration of MPU region init structure for flash memory. */ |
mbed_official | 159:7130f322cb7e | 137 | #define MPU_INIT_FLASH_DEFAULT \ |
mbed_official | 159:7130f322cb7e | 138 | { \ |
mbed_official | 159:7130f322cb7e | 139 | true, /* Enable MPU region. */ \ |
mbed_official | 159:7130f322cb7e | 140 | 0, /* MPU Region number. */ \ |
mbed_official | 159:7130f322cb7e | 141 | FLASH_MEM_BASE, /* Flash base address. */ \ |
mbed_official | 159:7130f322cb7e | 142 | mpuRegionSize1Mb, /* Size - Set to max. */ \ |
mbed_official | 159:7130f322cb7e | 143 | mpuRegionApFullAccess, /* Access permissions. */ \ |
mbed_official | 159:7130f322cb7e | 144 | false, /* Execution allowed. */ \ |
mbed_official | 159:7130f322cb7e | 145 | false, /* Not shareable. */ \ |
mbed_official | 159:7130f322cb7e | 146 | true, /* Cacheable. */ \ |
mbed_official | 159:7130f322cb7e | 147 | false, /* Not bufferable. */ \ |
mbed_official | 159:7130f322cb7e | 148 | 0, /* No subregions. */ \ |
mbed_official | 159:7130f322cb7e | 149 | 0 /* No TEX attributes. */ \ |
mbed_official | 159:7130f322cb7e | 150 | } |
Anna Bridge |
142:4eea097334d6 | 151 | |
Anna Bridge |
142:4eea097334d6 | 152 | /** Default configuration of MPU region init structure for sram memory. */ |
mbed_official | 159:7130f322cb7e | 153 | #define MPU_INIT_SRAM_DEFAULT \ |
mbed_official | 159:7130f322cb7e | 154 | { \ |
mbed_official | 159:7130f322cb7e | 155 | true, /* Enable MPU region. */ \ |
mbed_official | 159:7130f322cb7e | 156 | 1, /* MPU Region number. */ \ |
mbed_official | 159:7130f322cb7e | 157 | RAM_MEM_BASE, /* SRAM base address. */ \ |
mbed_official | 159:7130f322cb7e | 158 | mpuRegionSize128Kb, /* Size - Set to max. */ \ |
mbed_official | 159:7130f322cb7e | 159 | mpuRegionApFullAccess, /* Access permissions. */ \ |
mbed_official | 159:7130f322cb7e | 160 | false, /* Execution allowed. */ \ |
mbed_official | 159:7130f322cb7e | 161 | true, /* Shareable. */ \ |
mbed_official | 159:7130f322cb7e | 162 | true, /* Cacheable. */ \ |
mbed_official | 159:7130f322cb7e | 163 | false, /* Not bufferable. */ \ |
mbed_official | 159:7130f322cb7e | 164 | 0, /* No subregions. */ \ |
mbed_official | 159:7130f322cb7e | 165 | 0 /* No TEX attributes. */ \ |
mbed_official | 159:7130f322cb7e | 166 | } |
Anna Bridge |
142:4eea097334d6 | 167 | |
Anna Bridge |
142:4eea097334d6 | 168 | /** Default configuration of MPU region init structure for onchip peripherals.*/ |
mbed_official | 159:7130f322cb7e | 169 | #define MPU_INIT_PERIPHERAL_DEFAULT \ |
mbed_official | 159:7130f322cb7e | 170 | { \ |
mbed_official | 159:7130f322cb7e | 171 | true, /* Enable MPU region. */ \ |
mbed_official | 159:7130f322cb7e | 172 | 0, /* MPU Region number. */ \ |
mbed_official | 159:7130f322cb7e | 173 | 0, /* Region base address. */ \ |
mbed_official | 159:7130f322cb7e | 174 | mpuRegionSize32b, /* Size - Set to minimum */ \ |
mbed_official | 159:7130f322cb7e | 175 | mpuRegionApFullAccess, /* Access permissions. */ \ |
mbed_official | 159:7130f322cb7e | 176 | true, /* Execution not allowed. */ \ |
mbed_official | 159:7130f322cb7e | 177 | true, /* Shareable. */ \ |
mbed_official | 159:7130f322cb7e | 178 | false, /* Not cacheable. */ \ |
mbed_official | 159:7130f322cb7e | 179 | true, /* Bufferable. */ \ |
mbed_official | 159:7130f322cb7e | 180 | 0, /* No subregions. */ \ |
mbed_official | 159:7130f322cb7e | 181 | 0 /* No TEX attributes. */ \ |
mbed_official | 159:7130f322cb7e | 182 | } |
Anna Bridge |
142:4eea097334d6 | 183 | |
Anna Bridge |
142:4eea097334d6 | 184 | /******************************************************************************* |
Anna Bridge |
142:4eea097334d6 | 185 | ***************************** PROTOTYPES ********************************** |
Anna Bridge |
142:4eea097334d6 | 186 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 187 | |
Anna Bridge |
142:4eea097334d6 | 188 | void MPU_ConfigureRegion(const MPU_RegionInit_TypeDef *init); |
Anna Bridge |
142:4eea097334d6 | 189 | |
Anna Bridge |
142:4eea097334d6 | 190 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 191 | * @brief |
Anna Bridge |
142:4eea097334d6 | 192 | * Disable the MPU |
Anna Bridge |
142:4eea097334d6 | 193 | * @details |
Anna Bridge |
142:4eea097334d6 | 194 | * Disable MPU and MPU fault exceptions. |
Anna Bridge |
142:4eea097334d6 | 195 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 196 | __STATIC_INLINE void MPU_Disable(void) |
Anna Bridge |
142:4eea097334d6 | 197 | { |
mbed_official | 159:7130f322cb7e | 198 | #if defined(SCB_SHCSR_MEMFAULTENA_Msk) |
Anna Bridge |
142:4eea097334d6 | 199 | SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; /* Disable fault exceptions */ |
mbed_official | 159:7130f322cb7e | 200 | #endif |
Anna Bridge |
142:4eea097334d6 | 201 | MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk; /* Disable the MPU */ |
Anna Bridge |
142:4eea097334d6 | 202 | } |
Anna Bridge |
142:4eea097334d6 | 203 | |
Anna Bridge |
142:4eea097334d6 | 204 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 205 | * @brief |
Anna Bridge |
142:4eea097334d6 | 206 | * Enable the MPU |
Anna Bridge |
142:4eea097334d6 | 207 | * @details |
Anna Bridge |
142:4eea097334d6 | 208 | * Enable MPU and MPU fault exceptions. |
Anna Bridge |
142:4eea097334d6 | 209 | * @param[in] flags |
Anna Bridge |
142:4eea097334d6 | 210 | * Use a logical OR of @ref MPU_CTRL_PRIVDEFENA and |
Anna Bridge |
142:4eea097334d6 | 211 | * @ref MPU_CTRL_HFNMIENA as needed. |
Anna Bridge |
142:4eea097334d6 | 212 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 213 | __STATIC_INLINE void MPU_Enable(uint32_t flags) |
Anna Bridge |
142:4eea097334d6 | 214 | { |
Anna Bridge |
142:4eea097334d6 | 215 | EFM_ASSERT(!(flags & ~(MPU_CTRL_PRIVDEFENA_Msk |
Anna Bridge |
142:4eea097334d6 | 216 | | MPU_CTRL_HFNMIENA_Msk |
Anna Bridge |
142:4eea097334d6 | 217 | | MPU_CTRL_ENABLE_Msk))); |
Anna Bridge |
142:4eea097334d6 | 218 | |
Anna Bridge |
142:4eea097334d6 | 219 | MPU->CTRL = flags | MPU_CTRL_ENABLE_Msk; /* Enable the MPU */ |
mbed_official | 159:7130f322cb7e | 220 | #if defined(SCB_SHCSR_MEMFAULTENA_Msk) |
Anna Bridge |
142:4eea097334d6 | 221 | SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; /* Enable fault exceptions */ |
mbed_official | 159:7130f322cb7e | 222 | #endif |
Anna Bridge |
142:4eea097334d6 | 223 | } |
Anna Bridge |
142:4eea097334d6 | 224 | |
Anna Bridge |
142:4eea097334d6 | 225 | /** @} (end addtogroup MPU) */ |
Anna Bridge |
142:4eea097334d6 | 226 | /** @} (end addtogroup emlib) */ |
Anna Bridge |
142:4eea097334d6 | 227 | |
Anna Bridge |
142:4eea097334d6 | 228 | #ifdef __cplusplus |
Anna Bridge |
142:4eea097334d6 | 229 | } |
Anna Bridge |
142:4eea097334d6 | 230 | #endif |
Anna Bridge |
142:4eea097334d6 | 231 | |
Anna Bridge |
142:4eea097334d6 | 232 | #endif /* defined(__MPU_PRESENT) && (__MPU_PRESENT == 1) */ |
Anna Bridge |
142:4eea097334d6 | 233 | |
Anna Bridge |
142:4eea097334d6 | 234 | #endif /* EM_MPU_H */ |