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targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/PeripheralNames.h@420:8e6e2662709e, 2014-11-27 (annotated)

Committer:
mbed_official
Date:
Thu Nov 27 11:45:07 2014 +0000
Revision:
420:8e6e2662709e
Parent:
390:35c2c1cf29cd
Child:
437:0b72c0f86db6
Synchronized with git revision 8a3087825b914b36a82ec694c2caf529295f8ad1



Full URL: https://github.com/mbedmicro/mbed/commit/8a3087825b914b36a82ec694c2caf529295f8ad1/



Targets: RZ_A1H - Fix RTOS build error (Cortex A)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 390:35c2c1cf29cd 1 /* mbed Microcontroller Library
mbed_official 390:35c2c1cf29cd 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 390:35c2c1cf29cd 3 *
mbed_official 390:35c2c1cf29cd 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 390:35c2c1cf29cd 5 * you may not use this file except in compliance with the License.
mbed_official 390:35c2c1cf29cd 6 * You may obtain a copy of the License at
mbed_official 390:35c2c1cf29cd 7 *
mbed_official 390:35c2c1cf29cd 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 390:35c2c1cf29cd 9 *
mbed_official 390:35c2c1cf29cd 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 390:35c2c1cf29cd 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 390:35c2c1cf29cd 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 390:35c2c1cf29cd 13 * See the License for the specific language governing permissions and
mbed_official 390:35c2c1cf29cd 14 * limitations under the License.
mbed_official 390:35c2c1cf29cd 15 */
mbed_official 390:35c2c1cf29cd 16 #ifndef MBED_PERIPHERALNAMES_H
mbed_official 390:35c2c1cf29cd 17 #define MBED_PERIPHERALNAMES_H
mbed_official 390:35c2c1cf29cd 18
mbed_official 390:35c2c1cf29cd 19 #include "cmsis.h"
mbed_official 390:35c2c1cf29cd 20 #include "PinNames.h"
mbed_official 390:35c2c1cf29cd 21
mbed_official 390:35c2c1cf29cd 22 #ifdef __cplusplus
mbed_official 390:35c2c1cf29cd 23 extern "C" {
mbed_official 390:35c2c1cf29cd 24 #endif
mbed_official 390:35c2c1cf29cd 25
mbed_official 390:35c2c1cf29cd 26 typedef enum {
mbed_official 390:35c2c1cf29cd 27 UART0,
mbed_official 390:35c2c1cf29cd 28 UART1,
mbed_official 390:35c2c1cf29cd 29 UART2,
mbed_official 390:35c2c1cf29cd 30 UART3,
mbed_official 390:35c2c1cf29cd 31 } UARTName;
mbed_official 390:35c2c1cf29cd 32
mbed_official 390:35c2c1cf29cd 33 // PWMType & 1 == 1 then have to use PWDTR[12] == 1
mbed_official 390:35c2c1cf29cd 34 typedef enum {
mbed_official 390:35c2c1cf29cd 35 PWM1A = 0,
mbed_official 390:35c2c1cf29cd 36 PWM1B,
mbed_official 390:35c2c1cf29cd 37 PWM1C,
mbed_official 390:35c2c1cf29cd 38 PWM1D,
mbed_official 390:35c2c1cf29cd 39 PWM1E,
mbed_official 390:35c2c1cf29cd 40 PWM1F,
mbed_official 390:35c2c1cf29cd 41 PWM1G,
mbed_official 390:35c2c1cf29cd 42 PWM1H,
mbed_official 390:35c2c1cf29cd 43 PWM2A = 0x10,
mbed_official 390:35c2c1cf29cd 44 PWM2B,
mbed_official 390:35c2c1cf29cd 45 PWM2C,
mbed_official 390:35c2c1cf29cd 46 PWM2D,
mbed_official 390:35c2c1cf29cd 47 PWM2E,
mbed_official 390:35c2c1cf29cd 48 PWM2F,
mbed_official 390:35c2c1cf29cd 49 PWM2G,
mbed_official 390:35c2c1cf29cd 50 PWM2H,
mbed_official 390:35c2c1cf29cd 51 } PWMType;
mbed_official 390:35c2c1cf29cd 52
mbed_official 390:35c2c1cf29cd 53 #define PTM_SHIFT 8
mbed_official 390:35c2c1cf29cd 54 typedef enum {
mbed_official 390:35c2c1cf29cd 55 PWM0_PIN = (1 << PTM_SHIFT) | PWM2E, // LED_R (through MTU2) TIOC4A [T.B.D]
mbed_official 390:35c2c1cf29cd 56 PWM1_PIN = (0 << PTM_SHIFT) | PWM2F, // LED_G
mbed_official 390:35c2c1cf29cd 57 PWM2_PIN = (0 << PTM_SHIFT) | PWM2G, // LED_B
mbed_official 390:35c2c1cf29cd 58 PWM3_PIN = (0 << PTM_SHIFT) | PWM2H, // LED_USER (not explicitly supported)
mbed_official 390:35c2c1cf29cd 59 PWM4_PIN = (0 << PTM_SHIFT) | PWM1G, // D9
mbed_official 390:35c2c1cf29cd 60 PWM5_PIN = (0 << PTM_SHIFT) | PWM1H, // D8 not explicitly supported
mbed_official 390:35c2c1cf29cd 61 PWM6_PIN = (0 << PTM_SHIFT) | PWM1F, // D7 not explicitly supported
mbed_official 390:35c2c1cf29cd 62 PWM7_PIN = (0 << PTM_SHIFT) | PWM1D, // D6
mbed_official 390:35c2c1cf29cd 63 } PWMName;
mbed_official 390:35c2c1cf29cd 64
mbed_official 390:35c2c1cf29cd 65 typedef enum {
mbed_official 390:35c2c1cf29cd 66 AN0= 0,
mbed_official 390:35c2c1cf29cd 67 AN1= 1,
mbed_official 390:35c2c1cf29cd 68 AN2= 2,
mbed_official 390:35c2c1cf29cd 69 AN3= 3,
mbed_official 390:35c2c1cf29cd 70 AN4= 4,
mbed_official 390:35c2c1cf29cd 71 AN5= 5,
mbed_official 390:35c2c1cf29cd 72 AN6= 6,
mbed_official 390:35c2c1cf29cd 73 AN7= 7,
mbed_official 390:35c2c1cf29cd 74 } ADCName;
mbed_official 390:35c2c1cf29cd 75
mbed_official 390:35c2c1cf29cd 76 typedef enum {
mbed_official 390:35c2c1cf29cd 77 SPI_0 = 0,
mbed_official 390:35c2c1cf29cd 78 SPI_1,
mbed_official 420:8e6e2662709e 79 SPI_2,
mbed_official 390:35c2c1cf29cd 80 } SPIName;
mbed_official 390:35c2c1cf29cd 81
mbed_official 390:35c2c1cf29cd 82 typedef enum {
mbed_official 390:35c2c1cf29cd 83 I2C_0 = 0,
mbed_official 390:35c2c1cf29cd 84 I2C_1,
mbed_official 390:35c2c1cf29cd 85 I2C_2,
mbed_official 390:35c2c1cf29cd 86 I2C_3
mbed_official 390:35c2c1cf29cd 87 } I2CName;
mbed_official 390:35c2c1cf29cd 88
mbed_official 390:35c2c1cf29cd 89
mbed_official 390:35c2c1cf29cd 90 #define STDIO_UART_TX USBTX
mbed_official 390:35c2c1cf29cd 91 #define STDIO_UART_RX USBRX
mbed_official 390:35c2c1cf29cd 92 #define STDIO_UART P_SCIF2
mbed_official 390:35c2c1cf29cd 93
mbed_official 390:35c2c1cf29cd 94 // Default peripherals
mbed_official 390:35c2c1cf29cd 95 #define MBED_SPI0 p5, p6, p7, p8
mbed_official 390:35c2c1cf29cd 96 #define MBED_SPI1 p11, p12, p13, p14
mbed_official 390:35c2c1cf29cd 97
mbed_official 390:35c2c1cf29cd 98 #define MBED_UART0 p9, p10
mbed_official 390:35c2c1cf29cd 99 #define MBED_UART1 p13, p14
mbed_official 390:35c2c1cf29cd 100 #define MBED_UART2 p28, p27
mbed_official 390:35c2c1cf29cd 101 #define MBED_UARTUSB USBTX, USBRX
mbed_official 390:35c2c1cf29cd 102
mbed_official 390:35c2c1cf29cd 103 #define MBED_I2C0 p28, p27
mbed_official 390:35c2c1cf29cd 104 #define MBED_I2C1 p9, p10
mbed_official 390:35c2c1cf29cd 105
mbed_official 390:35c2c1cf29cd 106 #define MBED_CAN0 p30, p29
mbed_official 390:35c2c1cf29cd 107
mbed_official 390:35c2c1cf29cd 108 #define MBED_ANALOGOUT0 p18
mbed_official 390:35c2c1cf29cd 109
mbed_official 390:35c2c1cf29cd 110 #define MBED_ANALOGIN0 p15
mbed_official 390:35c2c1cf29cd 111 #define MBED_ANALOGIN1 p16
mbed_official 390:35c2c1cf29cd 112 #define MBED_ANALOGIN2 p17
mbed_official 390:35c2c1cf29cd 113 #define MBED_ANALOGIN3 p18
mbed_official 390:35c2c1cf29cd 114 #define MBED_ANALOGIN4 p19
mbed_official 390:35c2c1cf29cd 115 #define MBED_ANALOGIN5 p20
mbed_official 390:35c2c1cf29cd 116
mbed_official 390:35c2c1cf29cd 117 #define MBED_PWMOUT0 p26
mbed_official 390:35c2c1cf29cd 118 #define MBED_PWMOUT1 p25
mbed_official 390:35c2c1cf29cd 119 #define MBED_PWMOUT2 p24
mbed_official 390:35c2c1cf29cd 120 #define MBED_PWMOUT3 p23
mbed_official 390:35c2c1cf29cd 121 #define MBED_PWMOUT4 p22
mbed_official 390:35c2c1cf29cd 122 #define MBED_PWMOUT5 p21
mbed_official 390:35c2c1cf29cd 123
mbed_official 390:35c2c1cf29cd 124
mbed_official 390:35c2c1cf29cd 125 #ifdef __cplusplus
mbed_official 390:35c2c1cf29cd 126 }
mbed_official 390:35c2c1cf29cd 127 #endif
mbed_official 390:35c2c1cf29cd 128
mbed_official 390:35c2c1cf29cd 129 #endif