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targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/gpio_irq_api.c@86:26fc69fd3b6c, 2014-02-08 (annotated)

Committer:
mbed_official
Date:
Sat Feb 08 12:00:07 2014 +0000
Revision:
86:26fc69fd3b6c
Parent:
82:0b31dbcd4769
Child:
113:65a335a675de
Synchronized with git revision 8c4fcca8c8e600391a5ccb90a3f889019733d082



Full URL: https://github.com/mbedmicro/mbed/commit/8c4fcca8c8e600391a5ccb90a3f889019733d082/



PWM update for Freescale Targets

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 82:0b31dbcd4769 1 /* mbed Microcontroller Library
mbed_official 82:0b31dbcd4769 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 82:0b31dbcd4769 3 *
mbed_official 82:0b31dbcd4769 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 82:0b31dbcd4769 5 * you may not use this file except in compliance with the License.
mbed_official 82:0b31dbcd4769 6 * You may obtain a copy of the License at
mbed_official 82:0b31dbcd4769 7 *
mbed_official 82:0b31dbcd4769 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 82:0b31dbcd4769 9 *
mbed_official 82:0b31dbcd4769 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 82:0b31dbcd4769 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 82:0b31dbcd4769 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 82:0b31dbcd4769 13 * See the License for the specific language governing permissions and
mbed_official 82:0b31dbcd4769 14 * limitations under the License.
mbed_official 82:0b31dbcd4769 15 */
mbed_official 82:0b31dbcd4769 16 #include <stddef.h>
mbed_official 82:0b31dbcd4769 17 #include "cmsis.h"
mbed_official 82:0b31dbcd4769 18
mbed_official 82:0b31dbcd4769 19 #include "gpio_irq_api.h"
mbed_official 82:0b31dbcd4769 20 #include "error.h"
mbed_official 82:0b31dbcd4769 21
mbed_official 82:0b31dbcd4769 22 #define CHANNEL_NUM 64 // 31 pins on 2 ports
mbed_official 82:0b31dbcd4769 23
mbed_official 82:0b31dbcd4769 24 static uint32_t channel_ids[CHANNEL_NUM] = {0};
mbed_official 82:0b31dbcd4769 25 static gpio_irq_handler irq_handler;
mbed_official 82:0b31dbcd4769 26
mbed_official 82:0b31dbcd4769 27 #define IRQ_DISABLED (0)
mbed_official 82:0b31dbcd4769 28 #define IRQ_RAISING_EDGE PORT_PCR_IRQC(9)
mbed_official 82:0b31dbcd4769 29 #define IRQ_FALLING_EDGE PORT_PCR_IRQC(10)
mbed_official 82:0b31dbcd4769 30 #define IRQ_EITHER_EDGE PORT_PCR_IRQC(11)
mbed_official 82:0b31dbcd4769 31
mbed_official 82:0b31dbcd4769 32 static void handle_interrupt_in(PORT_Type *port, int ch_base) {
mbed_official 82:0b31dbcd4769 33 uint32_t mask = 0, i;
mbed_official 82:0b31dbcd4769 34
mbed_official 82:0b31dbcd4769 35 for (i = 0; i < 32; i++) {
mbed_official 82:0b31dbcd4769 36 uint32_t pmask = (1 << i);
mbed_official 82:0b31dbcd4769 37 if (port->ISFR & pmask) {
mbed_official 82:0b31dbcd4769 38 mask |= pmask;
mbed_official 82:0b31dbcd4769 39 uint32_t id = channel_ids[ch_base + i];
mbed_official 86:26fc69fd3b6c 40 if (id == 0) {
mbed_official 86:26fc69fd3b6c 41 continue;
mbed_official 86:26fc69fd3b6c 42 }
mbed_official 82:0b31dbcd4769 43
mbed_official 82:0b31dbcd4769 44 FGPIO_Type *gpio;
mbed_official 82:0b31dbcd4769 45 gpio_irq_event event = IRQ_NONE;
mbed_official 82:0b31dbcd4769 46 switch (port->PCR[i] & PORT_PCR_IRQC_MASK) {
mbed_official 82:0b31dbcd4769 47 case IRQ_RAISING_EDGE:
mbed_official 82:0b31dbcd4769 48 event = IRQ_RISE;
mbed_official 82:0b31dbcd4769 49 break;
mbed_official 82:0b31dbcd4769 50
mbed_official 82:0b31dbcd4769 51 case IRQ_FALLING_EDGE:
mbed_official 82:0b31dbcd4769 52 event = IRQ_FALL;
mbed_official 82:0b31dbcd4769 53 break;
mbed_official 82:0b31dbcd4769 54
mbed_official 82:0b31dbcd4769 55 case IRQ_EITHER_EDGE:
mbed_official 82:0b31dbcd4769 56 gpio = (port == PORTA) ? (FPTA) : (FPTB);
mbed_official 82:0b31dbcd4769 57 event = (gpio->PDIR & pmask) ? (IRQ_RISE) : (IRQ_FALL);
mbed_official 82:0b31dbcd4769 58 break;
mbed_official 82:0b31dbcd4769 59 }
mbed_official 82:0b31dbcd4769 60 if (event != IRQ_NONE) {
mbed_official 82:0b31dbcd4769 61 irq_handler(id, event);
mbed_official 82:0b31dbcd4769 62 }
mbed_official 82:0b31dbcd4769 63 }
mbed_official 82:0b31dbcd4769 64 }
mbed_official 82:0b31dbcd4769 65 port->ISFR = mask;
mbed_official 82:0b31dbcd4769 66 }
mbed_official 82:0b31dbcd4769 67
mbed_official 82:0b31dbcd4769 68 /* IRQ only on PORTA and PORTB */
mbed_official 82:0b31dbcd4769 69 void gpio_irqA(void) {
mbed_official 82:0b31dbcd4769 70 handle_interrupt_in(PORTA, 0);
mbed_official 82:0b31dbcd4769 71 }
mbed_official 82:0b31dbcd4769 72
mbed_official 82:0b31dbcd4769 73 void gpio_irqB(void) {
mbed_official 82:0b31dbcd4769 74 handle_interrupt_in(PORTB, 32);
mbed_official 82:0b31dbcd4769 75 }
mbed_official 82:0b31dbcd4769 76
mbed_official 82:0b31dbcd4769 77 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
mbed_official 82:0b31dbcd4769 78 if (pin == NC) return -1;
mbed_official 82:0b31dbcd4769 79
mbed_official 82:0b31dbcd4769 80 irq_handler = handler;
mbed_official 82:0b31dbcd4769 81
mbed_official 82:0b31dbcd4769 82 obj->port = pin >> PORT_SHIFT;
mbed_official 82:0b31dbcd4769 83 obj->pin = (pin & 0x7F) >> 2;
mbed_official 82:0b31dbcd4769 84
mbed_official 82:0b31dbcd4769 85 uint32_t ch_base, vector;
mbed_official 82:0b31dbcd4769 86 IRQn_Type irq_n;
mbed_official 82:0b31dbcd4769 87 switch (obj->port) {
mbed_official 82:0b31dbcd4769 88 case PortA:
mbed_official 82:0b31dbcd4769 89 ch_base = 0;
mbed_official 82:0b31dbcd4769 90 irq_n = PORTA_IRQn;
mbed_official 82:0b31dbcd4769 91 vector = (uint32_t)gpio_irqA;
mbed_official 82:0b31dbcd4769 92 break;
mbed_official 82:0b31dbcd4769 93
mbed_official 82:0b31dbcd4769 94 case PortB:
mbed_official 82:0b31dbcd4769 95 ch_base = 32;
mbed_official 82:0b31dbcd4769 96 irq_n = PORTB_IRQn;
mbed_official 82:0b31dbcd4769 97 vector = (uint32_t)gpio_irqB;
mbed_official 82:0b31dbcd4769 98 break;
mbed_official 82:0b31dbcd4769 99
mbed_official 82:0b31dbcd4769 100 default:
mbed_official 82:0b31dbcd4769 101 error("gpio_irq only supported on Port A and B\n");
mbed_official 82:0b31dbcd4769 102 break;
mbed_official 82:0b31dbcd4769 103 }
mbed_official 82:0b31dbcd4769 104 NVIC_SetVector(irq_n, vector);
mbed_official 82:0b31dbcd4769 105 NVIC_EnableIRQ(irq_n);
mbed_official 82:0b31dbcd4769 106
mbed_official 82:0b31dbcd4769 107 obj->ch = ch_base + obj->pin;
mbed_official 82:0b31dbcd4769 108 channel_ids[obj->ch] = id;
mbed_official 82:0b31dbcd4769 109
mbed_official 82:0b31dbcd4769 110 return 0;
mbed_official 82:0b31dbcd4769 111 }
mbed_official 82:0b31dbcd4769 112
mbed_official 82:0b31dbcd4769 113 void gpio_irq_free(gpio_irq_t *obj) {
mbed_official 82:0b31dbcd4769 114 channel_ids[obj->ch] = 0;
mbed_official 82:0b31dbcd4769 115 }
mbed_official 82:0b31dbcd4769 116
mbed_official 82:0b31dbcd4769 117 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
mbed_official 82:0b31dbcd4769 118 PORT_Type *port = (PORT_Type *)(PORTA_BASE + 0x1000 * obj->port);
mbed_official 82:0b31dbcd4769 119
mbed_official 82:0b31dbcd4769 120 uint32_t irq_settings = IRQ_DISABLED;
mbed_official 82:0b31dbcd4769 121
mbed_official 82:0b31dbcd4769 122 switch (port->PCR[obj->pin] & PORT_PCR_IRQC_MASK) {
mbed_official 82:0b31dbcd4769 123 case IRQ_DISABLED:
mbed_official 82:0b31dbcd4769 124 if (enable) {
mbed_official 82:0b31dbcd4769 125 irq_settings = (event == IRQ_RISE) ? (IRQ_RAISING_EDGE) : (IRQ_FALLING_EDGE);
mbed_official 82:0b31dbcd4769 126 }
mbed_official 82:0b31dbcd4769 127 break;
mbed_official 82:0b31dbcd4769 128
mbed_official 82:0b31dbcd4769 129 case IRQ_RAISING_EDGE:
mbed_official 82:0b31dbcd4769 130 if (enable) {
mbed_official 82:0b31dbcd4769 131 irq_settings = (event == IRQ_RISE) ? (IRQ_RAISING_EDGE) : (IRQ_EITHER_EDGE);
mbed_official 82:0b31dbcd4769 132 } else {
mbed_official 82:0b31dbcd4769 133 if (event == IRQ_FALL)
mbed_official 82:0b31dbcd4769 134 irq_settings = IRQ_RAISING_EDGE;
mbed_official 82:0b31dbcd4769 135 }
mbed_official 82:0b31dbcd4769 136 break;
mbed_official 82:0b31dbcd4769 137
mbed_official 82:0b31dbcd4769 138 case IRQ_FALLING_EDGE:
mbed_official 82:0b31dbcd4769 139 if (enable) {
mbed_official 82:0b31dbcd4769 140 irq_settings = (event == IRQ_FALL) ? (IRQ_FALLING_EDGE) : (IRQ_EITHER_EDGE);
mbed_official 82:0b31dbcd4769 141 } else {
mbed_official 82:0b31dbcd4769 142 if (event == IRQ_RISE)
mbed_official 82:0b31dbcd4769 143 irq_settings = IRQ_FALLING_EDGE;
mbed_official 82:0b31dbcd4769 144 }
mbed_official 82:0b31dbcd4769 145 break;
mbed_official 82:0b31dbcd4769 146
mbed_official 82:0b31dbcd4769 147 case IRQ_EITHER_EDGE:
mbed_official 82:0b31dbcd4769 148 if (enable) {
mbed_official 82:0b31dbcd4769 149 irq_settings = IRQ_EITHER_EDGE;
mbed_official 82:0b31dbcd4769 150 } else {
mbed_official 82:0b31dbcd4769 151 irq_settings = (event == IRQ_RISE) ? (IRQ_FALLING_EDGE) : (IRQ_RAISING_EDGE);
mbed_official 82:0b31dbcd4769 152 }
mbed_official 82:0b31dbcd4769 153 break;
mbed_official 82:0b31dbcd4769 154 }
mbed_official 82:0b31dbcd4769 155
mbed_official 82:0b31dbcd4769 156 // Interrupt configuration and clear interrupt
mbed_official 82:0b31dbcd4769 157 port->PCR[obj->pin] = (port->PCR[obj->pin] & ~PORT_PCR_IRQC_MASK) | irq_settings | PORT_PCR_ISF_MASK;
mbed_official 82:0b31dbcd4769 158 }
mbed_official 82:0b31dbcd4769 159
mbed_official 82:0b31dbcd4769 160 void gpio_irq_enable(gpio_irq_t *obj) {
mbed_official 82:0b31dbcd4769 161 if (obj->port == PortA) {
mbed_official 82:0b31dbcd4769 162 NVIC_EnableIRQ(PORTA_IRQn);
mbed_official 82:0b31dbcd4769 163 } else if (obj->port == PortB) {
mbed_official 82:0b31dbcd4769 164 NVIC_EnableIRQ(PORTB_IRQn);
mbed_official 82:0b31dbcd4769 165 }
mbed_official 82:0b31dbcd4769 166 }
mbed_official 82:0b31dbcd4769 167
mbed_official 82:0b31dbcd4769 168 void gpio_irq_disable(gpio_irq_t *obj) {
mbed_official 82:0b31dbcd4769 169 if (obj->port == PortA) {
mbed_official 82:0b31dbcd4769 170 NVIC_DisableIRQ(PORTA_IRQn);
mbed_official 82:0b31dbcd4769 171 } else if (obj->port == PortB) {
mbed_official 82:0b31dbcd4769 172 NVIC_DisableIRQ(PORTB_IRQn);
mbed_official 82:0b31dbcd4769 173 }
mbed_official 82:0b31dbcd4769 174 }
mbed_official 86:26fc69fd3b6c 175
mbed_official 86:26fc69fd3b6c 176 // Change the NMI pin to an input. This allows NMI pin to
mbed_official 86:26fc69fd3b6c 177 // be used as a low power mode wakeup. The application will
mbed_official 86:26fc69fd3b6c 178 // need to change the pin back to NMI_b or wakeup only occurs once!
mbed_official 86:26fc69fd3b6c 179 extern void gpio_init(gpio_t *obj, PinName pin, PinDirection direction);
mbed_official 86:26fc69fd3b6c 180 void NMI_Handler(void)
mbed_official 86:26fc69fd3b6c 181 {
mbed_official 86:26fc69fd3b6c 182 gpio_t gpio;
mbed_official 86:26fc69fd3b6c 183 gpio_init(&gpio, PTB5, PIN_INPUT);
mbed_official 86:26fc69fd3b6c 184 }