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targets/cmsis/TARGET_STM/TARGET_DISCO_F051R8/TOOLCHAIN_GCC_ARM/startup_stm32f0xx.s@130:1dec54e4aec3, 2014-03-21 (annotated)

Committer:
mbed_official
Date:
Fri Mar 21 11:45:09 2014 +0000
Revision:
130:1dec54e4aec3
Synchronized with git revision e5c9ff6781a4e277a5a454e5a0b037f76e31739d



Full URL: https://github.com/mbedmicro/mbed/commit/e5c9ff6781a4e277a5a454e5a0b037f76e31739d/



STM32F0-Discovery (STM32F051R8) initial port

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 130:1dec54e4aec3 1 /**
mbed_official 130:1dec54e4aec3 2 ******************************************************************************
mbed_official 130:1dec54e4aec3 3 * @file startup_stm32f0xx.s
mbed_official 130:1dec54e4aec3 4 * @author MCD Application Team
mbed_official 130:1dec54e4aec3 5 * @version V1.0.0
mbed_official 130:1dec54e4aec3 6 * @date 23-March-2012
mbed_official 130:1dec54e4aec3 7 * @brief STM32F0xx Devices vector table for RIDE7 toolchain.
mbed_official 130:1dec54e4aec3 8 * This module performs:
mbed_official 130:1dec54e4aec3 9 * - Set the initial SP
mbed_official 130:1dec54e4aec3 10 * - Set the initial PC == Reset_Handler,
mbed_official 130:1dec54e4aec3 11 * - Set the vector table entries with the exceptions ISR address
mbed_official 130:1dec54e4aec3 12 * - Branches to main in the C library (which eventually
mbed_official 130:1dec54e4aec3 13 * calls main()).
mbed_official 130:1dec54e4aec3 14 * After Reset the Cortex-M0 processor is in Thread mode,
mbed_official 130:1dec54e4aec3 15 * priority is Privileged, and the Stack is set to Main.
mbed_official 130:1dec54e4aec3 16 ******************************************************************************
mbed_official 130:1dec54e4aec3 17 * @attention
mbed_official 130:1dec54e4aec3 18 *
mbed_official 130:1dec54e4aec3 19 * <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
mbed_official 130:1dec54e4aec3 20 *
mbed_official 130:1dec54e4aec3 21 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
mbed_official 130:1dec54e4aec3 22 * You may not use this file except in compliance with the License.
mbed_official 130:1dec54e4aec3 23 * You may obtain a copy of the License at:
mbed_official 130:1dec54e4aec3 24 *
mbed_official 130:1dec54e4aec3 25 * http://www.st.com/software_license_agreement_liberty_v2
mbed_official 130:1dec54e4aec3 26 *
mbed_official 130:1dec54e4aec3 27 * Unless required by applicable law or agreed to in writing, software
mbed_official 130:1dec54e4aec3 28 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 130:1dec54e4aec3 29 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 130:1dec54e4aec3 30 * See the License for the specific language governing permissions and
mbed_official 130:1dec54e4aec3 31 * limitations under the License.
mbed_official 130:1dec54e4aec3 32 *
mbed_official 130:1dec54e4aec3 33 ******************************************************************************
mbed_official 130:1dec54e4aec3 34 */
mbed_official 130:1dec54e4aec3 35
mbed_official 130:1dec54e4aec3 36 .syntax unified
mbed_official 130:1dec54e4aec3 37 .cpu cortex-m0
mbed_official 130:1dec54e4aec3 38 .fpu softvfp
mbed_official 130:1dec54e4aec3 39 .thumb
mbed_official 130:1dec54e4aec3 40
mbed_official 130:1dec54e4aec3 41 .global g_pfnVectors
mbed_official 130:1dec54e4aec3 42 .global Default_Handler
mbed_official 130:1dec54e4aec3 43
mbed_official 130:1dec54e4aec3 44 /* start address for the initialization values of the .data section.
mbed_official 130:1dec54e4aec3 45 defined in linker script */
mbed_official 130:1dec54e4aec3 46 .word _sidata
mbed_official 130:1dec54e4aec3 47 /* start address for the .data section. defined in linker script */
mbed_official 130:1dec54e4aec3 48 .word _sdata
mbed_official 130:1dec54e4aec3 49 /* end address for the .data section. defined in linker script */
mbed_official 130:1dec54e4aec3 50 .word _edata
mbed_official 130:1dec54e4aec3 51 /* start address for the .bss section. defined in linker script */
mbed_official 130:1dec54e4aec3 52 .word _sbss
mbed_official 130:1dec54e4aec3 53 /* end address for the .bss section. defined in linker script */
mbed_official 130:1dec54e4aec3 54 .word _ebss
mbed_official 130:1dec54e4aec3 55
mbed_official 130:1dec54e4aec3 56 .equ BootRAM, 0xF108F85F
mbed_official 130:1dec54e4aec3 57 /**
mbed_official 130:1dec54e4aec3 58 * @brief This is the code that gets called when the processor first
mbed_official 130:1dec54e4aec3 59 * starts execution following a reset event. Only the absolutely
mbed_official 130:1dec54e4aec3 60 * necessary set is performed, after which the application
mbed_official 130:1dec54e4aec3 61 * supplied main() routine is called.
mbed_official 130:1dec54e4aec3 62 * @param None
mbed_official 130:1dec54e4aec3 63 * @retval : None
mbed_official 130:1dec54e4aec3 64 */
mbed_official 130:1dec54e4aec3 65
mbed_official 130:1dec54e4aec3 66 .section .text.Reset_Handler
mbed_official 130:1dec54e4aec3 67 .weak Reset_Handler
mbed_official 130:1dec54e4aec3 68 .type Reset_Handler, %function
mbed_official 130:1dec54e4aec3 69 Reset_Handler:
mbed_official 130:1dec54e4aec3 70
mbed_official 130:1dec54e4aec3 71 /* Copy the data segment initializers from flash to SRAM */
mbed_official 130:1dec54e4aec3 72 movs r1, #0
mbed_official 130:1dec54e4aec3 73 b LoopCopyDataInit
mbed_official 130:1dec54e4aec3 74
mbed_official 130:1dec54e4aec3 75 CopyDataInit:
mbed_official 130:1dec54e4aec3 76 ldr r3, =_sidata
mbed_official 130:1dec54e4aec3 77 ldr r3, [r3, r1]
mbed_official 130:1dec54e4aec3 78 str r3, [r0, r1]
mbed_official 130:1dec54e4aec3 79 adds r1, r1, #4
mbed_official 130:1dec54e4aec3 80
mbed_official 130:1dec54e4aec3 81 LoopCopyDataInit:
mbed_official 130:1dec54e4aec3 82 ldr r0, =_sdata
mbed_official 130:1dec54e4aec3 83 ldr r3, =_edata
mbed_official 130:1dec54e4aec3 84 adds r2, r0, r1
mbed_official 130:1dec54e4aec3 85 cmp r2, r3
mbed_official 130:1dec54e4aec3 86 bcc CopyDataInit
mbed_official 130:1dec54e4aec3 87 ldr r2, =_sbss
mbed_official 130:1dec54e4aec3 88 b LoopFillZerobss
mbed_official 130:1dec54e4aec3 89 /* Zero fill the bss segment. */
mbed_official 130:1dec54e4aec3 90 FillZerobss:
mbed_official 130:1dec54e4aec3 91 movs r3, #0
mbed_official 130:1dec54e4aec3 92 /* str r3, [r2], #4 */
mbed_official 130:1dec54e4aec3 93 str r3, [r2]
mbed_official 130:1dec54e4aec3 94 adds r2, r2, #4
mbed_official 130:1dec54e4aec3 95
mbed_official 130:1dec54e4aec3 96 LoopFillZerobss:
mbed_official 130:1dec54e4aec3 97 ldr r3, = _ebss
mbed_official 130:1dec54e4aec3 98 cmp r2, r3
mbed_official 130:1dec54e4aec3 99 bcc FillZerobss
mbed_official 130:1dec54e4aec3 100 /* Call the clock system intitialization function.*/
mbed_official 130:1dec54e4aec3 101 bl SystemInit
mbed_official 130:1dec54e4aec3 102 /* Call the application's entry point.*/
mbed_official 130:1dec54e4aec3 103 bl _start
mbed_official 130:1dec54e4aec3 104
mbed_official 130:1dec54e4aec3 105 .size Reset_Handler, .-Reset_Handler
mbed_official 130:1dec54e4aec3 106
mbed_official 130:1dec54e4aec3 107 /**
mbed_official 130:1dec54e4aec3 108 * @brief This is the code that gets called when the processor receives an
mbed_official 130:1dec54e4aec3 109 * unexpected interrupt. This simply enters an infinite loop, preserving
mbed_official 130:1dec54e4aec3 110 * the system state for examination by a debugger.
mbed_official 130:1dec54e4aec3 111 *
mbed_official 130:1dec54e4aec3 112 * @param None
mbed_official 130:1dec54e4aec3 113 * @retval None
mbed_official 130:1dec54e4aec3 114 */
mbed_official 130:1dec54e4aec3 115 .section .text.Default_Handler,"ax",%progbits
mbed_official 130:1dec54e4aec3 116 Default_Handler:
mbed_official 130:1dec54e4aec3 117 Infinite_Loop:
mbed_official 130:1dec54e4aec3 118 b Infinite_Loop
mbed_official 130:1dec54e4aec3 119 .size Default_Handler, .-Default_Handler
mbed_official 130:1dec54e4aec3 120 /*******************************************************************************
mbed_official 130:1dec54e4aec3 121 *
mbed_official 130:1dec54e4aec3 122 * The minimal vector table for a Cortex M0. Note that the proper constructs
mbed_official 130:1dec54e4aec3 123 * must be placed on this to ensure that it ends up at physical address
mbed_official 130:1dec54e4aec3 124 * 0x0000.0000.
mbed_official 130:1dec54e4aec3 125 *******************************************************************************/
mbed_official 130:1dec54e4aec3 126 .section .isr_vector,"a",%progbits
mbed_official 130:1dec54e4aec3 127 .type g_pfnVectors, %object
mbed_official 130:1dec54e4aec3 128 .size g_pfnVectors, .-g_pfnVectors
mbed_official 130:1dec54e4aec3 129
mbed_official 130:1dec54e4aec3 130
mbed_official 130:1dec54e4aec3 131 g_pfnVectors:
mbed_official 130:1dec54e4aec3 132 .word _estack
mbed_official 130:1dec54e4aec3 133 .word Reset_Handler
mbed_official 130:1dec54e4aec3 134 .word NMI_Handler
mbed_official 130:1dec54e4aec3 135 .word HardFault_Handler
mbed_official 130:1dec54e4aec3 136 .word 0
mbed_official 130:1dec54e4aec3 137 .word 0
mbed_official 130:1dec54e4aec3 138 .word 0
mbed_official 130:1dec54e4aec3 139 .word 0
mbed_official 130:1dec54e4aec3 140 .word 0
mbed_official 130:1dec54e4aec3 141 .word 0
mbed_official 130:1dec54e4aec3 142 .word 0
mbed_official 130:1dec54e4aec3 143 .word SVC_Handler
mbed_official 130:1dec54e4aec3 144 .word 0
mbed_official 130:1dec54e4aec3 145 .word 0
mbed_official 130:1dec54e4aec3 146 .word PendSV_Handler
mbed_official 130:1dec54e4aec3 147 .word SysTick_Handler
mbed_official 130:1dec54e4aec3 148 .word WWDG_IRQHandler
mbed_official 130:1dec54e4aec3 149 .word PVD_IRQHandler
mbed_official 130:1dec54e4aec3 150 .word RTC_IRQHandler
mbed_official 130:1dec54e4aec3 151 .word FLASH_IRQHandler
mbed_official 130:1dec54e4aec3 152 .word RCC_IRQHandler
mbed_official 130:1dec54e4aec3 153 .word EXTI0_1_IRQHandler
mbed_official 130:1dec54e4aec3 154 .word EXTI2_3_IRQHandler
mbed_official 130:1dec54e4aec3 155 .word EXTI4_15_IRQHandler
mbed_official 130:1dec54e4aec3 156 .word TS_IRQHandler
mbed_official 130:1dec54e4aec3 157 .word DMA1_Channel1_IRQHandler
mbed_official 130:1dec54e4aec3 158 .word DMA1_Channel2_3_IRQHandler
mbed_official 130:1dec54e4aec3 159 .word DMA1_Channel4_5_IRQHandler
mbed_official 130:1dec54e4aec3 160 .word ADC1_COMP_IRQHandler
mbed_official 130:1dec54e4aec3 161 .word TIM1_BRK_UP_TRG_COM_IRQHandler
mbed_official 130:1dec54e4aec3 162 .word TIM1_CC_IRQHandler
mbed_official 130:1dec54e4aec3 163 .word TIM2_IRQHandler
mbed_official 130:1dec54e4aec3 164 .word TIM3_IRQHandler
mbed_official 130:1dec54e4aec3 165 .word TIM6_DAC_IRQHandler
mbed_official 130:1dec54e4aec3 166 .word 0
mbed_official 130:1dec54e4aec3 167 .word TIM14_IRQHandler
mbed_official 130:1dec54e4aec3 168 .word TIM15_IRQHandler
mbed_official 130:1dec54e4aec3 169 .word TIM16_IRQHandler
mbed_official 130:1dec54e4aec3 170 .word TIM17_IRQHandler
mbed_official 130:1dec54e4aec3 171 .word I2C1_IRQHandler
mbed_official 130:1dec54e4aec3 172 .word I2C2_IRQHandler
mbed_official 130:1dec54e4aec3 173 .word SPI1_IRQHandler
mbed_official 130:1dec54e4aec3 174 .word SPI2_IRQHandler
mbed_official 130:1dec54e4aec3 175 .word USART1_IRQHandler
mbed_official 130:1dec54e4aec3 176 .word USART2_IRQHandler
mbed_official 130:1dec54e4aec3 177 .word 0
mbed_official 130:1dec54e4aec3 178 .word CEC_IRQHandler
mbed_official 130:1dec54e4aec3 179 .word 0
mbed_official 130:1dec54e4aec3 180 .word BootRAM /* @0x108. This is for boot in RAM mode for
mbed_official 130:1dec54e4aec3 181 STM32F0xx devices. */
mbed_official 130:1dec54e4aec3 182
mbed_official 130:1dec54e4aec3 183 /*******************************************************************************
mbed_official 130:1dec54e4aec3 184 *
mbed_official 130:1dec54e4aec3 185 * Provide weak aliases for each Exception handler to the Default_Handler.
mbed_official 130:1dec54e4aec3 186 * As they are weak aliases, any function with the same name will override
mbed_official 130:1dec54e4aec3 187 * this definition.
mbed_official 130:1dec54e4aec3 188 *
mbed_official 130:1dec54e4aec3 189 *******************************************************************************/
mbed_official 130:1dec54e4aec3 190
mbed_official 130:1dec54e4aec3 191 .weak NMI_Handler
mbed_official 130:1dec54e4aec3 192 .thumb_set NMI_Handler,Default_Handler
mbed_official 130:1dec54e4aec3 193
mbed_official 130:1dec54e4aec3 194 .weak HardFault_Handler
mbed_official 130:1dec54e4aec3 195 .thumb_set HardFault_Handler,Default_Handler
mbed_official 130:1dec54e4aec3 196
mbed_official 130:1dec54e4aec3 197 .weak SVC_Handler
mbed_official 130:1dec54e4aec3 198 .thumb_set SVC_Handler,Default_Handler
mbed_official 130:1dec54e4aec3 199
mbed_official 130:1dec54e4aec3 200 .weak PendSV_Handler
mbed_official 130:1dec54e4aec3 201 .thumb_set PendSV_Handler,Default_Handler
mbed_official 130:1dec54e4aec3 202
mbed_official 130:1dec54e4aec3 203 .weak SysTick_Handler
mbed_official 130:1dec54e4aec3 204 .thumb_set SysTick_Handler,Default_Handler
mbed_official 130:1dec54e4aec3 205
mbed_official 130:1dec54e4aec3 206 .weak WWDG_IRQHandler
mbed_official 130:1dec54e4aec3 207 .thumb_set WWDG_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 208
mbed_official 130:1dec54e4aec3 209 .weak PVD_IRQHandler
mbed_official 130:1dec54e4aec3 210 .thumb_set PVD_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 211
mbed_official 130:1dec54e4aec3 212 .weak RTC_IRQHandler
mbed_official 130:1dec54e4aec3 213 .thumb_set RTC_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 214
mbed_official 130:1dec54e4aec3 215 .weak FLASH_IRQHandler
mbed_official 130:1dec54e4aec3 216 .thumb_set FLASH_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 217
mbed_official 130:1dec54e4aec3 218 .weak RCC_IRQHandler
mbed_official 130:1dec54e4aec3 219 .thumb_set RCC_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 220
mbed_official 130:1dec54e4aec3 221 .weak EXTI0_1_IRQHandler
mbed_official 130:1dec54e4aec3 222 .thumb_set EXTI0_1_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 223
mbed_official 130:1dec54e4aec3 224 .weak EXTI2_3_IRQHandler
mbed_official 130:1dec54e4aec3 225 .thumb_set EXTI2_3_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 226
mbed_official 130:1dec54e4aec3 227 .weak EXTI4_15_IRQHandler
mbed_official 130:1dec54e4aec3 228 .thumb_set EXTI4_15_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 229
mbed_official 130:1dec54e4aec3 230 .weak TS_IRQHandler
mbed_official 130:1dec54e4aec3 231 .thumb_set TS_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 232
mbed_official 130:1dec54e4aec3 233 .weak DMA1_Channel1_IRQHandler
mbed_official 130:1dec54e4aec3 234 .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 235
mbed_official 130:1dec54e4aec3 236 .weak DMA1_Channel2_3_IRQHandler
mbed_official 130:1dec54e4aec3 237 .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 238
mbed_official 130:1dec54e4aec3 239 .weak DMA1_Channel4_5_IRQHandler
mbed_official 130:1dec54e4aec3 240 .thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 241
mbed_official 130:1dec54e4aec3 242 .weak ADC1_COMP_IRQHandler
mbed_official 130:1dec54e4aec3 243 .thumb_set ADC1_COMP_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 244
mbed_official 130:1dec54e4aec3 245 .weak TIM1_BRK_UP_TRG_COM_IRQHandler
mbed_official 130:1dec54e4aec3 246 .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 247
mbed_official 130:1dec54e4aec3 248 .weak TIM1_CC_IRQHandler
mbed_official 130:1dec54e4aec3 249 .thumb_set TIM1_CC_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 250
mbed_official 130:1dec54e4aec3 251 .weak TIM2_IRQHandler
mbed_official 130:1dec54e4aec3 252 .thumb_set TIM2_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 253
mbed_official 130:1dec54e4aec3 254 .weak TIM3_IRQHandler
mbed_official 130:1dec54e4aec3 255 .thumb_set TIM3_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 256
mbed_official 130:1dec54e4aec3 257 .weak TIM6_DAC_IRQHandler
mbed_official 130:1dec54e4aec3 258 .thumb_set TIM6_DAC_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 259
mbed_official 130:1dec54e4aec3 260 .weak TIM14_IRQHandler
mbed_official 130:1dec54e4aec3 261 .thumb_set TIM14_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 262
mbed_official 130:1dec54e4aec3 263 .weak TIM15_IRQHandler
mbed_official 130:1dec54e4aec3 264 .thumb_set TIM15_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 265
mbed_official 130:1dec54e4aec3 266 .weak TIM16_IRQHandler
mbed_official 130:1dec54e4aec3 267 .thumb_set TIM16_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 268
mbed_official 130:1dec54e4aec3 269 .weak TIM17_IRQHandler
mbed_official 130:1dec54e4aec3 270 .thumb_set TIM17_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 271
mbed_official 130:1dec54e4aec3 272 .weak I2C1_IRQHandler
mbed_official 130:1dec54e4aec3 273 .thumb_set I2C1_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 274
mbed_official 130:1dec54e4aec3 275 .weak I2C2_IRQHandler
mbed_official 130:1dec54e4aec3 276 .thumb_set I2C2_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 277
mbed_official 130:1dec54e4aec3 278 .weak SPI1_IRQHandler
mbed_official 130:1dec54e4aec3 279 .thumb_set SPI1_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 280
mbed_official 130:1dec54e4aec3 281 .weak SPI2_IRQHandler
mbed_official 130:1dec54e4aec3 282 .thumb_set SPI2_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 283
mbed_official 130:1dec54e4aec3 284 .weak USART1_IRQHandler
mbed_official 130:1dec54e4aec3 285 .thumb_set USART1_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 286
mbed_official 130:1dec54e4aec3 287 .weak USART2_IRQHandler
mbed_official 130:1dec54e4aec3 288 .thumb_set USART2_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 289
mbed_official 130:1dec54e4aec3 290 .weak CEC_IRQHandler
mbed_official 130:1dec54e4aec3 291 .thumb_set CEC_IRQHandler,Default_Handler
mbed_official 130:1dec54e4aec3 292
mbed_official 130:1dec54e4aec3 293 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
mbed_official 130:1dec54e4aec3 294