mbed library sources
Dependents: Encrypted my_mbed lklk CyaSSL_DTLS_Cellular ... more
Superseded
This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.
Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.
If you are looking for a stable and tested release, please import one of the official mbed library releases:
Import librarymbed
The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.
Diff: targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/system_stm32f30x.c
- Revision:
- 137:f9a97811e98c
- Parent:
- 135:067cc8ba23da
- Child:
- 138:ec7ee4660c49
--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/system_stm32f30x.c Tue Mar 25 11:45:07 2014 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F302R8/system_stm32f30x.c Tue Mar 25 13:45:07 2014 +0000 @@ -141,7 +141,10 @@ * @{ */ -uint32_t SystemCoreClock = 64000000; /* Default with HSI. Will be updated if HSE is used */ +// [TODO] Do the same for other compilers +// Warning: the RAM is initialized AFTER the SetSysClock function is called. +// This variable must be placed outside the initialized section (see scatter file). +uint32_t SystemCoreClock __attribute__((at(0x20000188))) = 64000000; /* Default with HSI. Will be updated if HSE is used */ __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; @@ -208,16 +211,16 @@ /* Disable all interrupts */ RCC->CIR = 0x00000000; + /* Configure the System clock source, PLL Multiplier and Divider factors, + AHB/APBx prescalers and Flash settings */ + SetSysClock(); + /* Configure the Vector Table location add offset address ------------------*/ #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ #endif - - /* Configure the System clock source, PLL Multiplier and Divider factors, - AHB/APBx prescalers and Flash settings */ - SetSysClock(); } /** @@ -330,9 +333,6 @@ } } } - - /* Update SystemCoreClock variable */ - SystemCoreClockUpdate(); /* Output SYSCLK on MCO pin(PA8) for debugging purpose */ /* @@ -411,7 +411,8 @@ while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL) { } - + + SystemCoreClock = 72000000; return 1; // OK } else @@ -459,6 +460,7 @@ { } + SystemCoreClock = 64000000; return 1; // OK }