Diff: targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_iwdg.c

Revision:

369:2e96f1b71984

Parent:

226:b062af740e40

--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_iwdg.c	Mon Oct 27 08:00:06 2014 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_iwdg.c	Mon Oct 27 09:45:07 2014 +0000
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_iwdg.c
   * @author  MCD Application Team
-  * @version V1.1.0RC2
-  * @date    14-May-2014
+  * @version V1.1.0
+  * @date    19-June-2014
   * @brief   IWDG HAL module driver.
   *          This file provides firmware functions to manage the following 
   *          functionalities of the Independent Watchdog (IWDG) peripheral:
@@ -44,14 +44,29 @@
                      ##### How to use this driver #####
   ==============================================================================
     [..]
+    If Window option is disabled
+      (+) Use IWDG using HAL_IWDG_Init() function to :
+         (++) Enable write access to IWDG_PR, IWDG_RLR.
+         (++) Configure the IWDG prescaler, counter reload value.
+              This reload value will be loaded in the IWDG counter each time the counter
+              is reloaded, then the IWDG will start counting down from this value.
+    [..]
       (+) Use IWDG using HAL_IWDG_Start() function to:
-          (++) Enable write access to IWDG_PR and IWDG_RLR registers.   
-          (++) Configure the IWDG prescaler and counter reload values.
           (++) Reload IWDG counter with value defined in the IWDG_RLR register.
           (++) Start the IWDG, when the IWDG is used in software mode (no need 
                to enable the LSI, it will be enabled by hardware).
       (+) Then the application program must refresh the IWDG counter at regular
           intervals during normal operation to prevent an MCU reset, using
+          HAL_IWDG_Refresh() function.
+    [..] 
+    if Window option is enabled:
+      
+      (+) Use IWDG using HAL_IWDG_Start() function to enable IWDG downcounter
+      (+) Use IWDG using HAL_IWDG_Init() function to :
+         (++) Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
+         (++) Configure the IWDG prescaler, reload value and window value.
+      (+) Then the application program must refresh the IWDG counter at regular
+          intervals during normal operation to prevent an MCU reset, using
           HAL_IWDG_Refresh() function.  
      
      *** IWDG HAL driver macros list ***
@@ -64,8 +79,7 @@
       (+) __HAL_IWDG_ENABLE_WRITE_ACCESS : Enable write access to IWDG_PR and IWDG_RLR registers
       (+) __HAL_IWDG_DISABLE_WRITE_ACCESS : Disable write access to IWDG_PR and IWDG_RLR registers
       (+) __HAL_IWDG_GET_FLAG: Get the selected IWDG's flag status
-      (+) __HAL_IWDG_CLEAR_FLAG: Clear the IWDG's pending flags      
-            
+
   @endverbatim
   ******************************************************************************
   * @attention
@@ -113,6 +127,7 @@
 
 /* Private typedef -----------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
+#define IWDG_TIMEOUT_FLAG          ((uint32_t)1000)     /* 1 s */
 /* Private macro -------------------------------------------------------------*/
 /* Private variables ---------------------------------------------------------*/
 /* Private function prototypes -----------------------------------------------*/
@@ -148,15 +163,14 @@
   */
 HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
 {
-  uint32_t tmp;
-  
   /* Check the IWDG handle allocation */
-  if(hiwdg == NULL)
+  if(hiwdg == HAL_NULL)
   {
     return HAL_ERROR;
   }
 
   /* Check the parameters */
+  assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
   assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
   assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload)); 
   
@@ -169,34 +183,12 @@
   /* Change IWDG peripheral state */
   hiwdg->State = HAL_IWDG_STATE_BUSY;  
   
-  /* Set IWDG counter clock prescaler */  
-  /* Get the PR register value */
-  tmp = hiwdg->Instance->PR;
-  
-  /* Clear PR[2:0] bits */
-  tmp &= ((uint32_t)~(IWDG_PR_PR));
-  
-  /* Prepare the IWDG Prescaler parameter */
-  tmp |= hiwdg->Init.Prescaler;
-  
   /* Enable write access to IWDG_PR and IWDG_RLR registers */  
   __HAL_IWDG_ENABLE_WRITE_ACCESS(hiwdg);
   
-  /* Write to IWDG PR */
-  hiwdg->Instance->PR = tmp;
-  
-  /* Set IWDG counter reload value */  
-  /* Get the RLR register value */
-  tmp = hiwdg->Instance->RLR;
-  
-  /* Clear RL[11:0] bits */
-  tmp &= ((uint32_t)~(IWDG_RLR_RL));
-  
-  /* Prepare the IWDG Prescaler parameter */
-  tmp |= hiwdg->Init.Reload;
-  
-  /* Write to IWDG RLR */
-  hiwdg->Instance->RLR = tmp;
+  /* Write to IWDG registers the IWDG_Prescaler & IWDG_Reload values to work with */
+  MODIFY_REG(hiwdg->Instance->PR, IWDG_PR_PR, hiwdg->Init.Prescaler);
+  MODIFY_REG(hiwdg->Instance->RLR, IWDG_RLR_RL, hiwdg->Init.Reload);
  
   /* Change IWDG peripheral state */
   hiwdg->State = HAL_IWDG_STATE_READY;
@@ -275,14 +267,30 @@
   */
 HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
 {
+  uint32_t tickstart = 0;
+
   /* Process Locked */
-  __HAL_LOCK(hiwdg); 
-  
+  __HAL_LOCK(hiwdg);
+
     /* Change IWDG peripheral state */
   hiwdg->State = HAL_IWDG_STATE_BUSY;
-  
-  /* Clear the RVU flag */  
-  __HAL_IWDG_CLEAR_FLAG(hiwdg, IWDG_FLAG_RVU);
+
+  tickstart = HAL_GetTick();
+
+  /* Wait until RVU flag is RESET */
+  while(__HAL_IWDG_GET_FLAG(hiwdg, IWDG_FLAG_RVU) != RESET)
+  {
+    if((HAL_GetTick() - tickstart ) > IWDG_TIMEOUT_FLAG)
+    {
+      /* Set IWDG state */
+      hiwdg->State = HAL_IWDG_STATE_TIMEOUT;
+
+       /* Process unlocked */
+      __HAL_UNLOCK(hiwdg);
+
+      return HAL_TIMEOUT;
+    }
+  }
   
   /* Reload IWDG counter with value defined in the reload register */
   __HAL_IWDG_RELOAD_COUNTER(hiwdg);