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Last commit 20 Feb 2019 by 
mbed official
Diff: targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_cryp.c
- Revision:
- 489:119543c9f674
- Parent:
- 387:643a59b3dbac
--- a/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_cryp.c Thu Mar 05 13:15:07 2015 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_cryp.c Thu Mar 12 14:30:49 2015 +0000
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l0xx_hal_cryp.c
* @author MCD Application Team
- * @version V1.1.0
- * @date 18-June-2014
+ * @version V1.2.0
+ * @date 06-February-2015
* @brief CRYP HAL module driver.
*
* This file provides firmware functions to manage the following
@@ -22,18 +22,18 @@
The CRYP HAL driver can be used as follows:
(#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit():
- (##) Enable the CRYP interface clock using __CRYP_CLK_ENABLE()
- (##) In case of using interrupts (e.g. HAL_AES_ECB_Encrypt_IT())
+ (##) Enable the CRYP interface clock using __HAL_RCC_AES_CLK_ENABLE()
+ (##) In case of using interrupts (e.g. HAL_CRYP_AESECB_Encrypt_IT())
(+) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority()
(+) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ()
(+) In CRYP IRQ handler, call HAL_CRYP_IRQHandler()
- (##) In case of using DMA to control data transfer (e.g. HAL_AES_ECB_Encrypt_DMA())
+ (##) In case of using DMA to control data transfer (e.g. HAL_CRYP_AESECB_Encrypt_DMA())
(+) Enable the DMA1 interface clock using
- (++) __DMA1_CLK_ENABLE()
+ (++) __HAL_RCC_DMA1_CLK_ENABLE()
(+) Configure and enable two DMA Channels one for managing data transfer from
memory to peripheral (input channel) and another channel for managing data
transfer from peripheral to memory (output channel)
- (+) Associate the initilalized DMA handle to the CRYP DMA handle
+ (+) Associate the initialized DMA handle to the CRYP DMA handle
using __HAL_LINKDMA()
(+) Configure the priority and enable the NVIC for the transfer complete
interrupt on the two DMA Streams. The output stream should have higher
@@ -57,20 +57,20 @@
i.e. the data transfer is ensured by DMA
e.g. HAL_CRYP_AESCBC_Encrypt_DMA()
- (#)When the processing function is called at first time after HAL_CRYP_Init()
+ (#)When the processing function is called for the first time after HAL_CRYP_Init()
the CRYP peripheral is initialized and processes the buffer in input.
At second call, the processing function performs an append of the already
processed buffer.
When a new data block is to be processed, call HAL_CRYP_Init() then the
processing function.
- (#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral.
+ (#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral.
@endverbatim
******************************************************************************
* @attention
*
- * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
+ * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -97,41 +97,62 @@
******************************************************************************
*/
+#if defined (STM32L041xx) || defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx) || (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
/* Includes ------------------------------------------------------------------*/
#include "stm32l0xx_hal.h"
+#ifdef HAL_CRYP_MODULE_ENABLED
/** @addtogroup STM32L0xx_HAL_Driver
* @{
*/
-/** @defgroup CRYP
+/** @defgroup CRYP CRYP
* @brief CRYP HAL module driver.
* @{
*/
-#ifdef HAL_CRYP_MODULE_ENABLED
-#if !defined (STM32L051xx) && !defined (STM32L052xx) && !defined (STM32L053xx)
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
+
+/** @defgroup CRYP_Private_Defines CRYP Private Defines
+ * @{
+ */
+
#define CRYP_ALGO_CHAIN_MASK (AES_CR_MODE | AES_CR_CHMOD)
+
+/**
+ * @}
+ */
+
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
-static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector);
-static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key);
-static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout);
-static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma);
-static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma);
-static void CRYP_DMAError(DMA_HandleTypeDef *hdma);
-static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr);
-/* Private functions ---------------------------------------------------------*/
-/** @defgroup CRYP_Private_Functions
+/** @defgroup CRYP_Private_Functions CRYP Private Functions
* @{
*/
-/** @defgroup CRYP_Group1 Initialization and de-initialization functions
+static HAL_StatusTypeDef CRYP_EncryptDecrypt_IT(CRYP_HandleTypeDef *hcryp);
+static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector);
+static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key);
+static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout);
+static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma);
+static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma);
+static void CRYP_DMAError(DMA_HandleTypeDef *hdma);
+static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr);
+
+/**
+ * @}
+ */
+
+/* Private functions ---------------------------------------------------------*/
+
+/** @defgroup CRYP_Exported_Functions CRYP Exported Functions
+ * @{
+ */
+
+/** @defgroup CRYP_Exported_Functions_Group1 Initialization and de-initialization functions
* @brief Initialization and Configuration functions.
*
@verbatim
@@ -157,40 +178,57 @@
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp)
-{
+{
/* Check the CRYP handle allocation */
- if(hcryp == HAL_NULL)
+ if(hcryp == NULL)
{
return HAL_ERROR;
}
/* Check the parameters */
+ assert_param(IS_AES_ALL_INSTANCE(hcryp->Instance));
assert_param(IS_CRYP_DATATYPE(hcryp->Init.DataType));
if(hcryp->State == HAL_CRYP_STATE_RESET)
{
+ /* Allocate lock resource and initialize it */
+ hcryp->Lock = HAL_UNLOCKED;
+
/* Init the low level hardware */
HAL_CRYP_MspInit(hcryp);
}
- /* Change the CRYP state */
- hcryp->State = HAL_CRYP_STATE_BUSY;
-
- /* Set the data type*/
- AES->CR = hcryp->Init.DataType;
-
- /* Reset CrypInCount and CrypOutCount */
- hcryp->CrypInCount = 0;
- hcryp->CrypOutCount = 0;
-
- /* Change the CRYP state */
- hcryp->State = HAL_CRYP_STATE_READY;
-
- /* Set the default CRYP phase */
- hcryp->Phase = HAL_CRYP_PHASE_READY;
-
- /* Return function status */
- return HAL_OK;
+ /* Check if AES already enabled */
+ if (HAL_IS_BIT_CLR(hcryp->Instance->CR, AES_CR_EN))
+ {
+ /* Change the CRYP state */
+ hcryp->State = HAL_CRYP_STATE_BUSY;
+
+ /* Set the data type*/
+ MODIFY_REG(hcryp->Instance->CR, AES_CR_DATATYPE, hcryp->Init.DataType);
+
+ /* Reset CrypInCount and CrypOutCount */
+ hcryp->CrypInCount = 0;
+ hcryp->CrypOutCount = 0;
+
+ /* Change the CRYP state */
+ hcryp->State = HAL_CRYP_STATE_READY;
+
+ /* Set the default CRYP phase */
+ hcryp->Phase = HAL_CRYP_PHASE_READY;
+
+ /* Return function status */
+ return HAL_OK;
+ }
+ else
+ {
+ /* The Datatype selection must be changed if the AES is disabled. Writing these bits while the AES is */
+ /* enabled is forbidden to avoid unpredictable AES behavior.*/
+
+ /* Return function status */
+ return HAL_ERROR;
+ }
+
}
/**
@@ -202,7 +240,7 @@
HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp)
{
/* Check the CRYP handle allocation */
- if(hcryp == HAL_NULL)
+ if(hcryp == NULL)
{
return HAL_ERROR;
}
@@ -218,7 +256,7 @@
hcryp->CrypOutCount = 0;
/* Disable the CRYP Peripheral Clock */
- __HAL_CRYP_DISABLE();
+ __HAL_CRYP_DISABLE(hcryp);
/* DeInit the low level hardware: CLOCK, NVIC.*/
HAL_CRYP_MspDeInit(hcryp);
@@ -241,9 +279,8 @@
*/
__weak void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp)
{
- /* NOTE : This function Should not be modified, when the callback is needed,
- the HAL_CRYP_MspInit could be implemented in the user file
- */
+ /* NOTE : This function should not be modified; when the callback is needed,
+ the HAL_CRYP_MspInit can be implemented in the user file */
}
/**
@@ -254,16 +291,15 @@
*/
__weak void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp)
{
- /* NOTE : This function Should not be modified, when the callback is needed,
- the HAL_CRYP_MspDeInit could be implemented in the user file
- */
+ /* NOTE : This function should not be modified; when the callback is needed,
+ the HAL_CRYP_MspDeInit can be implemented in the user file */
}
/**
* @}
*/
-/** @defgroup CRYP_Group2 AES processing functions
+/** @defgroup CRYP_Exported_Functions_Group2 AES processing functions
* @brief processing functions.
*
@verbatim
@@ -287,9 +323,9 @@
* then encrypt pPlainData. The cypher data are available in pCypherData
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
- * @param pPlainData: Pointer to the plaintext buffer
+ * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
* @param Size: Length of the plaintext buffer, must be a multiple of 16.
- * @param pCypherData: Pointer to the cyphertext buffer
+ * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
* @param Timeout: Specify Timeout value
* @retval HAL status
*/
@@ -297,43 +333,65 @@
{
/* Process Locked */
__HAL_LOCK(hcryp);
-
- /* Change the CRYP state */
- hcryp->State = HAL_CRYP_STATE_BUSY;
-
- /* Check if initialization phase has already been performed */
- if(hcryp->Phase == HAL_CRYP_PHASE_READY)
+
+ /* Check that data aligned on u32 and Size multiple of 16*/
+ if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
{
- /* Set the key */
- CRYP_SetKey(hcryp, hcryp->Init.pKey);
-
- /* Reset the CHMOD & MODE bits & */
- AES->CR &= (uint32_t)(~CRYP_ALGO_CHAIN_MASK);
-
- /* Set the CRYP peripheral in AES ECB mode */
- __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
-
- /* Enable CRYP */
- __HAL_CRYP_ENABLE();
-
- /* Set the phase */
- hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
+ /* Process Locked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
}
- /* Write Plain Data and Get Cypher Data */
- if(CRYP_ProcessData(hcryp,pPlainData, Size, pCypherData, Timeout) != HAL_OK)
+ /* Check if HAL_CRYP_Init has been called */
+ if(hcryp->State != HAL_CRYP_STATE_RESET)
{
- return HAL_TIMEOUT;
+ /* Change the CRYP state */
+ hcryp->State = HAL_CRYP_STATE_BUSY;
+
+ /* Check if initialization phase has already been performed */
+ if(hcryp->Phase == HAL_CRYP_PHASE_READY)
+ {
+ /* Set the key */
+ CRYP_SetKey(hcryp, hcryp->Init.pKey);
+
+ /* Reset the CHMOD & MODE bits */
+ CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
+
+ /* Set the CRYP peripheral in AES ECB mode */
+ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
+
+ /* Enable CRYP */
+ __HAL_CRYP_ENABLE(hcryp);
+
+ /* Set the phase */
+ hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
+ }
+
+ /* Write Plain Data and Get Cypher Data */
+ if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
+ {
+ return HAL_TIMEOUT;
+ }
+
+ /* Change the CRYP state */
+ hcryp->State = HAL_CRYP_STATE_READY;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_OK;
}
-
- /* Change the CRYP state */
- hcryp->State = HAL_CRYP_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hcryp);
-
- /* Return function status */
- return HAL_OK;
+ else
+ {
+ /* Process Locked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
+ }
}
/**
@@ -341,9 +399,9 @@
* then encrypt pPlainData. The cypher data are available in pCypherData
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
- * @param pPlainData: Pointer to the plaintext buffer
+ * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
* @param Size: Length of the plaintext buffer, must be a multiple of 16.
- * @param pCypherData: Pointer to the cyphertext buffer
+ * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
* @param Timeout: Specify Timeout value
* @retval HAL status
*/
@@ -352,45 +410,67 @@
/* Process Locked */
__HAL_LOCK(hcryp);
- /* Change the CRYP state */
- hcryp->State = HAL_CRYP_STATE_BUSY;
-
- /* Check if initialization phase has already been performed */
- if(hcryp->Phase == HAL_CRYP_PHASE_READY)
+ /* Check that data aligned on u32 */
+ if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
{
- /* Set the key */
- CRYP_SetKey(hcryp, hcryp->Init.pKey);
-
- /* Reset the CHMOD & MODE bits & */
- AES->CR &= (uint32_t)(~CRYP_ALGO_CHAIN_MASK);
-
- /* Set the CRYP peripheral in AES ECB mode */
- __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
-
- /* Set the Initialization Vector */
- CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
-
- /* Enable CRYP */
- __HAL_CRYP_ENABLE();
-
- /* Set the phase */
- hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
+ /* Process Locked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
}
+ /* Check if HAL_CRYP_Init has been called */
+ if(hcryp->State != HAL_CRYP_STATE_RESET)
+ {
+ /* Change the CRYP state */
+ hcryp->State = HAL_CRYP_STATE_BUSY;
+
+ /* Check if initialization phase has already been performed */
+ if(hcryp->Phase == HAL_CRYP_PHASE_READY)
+ {
+ /* Set the key */
+ CRYP_SetKey(hcryp, hcryp->Init.pKey);
+
+ /* Reset the CHMOD & MODE bits */
+ CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
+
+ /* Set the CRYP peripheral in AES CBC mode */
+ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
+
+ /* Set the Initialization Vector */
+ CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
+
+ /* Enable CRYP */
+ __HAL_CRYP_ENABLE(hcryp);
+
+ /* Set the phase */
+ hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
+ }
+
/* Write Plain Data and Get Cypher Data */
- if(CRYP_ProcessData(hcryp,pPlainData, Size, pCypherData, Timeout) != HAL_OK)
+ if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
{
return HAL_TIMEOUT;
}
-
- /* Change the CRYP state */
- hcryp->State = HAL_CRYP_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hcryp);
-
- /* Return function status */
- return HAL_OK;
+
+ /* Change the CRYP state */
+ hcryp->State = HAL_CRYP_STATE_READY;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_OK;
+ }
+ else
+ {
+ /* Process Locked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
+ }
}
/**
@@ -398,9 +478,9 @@
* then encrypt pPlainData. The cypher data are available in pCypherData
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
- * @param pPlainData: Pointer to the plaintext buffer
+ * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
* @param Size: Length of the plaintext buffer, must be a multiple of 16.
- * @param pCypherData: Pointer to the cyphertext buffer
+ * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
* @param Timeout: Specify Timeout value
* @retval HAL status
*/
@@ -409,57 +489,77 @@
/* Process Locked */
__HAL_LOCK(hcryp);
- /* Change the CRYP state */
- hcryp->State = HAL_CRYP_STATE_BUSY;
-
- /* Check if initialization phase has already been performed */
- if(hcryp->Phase == HAL_CRYP_PHASE_READY)
+ /* Check that data aligned on u32 */
+ if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
{
- /* Set the key */
- CRYP_SetKey(hcryp, hcryp->Init.pKey);
-
- /* Reset the CHMOD & MODE bits & */
- AES->CR &= (uint32_t)(~CRYP_ALGO_CHAIN_MASK);
-
- /* Set the CRYP peripheral in AES ECB mode */
- __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
-
- /* Set the Initialization Vector */
- CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
-
- /* Enable CRYP */
- __HAL_CRYP_ENABLE();
-
- /* Set the phase */
- hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
+ /* Process Locked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
}
+ /* Check if HAL_CRYP_Init has been called */
+ if(hcryp->State != HAL_CRYP_STATE_RESET)
+ {
+ /* Change the CRYP state */
+ hcryp->State = HAL_CRYP_STATE_BUSY;
+
+ /* Check if initialization phase has already been performed */
+ if(hcryp->Phase == HAL_CRYP_PHASE_READY)
+ {
+ /* Set the key */
+ CRYP_SetKey(hcryp, hcryp->Init.pKey);
+
+ /* Reset the CHMOD & MODE bits */
+ CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
+
+ /* Set the CRYP peripheral in AES CTR mode */
+ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
+
+ /* Set the Initialization Vector */
+ CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
+
+ /* Enable CRYP */
+ __HAL_CRYP_ENABLE(hcryp);
+
+ /* Set the phase */
+ hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
+ }
+
/* Write Plain Data and Get Cypher Data */
if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
{
return HAL_TIMEOUT;
}
-
- /* Change the CRYP state */
- hcryp->State = HAL_CRYP_STATE_READY;
+
+ /* Change the CRYP state */
+ hcryp->State = HAL_CRYP_STATE_READY;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_OK;
+ }
+ else
+ {
+ /* Release Lock */
+ __HAL_UNLOCK(hcryp);
- /* Process Unlocked */
- __HAL_UNLOCK(hcryp);
-
- /* Return function status */
- return HAL_OK;
+ /* Return function status */
+ return HAL_ERROR;
+ }
}
-
-
/**
* @brief Initializes the CRYP peripheral in AES ECB decryption mode
* then decrypted pCypherData. The cypher data are available in pPlainData
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
- * @param pCypherData: Pointer to the cyphertext buffer
+ * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
* @param Size: Length of the plaintext buffer, must be a multiple of 16.
- * @param pPlainData: Pointer to the plaintext buffer
+ * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
* @param Timeout: Specify Timeout value
* @retval HAL status
*/
@@ -468,42 +568,64 @@
/* Process Locked */
__HAL_LOCK(hcryp);
- /* Change the CRYP state */
- hcryp->State = HAL_CRYP_STATE_BUSY;
-
- /* Check if initialization phase has already been performed */
- if(hcryp->Phase == HAL_CRYP_PHASE_READY)
+ /* Check that data aligned on u32 */
+ if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
{
- /* Set the key */
- CRYP_SetKey(hcryp, hcryp->Init.pKey);
-
- /* Reset the CHMOD & MODE bits & */
- AES->CR &= (uint32_t)(~CRYP_ALGO_CHAIN_MASK);
-
- /* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
- __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
-
- /* Enable CRYP */
- __HAL_CRYP_ENABLE();
-
- /* Set the phase */
- hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
- }
-
- /* Write Plain Data and Get Cypher Data */
- if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
- {
- return HAL_TIMEOUT;
+ /* Process Locked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
}
- /* Change the CRYP state */
- hcryp->State = HAL_CRYP_STATE_READY;
+ /* Check if HAL_CRYP_Init has been called */
+ if(hcryp->State != HAL_CRYP_STATE_RESET)
+ {
+ /* Change the CRYP state */
+ hcryp->State = HAL_CRYP_STATE_BUSY;
+
+ /* Check if initialization phase has already been performed */
+ if(hcryp->Phase == HAL_CRYP_PHASE_READY)
+ {
+ /* Set the key */
+ CRYP_SetKey(hcryp, hcryp->Init.pKey);
+
+ /* Reset the CHMOD & MODE bits */
+ CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
+
+ /* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
+ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
+
+ /* Enable CRYP */
+ __HAL_CRYP_ENABLE(hcryp);
+
+ /* Set the phase */
+ hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
+ }
+
+ /* Write Cypher Data and Get Plain Data */
+ if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
+ {
+ return HAL_TIMEOUT;
+ }
+
+ /* Change the CRYP state */
+ hcryp->State = HAL_CRYP_STATE_READY;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_OK;
+ }
+ else
+ {
+ /* Release Lock */
+ __HAL_UNLOCK(hcryp);
- /* Process Unlocked */
- __HAL_UNLOCK(hcryp);
-
- /* Return function status */
- return HAL_OK;
+ /* Return function status */
+ return HAL_ERROR;
+ }
}
/**
@@ -511,9 +633,9 @@
* then decrypted pCypherData. The cypher data are available in pPlainData
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
- * @param pCypherData: Pointer to the cyphertext buffer
+ * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
* @param Size: Length of the plaintext buffer, must be a multiple of 16.
- * @param pPlainData: Pointer to the plaintext buffer
+ * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
* @param Timeout: Specify Timeout value
* @retval HAL status
*/
@@ -522,45 +644,67 @@
/* Process Locked */
__HAL_LOCK(hcryp);
- /* Change the CRYP state */
- hcryp->State = HAL_CRYP_STATE_BUSY;
-
- /* Check if initialization phase has already been performed */
- if(hcryp->Phase == HAL_CRYP_PHASE_READY)
+ /* Check that data aligned on u32 */
+ if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
{
- /* Set the key */
- CRYP_SetKey(hcryp, hcryp->Init.pKey);
-
- /* Reset the CHMOD & MODE bits & */
- AES->CR &= (uint32_t)(~CRYP_ALGO_CHAIN_MASK);
-
- /* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
- __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
-
- /* Set the Initialization Vector */
- CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
-
- /* Enable CRYP */
- __HAL_CRYP_ENABLE();
-
- /* Set the phase */
- hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
+ /* Process Locked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
}
- /* Write Plain Data and Get Cypher Data */
- if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
+ /* Check if HAL_CRYP_Init has been called */
+ if(hcryp->State != HAL_CRYP_STATE_RESET)
{
- return HAL_TIMEOUT;
+ /* Change the CRYP state */
+ hcryp->State = HAL_CRYP_STATE_BUSY;
+
+ /* Check if initialization phase has already been performed */
+ if(hcryp->Phase == HAL_CRYP_PHASE_READY)
+ {
+ /* Set the key */
+ CRYP_SetKey(hcryp, hcryp->Init.pKey);
+
+ /* Reset the CHMOD & MODE bits */
+ CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
+
+ /* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
+ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
+
+ /* Set the Initialization Vector */
+ CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
+
+ /* Enable CRYP */
+ __HAL_CRYP_ENABLE(hcryp);
+
+ /* Set the phase */
+ hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
+ }
+
+ /* Write Cypher Data and Get Plain Data */
+ if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
+ {
+ return HAL_TIMEOUT;
+ }
+
+ /* Change the CRYP state */
+ hcryp->State = HAL_CRYP_STATE_READY;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_OK;
}
+ else
+ {
+ /* Release Lock */
+ __HAL_UNLOCK(hcryp);
- /* Change the CRYP state */
- hcryp->State = HAL_CRYP_STATE_READY;
-
- /* Process Unlocked */
- __HAL_UNLOCK(hcryp);
-
- /* Return function status */
- return HAL_OK;
+ /* Return function status */
+ return HAL_ERROR;
+ }
}
/**
@@ -568,9 +712,9 @@
* then decrypted pCypherData. The cypher data are available in pPlainData
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
- * @param pCypherData: Pointer to the cyphertext buffer
+ * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
* @param Size: Length of the plaintext buffer, must be a multiple of 16.
- * @param pPlainData: Pointer to the plaintext buffer
+ * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
* @param Timeout: Specify Timeout value
* @retval HAL status
*/
@@ -579,8 +723,18 @@
/* Process Locked */
__HAL_LOCK(hcryp);
+ /* Check that data aligned on u32 */
+ if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
+ {
+ /* Process Locked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
+ }
+
/* Check if initialization phase has already been performed */
- if(hcryp->Phase == HAL_CRYP_PHASE_READY)
+ if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->Phase == HAL_CRYP_PHASE_READY))
{
/* Change the CRYP state */
hcryp->State = HAL_CRYP_STATE_BUSY;
@@ -588,23 +742,23 @@
/* Set the key */
CRYP_SetKey(hcryp, hcryp->Init.pKey);
- /* Reset the CHMOD & MODE bits & */
- AES->CR &= (uint32_t)(~CRYP_ALGO_CHAIN_MASK);
+ /* Reset the CHMOD & MODE bits */
+ CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
/* Set the CRYP peripheral in AES CTR decryption mode */
- __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
+ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
/* Set the Initialization Vector */
CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
-
+
/* Enable CRYP */
- __HAL_CRYP_ENABLE();
+ __HAL_CRYP_ENABLE(hcryp);
/* Set the phase */
hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
}
- /* Write Plain Data and Get Cypher Data */
+ /* Write Cypher Data and Get Plain Data */
if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
{
return HAL_TIMEOUT;
@@ -624,17 +778,26 @@
* @brief Initializes the CRYP peripheral in AES ECB encryption mode using Interrupt.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
- * @param pPlainData: Pointer to the plaintext buffer
+ * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
* @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
- * @param pCypherData: Pointer to the cyphertext buffer
+ * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
{
- uint32_t inputaddr;
- uint32_t outputaddr;
+ uint32_t inputaddr = 0;
- if(hcryp->State == HAL_CRYP_STATE_READY)
+ /* Check that data aligned on u32 */
+ if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
+ {
+ /* Process Locked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
+ }
+
+ if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
{
/* Process Locked */
__HAL_LOCK(hcryp);
@@ -654,111 +817,73 @@
/* Set the key */
CRYP_SetKey(hcryp, hcryp->Init.pKey);
- /* Reset the CHMOD & MODE bits & */
- AES->CR &= (uint32_t)(~CRYP_ALGO_CHAIN_MASK);
+ /* Reset the CHMOD & MODE bits */
+ CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
/* Set the CRYP peripheral in AES ECB mode */
- __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
+ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
/* Set the phase */
hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
}
/* Enable Interrupts */
- __HAL_CRYP_ENABLE_IT(AES_IT_CC);
+ __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
/* Enable CRYP */
- __HAL_CRYP_ENABLE();
+ __HAL_CRYP_ENABLE(hcryp);
/* Get the last input data adress */
inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
/* Write the Input block in the Data Input register */
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
hcryp->pCrypInBuffPtr += 16;
hcryp->CrypInCount -= 16;
/* Return function status */
return HAL_OK;
}
-
- else if(__HAL_CRYP_GET_FLAG(AES_FLAG_CCF))
+ else
{
- /* Clear CCF Flag */
- AES->CR |= AES_CR_CCFC;
-
- /* Get the last Output data adress */
- outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
-
- /* Read the Output block from the Data Output Register */
- *(uint32_t*)(outputaddr) = AES->DOUTR;
- outputaddr+=4;
- *(uint32_t*)(outputaddr) = AES->DOUTR;
- outputaddr+=4;
- *(uint32_t*)(outputaddr) = AES->DOUTR;
- outputaddr+=4;
- *(uint32_t*)(outputaddr) = AES->DOUTR;
- hcryp->pCrypOutBuffPtr += 16;
- hcryp->CrypOutCount -= 16;
-
- /* Check if all input text is encrypted */
- if(hcryp->CrypOutCount == 0)
- {
- /* Disable Computation Complete Interrupt */
- __HAL_CRYP_DISABLE_IT(AES_IT_CC);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hcryp);
-
- /* Change the CRYP state */
- hcryp->State = HAL_CRYP_STATE_READY;
-
- /* Call computation complete callback */
- HAL_CRYPEx_ComputationCpltCallback(hcryp);
- }
- else /* Process the rest of input text */
- {
- /* Get the last Intput data adress */
- inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
-
- /* Write the Input block in the Data Input register */
- AES->DINR = *(uint32_t*)(inputaddr);
- inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
- inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
- inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
- hcryp->pCrypInBuffPtr += 16;
- hcryp->CrypInCount -= 16;
- }
+ /* Release Lock */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
}
-
- /* Return function status */
- return HAL_OK;
}
/**
* @brief Initializes the CRYP peripheral in AES CBC encryption mode using Interrupt.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
- * @param pPlainData: Pointer to the plaintext buffer
+ * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
* @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
- * @param pCypherData: Pointer to the cyphertext buffer
+ * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
{
- uint32_t inputaddr;
- uint32_t outputaddr;
+ uint32_t inputaddr = 0;
- if(hcryp->State == HAL_CRYP_STATE_READY)
+ /* Check that data aligned on u32 */
+ if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
+ {
+ /* Process Locked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
+ }
+
+ if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
{
/* Process Locked */
__HAL_LOCK(hcryp);
@@ -778,11 +903,11 @@
/* Set the key */
CRYP_SetKey(hcryp, hcryp->Init.pKey);
- /* Reset the CHMOD & MODE bits & */
- AES->CR &= (uint32_t)(~CRYP_ALGO_CHAIN_MASK);
+ /* Reset the CHMOD & MODE bits */
+ CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
/* Set the CRYP peripheral in AES CBC mode */
- __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
+ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
/* Set the Initialization Vector */
CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
@@ -792,100 +917,62 @@
}
/* Enable Interrupts */
- __HAL_CRYP_ENABLE_IT(AES_IT_CC);
+ __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
/* Enable CRYP */
- __HAL_CRYP_ENABLE();
+ __HAL_CRYP_ENABLE(hcryp);
/* Get the last input data adress */
inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
/* Write the Input block in the Data Input register */
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
hcryp->pCrypInBuffPtr += 16;
hcryp->CrypInCount -= 16;
/* Return function status */
return HAL_OK;
}
-
- else if(__HAL_CRYP_GET_FLAG(AES_FLAG_CCF))
+ else
{
- /* Clear CCF Flag */
- AES->CR |= AES_CR_CCFC;
-
- /* Get the last Output data adress */
- outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
-
- /* Read the Output block from the Data Output Register */
- *(uint32_t*)(outputaddr) = AES->DOUTR;
- outputaddr+=4;
- *(uint32_t*)(outputaddr) = AES->DOUTR;
- outputaddr+=4;
- *(uint32_t*)(outputaddr) = AES->DOUTR;
- outputaddr+=4;
- *(uint32_t*)(outputaddr) = AES->DOUTR;
- hcryp->pCrypOutBuffPtr += 16;
- hcryp->CrypOutCount -= 16;
-
- /* Check if all input text is encrypted */
- if(hcryp->CrypOutCount == 0)
- {
- /* Disable Computation Complete Interrupt */
- __HAL_CRYP_DISABLE_IT(AES_IT_CC);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hcryp);
-
- /* Change the CRYP state */
- hcryp->State = HAL_CRYP_STATE_READY;
-
- /* Call computation complete callback */
- HAL_CRYPEx_ComputationCpltCallback(hcryp);
- }
- else /* Process the rest of input text */
- {
- /* Get the last Intput data adress */
- inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
-
- /* Write the Input block in the Data Input register */
- AES->DINR = *(uint32_t*)(inputaddr);
- inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
- inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
- inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
- hcryp->pCrypInBuffPtr += 16;
- hcryp->CrypInCount -= 16;
- }
+ /* Release Lock */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
}
-
- /* Return function status */
- return HAL_OK;
}
/**
* @brief Initializes the CRYP peripheral in AES CTR encryption mode using Interrupt.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
- * @param pPlainData: Pointer to the plaintext buffer
+ * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
* @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
- * @param pCypherData: Pointer to the cyphertext buffer
+ * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
{
- uint32_t inputaddr;
- uint32_t outputaddr;
+ uint32_t inputaddr = 0;
- if(hcryp->State == HAL_CRYP_STATE_READY)
+ /* Check that data aligned on u32 */
+ if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
+ {
+ /* Process Locked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
+ }
+
+ if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
{
/* Process Locked */
__HAL_LOCK(hcryp);
@@ -905,11 +992,11 @@
/* Set the key */
CRYP_SetKey(hcryp, hcryp->Init.pKey);
- /* Reset the CHMOD & MODE bits & */
- AES->CR &= (uint32_t)(~CRYP_ALGO_CHAIN_MASK);
+ /* Reset the CHMOD & MODE bits */
+ CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
/* Set the CRYP peripheral in AES CTR mode */
- __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
+ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
/* Set the Initialization Vector */
CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
@@ -919,101 +1006,62 @@
}
/* Enable Interrupts */
- __HAL_CRYP_ENABLE_IT(AES_IT_CC);
+ __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
/* Enable CRYP */
- __HAL_CRYP_ENABLE();
+ __HAL_CRYP_ENABLE(hcryp);
/* Get the last input data adress */
inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
/* Write the Input block in the Data Input register */
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
hcryp->pCrypInBuffPtr += 16;
hcryp->CrypInCount -= 16;
/* Return function status */
return HAL_OK;
}
-
- else if(__HAL_CRYP_GET_FLAG(AES_FLAG_CCF))
+ else
{
- /* Clear CCF Flag */
- AES->CR |= AES_CR_CCFC;
-
- /* Get the last Output data adress */
- outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
-
- /* Read the Output block from the Data Output Register */
- *(uint32_t*)(outputaddr) = AES->DOUTR;
- outputaddr+=4;
- *(uint32_t*)(outputaddr) = AES->DOUTR;
- outputaddr+=4;
- *(uint32_t*)(outputaddr) = AES->DOUTR;
- outputaddr+=4;
- *(uint32_t*)(outputaddr) = AES->DOUTR;
- hcryp->pCrypOutBuffPtr += 16;
- hcryp->CrypOutCount -= 16;
-
- /* Check if all input text is encrypted */
- if(hcryp->CrypOutCount == 0)
- {
- /* Disable Computation Complete Interrupt */
- __HAL_CRYP_DISABLE_IT(AES_IT_CC);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hcryp);
-
- /* Change the CRYP state */
- hcryp->State = HAL_CRYP_STATE_READY;
-
- /* Call computation complete callback */
- HAL_CRYPEx_ComputationCpltCallback(hcryp);
- }
- else /* Process the rest of input text */
- {
- /* Get the last Intput data adress */
- inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
-
- /* Write the Input block in the Data Input register */
- AES->DINR = *(uint32_t*)(inputaddr);
- inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
- inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
- inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
- hcryp->pCrypInBuffPtr += 16;
- hcryp->CrypInCount -= 16;
- }
+ /* Release Lock */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
}
-
- /* Return function status */
- return HAL_OK;
}
-
/**
* @brief Initializes the CRYP peripheral in AES ECB decryption mode using Interrupt.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
- * @param pCypherData: Pointer to the cyphertext buffer
+ * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
* @param Size: Length of the plaintext buffer, must be a multiple of 16.
- * @param pPlainData: Pointer to the plaintext buffer
+ * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
{
- uint32_t inputaddr;
- uint32_t outputaddr;
+ uint32_t inputaddr = 0;
- if(hcryp->State == HAL_CRYP_STATE_READY)
+ /* Check that data aligned on u32 */
+ if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
+ {
+ /* Process Locked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
+ }
+
+ if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
{
/* Process Locked */
__HAL_LOCK(hcryp);
@@ -1027,118 +1075,79 @@
/* Change the CRYP state */
hcryp->State = HAL_CRYP_STATE_BUSY;
- /* Check if initialization phase has already been performed */
- if(hcryp->Phase == HAL_CRYP_PHASE_READY)
- {
- /* Set the key */
- CRYP_SetKey(hcryp, hcryp->Init.pKey);
-
- /* Reset the CHMOD & MODE bits & */
- AES->CR &= (uint32_t)(~CRYP_ALGO_CHAIN_MASK);
+ /* Check if initialization phase has already been performed */
+ if(hcryp->Phase == HAL_CRYP_PHASE_READY)
+ {
+ /* Set the key */
+ CRYP_SetKey(hcryp, hcryp->Init.pKey);
+
+ /* Reset the CHMOD & MODE bits */
+ CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
+
+ /* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
+ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
+
+ /* Set the phase */
+ hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
+ }
- /* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
- __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
-
- /* Set the phase */
- hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
- }
-
/* Enable Interrupts */
- __HAL_CRYP_ENABLE_IT(AES_IT_CC);
+ __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
/* Enable CRYP */
- __HAL_CRYP_ENABLE();
+ __HAL_CRYP_ENABLE(hcryp);
/* Get the last input data adress */
inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
/* Write the Input block in the Data Input register */
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
hcryp->pCrypInBuffPtr += 16;
hcryp->CrypInCount -= 16;
/* Return function status */
return HAL_OK;
}
-
- else if(__HAL_CRYP_GET_FLAG(AES_FLAG_CCF))
+ else
{
- /* Clear CCF Flag */
- AES->CR |= AES_CR_CCFC;
-
- /* Get the last Output data adress */
- outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
-
- /* Read the Output block from the Output register */
- *(uint32_t*)(outputaddr) = AES->DOUTR;
- outputaddr+=4;
- *(uint32_t*)(outputaddr) = AES->DOUTR;
- outputaddr+=4;
- *(uint32_t*)(outputaddr) = AES->DOUTR;
- outputaddr+=4;
- *(uint32_t*)(outputaddr) = AES->DOUTR;
-
- hcryp->pCrypOutBuffPtr += 16;
- hcryp->CrypOutCount -= 16;
-
- /* Check if all input text is decrypted */
- if(hcryp->CrypOutCount == 0)
- {
- /* Disable Computation Complete Interrupt */
- __HAL_CRYP_DISABLE_IT(AES_IT_CC);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hcryp);
-
- /* Change the CRYP state */
- hcryp->State = HAL_CRYP_STATE_READY;
-
- /* Call computation complete callback */
- HAL_CRYPEx_ComputationCpltCallback(hcryp);
- }
- else /* Process the rest of input text */
- {
- /* Get the last Intput data adress */
- inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
-
- /* Write the Input block in the Data Input register */
- AES->DINR = *(uint32_t*)(inputaddr);
- inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
- inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
- inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
- hcryp->pCrypInBuffPtr += 16;
- hcryp->CrypInCount -= 16;
- }
+ /* Release Lock */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
}
-
- /* Return function status */
- return HAL_OK;
}
/**
* @brief Initializes the CRYP peripheral in AES CBC decryption mode using IT.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
- * @param pCypherData: Pointer to the cyphertext buffer
+ * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
* @param Size: Length of the plaintext buffer, must be a multiple of 16
- * @param pPlainData: Pointer to the plaintext buffer
+ * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
{
- uint32_t inputaddr;
- uint32_t outputaddr;
+ uint32_t inputaddr = 0;
- if(hcryp->State == HAL_CRYP_STATE_READY)
+ /* Check that data aligned on u32 */
+ if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
+ {
+ /* Process Locked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
+ }
+
+ if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
{
/* Process Locked */
__HAL_LOCK(hcryp);
@@ -1152,121 +1161,82 @@
/* Change the CRYP state */
hcryp->State = HAL_CRYP_STATE_BUSY;
- /* Check if initialization phase has already been performed */
- if(hcryp->Phase == HAL_CRYP_PHASE_READY)
- {
- /* Set the key */
- CRYP_SetKey(hcryp, hcryp->Init.pKey);
-
- /* Reset the CHMOD & MODE bits & */
- AES->CR &= (uint32_t)(~CRYP_ALGO_CHAIN_MASK);
+ /* Check if initialization phase has already been performed */
+ if(hcryp->Phase == HAL_CRYP_PHASE_READY)
+ {
+ /* Set the key */
+ CRYP_SetKey(hcryp, hcryp->Init.pKey);
+
+ /* Reset the CHMOD & MODE bits */
+ CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
+
+ /* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
+ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
+
+ /* Set the Initialization Vector */
+ CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
+
+ /* Set the phase */
+ hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
+ }
- /* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
- __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
-
- /* Set the Initialization Vector */
- CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
-
- /* Set the phase */
- hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
- }
-
/* Enable Interrupts */
- __HAL_CRYP_ENABLE_IT(AES_IT_CC);
+ __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
/* Enable CRYP */
- __HAL_CRYP_ENABLE();
+ __HAL_CRYP_ENABLE(hcryp);
/* Get the last input data adress */
inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
/* Write the Input block in the Data Input register */
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
hcryp->pCrypInBuffPtr += 16;
hcryp->CrypInCount -= 16;
/* Return function status */
return HAL_OK;
}
-
- else if(__HAL_CRYP_GET_FLAG(AES_FLAG_CCF))
+ else
{
- /* Clear CCF Flag */
- AES->CR |= AES_CR_CCFC;
-
- /* Get the last Output data adress */
- outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
-
- /* Read the Output block from the Output Register */
- *(uint32_t*)(outputaddr) = AES->DOUTR;
- outputaddr+=4;
- *(uint32_t*)(outputaddr) = AES->DOUTR;
- outputaddr+=4;
- *(uint32_t*)(outputaddr) = AES->DOUTR;
- outputaddr+=4;
- *(uint32_t*)(outputaddr) = AES->DOUTR;
-
- hcryp->pCrypOutBuffPtr += 16;
- hcryp->CrypOutCount -= 16;
-
- /* Check if all input text is decrypted */
- if(hcryp->CrypOutCount == 0)
- {
- /* Disable Computation Complete Interrupt */
- __HAL_CRYP_DISABLE_IT(AES_IT_CC);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hcryp);
-
- /* Change the CRYP state */
- hcryp->State = HAL_CRYP_STATE_READY;
-
- /* Call computation complete callback */
- HAL_CRYPEx_ComputationCpltCallback(hcryp);
- }
- else /* Process the rest of input text */
- {
- /* Get the last Intput data adress */
- inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
-
- /* Write the Input block in the Data Input register */
- AES->DINR = *(uint32_t*)(inputaddr);
- inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
- inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
- inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
- hcryp->pCrypInBuffPtr += 16;
- hcryp->CrypInCount -= 16;
- }
+ /* Release Lock */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
}
-
- /* Return function status */
- return HAL_OK;
}
/**
* @brief Initializes the CRYP peripheral in AES CTR decryption mode using Interrupt.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
- * @param pCypherData: Pointer to the cyphertext buffer
+ * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
* @param Size: Length of the plaintext buffer, must be a multiple of 16
- * @param pPlainData: Pointer to the plaintext buffer
+ * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
{
- uint32_t inputaddr;
- uint32_t outputaddr;
+ uint32_t inputaddr = 0;
- if(hcryp->State == HAL_CRYP_STATE_READY)
+ /* Check that data aligned on u32 */
+ if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
+ {
+ /* Process Locked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
+ }
+
+ if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
{
/* Process Locked */
__HAL_LOCK(hcryp);
@@ -1280,121 +1250,83 @@
/* Change the CRYP state */
hcryp->State = HAL_CRYP_STATE_BUSY;
- /* Check if initialization phase has already been performed */
- if(hcryp->Phase == HAL_CRYP_PHASE_READY)
- {
- /* Set the key */
- CRYP_SetKey(hcryp, hcryp->Init.pKey);
-
- /* Reset the CHMOD & MODE bits & */
- AES->CR &= (uint32_t)(~CRYP_ALGO_CHAIN_MASK);
+ /* Check if initialization phase has already been performed */
+ if(hcryp->Phase == HAL_CRYP_PHASE_READY)
+ {
+ /* Set the key */
+ CRYP_SetKey(hcryp, hcryp->Init.pKey);
+
+ /* Reset the CHMOD & MODE bits */
+ CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
+
+ /* Set the CRYP peripheral in AES CTR decryption mode */
+ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
+
+ /* Set the Initialization Vector */
+ CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
+
+ /* Set the phase */
+ hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
+ }
- /* Set the CRYP peripheral in AES CTR decryption mode */
- __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
-
- /* Set the Initialization Vector */
- CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
-
- /* Set the phase */
- hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
- }
-
/* Enable Interrupts */
- __HAL_CRYP_ENABLE_IT(AES_IT_CC);
+ __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC);
/* Enable CRYP */
- __HAL_CRYP_ENABLE();
+ __HAL_CRYP_ENABLE(hcryp);
/* Get the last input data adress */
inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
/* Write the Input block in the Data Input register */
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
hcryp->pCrypInBuffPtr += 16;
hcryp->CrypInCount -= 16;
/* Return function status */
return HAL_OK;
}
-
- else if(__HAL_CRYP_GET_FLAG(AES_FLAG_CCF))
+ else
{
- /* Clear CCF Flag */
- AES->CR |= AES_CR_CCFC;
-
- /* Get the last Output data adress */
- outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
-
- /* Read the Output block from the Output Register */
- *(uint32_t*)(outputaddr) = AES->DOUTR;
- outputaddr+=4;
- *(uint32_t*)(outputaddr) = AES->DOUTR;
- outputaddr+=4;
- *(uint32_t*)(outputaddr) = AES->DOUTR;
- outputaddr+=4;
- *(uint32_t*)(outputaddr) = AES->DOUTR;
-
- hcryp->pCrypOutBuffPtr += 16;
- hcryp->CrypOutCount -= 16;
-
- /* Check if all input text is decrypted */
- if(hcryp->CrypOutCount == 0)
- {
- /* Disable Computation Complete Interrupt */
- __HAL_CRYP_DISABLE_IT(AES_IT_CC);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hcryp);
-
- /* Change the CRYP state */
- hcryp->State = HAL_CRYP_STATE_READY;
-
- /* Call computation complete callback */
- HAL_CRYPEx_ComputationCpltCallback(hcryp);
- }
- else /* Process the rest of input text */
- {
- /* Get the last Intput data adress */
- inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
-
- /* Write the Input block in the Data Input register */
- AES->DINR = *(uint32_t*)(inputaddr);
- inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
- inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
- inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
- hcryp->pCrypInBuffPtr += 16;
- hcryp->CrypInCount -= 16;
- }
+ /* Release Lock */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
}
-
- /* Return function status */
- return HAL_OK;
}
/**
* @brief Initializes the CRYP peripheral in AES ECB encryption mode using DMA.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
- * @param pPlainData: Pointer to the plaintext buffer
+ * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
* @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
- * @param pCypherData: Pointer to the cyphertext buffer
+ * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
{
- uint32_t inputaddr;
- uint32_t outputaddr;
+ uint32_t inputaddr = 0, outputaddr = 0;
- if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
+ /* Check that data aligned on u32 */
+ if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
+ {
+ /* Process Locked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
+ }
+
+ /* Check if HAL_CRYP_Init has been called */
+ if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
{
/* Process Locked */
__HAL_LOCK(hcryp);
@@ -1412,22 +1344,25 @@
CRYP_SetKey(hcryp, hcryp->Init.pKey);
/* Set the CRYP peripheral in AES ECB mode */
- __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
-
- /* Set the phase */
- hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
+ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT);
+
+ /* Set the phase */
+ hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
}
/* Set the input and output addresses and start DMA transfer */
CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
/* Process Unlocked */
__HAL_UNLOCK(hcryp);
-
+
/* Return function status */
return HAL_OK;
}
else
- {
+ {
+ /* Release Lock */
+ __HAL_UNLOCK(hcryp);
+
return HAL_ERROR;
}
}
@@ -1436,17 +1371,27 @@
* @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
- * @param pPlainData: Pointer to the plaintext buffer
+ * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
* @param Size: Length of the plaintext buffer, must be a multiple of 16.
- * @param pCypherData: Pointer to the cyphertext buffer
+ * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
{
- uint32_t inputaddr;
- uint32_t outputaddr;
+ uint32_t inputaddr = 0, outputaddr = 0;
- if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
+ /* Check that data aligned on u32 */
+ if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
+ {
+ /* Process Locked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
+ }
+
+ /* Check if HAL_CRYP_Init has been called */
+ if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
{
/* Process Locked */
__HAL_LOCK(hcryp);
@@ -1456,33 +1401,36 @@
/* Change the CRYP state */
hcryp->State = HAL_CRYP_STATE_BUSY;
-
+
/* Check if initialization phase has already been performed */
if(hcryp->Phase == HAL_CRYP_PHASE_READY)
{
/* Set the key */
CRYP_SetKey(hcryp, hcryp->Init.pKey);
- /* Set the CRYP peripheral in AES ECB mode */
- __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
+ /* Set the CRYP peripheral in AES CBC mode */
+ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT);
/* Set the Initialization Vector */
CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
-
- /* Set the phase */
- hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
- }
- /* Set the input and output addresses and start DMA transfer */
- CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hcryp);
-
- /* Return function status */
- return HAL_OK;
+
+ /* Set the phase */
+ hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
+ }
+ /* Set the input and output addresses and start DMA transfer */
+ CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_OK;
}
else
{
+ /* Release Lock */
+ __HAL_UNLOCK(hcryp);
+
return HAL_ERROR;
}
}
@@ -1491,17 +1439,27 @@
* @brief Initializes the CRYP peripheral in AES CTR encryption mode using DMA.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
- * @param pPlainData: Pointer to the plaintext buffer
+ * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
* @param Size: Length of the plaintext buffer, must be a multiple of 16.
- * @param pCypherData: Pointer to the cyphertext buffer
+ * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
{
- uint32_t inputaddr;
- uint32_t outputaddr;
+ uint32_t inputaddr = 0, outputaddr = 0;
- if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
+ /* Check that data aligned on u32 */
+ if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
+ {
+ /* Process Locked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
+ }
+
+ /* Check if HAL_CRYP_Init has been called */
+ if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
{
/* Process Locked */
__HAL_LOCK(hcryp);
@@ -1509,23 +1467,23 @@
inputaddr = (uint32_t)pPlainData;
outputaddr = (uint32_t)pCypherData;
- /* Change the CRYP state */
- hcryp->State = HAL_CRYP_STATE_BUSY;
-
+ /* Change the CRYP state */
+ hcryp->State = HAL_CRYP_STATE_BUSY;
+
/* Check if initialization phase has already been performed */
if(hcryp->Phase == HAL_CRYP_PHASE_READY)
{
/* Set the key */
CRYP_SetKey(hcryp, hcryp->Init.pKey);
- /* Set the CRYP peripheral in AES ECB mode */
- __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
+ /* Set the CRYP peripheral in AES CTR mode */
+ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT);
/* Set the Initialization Vector */
CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
-
- /* Set the phase */
- hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
+
+ /* Set the phase */
+ hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
}
/* Set the input and output addresses and start DMA transfer */
@@ -1539,6 +1497,9 @@
}
else
{
+ /* Release Lock */
+ __HAL_UNLOCK(hcryp);
+
return HAL_ERROR;
}
}
@@ -1547,73 +1508,27 @@
* @brief Initializes the CRYP peripheral in AES ECB decryption mode using DMA.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
- * @param pCypherData: Pointer to the cyphertext buffer
+ * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
* @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
- * @param pPlainData: Pointer to the plaintext buffer
+ * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
{
- uint32_t inputaddr;
- uint32_t outputaddr;
+ uint32_t inputaddr = 0, outputaddr = 0;
- if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
+ /* Check that data aligned on u32 */
+ if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
{
/* Process Locked */
- __HAL_LOCK(hcryp);
-
- inputaddr = (uint32_t)pCypherData;
- outputaddr = (uint32_t)pPlainData;
-
- /* Change the CRYP state */
- hcryp->State = HAL_CRYP_STATE_BUSY;
-
- /* Check if initialization phase has already been performed */
- if(hcryp->Phase == HAL_CRYP_PHASE_READY)
- {
- /* Set the key */
- CRYP_SetKey(hcryp, hcryp->Init.pKey);
-
- /* Reset the CHMOD & MODE bits & */
- AES->CR &= (uint32_t)(~CRYP_ALGO_CHAIN_MASK);
-
- /* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
- __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
-
- /* Set the phase */
- hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
- }
-
- /* Set the input and output addresses and start DMA transfer */
- CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
-
- /* Process Unlocked */
- __HAL_UNLOCK(hcryp);
-
+ __HAL_UNLOCK(hcryp);
+
/* Return function status */
- return HAL_OK;
- }
- else
- {
- return HAL_ERROR;
+ return HAL_ERROR;
}
-}
-
-/**
- * @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
- * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
- * the configuration information for CRYP module
- * @param pCypherData: Pointer to the cyphertext buffer
- * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
- * @param pPlainData: Pointer to the plaintext buffer
- * @retval HAL status
- */
-HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
-{
- uint32_t inputaddr;
- uint32_t outputaddr;
- if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
+ /* Check if HAL_CRYP_Init has been called */
+ if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
{
/* Process Locked */
__HAL_LOCK(hcryp);
@@ -1629,16 +1544,13 @@
{
/* Set the key */
CRYP_SetKey(hcryp, hcryp->Init.pKey);
-
- /* Reset the CHMOD & MODE bits & */
- AES->CR &= (uint32_t)(~CRYP_ALGO_CHAIN_MASK);
-
- /* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
- __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
-
- /* Set the Initialization Vector */
- CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
-
+
+ /* Reset the CHMOD & MODE bits */
+ CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
+
+ /* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */
+ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT);
+
/* Set the phase */
hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
}
@@ -1654,6 +1566,81 @@
}
else
{
+ /* Release Lock */
+ __HAL_UNLOCK(hcryp);
+
+ return HAL_ERROR;
+ }
+}
+
+/**
+ * @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
+ * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+ * the configuration information for CRYP module
+ * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
+ * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
+ * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
+{
+ uint32_t inputaddr = 0, outputaddr = 0;
+
+ /* Check that data aligned on u32 */
+ if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
+ {
+ /* Process Locked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
+ }
+
+ /* Check if HAL_CRYP_Init has been called */
+ if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
+ {
+ /* Process Locked */
+ __HAL_LOCK(hcryp);
+
+ inputaddr = (uint32_t)pCypherData;
+ outputaddr = (uint32_t)pPlainData;
+
+ /* Change the CRYP state */
+ hcryp->State = HAL_CRYP_STATE_BUSY;
+
+ /* Check if initialization phase has already been performed */
+ if(hcryp->Phase == HAL_CRYP_PHASE_READY)
+ {
+ /* Set the key */
+ CRYP_SetKey(hcryp, hcryp->Init.pKey);
+
+ /* Reset the CHMOD & MODE bits */
+ CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK);
+
+ /* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */
+ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT);
+
+ /* Set the Initialization Vector */
+ CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
+
+ /* Set the phase */
+ hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
+ }
+
+ /* Set the input and output addresses and start DMA transfer */
+ CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_OK;
+ }
+ else
+ {
+ /* Release Lock */
+ __HAL_UNLOCK(hcryp);
+
return HAL_ERROR;
}
}
@@ -1662,17 +1649,27 @@
* @brief Initializes the CRYP peripheral in AES CTR decryption mode using DMA.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
- * @param pCypherData: Pointer to the cyphertext buffer
+ * @param pCypherData: Pointer to the cyphertext buffer (aligned on u32)
* @param Size: Length of the plaintext buffer, must be a multiple of 16
- * @param pPlainData: Pointer to the plaintext buffer
+ * @param pPlainData: Pointer to the plaintext buffer (aligned on u32)
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
{
- uint32_t inputaddr;
- uint32_t outputaddr;
+ uint32_t inputaddr = 0, outputaddr = 0;
- if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
+ /* Check that data aligned on u32 */
+ if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0))
+ {
+ /* Process Locked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Return function status */
+ return HAL_ERROR;
+ }
+
+ /* Check if HAL_CRYP_Init has been called */
+ if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY))
{
/* Process Locked */
__HAL_LOCK(hcryp);
@@ -1690,11 +1687,11 @@
CRYP_SetKey(hcryp, hcryp->Init.pKey);
/* Set the CRYP peripheral in AES CTR mode */
- __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
+ __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT);
/* Set the Initialization Vector */
CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect);
-
+
/* Set the phase */
hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
}
@@ -1710,6 +1707,9 @@
}
else
{
+ /* Release Lock */
+ __HAL_UNLOCK(hcryp);
+
return HAL_ERROR;
}
}
@@ -1718,8 +1718,7 @@
* @}
*/
-
-/** @defgroup CRYP_Group3 DMA callback functions
+/** @defgroup CRYP_Exported_Functions_Group3 DMA callback functions
* @brief DMA callback functions.
*
@verbatim
@@ -1736,41 +1735,41 @@
*/
/**
- * @brief CRYP error callbacks.
+ * @brief CRYP error callback.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @retval None
*/
__weak void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp)
{
- /* NOTE : This function Should not be modified, when the callback is needed,
- the HAL_CRYP_ErrorCallback could be implemented in the user file
+ /* NOTE : This function should not be modified; when the callback is needed,
+ the HAL_CRYP_ErrorCallback can be implemented in the user file
*/
}
/**
- * @brief Input transfer completed callbacks.
+ * @brief Input transfer completed callback.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @retval None
*/
__weak void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp)
{
- /* NOTE : This function Should not be modified, when the callback is needed,
- the HAL_CRYP_InCpltCallback could be implemented in the user file
+ /* NOTE : This function should not be modified; when the callback is needed,
+ the HAL_CRYP_InCpltCallback can be implemented in the user file
*/
}
/**
- * @brief Output transfer completed callbacks.
+ * @brief Output transfer completed callback.
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @retval None
*/
__weak void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp)
{
- /* NOTE : This function Should not be modified, when the callback is needed,
- the HAL_CRYP_OutCpltCallback could be implemented in the user file
+ /* NOTE : This function should not be modified; when the callback is needed,
+ the HAL_CRYP_OutCpltCallback can be implemented in the user file
*/
}
@@ -1778,7 +1777,7 @@
* @}
*/
-/** @defgroup CRYP_Group4 CRYP IRQ handler
+/** @defgroup CRYP_Exported_Functions_Group4 CRYP IRQ handler
* @brief CRYP IRQ handler.
*
@verbatim
@@ -1799,34 +1798,44 @@
*/
void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp)
{
- switch(AES->CR & CRYP_CR_ALGOMODE_DIRECTION)
+ /* Check if error occurred*/
+ if (__HAL_CRYP_GET_IT_SOURCE(hcryp, CRYP_IT_ERR) != RESET)
{
- case CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT:
- HAL_CRYP_AESECB_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
- break;
+ if (__HAL_CRYP_GET_FLAG(hcryp,CRYP_FLAG_RDERR) != RESET)
+ {
+ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_RDERR);
+ }
- case CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT:
- HAL_CRYP_AESECB_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
- break;
+ if (__HAL_CRYP_GET_FLAG(hcryp,CRYP_FLAG_WRERR) != RESET)
+ {
+ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_WRERR);
+ }
- case CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT:
- HAL_CRYP_AESCBC_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
- break;
+ if (__HAL_CRYP_GET_FLAG(hcryp,CRYP_FLAG_CCF) != RESET)
+ {
+ __HAL_CRYP_CLEAR_FLAG(hcryp,CRYP_CLEARFLAG_CCF);
+ }
- case CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT:
- HAL_CRYP_AESCBC_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
- break;
+ hcryp->State= HAL_CRYP_STATE_ERROR;
+ /* Disable Computation Complete Interrupt */
+ __HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_CC);
+ __HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_ERR);
+
+ HAL_CRYP_ErrorCallback(hcryp);
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hcryp);
- case CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT:
- HAL_CRYP_AESCTR_Encrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
- break;
-
- case CRYP_CR_ALGOMODE_AES_CTR_DECRYPT:
- HAL_CRYP_AESCTR_Decrypt_IT(hcryp, HAL_NULL, 0, HAL_NULL);
- break;
-
- default:
- break;
+ return;
+ }
+
+ /* Check if computation complete interrupt was enabled*/
+ if (__HAL_CRYP_GET_IT_SOURCE(hcryp, CRYP_IT_CC) != RESET)
+ {
+ /* Clear CCF Flag */
+ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF);
+
+ CRYP_EncryptDecrypt_IT(hcryp);
}
}
@@ -1834,7 +1843,7 @@
* @}
*/
-/** @defgroup CRYP_Group5 Peripheral State functions
+/** @defgroup CRYP_Exported_Functions_Group5 Peripheral State functions
* @brief Peripheral State functions.
*
@verbatim
@@ -1864,6 +1873,73 @@
*/
/**
+ * @}
+ */
+
+/** @addtogroup CRYP_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief IT function called under interruption context to continue encryption or decryption
+ * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
+ * the configuration information for CRYP module
+ * @retval HAL status
+ */
+static HAL_StatusTypeDef CRYP_EncryptDecrypt_IT(CRYP_HandleTypeDef *hcryp)
+{
+ uint32_t inputaddr = 0, outputaddr = 0;
+
+ /* Get the last Output data adress */
+ outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
+
+ /* Read the Output block from the Output Register */
+ *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
+ outputaddr+=4;
+ *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
+ outputaddr+=4;
+ *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
+ outputaddr+=4;
+ *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
+
+ hcryp->pCrypOutBuffPtr += 16;
+ hcryp->CrypOutCount -= 16;
+
+ /* Check if all input text is encrypted or decrypted */
+ if(hcryp->CrypOutCount == 0)
+ {
+ /* Disable Computation Complete Interrupt */
+ __HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_CC);
+ __HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_ERR);
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hcryp);
+
+ /* Change the CRYP state */
+ hcryp->State = HAL_CRYP_STATE_READY;
+
+ /* Call computation complete callback */
+ HAL_CRYPEx_ComputationCpltCallback(hcryp);
+ }
+ else /* Process the rest of input text */
+ {
+ /* Get the last Intput data adress */
+ inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
+
+ /* Write the Input block in the Data Input register */
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
+ inputaddr+=4;
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
+ inputaddr+=4;
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
+ inputaddr+=4;
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
+ hcryp->pCrypInBuffPtr += 16;
+ hcryp->CrypInCount -= 16;
+ }
+ return HAL_OK;
+}
+/**
* @brief DMA CRYP Input Data process complete callback.
* @param hdma: DMA handle
* @retval None
@@ -1873,7 +1949,7 @@
CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
/* Disable the DMA transfer for input request */
- AES->CR &= (uint32_t)(~AES_CR_DMAINEN);
+ CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAINEN);
/* Call input data transfer complete callback */
HAL_CRYP_InCpltCallback(hcryp);
@@ -1888,12 +1964,15 @@
{
CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
- /* Disable the DMA transfer for output request by resetting the DOEN bit
+ /* Disable the DMA transfer for output request by resetting the DMAOUTEN bit
in the DMACR register */
- AES->CR &= (uint32_t)(~AES_CR_DMAOUTEN);
-
+ CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAOUTEN);
+
+ /* Clear CCF Flag */
+ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF);
+
/* Disable CRYP */
- __HAL_CRYP_DISABLE();
+ __HAL_CRYP_DISABLE(hcryp);
/* Change the CRYP state to ready */
hcryp->State = HAL_CRYP_STATE_READY;
@@ -1910,7 +1989,7 @@
static void CRYP_DMAError(DMA_HandleTypeDef *hdma)
{
CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
- hcryp->State= HAL_CRYP_STATE_READY;
+ hcryp->State= HAL_CRYP_STATE_ERROR;
HAL_CRYP_ErrorCallback(hcryp);
}
@@ -1919,20 +1998,25 @@
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param Key: Pointer to Key buffer
- * @param KeySize: Size of Key
+ * @note Key must be written as little endian.
+ * If Key pointer points at address n,
+ * n[15:0] contains key[96:127],
+ * (n+4)[15:0] contains key[64:95],
+ * (n+8)[15:0] contains key[32:63] and
+ * (n+12)[15:0] contains key[0:31]
* @retval None
*/
static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key)
-{
+{
uint32_t keyaddr = (uint32_t)Key;
- AES->KEYR3 = __REV(*(uint32_t*)(keyaddr));
+ hcryp->Instance->KEYR3 = __REV(*(uint32_t*)(keyaddr));
keyaddr+=4;
- AES->KEYR2 = __REV(*(uint32_t*)(keyaddr));
+ hcryp->Instance->KEYR2 = __REV(*(uint32_t*)(keyaddr));
keyaddr+=4;
- AES->KEYR1 = __REV(*(uint32_t*)(keyaddr));
+ hcryp->Instance->KEYR1 = __REV(*(uint32_t*)(keyaddr));
keyaddr+=4;
- AES->KEYR0 = __REV(*(uint32_t*)(keyaddr));
+ hcryp->Instance->KEYR0 = __REV(*(uint32_t*)(keyaddr));
}
/**
@@ -1940,55 +2024,61 @@
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param InitVector: Pointer to InitVector/InitCounter buffer
- * @param IVSize: Size of the InitVector/InitCounter
+ * @note Init Vector must be written as little endian.
+ * If Init Vector pointer points at address n,
+ * n[15:0] contains Vector[96:127],
+ * (n+4)[15:0] contains Vector[64:95],
+ * (n+8)[15:0] contains Vector[32:63] and
+ * (n+12)[15:0] contains Vector[0:31]
* @retval None
*/
static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector)
{
uint32_t ivaddr = (uint32_t)InitVector;
- AES->IVR3 = __REV(*(uint32_t*)(ivaddr));
+ hcryp->Instance->IVR3 = __REV(*(uint32_t*)(ivaddr));
ivaddr+=4;
- AES->IVR2 = __REV(*(uint32_t*)(ivaddr));
+ hcryp->Instance->IVR2 = __REV(*(uint32_t*)(ivaddr));
ivaddr+=4;
- AES->IVR1 = __REV(*(uint32_t*)(ivaddr));
+ hcryp->Instance->IVR1 = __REV(*(uint32_t*)(ivaddr));
ivaddr+=4;
- AES->IVR0 = __REV(*(uint32_t*)(ivaddr));
+ hcryp->Instance->IVR0 = __REV(*(uint32_t*)(ivaddr));
}
/**
- * @brief Process Data: Writes Input data in polling mode and read the output data
+ * @brief Process Data: Writes Input data in polling mode and reads the output data
* @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
* the configuration information for CRYP module
* @param Input: Pointer to the Input buffer
* @param Ilength: Length of the Input buffer, must be a multiple of 16.
* @param Output: Pointer to the returned buffer
+ * @param Timeout: Specify Timeout value
* @retval None
*/
static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout)
{
uint32_t tickstart = 0;
- uint32_t i = 0;
+ uint32_t index = 0;
uint32_t inputaddr = (uint32_t)Input;
uint32_t outputaddr = (uint32_t)Output;
- for(i=0; (i < Ilength); i+=16)
+ for(index=0; (index < Ilength); index += 16)
{
/* Write the Input block in the Data Input register */
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
inputaddr+=4;
- AES->DINR = *(uint32_t*)(inputaddr);
+ hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
inputaddr+=4;
/* Get timeout */
tickstart = HAL_GetTick();
-
- while(HAL_IS_BIT_CLR(AES->SR, AES_SR_CCF))
+
+ while(HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF))
{
/* Check for the Timeout */
if(Timeout != HAL_MAX_DELAY)
@@ -2006,16 +2096,16 @@
}
}
/* Clear CCF Flag */
- AES->CR |= AES_CR_CCFC;
+ __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF);
/* Read the Output block from the Data Output Register */
- *(uint32_t*)(outputaddr) = AES->DOUTR;
+ *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
outputaddr+=4;
- *(uint32_t*)(outputaddr) = AES->DOUTR;
+ *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
outputaddr+=4;
- *(uint32_t*)(outputaddr) = AES->DOUTR;
+ *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
outputaddr+=4;
- *(uint32_t*)(outputaddr) = AES->DOUTR;
+ *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
outputaddr+=4;
}
/* Return function status */
@@ -2042,31 +2132,33 @@
hcryp->hdmaout->XferCpltCallback = CRYP_DMAOutCplt;
/* Set the DMA error callback */
hcryp->hdmaout->XferErrorCallback = CRYP_DMAError;
-
+
/* Enable the DMA In DMA Stream */
- HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&AES->DINR, Size/4);
-
+ HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&hcryp->Instance->DINR, Size/4);
+
/* Enable the DMA Out DMA Stream */
- HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&AES->DOUTR, outputaddr, Size/4);
-
+ HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&hcryp->Instance->DOUTR, outputaddr, Size/4);
+
/* Enable In and Out DMA requests */
- AES->CR |= (AES_CR_DMAINEN | AES_CR_DMAOUTEN);
-
+ SET_BIT(hcryp->Instance->CR, (AES_CR_DMAINEN | AES_CR_DMAOUTEN));
+
/* Enable CRYP */
- __HAL_CRYP_ENABLE();
+ __HAL_CRYP_ENABLE(hcryp);
}
/**
* @}
*/
-#endif /* STM32L051xx && STM32L052xx && STM32L053xx*/
-#endif /* HAL_CRYP_MODULE_ENABLED */
-/**
- * @}
- */
/**
* @}
*/
+/**
+ * @}
+ */
+
+#endif /* HAL_CRYP_MODULE_ENABLED */
+#endif /* STM32L041xx || STM32L061xx || STM32L062xx || STM32L063xx || STM32L081xx || STM32L082xx || STM32L083xx */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
