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targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_tim.h@382:ee426a420dbb, 2014-11-03 (annotated)

Committer:: mbed_official
Date:: Mon Nov 03 10:45:07 2014 +0000
Revision:: 382:ee426a420dbb
Parent:: targets/cmsis/TARGET_STM/TARGET_DISCO_L053C8/stm32l0xx_hal_tim.h@376:cb4d9db17537
Child:: 489:119543c9f674

Synchronized with git revision d54467eb07f62efd9ccdf44f1ede7fe1c1b0cf83



Full URL: https://github.com/mbedmicro/mbed/commit/d54467eb07f62efd9ccdf44f1ede7fe1c1b0cf83/

Who changed what in which revision?

User	Revision	Line number	New contents of line
mbed_official	376:cb4d9db17537	1	/**
mbed_official	376:cb4d9db17537	2	******************************************************************************
mbed_official	376:cb4d9db17537	3	* @file stm32l0xx_hal_tim.h
mbed_official	376:cb4d9db17537	4	* @author MCD Application Team
mbed_official	376:cb4d9db17537	5	* @version V1.1.0
mbed_official	376:cb4d9db17537	6	* @date 18-June-2014
mbed_official	376:cb4d9db17537	7	* @brief Header file of TIM HAL module.
mbed_official	376:cb4d9db17537	8	******************************************************************************
mbed_official	376:cb4d9db17537	9	* @attention
mbed_official	376:cb4d9db17537	10	*
mbed_official	376:cb4d9db17537	11	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official	376:cb4d9db17537	12	*
mbed_official	376:cb4d9db17537	13	* Redistribution and use in source and binary forms, with or without modification,
mbed_official	376:cb4d9db17537	14	* are permitted provided that the following conditions are met:
mbed_official	376:cb4d9db17537	15	* 1. Redistributions of source code must retain the above copyright notice,
mbed_official	376:cb4d9db17537	16	* this list of conditions and the following disclaimer.
mbed_official	376:cb4d9db17537	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official	376:cb4d9db17537	18	* this list of conditions and the following disclaimer in the documentation
mbed_official	376:cb4d9db17537	19	* and/or other materials provided with the distribution.
mbed_official	376:cb4d9db17537	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official	376:cb4d9db17537	21	* may be used to endorse or promote products derived from this software
mbed_official	376:cb4d9db17537	22	* without specific prior written permission.
mbed_official	376:cb4d9db17537	23	*
mbed_official	376:cb4d9db17537	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official	376:cb4d9db17537	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official	376:cb4d9db17537	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official	376:cb4d9db17537	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official	376:cb4d9db17537	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official	376:cb4d9db17537	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official	376:cb4d9db17537	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official	376:cb4d9db17537	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official	376:cb4d9db17537	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official	376:cb4d9db17537	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official	376:cb4d9db17537	34	*
mbed_official	376:cb4d9db17537	35	******************************************************************************
mbed_official	376:cb4d9db17537	36	*/
mbed_official	376:cb4d9db17537	37
mbed_official	376:cb4d9db17537	38	/* Define to prevent recursive inclusion -------------------------------------*/
mbed_official	376:cb4d9db17537	39	#ifndef __STM32L0xx_HAL_TIM_H
mbed_official	376:cb4d9db17537	40	#define __STM32L0xx_HAL_TIM_H
mbed_official	376:cb4d9db17537	41
mbed_official	376:cb4d9db17537	42	#ifdef __cplusplus
mbed_official	376:cb4d9db17537	43	extern "C" {
mbed_official	376:cb4d9db17537	44	#endif
mbed_official	376:cb4d9db17537	45
mbed_official	376:cb4d9db17537	46	/* Includes ------------------------------------------------------------------*/
mbed_official	376:cb4d9db17537	47	#include "stm32l0xx_hal_def.h"
mbed_official	376:cb4d9db17537	48
mbed_official	376:cb4d9db17537	49	/** @addtogroup STM32L0xx_HAL_Driver
mbed_official	376:cb4d9db17537	50	* @{
mbed_official	376:cb4d9db17537	51	*/
mbed_official	376:cb4d9db17537	52
mbed_official	376:cb4d9db17537	53	/** @addtogroup TIM
mbed_official	376:cb4d9db17537	54	* @{
mbed_official	376:cb4d9db17537	55	*/
mbed_official	376:cb4d9db17537	56
mbed_official	376:cb4d9db17537	57	/* Exported types ------------------------------------------------------------*/
mbed_official	376:cb4d9db17537	58
mbed_official	376:cb4d9db17537	59	/**
mbed_official	376:cb4d9db17537	60	* @brief TIM Time base Configuration Structure definition
mbed_official	376:cb4d9db17537	61	*/
mbed_official	376:cb4d9db17537	62	typedef struct
mbed_official	376:cb4d9db17537	63	{
mbed_official	376:cb4d9db17537	64	uint32_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
mbed_official	376:cb4d9db17537	65	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
mbed_official	376:cb4d9db17537	66
mbed_official	376:cb4d9db17537	67	uint32_t CounterMode; /*!< Specifies the counter mode.
mbed_official	376:cb4d9db17537	68	This parameter can be a value of @ref TIM_Counter_Mode */
mbed_official	376:cb4d9db17537	69
mbed_official	376:cb4d9db17537	70	uint32_t Period; /*!< Specifies the period value to be loaded into the active
mbed_official	376:cb4d9db17537	71	Auto-Reload Register at the next update event.
mbed_official	376:cb4d9db17537	72	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
mbed_official	376:cb4d9db17537	73
mbed_official	376:cb4d9db17537	74	uint32_t ClockDivision; /*!< Specifies the clock division.
mbed_official	376:cb4d9db17537	75	This parameter can be a value of @ref TIM_ClockDivision */
mbed_official	376:cb4d9db17537	76	} TIM_Base_InitTypeDef;
mbed_official	376:cb4d9db17537	77
mbed_official	376:cb4d9db17537	78	/**
mbed_official	376:cb4d9db17537	79	* @brief TIM Output Compare Configuration Structure definition
mbed_official	376:cb4d9db17537	80	*/
mbed_official	376:cb4d9db17537	81
mbed_official	376:cb4d9db17537	82	typedef struct
mbed_official	376:cb4d9db17537	83	{
mbed_official	376:cb4d9db17537	84	uint32_t OCMode; /*!< Specifies the TIM mode.
mbed_official	376:cb4d9db17537	85	This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
mbed_official	376:cb4d9db17537	86
mbed_official	376:cb4d9db17537	87	uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
mbed_official	376:cb4d9db17537	88	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
mbed_official	376:cb4d9db17537	89
mbed_official	376:cb4d9db17537	90	uint32_t OCPolarity; /*!< Specifies the output polarity.
mbed_official	376:cb4d9db17537	91	This parameter can be a value of @ref TIM_Output_Compare_Polarity */
mbed_official	376:cb4d9db17537	92
mbed_official	376:cb4d9db17537	93	uint32_t OCFastMode; /*!< Specifies the Fast mode state.
mbed_official	376:cb4d9db17537	94	This parameter can be a value of @ref TIM_Output_Fast_State
mbed_official	376:cb4d9db17537	95	@note This parameter is valid only in PWM1 and PWM2 mode. */
mbed_official	376:cb4d9db17537	96
mbed_official	376:cb4d9db17537	97	} TIM_OC_InitTypeDef;
mbed_official	376:cb4d9db17537	98
mbed_official	376:cb4d9db17537	99	/**
mbed_official	376:cb4d9db17537	100	* @brief TIM One Pulse Mode Configuration Structure definition
mbed_official	376:cb4d9db17537	101	*/
mbed_official	376:cb4d9db17537	102	typedef struct
mbed_official	376:cb4d9db17537	103	{
mbed_official	376:cb4d9db17537	104	uint32_t OCMode; /*!< Specifies the TIM mode.
mbed_official	376:cb4d9db17537	105	This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
mbed_official	376:cb4d9db17537	106
mbed_official	376:cb4d9db17537	107	uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
mbed_official	376:cb4d9db17537	108	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
mbed_official	376:cb4d9db17537	109
mbed_official	376:cb4d9db17537	110	uint32_t OCPolarity; /*!< Specifies the output polarity.
mbed_official	376:cb4d9db17537	111	This parameter can be a value of @ref TIM_Output_Compare_Polarity */
mbed_official	376:cb4d9db17537	112
mbed_official	376:cb4d9db17537	113
mbed_official	376:cb4d9db17537	114	uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
mbed_official	376:cb4d9db17537	115	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official	376:cb4d9db17537	116
mbed_official	376:cb4d9db17537	117	uint32_t ICSelection; /*!< Specifies the input.
mbed_official	376:cb4d9db17537	118	This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official	376:cb4d9db17537	119
mbed_official	376:cb4d9db17537	120	uint32_t ICFilter; /*!< Specifies the input capture filter.
mbed_official	376:cb4d9db17537	121	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	376:cb4d9db17537	122	} TIM_OnePulse_InitTypeDef;
mbed_official	376:cb4d9db17537	123
mbed_official	376:cb4d9db17537	124
mbed_official	376:cb4d9db17537	125	/**
mbed_official	376:cb4d9db17537	126	* @brief TIM Input Capture Configuration Structure definition
mbed_official	376:cb4d9db17537	127	*/
mbed_official	376:cb4d9db17537	128
mbed_official	376:cb4d9db17537	129	typedef struct
mbed_official	376:cb4d9db17537	130	{
mbed_official	376:cb4d9db17537	131	uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
mbed_official	376:cb4d9db17537	132	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official	376:cb4d9db17537	133
mbed_official	376:cb4d9db17537	134	uint32_t ICSelection; /*!< Specifies the input.
mbed_official	376:cb4d9db17537	135	This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official	376:cb4d9db17537	136
mbed_official	376:cb4d9db17537	137	uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler.
mbed_official	376:cb4d9db17537	138	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
mbed_official	376:cb4d9db17537	139
mbed_official	376:cb4d9db17537	140	uint32_t ICFilter; /*!< Specifies the input capture filter.
mbed_official	376:cb4d9db17537	141	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	376:cb4d9db17537	142	} TIM_IC_InitTypeDef;
mbed_official	376:cb4d9db17537	143
mbed_official	376:cb4d9db17537	144	/**
mbed_official	376:cb4d9db17537	145	* @brief TIM Encoder Configuration Structure definition
mbed_official	376:cb4d9db17537	146	*/
mbed_official	376:cb4d9db17537	147
mbed_official	376:cb4d9db17537	148	typedef struct
mbed_official	376:cb4d9db17537	149	{
mbed_official	376:cb4d9db17537	150	uint32_t EncoderMode; /*!< Specifies the active edge of the input signal.
mbed_official	376:cb4d9db17537	151	This parameter can be a value of @ref TIM_Encoder_Mode */
mbed_official	376:cb4d9db17537	152
mbed_official	376:cb4d9db17537	153	uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
mbed_official	376:cb4d9db17537	154	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official	376:cb4d9db17537	155
mbed_official	376:cb4d9db17537	156	uint32_t IC1Selection; /*!< Specifies the input.
mbed_official	376:cb4d9db17537	157	This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official	376:cb4d9db17537	158
mbed_official	376:cb4d9db17537	159	uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
mbed_official	376:cb4d9db17537	160	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
mbed_official	376:cb4d9db17537	161
mbed_official	376:cb4d9db17537	162	uint32_t IC1Filter; /*!< Specifies the input capture filter.
mbed_official	376:cb4d9db17537	163	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	376:cb4d9db17537	164
mbed_official	376:cb4d9db17537	165	uint32_t IC2Polarity; /*!< Specifies the active edge of the input signal.
mbed_official	376:cb4d9db17537	166	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official	376:cb4d9db17537	167
mbed_official	376:cb4d9db17537	168	uint32_t IC2Selection; /*!< Specifies the input.
mbed_official	376:cb4d9db17537	169	This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official	376:cb4d9db17537	170
mbed_official	376:cb4d9db17537	171	uint32_t IC2Prescaler; /*!< Specifies the Input Capture Prescaler.
mbed_official	376:cb4d9db17537	172	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
mbed_official	376:cb4d9db17537	173
mbed_official	376:cb4d9db17537	174	uint32_t IC2Filter; /*!< Specifies the input capture filter.
mbed_official	376:cb4d9db17537	175	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	376:cb4d9db17537	176	} TIM_Encoder_InitTypeDef;
mbed_official	376:cb4d9db17537	177
mbed_official	376:cb4d9db17537	178	/**
mbed_official	376:cb4d9db17537	179	* @brief Clock Configuration Handle Structure definition
mbed_official	376:cb4d9db17537	180	*/
mbed_official	376:cb4d9db17537	181	typedef struct
mbed_official	376:cb4d9db17537	182	{
mbed_official	376:cb4d9db17537	183	uint32_t ClockSource; /*!< TIM clock sources.
mbed_official	376:cb4d9db17537	184	This parameter can be a value of @ref TIM_Clock_Source */
mbed_official	376:cb4d9db17537	185	uint32_t ClockPolarity; /*!< TIM clock polarity.
mbed_official	376:cb4d9db17537	186	This parameter can be a value of @ref TIM_Clock_Polarity */
mbed_official	376:cb4d9db17537	187	uint32_t ClockPrescaler; /*!< TIM clock prescaler.
mbed_official	376:cb4d9db17537	188	This parameter can be a value of @ref TIM_Clock_Prescaler */
mbed_official	376:cb4d9db17537	189	uint32_t ClockFilter; /*!< TIM clock filter.
mbed_official	376:cb4d9db17537	190	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	376:cb4d9db17537	191	}TIM_ClockConfigTypeDef;
mbed_official	376:cb4d9db17537	192
mbed_official	376:cb4d9db17537	193	/**
mbed_official	376:cb4d9db17537	194	* @brief Clear Input Configuration Handle Structure definition
mbed_official	376:cb4d9db17537	195	*/
mbed_official	376:cb4d9db17537	196	typedef struct
mbed_official	376:cb4d9db17537	197	{
mbed_official	376:cb4d9db17537	198	uint32_t ClearInputState; /*!< TIM clear Input state.
mbed_official	376:cb4d9db17537	199	This parameter can be ENABLE or DISABLE */
mbed_official	376:cb4d9db17537	200	uint32_t ClearInputSource; /*!< TIM clear Input sources.
mbed_official	376:cb4d9db17537	201	This parameter can be a value of @ref TIM_ClearInput_Source */
mbed_official	376:cb4d9db17537	202	uint32_t ClearInputPolarity; /*!< TIM Clear Input polarity.
mbed_official	376:cb4d9db17537	203	This parameter can be a value of @ref TIM_ClearInput_Polarity */
mbed_official	376:cb4d9db17537	204	uint32_t ClearInputPrescaler; /*!< TIM Clear Input prescaler.
mbed_official	376:cb4d9db17537	205	This parameter can be a value of @ref TIM_ClearInput_Prescaler */
mbed_official	376:cb4d9db17537	206	uint32_t ClearInputFilter; /*!< TIM Clear Input filter.
mbed_official	376:cb4d9db17537	207	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	376:cb4d9db17537	208	}TIM_ClearInputConfigTypeDef;
mbed_official	376:cb4d9db17537	209
mbed_official	376:cb4d9db17537	210	/**
mbed_official	376:cb4d9db17537	211	* @brief TIM Slave configuration Structure definition
mbed_official	376:cb4d9db17537	212	*/
mbed_official	376:cb4d9db17537	213	typedef struct {
mbed_official	376:cb4d9db17537	214	uint32_t SlaveMode; /*!< Slave mode selection.
mbed_official	376:cb4d9db17537	215	This parameter can be a value of @ref TIM_Slave_Mode */
mbed_official	376:cb4d9db17537	216	uint32_t InputTrigger; /*!< Input Trigger source.
mbed_official	376:cb4d9db17537	217	This parameter can be a value of @ref TIM_Trigger_Selection */
mbed_official	376:cb4d9db17537	218	uint32_t TriggerPolarity; /*!< Input Trigger polarity.
mbed_official	376:cb4d9db17537	219	This parameter can be a value of @ref TIM_Trigger_Polarity */
mbed_official	376:cb4d9db17537	220	uint32_t TriggerPrescaler; /*!< Input trigger prescaler.
mbed_official	376:cb4d9db17537	221	This parameter can be a value of @ref TIM_Trigger_Prescaler */
mbed_official	376:cb4d9db17537	222	uint32_t TriggerFilter; /*!< Input trigger filter.
mbed_official	376:cb4d9db17537	223	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	376:cb4d9db17537	224
mbed_official	376:cb4d9db17537	225	}TIM_SlaveConfigTypeDef;
mbed_official	376:cb4d9db17537	226
mbed_official	376:cb4d9db17537	227	/**
mbed_official	376:cb4d9db17537	228	* @brief HAL State structures definition
mbed_official	376:cb4d9db17537	229	*/
mbed_official	376:cb4d9db17537	230	typedef enum
mbed_official	376:cb4d9db17537	231	{
mbed_official	376:cb4d9db17537	232	HAL_TIM_STATE_RESET = 0x00, /!< Peripheral not yet initialized or disabled /
mbed_official	376:cb4d9db17537	233	HAL_TIM_STATE_READY = 0x01, /!< Peripheral Initialized and ready for use /
mbed_official	376:cb4d9db17537	234	HAL_TIM_STATE_BUSY = 0x02, /!< An internal process is ongoing /
mbed_official	376:cb4d9db17537	235	HAL_TIM_STATE_TIMEOUT = 0x03, /!< Timeout state /
mbed_official	376:cb4d9db17537	236	HAL_TIM_STATE_ERROR = 0x04 /!< Reception process is ongoing /
mbed_official	376:cb4d9db17537	237	}HAL_TIM_StateTypeDef;
mbed_official	376:cb4d9db17537	238
mbed_official	376:cb4d9db17537	239	/**
mbed_official	376:cb4d9db17537	240	* @brief HAL Active channel structures definition
mbed_official	376:cb4d9db17537	241	*/
mbed_official	376:cb4d9db17537	242	typedef enum
mbed_official	376:cb4d9db17537	243	{
mbed_official	376:cb4d9db17537	244	HAL_TIM_ACTIVE_CHANNEL_1 = 0x01, /!< The active channel is 1 /
mbed_official	376:cb4d9db17537	245	HAL_TIM_ACTIVE_CHANNEL_2 = 0x02, /!< The active channel is 2 /
mbed_official	376:cb4d9db17537	246	HAL_TIM_ACTIVE_CHANNEL_3 = 0x04, /!< The active channel is 3 /
mbed_official	376:cb4d9db17537	247	HAL_TIM_ACTIVE_CHANNEL_4 = 0x08, /!< The active channel is 4 /
mbed_official	376:cb4d9db17537	248	HAL_TIM_ACTIVE_CHANNEL_CLEARED = 0x00 /!< All active channels cleared /
mbed_official	376:cb4d9db17537	249	}HAL_TIM_ActiveChannel;
mbed_official	376:cb4d9db17537	250
mbed_official	376:cb4d9db17537	251	/**
mbed_official	376:cb4d9db17537	252	* @brief TIM Time Base Handle Structure definition
mbed_official	376:cb4d9db17537	253	*/
mbed_official	376:cb4d9db17537	254	typedef struct
mbed_official	376:cb4d9db17537	255	{
mbed_official	376:cb4d9db17537	256	TIM_TypeDef Instance; /!< Register base address */
mbed_official	376:cb4d9db17537	257	TIM_Base_InitTypeDef Init; /!< TIM Time Base required parameters /
mbed_official	376:cb4d9db17537	258	HAL_TIM_ActiveChannel Channel; /!< Active channel /
mbed_official	376:cb4d9db17537	259	DMA_HandleTypeDef hdma[7]; /!< DMA Handlers array
mbed_official	376:cb4d9db17537	260	This array is accessed by a @ref DMA_Handle_index */
mbed_official	376:cb4d9db17537	261	HAL_LockTypeDef Lock; /!< Locking object /
mbed_official	376:cb4d9db17537	262	__IO HAL_TIM_StateTypeDef State; /!< TIM operation state /
mbed_official	376:cb4d9db17537	263	}TIM_HandleTypeDef;
mbed_official	376:cb4d9db17537	264
mbed_official	376:cb4d9db17537	265	/* Exported constants --------------------------------------------------------*/
mbed_official	376:cb4d9db17537	266	/** @defgroup TIM_Exported_Constants
mbed_official	376:cb4d9db17537	267	* @{
mbed_official	376:cb4d9db17537	268	*/
mbed_official	376:cb4d9db17537	269
mbed_official	376:cb4d9db17537	270	/** @defgroup TIM_Input_Channel_Polarity
mbed_official	376:cb4d9db17537	271	* @{
mbed_official	376:cb4d9db17537	272	*/
mbed_official	376:cb4d9db17537	273	#define TIM_INPUTCHANNELPOLARITY_RISING ((uint32_t)0x00000000) /!< Polarity for TIx source /
mbed_official	376:cb4d9db17537	274	#define TIM_INPUTCHANNELPOLARITY_FALLING (TIM_CCER_CC1P) /!< Polarity for TIx source /
mbed_official	376:cb4d9db17537	275	#define TIM_INPUTCHANNELPOLARITY_BOTHEDGE (TIM_CCER_CC1P \| TIM_CCER_CC1NP) /!< Polarity for TIx source /
mbed_official	376:cb4d9db17537	276	/**
mbed_official	376:cb4d9db17537	277	* @}
mbed_official	376:cb4d9db17537	278	*/
mbed_official	376:cb4d9db17537	279
mbed_official	376:cb4d9db17537	280	/** @defgroup TIM_ETR_Polarity
mbed_official	376:cb4d9db17537	281	* @{
mbed_official	376:cb4d9db17537	282	*/
mbed_official	376:cb4d9db17537	283	#define TIM_ETRPOLARITY_INVERTED (TIM_SMCR_ETP) /!< Polarity for ETR source /
mbed_official	376:cb4d9db17537	284	#define TIM_ETRPOLARITY_NONINVERTED ((uint32_t)0x0000) /!< Polarity for ETR source /
mbed_official	376:cb4d9db17537	285	/**
mbed_official	376:cb4d9db17537	286	* @}
mbed_official	376:cb4d9db17537	287	*/
mbed_official	376:cb4d9db17537	288
mbed_official	376:cb4d9db17537	289	/** @defgroup TIM_ETR_Prescaler
mbed_official	376:cb4d9db17537	290	* @{
mbed_official	376:cb4d9db17537	291	*/
mbed_official	376:cb4d9db17537	292	#define TIM_ETRPRESCALER_DIV1 ((uint32_t)0x0000) /!< No prescaler is used /
mbed_official	376:cb4d9db17537	293	#define TIM_ETRPRESCALER_DIV2 (TIM_SMCR_ETPS_0) /!< ETR input source is divided by 2 /
mbed_official	376:cb4d9db17537	294	#define TIM_ETRPRESCALER_DIV4 (TIM_SMCR_ETPS_1) /!< ETR input source is divided by 4 /
mbed_official	376:cb4d9db17537	295	#define TIM_ETRPRESCALER_DIV8 (TIM_SMCR_ETPS) /!< ETR input source is divided by 8 /
mbed_official	376:cb4d9db17537	296	/**
mbed_official	376:cb4d9db17537	297	* @}
mbed_official	376:cb4d9db17537	298	*/
mbed_official	376:cb4d9db17537	299
mbed_official	376:cb4d9db17537	300	/** @defgroup TIM_Counter_Mode
mbed_official	376:cb4d9db17537	301	* @{
mbed_official	376:cb4d9db17537	302	*/
mbed_official	376:cb4d9db17537	303	#define TIM_COUNTERMODE_UP ((uint32_t)0x0000)
mbed_official	376:cb4d9db17537	304	#define TIM_COUNTERMODE_DOWN TIM_CR1_DIR
mbed_official	376:cb4d9db17537	305	#define TIM_COUNTERMODE_CENTERALIGNED1 TIM_CR1_CMS_0
mbed_official	376:cb4d9db17537	306	#define TIM_COUNTERMODE_CENTERALIGNED2 TIM_CR1_CMS_1
mbed_official	376:cb4d9db17537	307	#define TIM_COUNTERMODE_CENTERALIGNED3 TIM_CR1_CMS
mbed_official	376:cb4d9db17537	308
mbed_official	376:cb4d9db17537	309	#define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_COUNTERMODE_UP) \|\| \
mbed_official	376:cb4d9db17537	310	((MODE) == TIM_COUNTERMODE_DOWN) \|\| \
mbed_official	376:cb4d9db17537	311	((MODE) == TIM_COUNTERMODE_CENTERALIGNED1) \|\| \
mbed_official	376:cb4d9db17537	312	((MODE) == TIM_COUNTERMODE_CENTERALIGNED2) \|\| \
mbed_official	376:cb4d9db17537	313	((MODE) == TIM_COUNTERMODE_CENTERALIGNED3))
mbed_official	376:cb4d9db17537	314	/**
mbed_official	376:cb4d9db17537	315	* @}
mbed_official	376:cb4d9db17537	316	*/
mbed_official	376:cb4d9db17537	317
mbed_official	376:cb4d9db17537	318	/** @defgroup TIM_ClockDivision
mbed_official	376:cb4d9db17537	319	* @{
mbed_official	376:cb4d9db17537	320	*/
mbed_official	376:cb4d9db17537	321	#define TIM_CLOCKDIVISION_DIV1 ((uint32_t)0x0000)
mbed_official	376:cb4d9db17537	322	#define TIM_CLOCKDIVISION_DIV2 (TIM_CR1_CKD_0)
mbed_official	376:cb4d9db17537	323	#define TIM_CLOCKDIVISION_DIV4 (TIM_CR1_CKD_1)
mbed_official	376:cb4d9db17537	324
mbed_official	376:cb4d9db17537	325	#define IS_TIM_CLOCKDIVISION_DIV(DIV) (((DIV) == TIM_CLOCKDIVISION_DIV1) \|\| \
mbed_official	376:cb4d9db17537	326	((DIV) == TIM_CLOCKDIVISION_DIV2) \|\| \
mbed_official	376:cb4d9db17537	327	((DIV) == TIM_CLOCKDIVISION_DIV4))
mbed_official	376:cb4d9db17537	328	/**
mbed_official	376:cb4d9db17537	329	* @}
mbed_official	376:cb4d9db17537	330	*/
mbed_official	376:cb4d9db17537	331
mbed_official	376:cb4d9db17537	332	/** @defgroup TIM_Output_Compare_and_PWM_modes
mbed_official	376:cb4d9db17537	333	* @{
mbed_official	376:cb4d9db17537	334	*/
mbed_official	376:cb4d9db17537	335	#define TIM_OCMODE_TIMING ((uint32_t)0x0000)
mbed_official	376:cb4d9db17537	336	#define TIM_OCMODE_ACTIVE (TIM_CCMR1_OC1M_0)
mbed_official	376:cb4d9db17537	337	#define TIM_OCMODE_INACTIVE (TIM_CCMR1_OC1M_1)
mbed_official	376:cb4d9db17537	338	#define TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_0 \| TIM_CCMR1_OC1M_1)
mbed_official	376:cb4d9db17537	339	#define TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_2)
mbed_official	376:cb4d9db17537	340	#define TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M)
mbed_official	376:cb4d9db17537	341	#define TIM_OCMODE_FORCED_ACTIVE (TIM_CCMR1_OC1M_0 \| TIM_CCMR1_OC1M_2)
mbed_official	376:cb4d9db17537	342	#define TIM_OCMODE_FORCED_INACTIVE (TIM_CCMR1_OC1M_2)
mbed_official	376:cb4d9db17537	343
mbed_official	376:cb4d9db17537	344	#define IS_TIM_PWM_MODE(MODE) (((MODE) == TIM_OCMODE_PWM1) \|\| \
mbed_official	376:cb4d9db17537	345	((MODE) == TIM_OCMODE_PWM2))
mbed_official	376:cb4d9db17537	346
mbed_official	376:cb4d9db17537	347	#define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMODE_TIMING) \|\| \
mbed_official	376:cb4d9db17537	348	((MODE) == TIM_OCMODE_ACTIVE) \|\| \
mbed_official	376:cb4d9db17537	349	((MODE) == TIM_OCMODE_INACTIVE) \|\| \
mbed_official	376:cb4d9db17537	350	((MODE) == TIM_OCMODE_TOGGLE) \|\| \
mbed_official	376:cb4d9db17537	351	((MODE) == TIM_OCMODE_FORCED_ACTIVE) \|\| \
mbed_official	376:cb4d9db17537	352	((MODE) == TIM_OCMODE_FORCED_INACTIVE))
mbed_official	376:cb4d9db17537	353	/**
mbed_official	376:cb4d9db17537	354	* @}
mbed_official	376:cb4d9db17537	355	*/
mbed_official	376:cb4d9db17537	356
mbed_official	376:cb4d9db17537	357	/** @defgroup TIM_Output_Compare_State
mbed_official	376:cb4d9db17537	358	* @{
mbed_official	376:cb4d9db17537	359	*/
mbed_official	376:cb4d9db17537	360	#define TIM_OUTPUTSTATE_DISABLE ((uint32_t)0x0000)
mbed_official	376:cb4d9db17537	361	#define TIM_OUTPUTSTATE_ENABLE (TIM_CCER_CC1E)
mbed_official	376:cb4d9db17537	362
mbed_official	376:cb4d9db17537	363	#define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OUTPUTSTATE_DISABLE) \|\| \
mbed_official	376:cb4d9db17537	364	((STATE) == TIM_OUTPUTSTATE_ENABLE))
mbed_official	376:cb4d9db17537	365	/**
mbed_official	376:cb4d9db17537	366	* @}
mbed_official	376:cb4d9db17537	367	*/
mbed_official	376:cb4d9db17537	368	/** @defgroup TIM_Output_Fast_State
mbed_official	376:cb4d9db17537	369	* @{
mbed_official	376:cb4d9db17537	370	*/
mbed_official	376:cb4d9db17537	371	#define TIM_OCFAST_DISABLE ((uint32_t)0x0000)
mbed_official	376:cb4d9db17537	372	#define TIM_OCFAST_ENABLE (TIM_CCMR1_OC1FE)
mbed_official	376:cb4d9db17537	373
mbed_official	376:cb4d9db17537	374	#define IS_TIM_FAST_STATE(STATE) (((STATE) == TIM_OCFAST_DISABLE) \|\| \
mbed_official	376:cb4d9db17537	375	((STATE) == TIM_OCFAST_ENABLE))
mbed_official	376:cb4d9db17537	376	/**
mbed_official	376:cb4d9db17537	377	* @}
mbed_official	376:cb4d9db17537	378	*/
mbed_official	376:cb4d9db17537	379	/** @defgroup TIM_Output_Compare_N_State
mbed_official	376:cb4d9db17537	380	* @{
mbed_official	376:cb4d9db17537	381	*/
mbed_official	376:cb4d9db17537	382	#define TIM_OUTPUTNSTATE_DISABLE ((uint32_t)0x0000)
mbed_official	376:cb4d9db17537	383	#define TIM_OUTPUTNSTATE_ENABLE (TIM_CCER_CC1NE)
mbed_official	376:cb4d9db17537	384
mbed_official	376:cb4d9db17537	385	#define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OUTPUTNSTATE_DISABLE) \|\| \
mbed_official	376:cb4d9db17537	386	((STATE) == TIM_OUTPUTNSTATE_ENABLE))
mbed_official	376:cb4d9db17537	387	/**
mbed_official	376:cb4d9db17537	388	* @}
mbed_official	376:cb4d9db17537	389	*/
mbed_official	376:cb4d9db17537	390
mbed_official	376:cb4d9db17537	391	/** @defgroup TIM_Output_Compare_Polarity
mbed_official	376:cb4d9db17537	392	* @{
mbed_official	376:cb4d9db17537	393	*/
mbed_official	376:cb4d9db17537	394	#define TIM_OCPOLARITY_HIGH ((uint32_t)0x0000)
mbed_official	376:cb4d9db17537	395	#define TIM_OCPOLARITY_LOW (TIM_CCER_CC1P)
mbed_official	376:cb4d9db17537	396
mbed_official	376:cb4d9db17537	397	#define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPOLARITY_HIGH) \|\| \
mbed_official	376:cb4d9db17537	398	((POLARITY) == TIM_OCPOLARITY_LOW))
mbed_official	376:cb4d9db17537	399	/**
mbed_official	376:cb4d9db17537	400	* @}
mbed_official	376:cb4d9db17537	401	*/
mbed_official	376:cb4d9db17537	402
mbed_official	376:cb4d9db17537	403	/** @defgroup TIM_Channel
mbed_official	376:cb4d9db17537	404	* @{
mbed_official	376:cb4d9db17537	405	*/
mbed_official	376:cb4d9db17537	406
mbed_official	376:cb4d9db17537	407	#define TIM_CHANNEL_1 ((uint32_t)0x0000)
mbed_official	376:cb4d9db17537	408	#define TIM_CHANNEL_2 ((uint32_t)0x0004)
mbed_official	376:cb4d9db17537	409	#define TIM_CHANNEL_3 ((uint32_t)0x0008)
mbed_official	376:cb4d9db17537	410	#define TIM_CHANNEL_4 ((uint32_t)0x000C)
mbed_official	376:cb4d9db17537	411	#define TIM_CHANNEL_ALL ((uint32_t)0x0018)
mbed_official	376:cb4d9db17537	412
mbed_official	376:cb4d9db17537	413	#define IS_TIM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) \|\| \
mbed_official	376:cb4d9db17537	414	((CHANNEL) == TIM_CHANNEL_2) \|\| \
mbed_official	376:cb4d9db17537	415	((CHANNEL) == TIM_CHANNEL_3) \|\| \
mbed_official	376:cb4d9db17537	416	((CHANNEL) == TIM_CHANNEL_4) \|\| \
mbed_official	376:cb4d9db17537	417	((CHANNEL) == TIM_CHANNEL_ALL))
mbed_official	376:cb4d9db17537	418
mbed_official	376:cb4d9db17537	419	#define IS_TIM_PWMI_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) \|\| \
mbed_official	376:cb4d9db17537	420	((CHANNEL) == TIM_CHANNEL_2))
mbed_official	376:cb4d9db17537	421
mbed_official	376:cb4d9db17537	422	#define IS_TIM_OPM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) \|\| \
mbed_official	376:cb4d9db17537	423	((CHANNEL) == TIM_CHANNEL_2))
mbed_official	376:cb4d9db17537	424	/**
mbed_official	376:cb4d9db17537	425	* @}
mbed_official	376:cb4d9db17537	426	*/
mbed_official	376:cb4d9db17537	427
mbed_official	376:cb4d9db17537	428	/** @defgroup TIM_Input_Capture_Polarity
mbed_official	376:cb4d9db17537	429	* @{
mbed_official	376:cb4d9db17537	430	*/
mbed_official	376:cb4d9db17537	431	#define TIM_ICPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING
mbed_official	376:cb4d9db17537	432	#define TIM_ICPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING
mbed_official	376:cb4d9db17537	433	#define TIM_ICPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE
mbed_official	376:cb4d9db17537	434
mbed_official	376:cb4d9db17537	435	#define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPOLARITY_RISING) \|\| \
mbed_official	376:cb4d9db17537	436	((POLARITY) == TIM_ICPOLARITY_FALLING) \|\| \
mbed_official	376:cb4d9db17537	437	((POLARITY) == TIM_ICPOLARITY_BOTHEDGE))
mbed_official	376:cb4d9db17537	438	/**
mbed_official	376:cb4d9db17537	439	* @}
mbed_official	376:cb4d9db17537	440	*/
mbed_official	376:cb4d9db17537	441
mbed_official	376:cb4d9db17537	442	/** @defgroup TIM_Input_Capture_Selection
mbed_official	376:cb4d9db17537	443	* @{
mbed_official	376:cb4d9db17537	444	*/
mbed_official	376:cb4d9db17537	445	#define TIM_ICSELECTION_DIRECTTI (TIM_CCMR1_CC1S_0) /*!< TIM Input 1, 2, 3 or 4 is selected to be
mbed_official	376:cb4d9db17537	446	connected to IC1, IC2, IC3 or IC4, respectively */
mbed_official	376:cb4d9db17537	447	#define TIM_ICSELECTION_INDIRECTTI (TIM_CCMR1_CC1S_1) /*!< TIM Input 1, 2, 3 or 4 is selected to be
mbed_official	376:cb4d9db17537	448	connected to IC2, IC1, IC4 or IC3, respectively */
mbed_official	376:cb4d9db17537	449	#define TIM_ICSELECTION_TRC (TIM_CCMR1_CC1S) /!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC /
mbed_official	376:cb4d9db17537	450
mbed_official	376:cb4d9db17537	451	#define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSELECTION_DIRECTTI) \|\| \
mbed_official	376:cb4d9db17537	452	((SELECTION) == TIM_ICSELECTION_INDIRECTTI) \|\| \
mbed_official	376:cb4d9db17537	453	((SELECTION) == TIM_ICSELECTION_TRC))
mbed_official	376:cb4d9db17537	454	/**
mbed_official	376:cb4d9db17537	455	* @}
mbed_official	376:cb4d9db17537	456	*/
mbed_official	376:cb4d9db17537	457
mbed_official	376:cb4d9db17537	458	/** @defgroup TIM_Input_Capture_Prescaler
mbed_official	376:cb4d9db17537	459	* @{
mbed_official	376:cb4d9db17537	460	*/
mbed_official	376:cb4d9db17537	461	#define TIM_ICPSC_DIV1 ((uint32_t)0x0000) /!< Capture performed each time an edge is detected on the capture input /
mbed_official	376:cb4d9db17537	462	#define TIM_ICPSC_DIV2 (TIM_CCMR1_IC1PSC_0) /!< Capture performed once every 2 events /
mbed_official	376:cb4d9db17537	463	#define TIM_ICPSC_DIV4 (TIM_CCMR1_IC1PSC_1) /!< Capture performed once every 4 events /
mbed_official	376:cb4d9db17537	464	#define TIM_ICPSC_DIV8 (TIM_CCMR1_IC1PSC) /!< Capture performed once every 8 events /
mbed_official	376:cb4d9db17537	465
mbed_official	376:cb4d9db17537	466	#define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) \|\| \
mbed_official	376:cb4d9db17537	467	((PRESCALER) == TIM_ICPSC_DIV2) \|\| \
mbed_official	376:cb4d9db17537	468	((PRESCALER) == TIM_ICPSC_DIV4) \|\| \
mbed_official	376:cb4d9db17537	469	((PRESCALER) == TIM_ICPSC_DIV8))
mbed_official	376:cb4d9db17537	470	/**
mbed_official	376:cb4d9db17537	471	* @}
mbed_official	376:cb4d9db17537	472	*/
mbed_official	376:cb4d9db17537	473
mbed_official	376:cb4d9db17537	474	/** @defgroup TIM_One_Pulse_Mode
mbed_official	376:cb4d9db17537	475	* @{
mbed_official	376:cb4d9db17537	476	*/
mbed_official	376:cb4d9db17537	477	#define TIM_OPMODE_SINGLE (TIM_CR1_OPM)
mbed_official	376:cb4d9db17537	478	#define TIM_OPMODE_REPETITIVE ((uint32_t)0x0000)
mbed_official	376:cb4d9db17537	479	#define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMODE_SINGLE) \|\| \
mbed_official	376:cb4d9db17537	480	((MODE) == TIM_OPMODE_REPETITIVE))
mbed_official	376:cb4d9db17537	481	/**
mbed_official	376:cb4d9db17537	482	* @}
mbed_official	376:cb4d9db17537	483	*/
mbed_official	376:cb4d9db17537	484	/** @defgroup TIM_Encoder_Mode
mbed_official	376:cb4d9db17537	485	* @{
mbed_official	376:cb4d9db17537	486	*/
mbed_official	376:cb4d9db17537	487	#define TIM_ENCODERMODE_TI1 (TIM_SMCR_SMS_0)
mbed_official	376:cb4d9db17537	488	#define TIM_ENCODERMODE_TI2 (TIM_SMCR_SMS_1)
mbed_official	376:cb4d9db17537	489	#define TIM_ENCODERMODE_TI12 (TIM_SMCR_SMS_1 \| TIM_SMCR_SMS_0)
mbed_official	376:cb4d9db17537	490	#define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_ENCODERMODE_TI1) \|\| \
mbed_official	376:cb4d9db17537	491	((MODE) == TIM_ENCODERMODE_TI2) \|\| \
mbed_official	376:cb4d9db17537	492	((MODE) == TIM_ENCODERMODE_TI12))
mbed_official	376:cb4d9db17537	493	/**
mbed_official	376:cb4d9db17537	494	* @}
mbed_official	376:cb4d9db17537	495	*/
mbed_official	376:cb4d9db17537	496	/** @defgroup TIM_Interrupt_definition
mbed_official	376:cb4d9db17537	497	* @{
mbed_official	376:cb4d9db17537	498	*/
mbed_official	376:cb4d9db17537	499	#define TIM_IT_UPDATE (TIM_DIER_UIE)
mbed_official	376:cb4d9db17537	500	#define TIM_IT_CC1 (TIM_DIER_CC1IE)
mbed_official	376:cb4d9db17537	501	#define TIM_IT_CC2 (TIM_DIER_CC2IE)
mbed_official	376:cb4d9db17537	502	#define TIM_IT_CC3 (TIM_DIER_CC3IE)
mbed_official	376:cb4d9db17537	503	#define TIM_IT_CC4 (TIM_DIER_CC4IE)
mbed_official	376:cb4d9db17537	504	#define TIM_IT_TRIGGER (TIM_DIER_TIE)
mbed_official	376:cb4d9db17537	505
mbed_official	376:cb4d9db17537	506	#define IS_TIM_IT(IT) ((((IT) & 0xFFFFFFA0) == 0x00000000) && ((IT) != 0x00000000))
mbed_official	376:cb4d9db17537	507
mbed_official	376:cb4d9db17537	508	#define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_UPDATE) \|\| \
mbed_official	376:cb4d9db17537	509	((IT) == TIM_IT_CC1) \|\| \
mbed_official	376:cb4d9db17537	510	((IT) == TIM_IT_CC2) \|\| \
mbed_official	376:cb4d9db17537	511	((IT) == TIM_IT_CC3) \|\| \
mbed_official	376:cb4d9db17537	512	((IT) == TIM_IT_CC4) \|\| \
mbed_official	376:cb4d9db17537	513	((IT) == TIM_IT_TRIGGER))
mbed_official	376:cb4d9db17537	514	/**
mbed_official	376:cb4d9db17537	515	* @}
mbed_official	376:cb4d9db17537	516	*/
mbed_official	376:cb4d9db17537	517
mbed_official	376:cb4d9db17537	518	/** @defgroup TIM_DMA_sources
mbed_official	376:cb4d9db17537	519	* @{
mbed_official	376:cb4d9db17537	520	*/
mbed_official	376:cb4d9db17537	521	#define TIM_DMA_UPDATE (TIM_DIER_UDE)
mbed_official	376:cb4d9db17537	522	#define TIM_DMA_CC1 (TIM_DIER_CC1DE)
mbed_official	376:cb4d9db17537	523	#define TIM_DMA_CC2 (TIM_DIER_CC2DE)
mbed_official	376:cb4d9db17537	524	#define TIM_DMA_CC3 (TIM_DIER_CC3DE)
mbed_official	376:cb4d9db17537	525	#define TIM_DMA_CC4 (TIM_DIER_CC4DE)
mbed_official	376:cb4d9db17537	526	#define TIM_DMA_TRIGGER (TIM_DIER_TDE)
mbed_official	376:cb4d9db17537	527	#define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & 0xFFFFA0FF) == 0x00000000) && ((SOURCE) != 0x00000000))
mbed_official	376:cb4d9db17537	528
mbed_official	376:cb4d9db17537	529	/**
mbed_official	376:cb4d9db17537	530	* @}
mbed_official	376:cb4d9db17537	531	*/
mbed_official	376:cb4d9db17537	532
mbed_official	376:cb4d9db17537	533	/** @defgroup TIM_Event_Source
mbed_official	376:cb4d9db17537	534	* @{
mbed_official	376:cb4d9db17537	535	*/
mbed_official	376:cb4d9db17537	536	#define TIM_EventSource_Update TIM_EGR_UG
mbed_official	376:cb4d9db17537	537	#define TIM_EventSource_CC1 TIM_EGR_CC1G
mbed_official	376:cb4d9db17537	538	#define TIM_EventSource_CC2 TIM_EGR_CC2G
mbed_official	376:cb4d9db17537	539	#define TIM_EventSource_CC3 TIM_EGR_CC3G
mbed_official	376:cb4d9db17537	540	#define TIM_EventSource_CC4 TIM_EGR_CC4G
mbed_official	376:cb4d9db17537	541	#define TIM_EventSource_Trigger TIM_EGR_TG
mbed_official	376:cb4d9db17537	542	#define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & 0xFFFFFFA0) == 0x00000000) && ((SOURCE) != 0x00000000))
mbed_official	376:cb4d9db17537	543
mbed_official	376:cb4d9db17537	544	/**
mbed_official	376:cb4d9db17537	545	* @}
mbed_official	376:cb4d9db17537	546	*/
mbed_official	376:cb4d9db17537	547
mbed_official	376:cb4d9db17537	548	/** @defgroup TIM_Flag_definition
mbed_official	376:cb4d9db17537	549	* @{
mbed_official	376:cb4d9db17537	550	*/
mbed_official	376:cb4d9db17537	551	#define TIM_FLAG_UPDATE (TIM_SR_UIF)
mbed_official	376:cb4d9db17537	552	#define TIM_FLAG_CC1 (TIM_SR_CC1IF)
mbed_official	376:cb4d9db17537	553	#define TIM_FLAG_CC2 (TIM_SR_CC2IF)
mbed_official	376:cb4d9db17537	554	#define TIM_FLAG_CC3 (TIM_SR_CC3IF)
mbed_official	376:cb4d9db17537	555	#define TIM_FLAG_CC4 (TIM_SR_CC4IF)
mbed_official	376:cb4d9db17537	556	#define TIM_FLAG_TRIGGER (TIM_SR_TIF)
mbed_official	376:cb4d9db17537	557	#define TIM_FLAG_CC1OF (TIM_SR_CC1OF)
mbed_official	376:cb4d9db17537	558	#define TIM_FLAG_CC2OF (TIM_SR_CC2OF)
mbed_official	376:cb4d9db17537	559	#define TIM_FLAG_CC3OF (TIM_SR_CC3OF)
mbed_official	376:cb4d9db17537	560	#define TIM_FLAG_CC4OF (TIM_SR_CC4OF)
mbed_official	376:cb4d9db17537	561
mbed_official	376:cb4d9db17537	562	#define IS_TIM_FLAG(FLAG) (((FLAG) == TIM_FLAG_UPDATE) \|\| \
mbed_official	376:cb4d9db17537	563	((FLAG) == TIM_FLAG_CC1) \|\| \
mbed_official	376:cb4d9db17537	564	((FLAG) == TIM_FLAG_CC2) \|\| \
mbed_official	376:cb4d9db17537	565	((FLAG) == TIM_FLAG_CC3) \|\| \
mbed_official	376:cb4d9db17537	566	((FLAG) == TIM_FLAG_CC4) \|\| \
mbed_official	376:cb4d9db17537	567	((FLAG) == TIM_FLAG_TRIGGER) \|\| \
mbed_official	376:cb4d9db17537	568	((FLAG) == TIM_FLAG_CC1OF) \|\| \
mbed_official	376:cb4d9db17537	569	((FLAG) == TIM_FLAG_CC2OF) \|\| \
mbed_official	376:cb4d9db17537	570	((FLAG) == TIM_FLAG_CC3OF) \|\| \
mbed_official	376:cb4d9db17537	571	((FLAG) == TIM_FLAG_CC4OF))
mbed_official	376:cb4d9db17537	572	/**
mbed_official	376:cb4d9db17537	573	* @}
mbed_official	376:cb4d9db17537	574	*/
mbed_official	376:cb4d9db17537	575
mbed_official	376:cb4d9db17537	576	/** @defgroup TIM_Clock_Source
mbed_official	376:cb4d9db17537	577	* @{
mbed_official	376:cb4d9db17537	578	*/
mbed_official	376:cb4d9db17537	579	#define TIM_CLOCKSOURCE_ETRMODE2 (TIM_SMCR_ETPS_1)
mbed_official	376:cb4d9db17537	580	#define TIM_CLOCKSOURCE_INTERNAL (TIM_SMCR_ETPS_0)
mbed_official	376:cb4d9db17537	581	#define TIM_CLOCKSOURCE_ITR0 ((uint32_t)0x0000)
mbed_official	376:cb4d9db17537	582	#define TIM_CLOCKSOURCE_ITR1 (TIM_SMCR_TS_0)
mbed_official	376:cb4d9db17537	583	#define TIM_CLOCKSOURCE_ITR2 (TIM_SMCR_TS_1)
mbed_official	376:cb4d9db17537	584	#define TIM_CLOCKSOURCE_ITR3 (TIM_SMCR_TS_0 \| TIM_SMCR_TS_1)
mbed_official	376:cb4d9db17537	585	#define TIM_CLOCKSOURCE_TI1ED (TIM_SMCR_TS_2)
mbed_official	376:cb4d9db17537	586	#define TIM_CLOCKSOURCE_TI1 (TIM_SMCR_TS_0 \| TIM_SMCR_TS_2)
mbed_official	376:cb4d9db17537	587	#define TIM_CLOCKSOURCE_TI2 (TIM_SMCR_TS_1 \| TIM_SMCR_TS_2)
mbed_official	376:cb4d9db17537	588	#define TIM_CLOCKSOURCE_ETRMODE1 (TIM_SMCR_TS)
mbed_official	376:cb4d9db17537	589
mbed_official	376:cb4d9db17537	590	#define IS_TIM_CLOCKSOURCE(CLOCK) (((CLOCK) == TIM_CLOCKSOURCE_INTERNAL) \|\| \
mbed_official	376:cb4d9db17537	591	((CLOCK) == TIM_CLOCKSOURCE_ETRMODE2) \|\| \
mbed_official	376:cb4d9db17537	592	((CLOCK) == TIM_CLOCKSOURCE_ITR0) \|\| \
mbed_official	376:cb4d9db17537	593	((CLOCK) == TIM_CLOCKSOURCE_ITR1) \|\| \
mbed_official	376:cb4d9db17537	594	((CLOCK) == TIM_CLOCKSOURCE_ITR2) \|\| \
mbed_official	376:cb4d9db17537	595	((CLOCK) == TIM_CLOCKSOURCE_ITR3) \|\| \
mbed_official	376:cb4d9db17537	596	((CLOCK) == TIM_CLOCKSOURCE_TI1ED) \|\| \
mbed_official	376:cb4d9db17537	597	((CLOCK) == TIM_CLOCKSOURCE_TI1) \|\| \
mbed_official	376:cb4d9db17537	598	((CLOCK) == TIM_CLOCKSOURCE_TI2) \|\| \
mbed_official	376:cb4d9db17537	599	((CLOCK) == TIM_CLOCKSOURCE_ETRMODE1))
mbed_official	376:cb4d9db17537	600	/**
mbed_official	376:cb4d9db17537	601	* @}
mbed_official	376:cb4d9db17537	602	*/
mbed_official	376:cb4d9db17537	603
mbed_official	376:cb4d9db17537	604	/** @defgroup TIM_Clock_Polarity
mbed_official	376:cb4d9db17537	605	* @{
mbed_official	376:cb4d9db17537	606	*/
mbed_official	376:cb4d9db17537	607	#define TIM_CLOCKPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /!< Polarity for ETRx clock sources /
mbed_official	376:cb4d9db17537	608	#define TIM_CLOCKPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /!< Polarity for ETRx clock sources /
mbed_official	376:cb4d9db17537	609	#define TIM_CLOCKPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /!< Polarity for TIx clock sources /
mbed_official	376:cb4d9db17537	610	#define TIM_CLOCKPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /!< Polarity for TIx clock sources /
mbed_official	376:cb4d9db17537	611	#define TIM_CLOCKPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /!< Polarity for TIx clock sources /
mbed_official	376:cb4d9db17537	612
mbed_official	376:cb4d9db17537	613	#define IS_TIM_CLOCKPOLARITY(POLARITY) (((POLARITY) == TIM_CLOCKPOLARITY_INVERTED) \|\| \
mbed_official	376:cb4d9db17537	614	((POLARITY) == TIM_CLOCKPOLARITY_NONINVERTED) \|\| \
mbed_official	376:cb4d9db17537	615	((POLARITY) == TIM_CLOCKPOLARITY_RISING) \|\| \
mbed_official	376:cb4d9db17537	616	((POLARITY) == TIM_CLOCKPOLARITY_FALLING) \|\| \
mbed_official	376:cb4d9db17537	617	((POLARITY) == TIM_CLOCKPOLARITY_BOTHEDGE))
mbed_official	376:cb4d9db17537	618	/**
mbed_official	376:cb4d9db17537	619	* @}
mbed_official	376:cb4d9db17537	620	*/
mbed_official	376:cb4d9db17537	621	/** @defgroup TIM_Clock_Prescaler
mbed_official	376:cb4d9db17537	622	* @{
mbed_official	376:cb4d9db17537	623	*/
mbed_official	376:cb4d9db17537	624	#define TIM_CLOCKPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /!< No prescaler is used /
mbed_official	376:cb4d9db17537	625	#define TIM_CLOCKPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /!< Prescaler for External ETR Clock: Capture performed once every 2 events. /
mbed_official	376:cb4d9db17537	626	#define TIM_CLOCKPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /!< Prescaler for External ETR Clock: Capture performed once every 4 events. /
mbed_official	376:cb4d9db17537	627	#define TIM_CLOCKPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /!< Prescaler for External ETR Clock: Capture performed once every 8 events. /
mbed_official	376:cb4d9db17537	628
mbed_official	376:cb4d9db17537	629	#define IS_TIM_CLOCKPRESCALER(PRESCALER) (((PRESCALER) == TIM_CLOCKPRESCALER_DIV1) \|\| \
mbed_official	376:cb4d9db17537	630	((PRESCALER) == TIM_CLOCKPRESCALER_DIV2) \|\| \
mbed_official	376:cb4d9db17537	631	((PRESCALER) == TIM_CLOCKPRESCALER_DIV4) \|\| \
mbed_official	376:cb4d9db17537	632	((PRESCALER) == TIM_CLOCKPRESCALER_DIV8))
mbed_official	376:cb4d9db17537	633	/**
mbed_official	376:cb4d9db17537	634	* @}
mbed_official	376:cb4d9db17537	635	*/
mbed_official	376:cb4d9db17537	636
mbed_official	376:cb4d9db17537	637	/** @defgroup TIM_Clock_Filter
mbed_official	376:cb4d9db17537	638	* @{
mbed_official	376:cb4d9db17537	639	*/
mbed_official	376:cb4d9db17537	640	#define IS_TIM_CLOCKFILTER(ICFILTER) ((ICFILTER) <= 0xF)
mbed_official	376:cb4d9db17537	641	/**
mbed_official	376:cb4d9db17537	642	* @}
mbed_official	376:cb4d9db17537	643	*/
mbed_official	376:cb4d9db17537	644
mbed_official	376:cb4d9db17537	645	/** @defgroup TIM_ClearInput_Source
mbed_official	376:cb4d9db17537	646	* @{
mbed_official	376:cb4d9db17537	647	*/
mbed_official	376:cb4d9db17537	648	#define TIM_CLEARINPUTSOURCE_ETR ((uint32_t)0x0001)
mbed_official	376:cb4d9db17537	649	#define TIM_CLEARINPUTSOURCE_NONE ((uint32_t)0x0000)
mbed_official	376:cb4d9db17537	650
mbed_official	376:cb4d9db17537	651	#define IS_TIM_CLEARINPUT_SOURCE(SOURCE) (((SOURCE) == TIM_CLEARINPUTSOURCE_NONE) \|\| \
mbed_official	376:cb4d9db17537	652	((SOURCE) == TIM_CLEARINPUTSOURCE_ETR))
mbed_official	376:cb4d9db17537	653	/**
mbed_official	376:cb4d9db17537	654	* @}
mbed_official	376:cb4d9db17537	655	*/
mbed_official	376:cb4d9db17537	656
mbed_official	376:cb4d9db17537	657	/** @defgroup TIM_ClearInput_Polarity
mbed_official	376:cb4d9db17537	658	* @{
mbed_official	376:cb4d9db17537	659	*/
mbed_official	376:cb4d9db17537	660	#define TIM_CLEARINPUTPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /!< Polarity for ETRx pin /
mbed_official	376:cb4d9db17537	661	#define TIM_CLEARINPUTPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /!< Polarity for ETRx pin /
mbed_official	376:cb4d9db17537	662	#define IS_TIM_CLEARINPUT_POLARITY(POLARITY) (((POLARITY) == TIM_CLEARINPUTPOLARITY_INVERTED) \|\| \
mbed_official	376:cb4d9db17537	663	((POLARITY) == TIM_CLEARINPUTPOLARITY_NONINVERTED))
mbed_official	376:cb4d9db17537	664	/**
mbed_official	376:cb4d9db17537	665	* @}
mbed_official	376:cb4d9db17537	666	*/
mbed_official	376:cb4d9db17537	667
mbed_official	376:cb4d9db17537	668	/** @defgroup TIM_ClearInput_Prescaler
mbed_official	376:cb4d9db17537	669	* @{
mbed_official	376:cb4d9db17537	670	*/
mbed_official	376:cb4d9db17537	671	#define TIM_CLEARINPUTPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /!< No prescaler is used /
mbed_official	376:cb4d9db17537	672	#define TIM_CLEARINPUTPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /!< Prescaler for External ETR pin: Capture performed once every 2 events. /
mbed_official	376:cb4d9db17537	673	#define TIM_CLEARINPUTPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /!< Prescaler for External ETR pin: Capture performed once every 4 events. /
mbed_official	376:cb4d9db17537	674	#define TIM_CLEARINPUTPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /!< Prescaler for External ETR pin: Capture performed once every 8 events. /
mbed_official	376:cb4d9db17537	675	#define IS_TIM_CLEARINPUT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV1) \|\| \
mbed_official	376:cb4d9db17537	676	((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV2) \|\| \
mbed_official	376:cb4d9db17537	677	((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV4) \|\| \
mbed_official	376:cb4d9db17537	678	((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV8))
mbed_official	376:cb4d9db17537	679	/**
mbed_official	376:cb4d9db17537	680	* @}
mbed_official	376:cb4d9db17537	681	*/
mbed_official	376:cb4d9db17537	682
mbed_official	376:cb4d9db17537	683	/** @defgroup TIM_ClearInput_Filter
mbed_official	376:cb4d9db17537	684	* @{
mbed_official	376:cb4d9db17537	685	*/
mbed_official	376:cb4d9db17537	686	#define IS_TIM_CLEARINPUT_FILTER(ICFILTER) ((ICFILTER) <= 0xF)
mbed_official	376:cb4d9db17537	687	/**
mbed_official	376:cb4d9db17537	688	* @}
mbed_official	376:cb4d9db17537	689	*/
mbed_official	376:cb4d9db17537	690
mbed_official	376:cb4d9db17537	691
mbed_official	376:cb4d9db17537	692	/** @defgroup TIM_Master_Mode_Selection
mbed_official	376:cb4d9db17537	693	* @{
mbed_official	376:cb4d9db17537	694	*/
mbed_official	376:cb4d9db17537	695	#define TIM_TRGO_RESET ((uint32_t)0x0000)
mbed_official	376:cb4d9db17537	696	#define TIM_TRGO_ENABLE (TIM_CR2_MMS_0)
mbed_official	376:cb4d9db17537	697	#define TIM_TRGO_UPDATE (TIM_CR2_MMS_1)
mbed_official	376:cb4d9db17537	698	#define TIM_TRGO_OC1 ((TIM_CR2_MMS_1 \| TIM_CR2_MMS_0))
mbed_official	376:cb4d9db17537	699	#define TIM_TRGO_OC1REF (TIM_CR2_MMS_2)
mbed_official	376:cb4d9db17537	700	#define TIM_TRGO_OC2REF ((TIM_CR2_MMS_2 \| TIM_CR2_MMS_0))
mbed_official	376:cb4d9db17537	701	#define TIM_TRGO_OC3REF ((TIM_CR2_MMS_2 \| TIM_CR2_MMS_1))
mbed_official	376:cb4d9db17537	702	#define TIM_TRGO_OC4REF ((TIM_CR2_MMS_2 \| TIM_CR2_MMS_1 \| TIM_CR2_MMS_0))
mbed_official	376:cb4d9db17537	703
mbed_official	376:cb4d9db17537	704	#define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGO_RESET) \|\| \
mbed_official	376:cb4d9db17537	705	((SOURCE) == TIM_TRGO_ENABLE) \|\| \
mbed_official	376:cb4d9db17537	706	((SOURCE) == TIM_TRGO_UPDATE) \|\| \
mbed_official	376:cb4d9db17537	707	((SOURCE) == TIM_TRGO_OC1) \|\| \
mbed_official	376:cb4d9db17537	708	((SOURCE) == TIM_TRGO_OC1REF) \|\| \
mbed_official	376:cb4d9db17537	709	((SOURCE) == TIM_TRGO_OC2REF) \|\| \
mbed_official	376:cb4d9db17537	710	((SOURCE) == TIM_TRGO_OC3REF) \|\| \
mbed_official	376:cb4d9db17537	711	((SOURCE) == TIM_TRGO_OC4REF))
mbed_official	376:cb4d9db17537	712
mbed_official	376:cb4d9db17537	713
mbed_official	376:cb4d9db17537	714	/**
mbed_official	376:cb4d9db17537	715	* @}
mbed_official	376:cb4d9db17537	716	*/
mbed_official	376:cb4d9db17537	717	/** @defgroup TIM_Slave_Mode
mbed_official	376:cb4d9db17537	718	* @{
mbed_official	376:cb4d9db17537	719	*/
mbed_official	376:cb4d9db17537	720	#define TIM_SLAVEMODE_DISABLE ((uint32_t)0x0000)
mbed_official	376:cb4d9db17537	721	#define TIM_SLAVEMODE_RESET ((uint32_t)0x0004)
mbed_official	376:cb4d9db17537	722	#define TIM_SLAVEMODE_GATED ((uint32_t)0x0005)
mbed_official	376:cb4d9db17537	723	#define TIM_SLAVEMODE_TRIGGER ((uint32_t)0x0006)
mbed_official	376:cb4d9db17537	724	#define TIM_SLAVEMODE_EXTERNAL1 ((uint32_t)0x0007)
mbed_official	376:cb4d9db17537	725
mbed_official	376:cb4d9db17537	726	#define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SLAVEMODE_DISABLE) \|\| \
mbed_official	376:cb4d9db17537	727	((MODE) == TIM_SLAVEMODE_GATED) \|\| \
mbed_official	376:cb4d9db17537	728	((MODE) == TIM_SLAVEMODE_RESET) \|\| \
mbed_official	376:cb4d9db17537	729	((MODE) == TIM_SLAVEMODE_TRIGGER) \|\| \
mbed_official	376:cb4d9db17537	730	((MODE) == TIM_SLAVEMODE_EXTERNAL1))
mbed_official	376:cb4d9db17537	731	/**
mbed_official	376:cb4d9db17537	732	* @}
mbed_official	376:cb4d9db17537	733	*/
mbed_official	376:cb4d9db17537	734
mbed_official	376:cb4d9db17537	735	/** @defgroup TIM_Master_Slave_Mode
mbed_official	376:cb4d9db17537	736	* @{
mbed_official	376:cb4d9db17537	737	*/
mbed_official	376:cb4d9db17537	738
mbed_official	376:cb4d9db17537	739	#define TIM_MASTERSLAVEMODE_ENABLE ((uint32_t)0x0080)
mbed_official	376:cb4d9db17537	740	#define TIM_MASTERSLAVEMODE_DISABLE ((uint32_t)0x0000)
mbed_official	376:cb4d9db17537	741	#define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MASTERSLAVEMODE_ENABLE) \|\| \
mbed_official	376:cb4d9db17537	742	((STATE) == TIM_MASTERSLAVEMODE_DISABLE))
mbed_official	376:cb4d9db17537	743	/**
mbed_official	376:cb4d9db17537	744	* @}
mbed_official	376:cb4d9db17537	745	*/
mbed_official	376:cb4d9db17537	746	/** @defgroup TIM_Trigger_Selection
mbed_official	376:cb4d9db17537	747	* @{
mbed_official	376:cb4d9db17537	748	*/
mbed_official	376:cb4d9db17537	749	#define TIM_TS_ITR0 ((uint32_t)0x0000)
mbed_official	376:cb4d9db17537	750	#define TIM_TS_ITR1 ((uint32_t)0x0010)
mbed_official	376:cb4d9db17537	751	#define TIM_TS_ITR2 ((uint32_t)0x0020)
mbed_official	376:cb4d9db17537	752	#define TIM_TS_ITR3 ((uint32_t)0x0030)
mbed_official	376:cb4d9db17537	753	#define TIM_TS_TI1F_ED ((uint32_t)0x0040)
mbed_official	376:cb4d9db17537	754	#define TIM_TS_TI1FP1 ((uint32_t)0x0050)
mbed_official	376:cb4d9db17537	755	#define TIM_TS_TI2FP2 ((uint32_t)0x0060)
mbed_official	376:cb4d9db17537	756	#define TIM_TS_ETRF ((uint32_t)0x0070)
mbed_official	376:cb4d9db17537	757	#define TIM_TS_NONE ((uint32_t)0xFFFF)
mbed_official	376:cb4d9db17537	758	#define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) \|\| \
mbed_official	376:cb4d9db17537	759	((SELECTION) == TIM_TS_ITR1) \|\| \
mbed_official	376:cb4d9db17537	760	((SELECTION) == TIM_TS_ITR2) \|\| \
mbed_official	376:cb4d9db17537	761	((SELECTION) == TIM_TS_ITR3) \|\| \
mbed_official	376:cb4d9db17537	762	((SELECTION) == TIM_TS_TI1F_ED) \|\| \
mbed_official	376:cb4d9db17537	763	((SELECTION) == TIM_TS_TI1FP1) \|\| \
mbed_official	376:cb4d9db17537	764	((SELECTION) == TIM_TS_TI2FP2) \|\| \
mbed_official	376:cb4d9db17537	765	((SELECTION) == TIM_TS_ETRF))
mbed_official	376:cb4d9db17537	766	#define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) \|\| \
mbed_official	376:cb4d9db17537	767	((SELECTION) == TIM_TS_ITR1) \|\| \
mbed_official	376:cb4d9db17537	768	((SELECTION) == TIM_TS_ITR2) \|\| \
mbed_official	376:cb4d9db17537	769	((SELECTION) == TIM_TS_ITR3))
mbed_official	376:cb4d9db17537	770	#define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) \|\| \
mbed_official	376:cb4d9db17537	771	((SELECTION) == TIM_TS_ITR1) \|\| \
mbed_official	376:cb4d9db17537	772	((SELECTION) == TIM_TS_ITR2) \|\| \
mbed_official	376:cb4d9db17537	773	((SELECTION) == TIM_TS_ITR3) \|\| \
mbed_official	376:cb4d9db17537	774	((SELECTION) == TIM_TS_NONE))
mbed_official	376:cb4d9db17537	775	/**
mbed_official	376:cb4d9db17537	776	* @}
mbed_official	376:cb4d9db17537	777	*/
mbed_official	376:cb4d9db17537	778
mbed_official	376:cb4d9db17537	779	/** @defgroup TIM_Trigger_Polarity
mbed_official	376:cb4d9db17537	780	* @{
mbed_official	376:cb4d9db17537	781	*/
mbed_official	376:cb4d9db17537	782	#define TIM_TRIGGERPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /!< Polarity for ETRx trigger sources /
mbed_official	376:cb4d9db17537	783	#define TIM_TRIGGERPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /!< Polarity for ETRx trigger sources /
mbed_official	376:cb4d9db17537	784	#define TIM_TRIGGERPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /!< Polarity for TIxFPx or TI1_ED trigger sources /
mbed_official	376:cb4d9db17537	785	#define TIM_TRIGGERPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /!< Polarity for TIxFPx or TI1_ED trigger sources /
mbed_official	376:cb4d9db17537	786	#define TIM_TRIGGERPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /!< Polarity for TIxFPx or TI1_ED trigger sources /
mbed_official	376:cb4d9db17537	787
mbed_official	376:cb4d9db17537	788	#define IS_TIM_TRIGGERPOLARITY(POLARITY) (((POLARITY) == TIM_TRIGGERPOLARITY_INVERTED ) \|\| \
mbed_official	376:cb4d9db17537	789	((POLARITY) == TIM_TRIGGERPOLARITY_NONINVERTED) \|\| \
mbed_official	376:cb4d9db17537	790	((POLARITY) == TIM_TRIGGERPOLARITY_RISING ) \|\| \
mbed_official	376:cb4d9db17537	791	((POLARITY) == TIM_TRIGGERPOLARITY_FALLING ) \|\| \
mbed_official	376:cb4d9db17537	792	((POLARITY) == TIM_TRIGGERPOLARITY_BOTHEDGE ))
mbed_official	376:cb4d9db17537	793	/**
mbed_official	376:cb4d9db17537	794	* @}
mbed_official	376:cb4d9db17537	795	*/
mbed_official	376:cb4d9db17537	796
mbed_official	376:cb4d9db17537	797	/** @defgroup TIM_Trigger_Prescaler
mbed_official	376:cb4d9db17537	798	* @{
mbed_official	376:cb4d9db17537	799	*/
mbed_official	376:cb4d9db17537	800	#define TIM_TRIGGERPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /!< No prescaler is used /
mbed_official	376:cb4d9db17537	801	#define TIM_TRIGGERPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /!< Prescaler for External ETR Trigger: Capture performed once every 2 events. /
mbed_official	376:cb4d9db17537	802	#define TIM_TRIGGERPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /!< Prescaler for External ETR Trigger: Capture performed once every 4 events. /
mbed_official	376:cb4d9db17537	803	#define TIM_TRIGGERPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /!< Prescaler for External ETR Trigger: Capture performed once every 8 events. /
mbed_official	376:cb4d9db17537	804
mbed_official	376:cb4d9db17537	805	#define IS_TIM_TRIGGERPRESCALER(PRESCALER) (((PRESCALER) == TIM_TRIGGERPRESCALER_DIV1) \|\| \
mbed_official	376:cb4d9db17537	806	((PRESCALER) == TIM_TRIGGERPRESCALER_DIV2) \|\| \
mbed_official	376:cb4d9db17537	807	((PRESCALER) == TIM_TRIGGERPRESCALER_DIV4) \|\| \
mbed_official	376:cb4d9db17537	808	((PRESCALER) == TIM_TRIGGERPRESCALER_DIV8))
mbed_official	376:cb4d9db17537	809	/**
mbed_official	376:cb4d9db17537	810	* @}
mbed_official	376:cb4d9db17537	811	*/
mbed_official	376:cb4d9db17537	812
mbed_official	376:cb4d9db17537	813	/** @defgroup TIM_Trigger_Filter
mbed_official	376:cb4d9db17537	814	* @{
mbed_official	376:cb4d9db17537	815	*/
mbed_official	376:cb4d9db17537	816	#define IS_TIM_TRIGGERFILTER(ICFILTER) ((ICFILTER) <= 0xF)
mbed_official	376:cb4d9db17537	817	/**
mbed_official	376:cb4d9db17537	818	* @}
mbed_official	376:cb4d9db17537	819	*/
mbed_official	376:cb4d9db17537	820
mbed_official	376:cb4d9db17537	821	/** @defgroup TIM_TI1_Selection
mbed_official	376:cb4d9db17537	822	* @{
mbed_official	376:cb4d9db17537	823	*/
mbed_official	376:cb4d9db17537	824	#define TIM_TI1SELECTION_CH1 ((uint32_t)0x0000)
mbed_official	376:cb4d9db17537	825	#define TIM_TI1SELECTION_XORCOMBINATION (TIM_CR2_TI1S)
mbed_official	376:cb4d9db17537	826
mbed_official	376:cb4d9db17537	827	#define IS_TIM_TI1SELECTION(TI1SELECTION) (((TI1SELECTION) == TIM_TI1SELECTION_CH1) \|\| \
mbed_official	376:cb4d9db17537	828	((TI1SELECTION) == TIM_TI1SELECTION_XORCOMBINATION))
mbed_official	376:cb4d9db17537	829	/**
mbed_official	376:cb4d9db17537	830	* @}
mbed_official	376:cb4d9db17537	831	*/
mbed_official	376:cb4d9db17537	832
mbed_official	376:cb4d9db17537	833	/** @defgroup TIM_DMA_Base_address
mbed_official	376:cb4d9db17537	834	* @{
mbed_official	376:cb4d9db17537	835	*/
mbed_official	376:cb4d9db17537	836	#define TIM_DMABase_CR1 (0x00000000)
mbed_official	376:cb4d9db17537	837	#define TIM_DMABase_CR2 (0x00000001)
mbed_official	376:cb4d9db17537	838	#define TIM_DMABase_SMCR (0x00000002)
mbed_official	376:cb4d9db17537	839	#define TIM_DMABase_DIER (0x00000003)
mbed_official	376:cb4d9db17537	840	#define TIM_DMABase_SR (0x00000004)
mbed_official	376:cb4d9db17537	841	#define TIM_DMABase_EGR (0x00000005)
mbed_official	376:cb4d9db17537	842	#define TIM_DMABase_CCMR1 (0x00000006)
mbed_official	376:cb4d9db17537	843	#define TIM_DMABase_CCMR2 (0x00000007)
mbed_official	376:cb4d9db17537	844	#define TIM_DMABase_CCER (0x00000008)
mbed_official	376:cb4d9db17537	845	#define TIM_DMABase_CNT (0x00000009)
mbed_official	376:cb4d9db17537	846	#define TIM_DMABase_PSC (0x0000000A)
mbed_official	376:cb4d9db17537	847	#define TIM_DMABase_ARR (0x0000000B)
mbed_official	376:cb4d9db17537	848	#define TIM_DMABase_CCR1 (0x0000000D)
mbed_official	376:cb4d9db17537	849	#define TIM_DMABase_CCR2 (0x0000000E)
mbed_official	376:cb4d9db17537	850	#define TIM_DMABase_CCR3 (0x0000000F)
mbed_official	376:cb4d9db17537	851	#define TIM_DMABase_CCR4 (0x00000010)
mbed_official	376:cb4d9db17537	852	#define TIM_DMABase_DCR (0x00000012)
mbed_official	376:cb4d9db17537	853	#define TIM_DMABase_OR (0x00000013)
mbed_official	376:cb4d9db17537	854	#define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) \|\| \
mbed_official	376:cb4d9db17537	855	((BASE) == TIM_DMABase_CR2) \|\| \
mbed_official	376:cb4d9db17537	856	((BASE) == TIM_DMABase_SMCR) \|\| \
mbed_official	376:cb4d9db17537	857	((BASE) == TIM_DMABase_DIER) \|\| \
mbed_official	376:cb4d9db17537	858	((BASE) == TIM_DMABase_SR) \|\| \
mbed_official	376:cb4d9db17537	859	((BASE) == TIM_DMABase_EGR) \|\| \
mbed_official	376:cb4d9db17537	860	((BASE) == TIM_DMABase_CCMR1) \|\| \
mbed_official	376:cb4d9db17537	861	((BASE) == TIM_DMABase_CCMR2) \|\| \
mbed_official	376:cb4d9db17537	862	((BASE) == TIM_DMABase_CCER) \|\| \
mbed_official	376:cb4d9db17537	863	((BASE) == TIM_DMABase_CNT) \|\| \
mbed_official	376:cb4d9db17537	864	((BASE) == TIM_DMABase_PSC) \|\| \
mbed_official	376:cb4d9db17537	865	((BASE) == TIM_DMABase_ARR) \|\| \
mbed_official	376:cb4d9db17537	866	((BASE) == TIM_DMABase_CCR1) \|\| \
mbed_official	376:cb4d9db17537	867	((BASE) == TIM_DMABase_CCR2) \|\| \
mbed_official	376:cb4d9db17537	868	((BASE) == TIM_DMABase_CCR3) \|\| \
mbed_official	376:cb4d9db17537	869	((BASE) == TIM_DMABase_CCR4) \|\| \
mbed_official	376:cb4d9db17537	870	((BASE) == TIM_DMABase_DCR) \|\| \
mbed_official	376:cb4d9db17537	871	((BASE) == TIM_DMABase_OR))
mbed_official	376:cb4d9db17537	872	/**
mbed_official	376:cb4d9db17537	873	* @}
mbed_official	376:cb4d9db17537	874	*/
mbed_official	376:cb4d9db17537	875
mbed_official	376:cb4d9db17537	876	/** @defgroup TIM_DMA_Burst_Length
mbed_official	376:cb4d9db17537	877	* @{
mbed_official	376:cb4d9db17537	878	*/
mbed_official	376:cb4d9db17537	879	#define TIM_DMABurstLength_1Transfer (0x00000000)
mbed_official	376:cb4d9db17537	880	#define TIM_DMABurstLength_2Transfers (0x00000100)
mbed_official	376:cb4d9db17537	881	#define TIM_DMABurstLength_3Transfers (0x00000200)
mbed_official	376:cb4d9db17537	882	#define TIM_DMABurstLength_4Transfers (0x00000300)
mbed_official	376:cb4d9db17537	883	#define TIM_DMABurstLength_5Transfers (0x00000400)
mbed_official	376:cb4d9db17537	884	#define TIM_DMABurstLength_6Transfers (0x00000500)
mbed_official	376:cb4d9db17537	885	#define TIM_DMABurstLength_7Transfers (0x00000600)
mbed_official	376:cb4d9db17537	886	#define TIM_DMABurstLength_8Transfers (0x00000700)
mbed_official	376:cb4d9db17537	887	#define TIM_DMABurstLength_9Transfers (0x00000800)
mbed_official	376:cb4d9db17537	888	#define TIM_DMABurstLength_10Transfers (0x00000900)
mbed_official	376:cb4d9db17537	889	#define TIM_DMABurstLength_11Transfers (0x00000A00)
mbed_official	376:cb4d9db17537	890	#define TIM_DMABurstLength_12Transfers (0x00000B00)
mbed_official	376:cb4d9db17537	891	#define TIM_DMABurstLength_13Transfers (0x00000C00)
mbed_official	376:cb4d9db17537	892	#define TIM_DMABurstLength_14Transfers (0x00000D00)
mbed_official	376:cb4d9db17537	893	#define TIM_DMABurstLength_15Transfers (0x00000E00)
mbed_official	376:cb4d9db17537	894	#define TIM_DMABurstLength_16Transfers (0x00000F00)
mbed_official	376:cb4d9db17537	895	#define TIM_DMABurstLength_17Transfers (0x00001000)
mbed_official	376:cb4d9db17537	896	#define TIM_DMABurstLength_18Transfers (0x00001100)
mbed_official	376:cb4d9db17537	897	#define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Transfer) \|\| \
mbed_official	376:cb4d9db17537	898	((LENGTH) == TIM_DMABurstLength_2Transfers) \|\| \
mbed_official	376:cb4d9db17537	899	((LENGTH) == TIM_DMABurstLength_3Transfers) \|\| \
mbed_official	376:cb4d9db17537	900	((LENGTH) == TIM_DMABurstLength_4Transfers) \|\| \
mbed_official	376:cb4d9db17537	901	((LENGTH) == TIM_DMABurstLength_5Transfers) \|\| \
mbed_official	376:cb4d9db17537	902	((LENGTH) == TIM_DMABurstLength_6Transfers) \|\| \
mbed_official	376:cb4d9db17537	903	((LENGTH) == TIM_DMABurstLength_7Transfers) \|\| \
mbed_official	376:cb4d9db17537	904	((LENGTH) == TIM_DMABurstLength_8Transfers) \|\| \
mbed_official	376:cb4d9db17537	905	((LENGTH) == TIM_DMABurstLength_9Transfers) \|\| \
mbed_official	376:cb4d9db17537	906	((LENGTH) == TIM_DMABurstLength_10Transfers) \|\| \
mbed_official	376:cb4d9db17537	907	((LENGTH) == TIM_DMABurstLength_11Transfers) \|\| \
mbed_official	376:cb4d9db17537	908	((LENGTH) == TIM_DMABurstLength_12Transfers) \|\| \
mbed_official	376:cb4d9db17537	909	((LENGTH) == TIM_DMABurstLength_13Transfers) \|\| \
mbed_official	376:cb4d9db17537	910	((LENGTH) == TIM_DMABurstLength_14Transfers) \|\| \
mbed_official	376:cb4d9db17537	911	((LENGTH) == TIM_DMABurstLength_15Transfers) \|\| \
mbed_official	376:cb4d9db17537	912	((LENGTH) == TIM_DMABurstLength_16Transfers) \|\| \
mbed_official	376:cb4d9db17537	913	((LENGTH) == TIM_DMABurstLength_17Transfers) \|\| \
mbed_official	376:cb4d9db17537	914	((LENGTH) == TIM_DMABurstLength_18Transfers))
mbed_official	376:cb4d9db17537	915	/**
mbed_official	376:cb4d9db17537	916	* @}
mbed_official	376:cb4d9db17537	917	*/
mbed_official	376:cb4d9db17537	918
mbed_official	376:cb4d9db17537	919	/** @defgroup TIM_Input_Capture_Filer_Value
mbed_official	376:cb4d9db17537	920	* @{
mbed_official	376:cb4d9db17537	921	*/
mbed_official	376:cb4d9db17537	922	#define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF)
mbed_official	376:cb4d9db17537	923	/**
mbed_official	376:cb4d9db17537	924	* @}
mbed_official	376:cb4d9db17537	925	*/
mbed_official	376:cb4d9db17537	926
mbed_official	376:cb4d9db17537	927	/** @defgroup DMA_Handle_index
mbed_official	376:cb4d9db17537	928	* @{
mbed_official	376:cb4d9db17537	929	*/
mbed_official	376:cb4d9db17537	930	#define TIM_DMA_ID_UPDATE ((uint16_t) 0x0) /!< Index of the DMA handle used for Update DMA requests /
mbed_official	376:cb4d9db17537	931	#define TIM_DMA_ID_CC1 ((uint16_t) 0x1) /!< Index of the DMA handle used for Capture/Compare 1 DMA requests /
mbed_official	376:cb4d9db17537	932	#define TIM_DMA_ID_CC2 ((uint16_t) 0x2) /!< Index of the DMA handle used for Capture/Compare 2 DMA requests /
mbed_official	376:cb4d9db17537	933	#define TIM_DMA_ID_CC3 ((uint16_t) 0x3) /!< Index of the DMA handle used for Capture/Compare 3 DMA requests /
mbed_official	376:cb4d9db17537	934	#define TIM_DMA_ID_CC4 ((uint16_t) 0x4) /!< Index of the DMA handle used for Capture/Compare 4 DMA requests /
mbed_official	376:cb4d9db17537	935	#define TIM_DMA_ID_TRIGGER ((uint16_t) 0x5) /!< Index of the DMA handle used for Trigger DMA requests /
mbed_official	376:cb4d9db17537	936	/**
mbed_official	376:cb4d9db17537	937	* @}
mbed_official	376:cb4d9db17537	938	*/
mbed_official	376:cb4d9db17537	939
mbed_official	376:cb4d9db17537	940	/** @defgroup Channel_CC_State
mbed_official	376:cb4d9db17537	941	* @{
mbed_official	376:cb4d9db17537	942	*/
mbed_official	376:cb4d9db17537	943	#define TIM_CCx_ENABLE ((uint32_t)0x0001)
mbed_official	376:cb4d9db17537	944	#define TIM_CCx_DISABLE ((uint32_t)0x0000)
mbed_official	376:cb4d9db17537	945	/**
mbed_official	376:cb4d9db17537	946	* @}
mbed_official	376:cb4d9db17537	947	*/
mbed_official	376:cb4d9db17537	948
mbed_official	376:cb4d9db17537	949	/**
mbed_official	376:cb4d9db17537	950	* @}
mbed_official	376:cb4d9db17537	951	*/
mbed_official	376:cb4d9db17537	952
mbed_official	376:cb4d9db17537	953	/* Exported macro ------------------------------------------------------------*/
mbed_official	376:cb4d9db17537	954	/** @defgroup TIM_Exported_Macro
mbed_official	376:cb4d9db17537	955	* @{
mbed_official	376:cb4d9db17537	956	*/
mbed_official	376:cb4d9db17537	957
mbed_official	376:cb4d9db17537	958	/** @brief Reset UART handle state
mbed_official	376:cb4d9db17537	959	* @param __HANDLE__: TIM handle
mbed_official	376:cb4d9db17537	960	* @retval None
mbed_official	376:cb4d9db17537	961	*/
mbed_official	376:cb4d9db17537	962	#define __HAL_TIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TIM_STATE_RESET)
mbed_official	376:cb4d9db17537	963
mbed_official	376:cb4d9db17537	964	/**
mbed_official	376:cb4d9db17537	965	* @brief Enable the TIM peripheral.
mbed_official	376:cb4d9db17537	966	* @param __HANDLE__: TIM handle
mbed_official	376:cb4d9db17537	967	* @retval None
mbed_official	376:cb4d9db17537	968	*/
mbed_official	376:cb4d9db17537	969	#define __HAL_TIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1\|=(TIM_CR1_CEN))
mbed_official	376:cb4d9db17537	970
mbed_official	376:cb4d9db17537	971	/* The counter of a timer instance is disabled only if all the CCx channels have
mbed_official	376:cb4d9db17537	972	been disabled */
mbed_official	376:cb4d9db17537	973	#define CCER_CCxE_MASK ((uint32_t)(TIM_CCER_CC1E \| TIM_CCER_CC2E \| TIM_CCER_CC3E \| TIM_CCER_CC4E))
mbed_official	376:cb4d9db17537	974
mbed_official	376:cb4d9db17537	975	/**
mbed_official	376:cb4d9db17537	976	* @brief Disable the TIM peripheral.
mbed_official	376:cb4d9db17537	977	* @param __HANDLE__: TIM handle
mbed_official	376:cb4d9db17537	978	* @retval None
mbed_official	376:cb4d9db17537	979	*/
mbed_official	376:cb4d9db17537	980	#define __HAL_TIM_DISABLE(__HANDLE__) \
mbed_official	376:cb4d9db17537	981	do { \
mbed_official	376:cb4d9db17537	982	if (((__HANDLE__)->Instance->CCER & CCER_CCxE_MASK) == 0) \
mbed_official	376:cb4d9db17537	983	{ \
mbed_official	376:cb4d9db17537	984	(__HANDLE__)->Instance->CR1 &= ~(TIM_CR1_CEN); \
mbed_official	376:cb4d9db17537	985	} \
mbed_official	376:cb4d9db17537	986	} while(0)
mbed_official	376:cb4d9db17537	987
mbed_official	376:cb4d9db17537	988	#define __HAL_TIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER \|= (__INTERRUPT__))
mbed_official	376:cb4d9db17537	989	#define __HAL_TIM_ENABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER \|= (__DMA__))
mbed_official	376:cb4d9db17537	990	#define __HAL_TIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER &= ~(__INTERRUPT__))
mbed_official	376:cb4d9db17537	991	#define __HAL_TIM_DISABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER &= ~(__DMA__))
mbed_official	376:cb4d9db17537	992	#define __HAL_TIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR &(__FLAG__)) == (__FLAG__))
mbed_official	376:cb4d9db17537	993	#define __HAL_TIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
mbed_official	376:cb4d9db17537	994
mbed_official	376:cb4d9db17537	995	#define __HAL_TIM_GET_ITSTATUS(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->DIER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
mbed_official	376:cb4d9db17537	996	#define __HAL_TIM_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->SR = ~(__INTERRUPT__))
mbed_official	376:cb4d9db17537	997
mbed_official	376:cb4d9db17537	998	#define __HAL_TIM_DIRECTION_STATUS(__HANDLE__) (((__HANDLE__)->Instance->CR1 &(TIM_CR1_DIR)) == (TIM_CR1_DIR))
mbed_official	376:cb4d9db17537	999	#define __HAL_TIM_PRESCALER(__HANDLE__, __PRESC__) ((__HANDLE__)->Instance->PSC = (__PRESC__))
mbed_official	376:cb4d9db17537	1000
mbed_official	376:cb4d9db17537	1001	#define __HAL_TIM_SetICPrescalerValue(__HANDLE__, __CHANNEL__, __ICPSC__) \
mbed_official	376:cb4d9db17537	1002	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 \|= (__ICPSC__)) :\
mbed_official	376:cb4d9db17537	1003	((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 \|= ((__ICPSC__) << 8)) :\
mbed_official	376:cb4d9db17537	1004	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 \|= (__ICPSC__)) :\
mbed_official	376:cb4d9db17537	1005	((__HANDLE__)->Instance->CCMR2 \|= ((__ICPSC__) << 8)))
mbed_official	376:cb4d9db17537	1006
mbed_official	376:cb4d9db17537	1007	#define __HAL_TIM_ResetICPrescalerValue(__HANDLE__, __CHANNEL__) \
mbed_official	376:cb4d9db17537	1008	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC1PSC) :\
mbed_official	376:cb4d9db17537	1009	((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC2PSC) :\
mbed_official	376:cb4d9db17537	1010	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC3PSC) :\
mbed_official	376:cb4d9db17537	1011	((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC4PSC))
mbed_official	376:cb4d9db17537	1012
mbed_official	376:cb4d9db17537	1013	/**
mbed_official	376:cb4d9db17537	1014	* @brief Sets the TIM Capture Compare Register value on runtime without
mbed_official	376:cb4d9db17537	1015	* calling another time ConfigChannel function.
mbed_official	376:cb4d9db17537	1016	* @param __HANDLE__: TIM handle.
mbed_official	376:cb4d9db17537	1017	* @param __CHANNEL__ : TIM Channels to be configured.
mbed_official	376:cb4d9db17537	1018	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	1019	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	1020	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	1021	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	1022	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	1023	* @param __COMPARE__: specifies the Capture Compare register new value.
mbed_official	376:cb4d9db17537	1024	* @retval None
mbed_official	376:cb4d9db17537	1025	*/
mbed_official	376:cb4d9db17537	1026	#define __HAL_TIM_SetCompare(__HANDLE__, __CHANNEL__, __COMPARE__) \
mbed_official	376:cb4d9db17537	1027	((__IO uint32_t )(&((__HANDLE__)->Instance->CCR1) + ((__CHANNEL__) >> 2)) = (__COMPARE__))
mbed_official	376:cb4d9db17537	1028
mbed_official	376:cb4d9db17537	1029	/**
mbed_official	376:cb4d9db17537	1030	* @brief Gets the TIM Capture Compare Register value on runtime
mbed_official	376:cb4d9db17537	1031	* @param __HANDLE__: TIM handle.
mbed_official	376:cb4d9db17537	1032	* @param __CHANNEL__ : TIM Channel associated with the capture compare register
mbed_official	376:cb4d9db17537	1033	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	1034	* @arg TIM_CHANNEL_1: get capture/compare 1 register value
mbed_official	376:cb4d9db17537	1035	* @arg TIM_CHANNEL_2: get capture/compare 2 register value
mbed_official	376:cb4d9db17537	1036	* @arg TIM_CHANNEL_3: get capture/compare 3 register value
mbed_official	376:cb4d9db17537	1037	* @arg TIM_CHANNEL_4: get capture/compare 4 register value
mbed_official	376:cb4d9db17537	1038	* @retval None
mbed_official	376:cb4d9db17537	1039	*/
mbed_official	376:cb4d9db17537	1040	#define __HAL_TIM_GetCompare(__HANDLE__, __CHANNEL__) \
mbed_official	376:cb4d9db17537	1041	((__IO uint32_t )(&((__HANDLE__)->Instance->CCR1) + ((__CHANNEL__) >> 2)))
mbed_official	376:cb4d9db17537	1042
mbed_official	376:cb4d9db17537	1043	/**
mbed_official	376:cb4d9db17537	1044	* @brief Sets the TIM Counter Register value on runtime.
mbed_official	376:cb4d9db17537	1045	* @param __HANDLE__: TIM handle.
mbed_official	376:cb4d9db17537	1046	* @param __COUNTER__: specifies the Counter register new value.
mbed_official	376:cb4d9db17537	1047	* @retval None
mbed_official	376:cb4d9db17537	1048	*/
mbed_official	376:cb4d9db17537	1049	#define __HAL_TIM_SetCounter(__HANDLE__, __COUNTER__) ((__HANDLE__)->Instance->CNT = (__COUNTER__))
mbed_official	376:cb4d9db17537	1050
mbed_official	376:cb4d9db17537	1051	/**
mbed_official	376:cb4d9db17537	1052	* @brief Gets the TIM Counter Register value on runtime.
mbed_official	376:cb4d9db17537	1053	* @param __HANDLE__: TIM handle.
mbed_official	376:cb4d9db17537	1054	* @retval None
mbed_official	376:cb4d9db17537	1055	*/
mbed_official	376:cb4d9db17537	1056	#define __HAL_TIM_GetCounter(__HANDLE__) ((__HANDLE__)->Instance->CNT)
mbed_official	376:cb4d9db17537	1057
mbed_official	376:cb4d9db17537	1058	/**
mbed_official	376:cb4d9db17537	1059	* @brief Sets the TIM Autoreload Register value on runtime without calling
mbed_official	376:cb4d9db17537	1060	* another time any Init function.
mbed_official	376:cb4d9db17537	1061	* @param __HANDLE__: TIM handle.
mbed_official	376:cb4d9db17537	1062	* @param __AUTORELOAD__: specifies the Counter register new value.
mbed_official	376:cb4d9db17537	1063	* @retval None
mbed_official	376:cb4d9db17537	1064	*/
mbed_official	376:cb4d9db17537	1065	#define __HAL_TIM_SetAutoreload(__HANDLE__, __AUTORELOAD__) \
mbed_official	376:cb4d9db17537	1066	do{ \
mbed_official	376:cb4d9db17537	1067	(__HANDLE__)->Instance->ARR = (__AUTORELOAD__); \
mbed_official	376:cb4d9db17537	1068	(__HANDLE__)->Init.Period = (__AUTORELOAD__); \
mbed_official	376:cb4d9db17537	1069	} while(0)
mbed_official	376:cb4d9db17537	1070	/**
mbed_official	376:cb4d9db17537	1071	* @brief Gets the TIM Autoreload Register value on runtime
mbed_official	376:cb4d9db17537	1072	* @param __HANDLE__: TIM handle.
mbed_official	376:cb4d9db17537	1073	* @retval None
mbed_official	376:cb4d9db17537	1074	*/
mbed_official	376:cb4d9db17537	1075	#define __HAL_TIM_GetAutoreload(__HANDLE__) ((__HANDLE__)->Instance->ARR)
mbed_official	376:cb4d9db17537	1076
mbed_official	376:cb4d9db17537	1077	/**
mbed_official	376:cb4d9db17537	1078	* @brief Sets the TIM Clock Division value on runtime without calling
mbed_official	376:cb4d9db17537	1079	* another time any Init function.
mbed_official	376:cb4d9db17537	1080	* @param __HANDLE__: TIM handle.
mbed_official	376:cb4d9db17537	1081	* @param __CKD__: specifies the clock division value.
mbed_official	376:cb4d9db17537	1082	* This parameter can be one of the following value:
mbed_official	376:cb4d9db17537	1083	* @arg TIM_CLOCKDIVISION_DIV1
mbed_official	376:cb4d9db17537	1084	* @arg TIM_CLOCKDIVISION_DIV2
mbed_official	376:cb4d9db17537	1085	* @arg TIM_CLOCKDIVISION_DIV4
mbed_official	376:cb4d9db17537	1086	* @retval None
mbed_official	376:cb4d9db17537	1087	*/
mbed_official	376:cb4d9db17537	1088	#define __HAL_TIM_SetClockDivision(__HANDLE__, __CKD__) \
mbed_official	376:cb4d9db17537	1089	do{ \
mbed_official	376:cb4d9db17537	1090	(__HANDLE__)->Instance->CR1 &= (uint16_t)(~TIM_CR1_CKD); \
mbed_official	376:cb4d9db17537	1091	(__HANDLE__)->Instance->CR1 \|= (__CKD__); \
mbed_official	376:cb4d9db17537	1092	(__HANDLE__)->Init.ClockDivision = (__CKD__); \
mbed_official	376:cb4d9db17537	1093	} while(0)
mbed_official	376:cb4d9db17537	1094	/**
mbed_official	376:cb4d9db17537	1095	* @brief Gets the TIM Clock Division value on runtime
mbed_official	376:cb4d9db17537	1096	* @param __HANDLE__: TIM handle.
mbed_official	376:cb4d9db17537	1097	* @retval None
mbed_official	376:cb4d9db17537	1098	*/
mbed_official	376:cb4d9db17537	1099	#define __HAL_TIM_GetClockDivision(__HANDLE__) ((__HANDLE__)->Instance->CR1 & TIM_CR1_CKD)
mbed_official	376:cb4d9db17537	1100
mbed_official	376:cb4d9db17537	1101	/**
mbed_official	376:cb4d9db17537	1102	* @brief Sets the TIM Input Capture prescaler on runtime without calling
mbed_official	376:cb4d9db17537	1103	* another time HAL_TIM_IC_ConfigChannel() function.
mbed_official	376:cb4d9db17537	1104	* @param __HANDLE__: TIM handle.
mbed_official	376:cb4d9db17537	1105	* @param __CHANNEL__ : TIM Channels to be configured.
mbed_official	376:cb4d9db17537	1106	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	1107	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	376:cb4d9db17537	1108	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	376:cb4d9db17537	1109	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	376:cb4d9db17537	1110	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	376:cb4d9db17537	1111	* @param __ICPSC__: specifies the Input Capture4 prescaler new value.
mbed_official	376:cb4d9db17537	1112	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	1113	* @arg TIM_ICPSC_DIV1: no prescaler
mbed_official	376:cb4d9db17537	1114	* @arg TIM_ICPSC_DIV2: capture is done once every 2 events
mbed_official	376:cb4d9db17537	1115	* @arg TIM_ICPSC_DIV4: capture is done once every 4 events
mbed_official	376:cb4d9db17537	1116	* @arg TIM_ICPSC_DIV8: capture is done once every 8 events
mbed_official	376:cb4d9db17537	1117	* @retval None
mbed_official	376:cb4d9db17537	1118	*/
mbed_official	376:cb4d9db17537	1119	#define __HAL_TIM_SetICPrescaler(__HANDLE__, __CHANNEL__, __ICPSC__) \
mbed_official	376:cb4d9db17537	1120	do{ \
mbed_official	376:cb4d9db17537	1121	__HAL_TIM_ResetICPrescalerValue((__HANDLE__), (__CHANNEL__)); \
mbed_official	376:cb4d9db17537	1122	__HAL_TIM_SetICPrescalerValue((__HANDLE__), (__CHANNEL__), (__ICPSC__)); \
mbed_official	376:cb4d9db17537	1123	} while(0)
mbed_official	376:cb4d9db17537	1124
mbed_official	376:cb4d9db17537	1125	/**
mbed_official	376:cb4d9db17537	1126	* @brief Gets the TIM Input Capture prescaler on runtime
mbed_official	376:cb4d9db17537	1127	* @param __HANDLE__: TIM handle.
mbed_official	376:cb4d9db17537	1128	* @param __CHANNEL__ : TIM Channels to be configured.
mbed_official	376:cb4d9db17537	1129	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	1130	* @arg TIM_CHANNEL_1: get input capture 1 prescaler value
mbed_official	376:cb4d9db17537	1131	* @arg TIM_CHANNEL_2: get input capture 2 prescaler value
mbed_official	376:cb4d9db17537	1132	* @arg TIM_CHANNEL_3: get input capture 3 prescaler value
mbed_official	376:cb4d9db17537	1133	* @arg TIM_CHANNEL_4: get input capture 4 prescaler value
mbed_official	376:cb4d9db17537	1134	* @retval None
mbed_official	376:cb4d9db17537	1135	*/
mbed_official	376:cb4d9db17537	1136	#define __HAL_TIM_GetICPrescaler(__HANDLE__, __CHANNEL__) \
mbed_official	376:cb4d9db17537	1137	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) :\
mbed_official	376:cb4d9db17537	1138	((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8) :\
mbed_official	376:cb4d9db17537	1139	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) :\
mbed_official	376:cb4d9db17537	1140	(((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8)
mbed_official	376:cb4d9db17537	1141
mbed_official	376:cb4d9db17537	1142
mbed_official	376:cb4d9db17537	1143	/**
mbed_official	376:cb4d9db17537	1144	* @}
mbed_official	376:cb4d9db17537	1145	*/
mbed_official	376:cb4d9db17537	1146
mbed_official	376:cb4d9db17537	1147	/* Include TIM HAL Extension module */
mbed_official	376:cb4d9db17537	1148	#include "stm32l0xx_hal_tim_ex.h"
mbed_official	376:cb4d9db17537	1149
mbed_official	376:cb4d9db17537	1150	/* Exported functions --------------------------------------------------------*/
mbed_official	376:cb4d9db17537	1151	/* Time Base functions ********************************************************/
mbed_official	376:cb4d9db17537	1152	HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1153	HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1154	void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1155	void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1156	/* Blocking mode: Polling */
mbed_official	376:cb4d9db17537	1157	HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1158	HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1159	/* Non-Blocking mode: Interrupt */
mbed_official	376:cb4d9db17537	1160	HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1161	HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1162	/* Non-Blocking mode: DMA */
mbed_official	376:cb4d9db17537	1163	HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef htim, uint32_t pData, uint16_t Length);
mbed_official	376:cb4d9db17537	1164	HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1165
mbed_official	376:cb4d9db17537	1166	/* Timer Output Compare functions **********************************************/
mbed_official	376:cb4d9db17537	1167	HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1168	HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1169	void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1170	void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1171	/* Blocking mode: Polling */
mbed_official	376:cb4d9db17537	1172	HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	376:cb4d9db17537	1173	HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	376:cb4d9db17537	1174	/* Non-Blocking mode: Interrupt */
mbed_official	376:cb4d9db17537	1175	HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	376:cb4d9db17537	1176	HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	376:cb4d9db17537	1177	/* Non-Blocking mode: DMA */
mbed_official	376:cb4d9db17537	1178	HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
mbed_official	376:cb4d9db17537	1179	HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	376:cb4d9db17537	1180
mbed_official	376:cb4d9db17537	1181	/* Timer PWM functions *********************************************************/
mbed_official	376:cb4d9db17537	1182	HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1183	HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1184	void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1185	void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1186	/* Blocking mode: Polling */
mbed_official	376:cb4d9db17537	1187	HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	376:cb4d9db17537	1188	HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	376:cb4d9db17537	1189	/* Non-Blocking mode: Interrupt */
mbed_official	376:cb4d9db17537	1190	HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	376:cb4d9db17537	1191	HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	376:cb4d9db17537	1192	/* Non-Blocking mode: DMA */
mbed_official	376:cb4d9db17537	1193	HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
mbed_official	376:cb4d9db17537	1194	HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	376:cb4d9db17537	1195
mbed_official	376:cb4d9db17537	1196	/* Timer Input Capture functions ***********************************************/
mbed_official	376:cb4d9db17537	1197	HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1198	HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1199	void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1200	void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1201	/* Blocking mode: Polling */
mbed_official	376:cb4d9db17537	1202	HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	376:cb4d9db17537	1203	HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	376:cb4d9db17537	1204	/* Non-Blocking mode: Interrupt */
mbed_official	376:cb4d9db17537	1205	HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	376:cb4d9db17537	1206	HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	376:cb4d9db17537	1207	/* Non-Blocking mode: DMA */
mbed_official	376:cb4d9db17537	1208	HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
mbed_official	376:cb4d9db17537	1209	HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	376:cb4d9db17537	1210
mbed_official	376:cb4d9db17537	1211	/* Timer One Pulse functions ***************************************************/
mbed_official	376:cb4d9db17537	1212	HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode);
mbed_official	376:cb4d9db17537	1213	HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1214	void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1215	void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1216	/* Blocking mode: Polling */
mbed_official	376:cb4d9db17537	1217	HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
mbed_official	376:cb4d9db17537	1218	HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
mbed_official	376:cb4d9db17537	1219
mbed_official	376:cb4d9db17537	1220	/* Non-Blocking mode: Interrupt */
mbed_official	376:cb4d9db17537	1221	HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
mbed_official	376:cb4d9db17537	1222	HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
mbed_official	376:cb4d9db17537	1223
mbed_official	376:cb4d9db17537	1224	/* Timer Encoder functions *****************************************************/
mbed_official	376:cb4d9db17537	1225	HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef htim, TIM_Encoder_InitTypeDef sConfig);
mbed_official	376:cb4d9db17537	1226	HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1227	void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1228	void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1229	/* Blocking mode: Polling */
mbed_official	376:cb4d9db17537	1230	HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	376:cb4d9db17537	1231	HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	376:cb4d9db17537	1232	/* Non-Blocking mode: Interrupt */
mbed_official	376:cb4d9db17537	1233	HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	376:cb4d9db17537	1234	HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	376:cb4d9db17537	1235	/* Non-Blocking mode: DMA */
mbed_official	376:cb4d9db17537	1236	HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData1, uint32_t *pData2, uint16_t Length);
mbed_official	376:cb4d9db17537	1237	HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	376:cb4d9db17537	1238
mbed_official	376:cb4d9db17537	1239	/* Interrupt Handler functions **********************************************/
mbed_official	376:cb4d9db17537	1240	void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1241
mbed_official	376:cb4d9db17537	1242	/* Control functions *********************************************************/
mbed_official	376:cb4d9db17537	1243	HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef htim, TIM_OC_InitTypeDef sConfig, uint32_t Channel);
mbed_official	376:cb4d9db17537	1244	HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef htim, TIM_OC_InitTypeDef sConfig, uint32_t Channel);
mbed_official	376:cb4d9db17537	1245	HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef htim, TIM_IC_InitTypeDef sConfig, uint32_t Channel);
mbed_official	376:cb4d9db17537	1246	HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef htim, TIM_OnePulse_InitTypeDef sConfig, uint32_t OutputChannel, uint32_t InputChannel);
mbed_official	376:cb4d9db17537	1247	HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef htim, TIM_ClearInputConfigTypeDef sClearInputConfig, uint32_t Channel);
mbed_official	376:cb4d9db17537	1248	HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef htim, TIM_ClockConfigTypeDef sClockSourceConfig);
mbed_official	376:cb4d9db17537	1249	HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection);
mbed_official	376:cb4d9db17537	1250	HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef htim, TIM_SlaveConfigTypeDef sSlaveConfig);
mbed_official	376:cb4d9db17537	1251	HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \
mbed_official	376:cb4d9db17537	1252	uint32_t *BurstBuffer, uint32_t BurstLength);
mbed_official	376:cb4d9db17537	1253	HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
mbed_official	376:cb4d9db17537	1254	HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \
mbed_official	376:cb4d9db17537	1255	uint32_t *BurstBuffer, uint32_t BurstLength);
mbed_official	376:cb4d9db17537	1256	HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
mbed_official	376:cb4d9db17537	1257	HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource);
mbed_official	376:cb4d9db17537	1258	uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	376:cb4d9db17537	1259
mbed_official	376:cb4d9db17537	1260	/* Callback in non blocking modes (Interrupt and DMA) *************************/
mbed_official	376:cb4d9db17537	1261	void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1262	void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1263	void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1264	void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1265	void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1266	void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1267
mbed_official	376:cb4d9db17537	1268	/* Peripheral State functions **************************************************/
mbed_official	376:cb4d9db17537	1269	HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1270	HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1271	HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1272	HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1273	HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1274	HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim);
mbed_official	376:cb4d9db17537	1275	void HAL_TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma);
mbed_official	376:cb4d9db17537	1276	void HAL_TIM_DMAError(DMA_HandleTypeDef *hdma);
mbed_official	376:cb4d9db17537	1277	void HAL_TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma);
mbed_official	376:cb4d9db17537	1278
mbed_official	376:cb4d9db17537	1279	/**
mbed_official	376:cb4d9db17537	1280	* @}
mbed_official	376:cb4d9db17537	1281	*/
mbed_official	376:cb4d9db17537	1282
mbed_official	376:cb4d9db17537	1283	/**
mbed_official	376:cb4d9db17537	1284	* @}
mbed_official	376:cb4d9db17537	1285	*/
mbed_official	376:cb4d9db17537	1286
mbed_official	376:cb4d9db17537	1287	#ifdef __cplusplus
mbed_official	376:cb4d9db17537	1288	}
mbed_official	376:cb4d9db17537	1289	#endif
mbed_official	376:cb4d9db17537	1290
mbed_official	376:cb4d9db17537	1291	#endif /* __STM32L0xx_HAL_TIM_H */
mbed_official	376:cb4d9db17537	1292
mbed_official	376:cb4d9db17537	1293	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/