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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_rcc.c@382:ee426a420dbb, 2014-11-03 (annotated)

Committer:
mbed_official
Date:
Mon Nov 03 10:45:07 2014 +0000
Revision:
382:ee426a420dbb
Parent:
targets/cmsis/TARGET_STM/TARGET_DISCO_L053C8/stm32l0xx_hal_rcc.c@376:cb4d9db17537
Child:
489:119543c9f674
Synchronized with git revision d54467eb07f62efd9ccdf44f1ede7fe1c1b0cf83



Full URL: https://github.com/mbedmicro/mbed/commit/d54467eb07f62efd9ccdf44f1ede7fe1c1b0cf83/

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 376:cb4d9db17537 1 /**
mbed_official 376:cb4d9db17537 2 ******************************************************************************
mbed_official 376:cb4d9db17537 3 * @file stm32l0xx_hal_rcc.c
mbed_official 376:cb4d9db17537 4 * @author MCD Application Team
mbed_official 376:cb4d9db17537 5 * @version V1.1.0
mbed_official 376:cb4d9db17537 6 * @date 18-June-2014
mbed_official 376:cb4d9db17537 7 * @brief RCC HAL module driver.
mbed_official 376:cb4d9db17537 8 * This file provides firmware functions to manage the following
mbed_official 376:cb4d9db17537 9 * functionalities of the Reset and Clock Control (RCC) peripheral:
mbed_official 376:cb4d9db17537 10 * + Initialization and de-initialization functions
mbed_official 376:cb4d9db17537 11 * + Peripheral Control functions
mbed_official 376:cb4d9db17537 12 *
mbed_official 376:cb4d9db17537 13 @verbatim
mbed_official 376:cb4d9db17537 14 ==============================================================================
mbed_official 376:cb4d9db17537 15 ##### RCC specific features #####
mbed_official 376:cb4d9db17537 16 ==============================================================================
mbed_official 376:cb4d9db17537 17 [..] After reset the device is running from MSI (2 MHz) with Flash 0 WS,
mbed_official 376:cb4d9db17537 18 all peripherals are off except internal SRAM, Flash and SW-DP.
mbed_official 376:cb4d9db17537 19 (+) There is no prescaler on High speed (AHB) and Low speed (APB) busses;
mbed_official 376:cb4d9db17537 20 all peripherals mapped on these busses are running at MSI speed.
mbed_official 376:cb4d9db17537 21 (+) The clock for all peripherals is switched off, except the SRAM and
mbed_official 376:cb4d9db17537 22 FLASH.
mbed_official 376:cb4d9db17537 23 (+) All GPIOs are in input floating state, except the SW-DP pins which
mbed_official 376:cb4d9db17537 24 are assigned to be used for debug purpose.
mbed_official 376:cb4d9db17537 25 [..] Once the device started from reset, the user application has to:
mbed_official 376:cb4d9db17537 26 (+) Configure the clock source to be used to drive the System clock
mbed_official 376:cb4d9db17537 27 (if the application needs higher frequency/performance)
mbed_official 376:cb4d9db17537 28 (+) Configure the System clock frequency and Flash settings
mbed_official 376:cb4d9db17537 29 (+) Configure the AHB and APB busses prescalers
mbed_official 376:cb4d9db17537 30 (+) Enable the clock for the peripheral(s) to be used
mbed_official 376:cb4d9db17537 31 (+) Configure the clock source(s) for peripherals whose clocks are not
mbed_official 376:cb4d9db17537 32 derived from the System clock (ADC, RTC/LCD, RNG and IWDG)
mbed_official 376:cb4d9db17537 33 @endverbatim
mbed_official 376:cb4d9db17537 34 ******************************************************************************
mbed_official 376:cb4d9db17537 35 * @attention
mbed_official 376:cb4d9db17537 36 *
mbed_official 376:cb4d9db17537 37 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 376:cb4d9db17537 38 *
mbed_official 376:cb4d9db17537 39 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 376:cb4d9db17537 40 * are permitted provided that the following conditions are met:
mbed_official 376:cb4d9db17537 41 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 376:cb4d9db17537 42 * this list of conditions and the following disclaimer.
mbed_official 376:cb4d9db17537 43 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 376:cb4d9db17537 44 * this list of conditions and the following disclaimer in the documentation
mbed_official 376:cb4d9db17537 45 * and/or other materials provided with the distribution.
mbed_official 376:cb4d9db17537 46 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 376:cb4d9db17537 47 * may be used to endorse or promote products derived from this software
mbed_official 376:cb4d9db17537 48 * without specific prior written permission.
mbed_official 376:cb4d9db17537 49 *
mbed_official 376:cb4d9db17537 50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 376:cb4d9db17537 51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 376:cb4d9db17537 52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 376:cb4d9db17537 53 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 376:cb4d9db17537 54 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 376:cb4d9db17537 55 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 376:cb4d9db17537 56 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 376:cb4d9db17537 57 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 376:cb4d9db17537 58 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 376:cb4d9db17537 59 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 376:cb4d9db17537 60 *
mbed_official 376:cb4d9db17537 61 ******************************************************************************
mbed_official 376:cb4d9db17537 62 */
mbed_official 376:cb4d9db17537 63
mbed_official 376:cb4d9db17537 64 /* Includes ------------------------------------------------------------------*/
mbed_official 376:cb4d9db17537 65 #include "stm32l0xx_hal.h"
mbed_official 376:cb4d9db17537 66
mbed_official 376:cb4d9db17537 67 /** @addtogroup STM32L0xx_HAL_Driver
mbed_official 376:cb4d9db17537 68 * @{
mbed_official 376:cb4d9db17537 69 */
mbed_official 376:cb4d9db17537 70
mbed_official 376:cb4d9db17537 71 /** @defgroup RCC
mbed_official 376:cb4d9db17537 72 * @brief RCC HAL module driver
mbed_official 376:cb4d9db17537 73 * @{
mbed_official 376:cb4d9db17537 74 */
mbed_official 376:cb4d9db17537 75
mbed_official 376:cb4d9db17537 76 #ifdef HAL_RCC_MODULE_ENABLED
mbed_official 376:cb4d9db17537 77
mbed_official 376:cb4d9db17537 78 /* Private typedef -----------------------------------------------------------*/
mbed_official 376:cb4d9db17537 79 /* Private define ------------------------------------------------------------*/
mbed_official 376:cb4d9db17537 80 #define HSE_TIMEOUT_VALUE HSE_STARTUP_TIMEOUT
mbed_official 376:cb4d9db17537 81 #define HSI_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */
mbed_official 376:cb4d9db17537 82 #define LSI_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */
mbed_official 376:cb4d9db17537 83 #define PLL_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */
mbed_official 376:cb4d9db17537 84 #define HSI48_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */
mbed_official 376:cb4d9db17537 85 #define MSI_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */
mbed_official 376:cb4d9db17537 86 #define CLOCKSWITCH_TIMEOUT_VALUE ((uint32_t)5000) /* 5 s */
mbed_official 376:cb4d9db17537 87
mbed_official 376:cb4d9db17537 88 /* Private macro -------------------------------------------------------------*/
mbed_official 376:cb4d9db17537 89 #define __MCO1_CLK_ENABLE() __GPIOA_CLK_ENABLE()
mbed_official 376:cb4d9db17537 90 #define MCO1_GPIO_PORT GPIOA
mbed_official 376:cb4d9db17537 91 #define MCO1_PIN GPIO_PIN_8
mbed_official 376:cb4d9db17537 92 #define MCO2_PIN GPIO_PIN_9
mbed_official 376:cb4d9db17537 93
mbed_official 376:cb4d9db17537 94 /* Private variables ---------------------------------------------------------*/
mbed_official 376:cb4d9db17537 95 static __IO const uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
mbed_official 376:cb4d9db17537 96 static __IO const uint8_t APBAHBPrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9};
mbed_official 376:cb4d9db17537 97 const uint32_t MSIRangeTable[7] = {64000, 128000, 256000, 512000, 1000000, 2000000, 4000000};
mbed_official 376:cb4d9db17537 98
mbed_official 376:cb4d9db17537 99 /* Private function prototypes -----------------------------------------------*/
mbed_official 376:cb4d9db17537 100 /* Private functions ---------------------------------------------------------*/
mbed_official 376:cb4d9db17537 101
mbed_official 376:cb4d9db17537 102 /** @defgroup RCC_Private_Functions
mbed_official 376:cb4d9db17537 103 * @{
mbed_official 376:cb4d9db17537 104 */
mbed_official 376:cb4d9db17537 105
mbed_official 376:cb4d9db17537 106 /** @defgroup RCC_Group1 Initialization and de-initialization functions
mbed_official 376:cb4d9db17537 107 * @brief Initialization and Configuration functions
mbed_official 376:cb4d9db17537 108 *
mbed_official 376:cb4d9db17537 109 @verbatim
mbed_official 376:cb4d9db17537 110 ===============================================================================
mbed_official 376:cb4d9db17537 111 ##### Initialization and de-initialization functions #####
mbed_official 376:cb4d9db17537 112 ===============================================================================
mbed_official 376:cb4d9db17537 113 [..]
mbed_official 376:cb4d9db17537 114 This section provide functions allowing to configure the internal/external
mbed_official 376:cb4d9db17537 115 clocks, PLL, CSS and MCO.
mbed_official 376:cb4d9db17537 116 [..] Internal/external clock and PLL configuration
mbed_official 376:cb4d9db17537 117 (#) HSI (high-speed internal), 16 MHz factory-trimmed RC used directly
mbed_official 376:cb4d9db17537 118 or through the PLL as System clock source.
mbed_official 376:cb4d9db17537 119 (#) MSI (multi-speed internal), multispeed low power RC
mbed_official 376:cb4d9db17537 120 (65.536 KHz to 4.194 MHz) MHz used as System clock source.
mbed_official 376:cb4d9db17537 121 (#) LSI (low-speed internal), 37 KHz low consumption RC used as IWDG
mbed_official 376:cb4d9db17537 122 and/or RTC clock source.
mbed_official 376:cb4d9db17537 123 (#) HSE (high-speed external), 1 to 24 MHz crystal oscillator used
mbed_official 376:cb4d9db17537 124 directly or through the PLL as System clock source. Can be used
mbed_official 376:cb4d9db17537 125 also as RTC clock source.
mbed_official 376:cb4d9db17537 126 (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source.
mbed_official 376:cb4d9db17537 127 (#) PLL (clocked by HSI or HSE), for System clock and USB (48 MHz).
mbed_official 376:cb4d9db17537 128 (#) CSS (Clock security system), once enable and if a HSE clock failure
mbed_official 376:cb4d9db17537 129 occurs (HSE used directly or through PLL as System clock source),
mbed_official 376:cb4d9db17537 130 the System clock is automatically switched to MSI and an interrupt
mbed_official 376:cb4d9db17537 131 is generated if enabled.
mbed_official 376:cb4d9db17537 132 The interrupt is linked to the Cortex-M3 NMI (Non-Maskable Interrupt)
mbed_official 376:cb4d9db17537 133 exception vector.
mbed_official 376:cb4d9db17537 134 (#) MCO (microcontroller clock output), used to output SYSCLK, HSI, MSI,
mbed_official 376:cb4d9db17537 135 HSE, PLL, LSI or LSE clock (through a configurable prescaler) on
mbed_official 376:cb4d9db17537 136 PA8 pin.
mbed_official 376:cb4d9db17537 137 [..] System, AHB and APB busses clocks configuration
mbed_official 376:cb4d9db17537 138 (#) Several clock sources can be used to drive the System clock (SYSCLK): MSI, HSI,
mbed_official 376:cb4d9db17537 139 HSE and PLL.
mbed_official 376:cb4d9db17537 140 The AHB clock (HCLK) is derived from System clock through configurable
mbed_official 376:cb4d9db17537 141 prescaler and used to clock the CPU, memory and peripherals mapped
mbed_official 376:cb4d9db17537 142 on IOPORT, AHB bus (DMA,Flash...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived
mbed_official 376:cb4d9db17537 143 from AHB clock through configurable prescalers and used to clock
mbed_official 376:cb4d9db17537 144 the peripherals mapped on these busses. You can use
mbed_official 376:cb4d9db17537 145 "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks.
mbed_official 376:cb4d9db17537 146
mbed_official 376:cb4d9db17537 147 -@- All the peripheral clocks are derived from the System clock (SYSCLK) except:
mbed_official 376:cb4d9db17537 148 (+@) I2S: the I2S clock can be derived from an external clock mapped on the I2S_CKIN pin.
mbed_official 376:cb4d9db17537 149
mbed_official 376:cb4d9db17537 150 (+@) RTC: the RTC clock can be derived either from the LSI, LSE or HSE clock
mbed_official 376:cb4d9db17537 151 divided by 2 to 16. You have to use __HAL_RCC_RTC_CONFIG() and __HAL_RCC_RTC_ENABLE()
mbed_official 376:cb4d9db17537 152 macros to configure this clock.
mbed_official 376:cb4d9db17537 153 (+@) USB FS,and RNG require a frequency equal to 48 MHz to work correctly
mbed_official 376:cb4d9db17537 154 This clock is derived from the main PLL or HSI48 RC oscillator.
mbed_official 376:cb4d9db17537 155 (+@) IWDG clock which is always the LSI clock.
mbed_official 376:cb4d9db17537 156
mbed_official 376:cb4d9db17537 157 (#) For the STM32L0xx devices, the maximum
mbed_official 376:cb4d9db17537 158 frequency of the SYSCLK ,HCLK, APB1 and APB2 is 32 MHz.
mbed_official 376:cb4d9db17537 159 Depending on the device voltage range, the maximum frequency should
mbed_official 376:cb4d9db17537 160 be adapted accordingly:
mbed_official 376:cb4d9db17537 161 ----------------------------------------------------------------
mbed_official 376:cb4d9db17537 162 | Wait states | HCLK clock frequency (MHz) |
mbed_official 376:cb4d9db17537 163 | |------------------------------------------------|
mbed_official 376:cb4d9db17537 164 | (Latency) | voltage range | voltage range |
mbed_official 376:cb4d9db17537 165 | | 1.65 V - 3.6 V | 2.0 V - 3.6 V |
mbed_official 376:cb4d9db17537 166 | |----------------|---------------|---------------|
mbed_official 376:cb4d9db17537 167 | | VCORE = 1.2 V | VCORE = 1.5 V | VCORE = 1.8 V |
mbed_official 376:cb4d9db17537 168 |-------------- |----------------|---------------|---------------|
mbed_official 376:cb4d9db17537 169 |0WS(1CPU cycle)|0 < HCLK <= 2 |0 < HCLK <= 8 |0 < HCLK <= 16 |
mbed_official 376:cb4d9db17537 170 |---------------|----------------|---------------|---------------|
mbed_official 376:cb4d9db17537 171 |1WS(2CPU cycle)|2 < HCLK <= 4 |8 < HCLK <= 16 |16 < HCLK <= 32|
mbed_official 376:cb4d9db17537 172 ----------------------------------------------------------------
mbed_official 376:cb4d9db17537 173 @endverbatim
mbed_official 376:cb4d9db17537 174 * @{
mbed_official 376:cb4d9db17537 175 */
mbed_official 376:cb4d9db17537 176
mbed_official 376:cb4d9db17537 177 /**
mbed_official 376:cb4d9db17537 178 * @brief Resets the RCC clock configuration to the default reset state.
mbed_official 376:cb4d9db17537 179 * @note The default reset state of the clock configuration is given below:
mbed_official 376:cb4d9db17537 180 * - MSI ON and used as system clock source (MSI range is not modified
mbed_official 376:cb4d9db17537 181 * - by this function, it keep the value configured by user application)
mbed_official 376:cb4d9db17537 182 * - HSI, HSE and PLL OFF
mbed_official 376:cb4d9db17537 183 * - AHB, APB1 and APB2 prescaler set to 1.
mbed_official 376:cb4d9db17537 184 * - CSS and MCO OFF
mbed_official 376:cb4d9db17537 185 * - All interrupts disabled
mbed_official 376:cb4d9db17537 186 * @note This function doesn't modify the configuration of the
mbed_official 376:cb4d9db17537 187 * @note -Peripheral clocks
mbed_official 376:cb4d9db17537 188 * @note -HSI48, LSI, LSE and RTC clocks
mbed_official 376:cb4d9db17537 189 * @param None
mbed_official 376:cb4d9db17537 190 * @retval None
mbed_official 376:cb4d9db17537 191 */
mbed_official 376:cb4d9db17537 192 void HAL_RCC_DeInit(void)
mbed_official 376:cb4d9db17537 193 {
mbed_official 376:cb4d9db17537 194 /* Set MSION bit */
mbed_official 376:cb4d9db17537 195 SET_BIT(RCC->CR, RCC_CR_MSION);
mbed_official 376:cb4d9db17537 196
mbed_official 376:cb4d9db17537 197 /* Reset HSION, HSEON, CSSON, PLLON */
mbed_official 376:cb4d9db17537 198 CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_HSION| RCC_CR_HSIKERON| RCC_CR_CSSHSEON | RCC_CR_PLLON);
mbed_official 376:cb4d9db17537 199
mbed_official 376:cb4d9db17537 200 /* Reset CFGR register */
mbed_official 376:cb4d9db17537 201 CLEAR_REG(RCC->CFGR);
mbed_official 376:cb4d9db17537 202
mbed_official 376:cb4d9db17537 203 /* Reset HSEBYP bit */
mbed_official 376:cb4d9db17537 204 CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP);
mbed_official 376:cb4d9db17537 205
mbed_official 376:cb4d9db17537 206 /* Disable all interrupts */
mbed_official 376:cb4d9db17537 207 CLEAR_REG(RCC->CIER);
mbed_official 376:cb4d9db17537 208 }
mbed_official 376:cb4d9db17537 209
mbed_official 376:cb4d9db17537 210 /**
mbed_official 376:cb4d9db17537 211 * @brief Initializes the RCC Oscillators according to the specified parameters in the
mbed_official 376:cb4d9db17537 212 * RCC_OscInitTypeDef.
mbed_official 376:cb4d9db17537 213 * @param RCC_OscInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official 376:cb4d9db17537 214 * contains the configuration information for the RCC Oscillators.
mbed_official 376:cb4d9db17537 215 * @note The PLL is not disabled when used as system clock.
mbed_official 376:cb4d9db17537 216 * @retval HAL status
mbed_official 376:cb4d9db17537 217 */
mbed_official 376:cb4d9db17537 218 HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
mbed_official 376:cb4d9db17537 219 {
mbed_official 376:cb4d9db17537 220
mbed_official 376:cb4d9db17537 221 uint32_t tickstart = 0;
mbed_official 376:cb4d9db17537 222
mbed_official 376:cb4d9db17537 223 /* Check the parameters */
mbed_official 376:cb4d9db17537 224 assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
mbed_official 376:cb4d9db17537 225 /*------------------------------- HSE Configuration ------------------------*/
mbed_official 376:cb4d9db17537 226 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
mbed_official 376:cb4d9db17537 227 {
mbed_official 376:cb4d9db17537 228 /* Check the parameters */
mbed_official 376:cb4d9db17537 229 assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
mbed_official 376:cb4d9db17537 230 /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
mbed_official 376:cb4d9db17537 231 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->CFGR & RCC_CFGR_PLLSRC) == RCC_CFGR_PLLSRC_HSE)))
mbed_official 376:cb4d9db17537 232 {
mbed_official 376:cb4d9db17537 233 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState != RCC_HSE_ON))
mbed_official 376:cb4d9db17537 234 {
mbed_official 376:cb4d9db17537 235 return HAL_ERROR;
mbed_official 376:cb4d9db17537 236 }
mbed_official 376:cb4d9db17537 237 }
mbed_official 376:cb4d9db17537 238 else
mbed_official 376:cb4d9db17537 239 {
mbed_official 376:cb4d9db17537 240 /* Reset HSEON and HSEBYP bits before configuring the HSE --------------*/
mbed_official 376:cb4d9db17537 241 __HAL_RCC_HSE_CONFIG(RCC_HSE_OFF);
mbed_official 376:cb4d9db17537 242
mbed_official 376:cb4d9db17537 243 /* Get timeout */
mbed_official 376:cb4d9db17537 244 tickstart = HAL_GetTick();
mbed_official 376:cb4d9db17537 245
mbed_official 376:cb4d9db17537 246 /* Wait till HSE is disabled */
mbed_official 376:cb4d9db17537 247 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
mbed_official 376:cb4d9db17537 248 {
mbed_official 376:cb4d9db17537 249 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 250 {
mbed_official 376:cb4d9db17537 251 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 252 }
mbed_official 376:cb4d9db17537 253 }
mbed_official 376:cb4d9db17537 254
mbed_official 376:cb4d9db17537 255 /* Set the new HSE configuration ---------------------------------------*/
mbed_official 376:cb4d9db17537 256 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
mbed_official 376:cb4d9db17537 257
mbed_official 376:cb4d9db17537 258 /* Check the HSE State */
mbed_official 376:cb4d9db17537 259 if((RCC_OscInitStruct->HSEState) == RCC_HSE_ON)
mbed_official 376:cb4d9db17537 260 {
mbed_official 376:cb4d9db17537 261 /* Get timeout */
mbed_official 376:cb4d9db17537 262 tickstart = HAL_GetTick();
mbed_official 376:cb4d9db17537 263
mbed_official 376:cb4d9db17537 264 /* Wait till HSE is ready */
mbed_official 376:cb4d9db17537 265 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official 376:cb4d9db17537 266 {
mbed_official 376:cb4d9db17537 267 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 268 {
mbed_official 376:cb4d9db17537 269 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 270 }
mbed_official 376:cb4d9db17537 271 }
mbed_official 376:cb4d9db17537 272 }
mbed_official 376:cb4d9db17537 273 else
mbed_official 376:cb4d9db17537 274 {
mbed_official 376:cb4d9db17537 275 /* Get timeout */
mbed_official 376:cb4d9db17537 276 tickstart = HAL_GetTick();
mbed_official 376:cb4d9db17537 277
mbed_official 376:cb4d9db17537 278 /* Wait till HSE is bypassed or disabled */
mbed_official 376:cb4d9db17537 279 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
mbed_official 376:cb4d9db17537 280 {
mbed_official 376:cb4d9db17537 281 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 282 {
mbed_official 376:cb4d9db17537 283 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 284 }
mbed_official 376:cb4d9db17537 285 }
mbed_official 376:cb4d9db17537 286 }
mbed_official 376:cb4d9db17537 287 }
mbed_official 376:cb4d9db17537 288 }
mbed_official 376:cb4d9db17537 289 /*----------------------------- HSI Configuration --------------------------*/
mbed_official 376:cb4d9db17537 290 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
mbed_official 376:cb4d9db17537 291 {
mbed_official 376:cb4d9db17537 292 /* Check the parameters */
mbed_official 376:cb4d9db17537 293 assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
mbed_official 376:cb4d9db17537 294 assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
mbed_official 376:cb4d9db17537 295
mbed_official 376:cb4d9db17537 296 /* When the HSI is used as system clock it will not disabled */
mbed_official 376:cb4d9db17537 297 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->CFGR & RCC_CFGR_PLLSRC) == RCC_CFGR_PLLSRC_HSI)))
mbed_official 376:cb4d9db17537 298 {
mbed_official 376:cb4d9db17537 299 /* When HSI is used as system clock it will not disabled */
mbed_official 376:cb4d9db17537 300 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
mbed_official 376:cb4d9db17537 301 {
mbed_official 376:cb4d9db17537 302 return HAL_ERROR;
mbed_official 376:cb4d9db17537 303 }
mbed_official 376:cb4d9db17537 304 /* Otherwise, just the calibration is allowed */
mbed_official 376:cb4d9db17537 305 else
mbed_official 376:cb4d9db17537 306 {
mbed_official 376:cb4d9db17537 307 /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
mbed_official 376:cb4d9db17537 308 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
mbed_official 376:cb4d9db17537 309 }
mbed_official 376:cb4d9db17537 310 }
mbed_official 376:cb4d9db17537 311 else
mbed_official 376:cb4d9db17537 312 {
mbed_official 376:cb4d9db17537 313 /* Check the HSI State */
mbed_official 376:cb4d9db17537 314 if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
mbed_official 376:cb4d9db17537 315 {
mbed_official 376:cb4d9db17537 316 /* Enable the Internal High Speed oscillator (HSI or HSIdiv4 */
mbed_official 376:cb4d9db17537 317 __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIState);
mbed_official 376:cb4d9db17537 318
mbed_official 376:cb4d9db17537 319 /* Get Start Tick*/
mbed_official 376:cb4d9db17537 320 tickstart = HAL_GetTick();
mbed_official 376:cb4d9db17537 321
mbed_official 376:cb4d9db17537 322 /* Wait till HSI is ready */
mbed_official 376:cb4d9db17537 323 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official 376:cb4d9db17537 324 {
mbed_official 376:cb4d9db17537 325 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 326 {
mbed_official 376:cb4d9db17537 327 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 328 }
mbed_official 376:cb4d9db17537 329 }
mbed_official 376:cb4d9db17537 330
mbed_official 376:cb4d9db17537 331 /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
mbed_official 376:cb4d9db17537 332 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
mbed_official 376:cb4d9db17537 333 }
mbed_official 376:cb4d9db17537 334 else
mbed_official 376:cb4d9db17537 335 {
mbed_official 376:cb4d9db17537 336 /* Disable the Internal High Speed oscillator (HSI). */
mbed_official 376:cb4d9db17537 337 __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIState);
mbed_official 376:cb4d9db17537 338
mbed_official 376:cb4d9db17537 339 /* Get Start Tick*/
mbed_official 376:cb4d9db17537 340 tickstart = HAL_GetTick();
mbed_official 376:cb4d9db17537 341
mbed_official 376:cb4d9db17537 342 /* Wait till HSI is ready */
mbed_official 376:cb4d9db17537 343 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
mbed_official 376:cb4d9db17537 344 {
mbed_official 376:cb4d9db17537 345 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 346 {
mbed_official 376:cb4d9db17537 347 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 348 }
mbed_official 376:cb4d9db17537 349 }
mbed_official 376:cb4d9db17537 350 }
mbed_official 376:cb4d9db17537 351 }
mbed_official 376:cb4d9db17537 352 }
mbed_official 376:cb4d9db17537 353 /*----------------------------- MSI Configuration --------------------------*/
mbed_official 376:cb4d9db17537 354 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_MSI) == RCC_OSCILLATORTYPE_MSI)
mbed_official 376:cb4d9db17537 355 {
mbed_official 376:cb4d9db17537 356 /* Check the parameters */
mbed_official 376:cb4d9db17537 357 assert_param(IS_RCC_MSI(RCC_OscInitStruct->MSIState));
mbed_official 376:cb4d9db17537 358 assert_param(IS_RCC_MSICALIBRATION_VALUE(RCC_OscInitStruct->MSICalibrationValue));
mbed_official 376:cb4d9db17537 359
mbed_official 376:cb4d9db17537 360
mbed_official 376:cb4d9db17537 361 /* When the MSI is used as system clock it will not disabled */
mbed_official 376:cb4d9db17537 362 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_MSI) )
mbed_official 376:cb4d9db17537 363 {
mbed_official 376:cb4d9db17537 364 if((__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != RESET) && (RCC_OscInitStruct->MSIState != RCC_MSI_ON))
mbed_official 376:cb4d9db17537 365 {
mbed_official 376:cb4d9db17537 366 return HAL_ERROR;
mbed_official 376:cb4d9db17537 367 }
mbed_official 376:cb4d9db17537 368
mbed_official 376:cb4d9db17537 369 /* Otherwise, just the calibration and MSI range change are allowed */
mbed_official 376:cb4d9db17537 370 else
mbed_official 376:cb4d9db17537 371 {
mbed_official 376:cb4d9db17537 372 /* Selects the Multiple Speed oscillator (MSI) clock range .*/
mbed_official 376:cb4d9db17537 373 __HAL_RCC_MSI_RANGE_CONFIG (RCC_OscInitStruct->MSIClockRange);
mbed_official 376:cb4d9db17537 374 /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/
mbed_official 376:cb4d9db17537 375 __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue);
mbed_official 376:cb4d9db17537 376 }
mbed_official 376:cb4d9db17537 377 }
mbed_official 376:cb4d9db17537 378 else
mbed_official 376:cb4d9db17537 379 {
mbed_official 376:cb4d9db17537 380 /* Check the MSI State */
mbed_official 376:cb4d9db17537 381 if((RCC_OscInitStruct->MSIState)!= RCC_MSI_OFF)
mbed_official 376:cb4d9db17537 382 {
mbed_official 376:cb4d9db17537 383 /* Enable the Internal High Speed oscillator (MSI). */
mbed_official 376:cb4d9db17537 384 __HAL_RCC_MSI_ENABLE();
mbed_official 376:cb4d9db17537 385
mbed_official 376:cb4d9db17537 386 /* Get timeout */
mbed_official 376:cb4d9db17537 387 tickstart = HAL_GetTick();
mbed_official 376:cb4d9db17537 388
mbed_official 376:cb4d9db17537 389 /* Wait till MSI is ready */
mbed_official 376:cb4d9db17537 390 while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == RESET)
mbed_official 376:cb4d9db17537 391 {
mbed_official 376:cb4d9db17537 392 if((HAL_GetTick() - tickstart ) > MSI_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 393 {
mbed_official 376:cb4d9db17537 394 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 395 }
mbed_official 376:cb4d9db17537 396 }
mbed_official 376:cb4d9db17537 397 /* Selects the Multiple Speed oscillator (MSI) clock range .*/
mbed_official 376:cb4d9db17537 398 __HAL_RCC_MSI_RANGE_CONFIG (RCC_OscInitStruct->MSIClockRange);
mbed_official 376:cb4d9db17537 399 /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/
mbed_official 376:cb4d9db17537 400 __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue);
mbed_official 376:cb4d9db17537 401
mbed_official 376:cb4d9db17537 402 }
mbed_official 376:cb4d9db17537 403 else
mbed_official 376:cb4d9db17537 404 {
mbed_official 376:cb4d9db17537 405 /* Disable the Internal High Speed oscillator (MSI). */
mbed_official 376:cb4d9db17537 406 __HAL_RCC_MSI_DISABLE();
mbed_official 376:cb4d9db17537 407
mbed_official 376:cb4d9db17537 408 /* Get timeout */
mbed_official 376:cb4d9db17537 409 tickstart = HAL_GetTick();
mbed_official 376:cb4d9db17537 410
mbed_official 376:cb4d9db17537 411 /* Wait till MSI is ready */
mbed_official 376:cb4d9db17537 412 while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != RESET)
mbed_official 376:cb4d9db17537 413 {
mbed_official 376:cb4d9db17537 414 if((HAL_GetTick() - tickstart ) > MSI_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 415 {
mbed_official 376:cb4d9db17537 416 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 417 }
mbed_official 376:cb4d9db17537 418 }
mbed_official 376:cb4d9db17537 419 }
mbed_official 376:cb4d9db17537 420 }
mbed_official 376:cb4d9db17537 421 }
mbed_official 376:cb4d9db17537 422 /*------------------------------ LSI Configuration -------------------------*/
mbed_official 376:cb4d9db17537 423 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
mbed_official 376:cb4d9db17537 424 {
mbed_official 376:cb4d9db17537 425 /* Check the parameters */
mbed_official 376:cb4d9db17537 426 assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
mbed_official 376:cb4d9db17537 427
mbed_official 376:cb4d9db17537 428 /* Check the LSI State */
mbed_official 376:cb4d9db17537 429 if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
mbed_official 376:cb4d9db17537 430 {
mbed_official 376:cb4d9db17537 431 /* Enable the Internal Low Speed oscillator (LSI). */
mbed_official 376:cb4d9db17537 432 __HAL_RCC_LSI_ENABLE();
mbed_official 376:cb4d9db17537 433
mbed_official 376:cb4d9db17537 434 /* Get timeout */
mbed_official 376:cb4d9db17537 435 tickstart = HAL_GetTick();
mbed_official 376:cb4d9db17537 436
mbed_official 376:cb4d9db17537 437 /* Wait till LSI is ready */
mbed_official 376:cb4d9db17537 438 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
mbed_official 376:cb4d9db17537 439 {
mbed_official 376:cb4d9db17537 440 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 441 {
mbed_official 376:cb4d9db17537 442 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 443 }
mbed_official 376:cb4d9db17537 444 }
mbed_official 376:cb4d9db17537 445 }
mbed_official 376:cb4d9db17537 446 else
mbed_official 376:cb4d9db17537 447 {
mbed_official 376:cb4d9db17537 448 /* Disable the Internal Low Speed oscillator (LSI). */
mbed_official 376:cb4d9db17537 449 __HAL_RCC_LSI_DISABLE();
mbed_official 376:cb4d9db17537 450
mbed_official 376:cb4d9db17537 451 /* Get timeout */
mbed_official 376:cb4d9db17537 452 tickstart = HAL_GetTick();
mbed_official 376:cb4d9db17537 453
mbed_official 376:cb4d9db17537 454 /* Wait till LSI is ready */
mbed_official 376:cb4d9db17537 455 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
mbed_official 376:cb4d9db17537 456 {
mbed_official 376:cb4d9db17537 457 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 458 {
mbed_official 376:cb4d9db17537 459 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 460 }
mbed_official 376:cb4d9db17537 461 }
mbed_official 376:cb4d9db17537 462 }
mbed_official 376:cb4d9db17537 463 }
mbed_official 376:cb4d9db17537 464
mbed_official 376:cb4d9db17537 465
mbed_official 376:cb4d9db17537 466 /*------------------------------ HSI48 Configuration -------------------------*/
mbed_official 376:cb4d9db17537 467 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48)
mbed_official 376:cb4d9db17537 468 {
mbed_official 376:cb4d9db17537 469 /* Check the parameters */
mbed_official 376:cb4d9db17537 470 assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State));
mbed_official 376:cb4d9db17537 471
mbed_official 376:cb4d9db17537 472 /* Check the HSI48 State */
mbed_official 376:cb4d9db17537 473 if((RCC_OscInitStruct->HSI48State)!= RCC_HSI48_OFF)
mbed_official 376:cb4d9db17537 474 {
mbed_official 376:cb4d9db17537 475 /* Enable the Internal Low Speed oscillator (HSI48). */
mbed_official 376:cb4d9db17537 476 __HAL_RCC_HSI48_ENABLE();
mbed_official 376:cb4d9db17537 477
mbed_official 376:cb4d9db17537 478 /* Get timeout */
mbed_official 376:cb4d9db17537 479 tickstart = HAL_GetTick();
mbed_official 376:cb4d9db17537 480
mbed_official 376:cb4d9db17537 481 /* Wait till HSI48 is ready */
mbed_official 376:cb4d9db17537 482 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET)
mbed_official 376:cb4d9db17537 483 {
mbed_official 376:cb4d9db17537 484 if((HAL_GetTick() - tickstart ) > HSI48_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 485 {
mbed_official 376:cb4d9db17537 486 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 487 }
mbed_official 376:cb4d9db17537 488 }
mbed_official 376:cb4d9db17537 489 }
mbed_official 376:cb4d9db17537 490 else
mbed_official 376:cb4d9db17537 491 {
mbed_official 376:cb4d9db17537 492 /* Disable the Internal Low Speed oscillator (HSI48). */
mbed_official 376:cb4d9db17537 493 __HAL_RCC_HSI48_DISABLE();
mbed_official 376:cb4d9db17537 494
mbed_official 376:cb4d9db17537 495 /* Get timeout */
mbed_official 376:cb4d9db17537 496 tickstart = HAL_GetTick();
mbed_official 376:cb4d9db17537 497
mbed_official 376:cb4d9db17537 498 /* Wait till HSI48 is ready */
mbed_official 376:cb4d9db17537 499 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET)
mbed_official 376:cb4d9db17537 500 {
mbed_official 376:cb4d9db17537 501 if((HAL_GetTick() - tickstart ) > HSI48_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 502 {
mbed_official 376:cb4d9db17537 503 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 504 }
mbed_official 376:cb4d9db17537 505 }
mbed_official 376:cb4d9db17537 506 }
mbed_official 376:cb4d9db17537 507 }
mbed_official 376:cb4d9db17537 508 /*------------------------------ LSE Configuration -------------------------*/
mbed_official 376:cb4d9db17537 509 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
mbed_official 376:cb4d9db17537 510 {
mbed_official 376:cb4d9db17537 511 /* Check the parameters */
mbed_official 376:cb4d9db17537 512 assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
mbed_official 376:cb4d9db17537 513
mbed_official 376:cb4d9db17537 514 /* Enable Power Clock*/
mbed_official 376:cb4d9db17537 515 __PWR_CLK_ENABLE();
mbed_official 376:cb4d9db17537 516
mbed_official 376:cb4d9db17537 517 /* Enable write access to Backup domain */
mbed_official 376:cb4d9db17537 518 PWR->CR |= PWR_CR_DBP;
mbed_official 376:cb4d9db17537 519
mbed_official 376:cb4d9db17537 520 /* Wait for Backup domain Write protection disable */
mbed_official 376:cb4d9db17537 521 tickstart = HAL_GetTick();
mbed_official 376:cb4d9db17537 522
mbed_official 376:cb4d9db17537 523 while((PWR->CR & PWR_CR_DBP) == RESET)
mbed_official 376:cb4d9db17537 524 {
mbed_official 376:cb4d9db17537 525 if((HAL_GetTick() - tickstart ) > DBP_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 526 {
mbed_official 376:cb4d9db17537 527 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 528 }
mbed_official 376:cb4d9db17537 529 }
mbed_official 376:cb4d9db17537 530
mbed_official 376:cb4d9db17537 531 /* Reset LSEON and LSEBYP bits before configuring the LSE ----------------*/
mbed_official 376:cb4d9db17537 532 __HAL_RCC_LSE_CONFIG(RCC_LSE_OFF);
mbed_official 376:cb4d9db17537 533
mbed_official 376:cb4d9db17537 534 /* Get timeout */
mbed_official 376:cb4d9db17537 535 tickstart = HAL_GetTick();
mbed_official 376:cb4d9db17537 536
mbed_official 376:cb4d9db17537 537 /* Wait till LSE is ready */
mbed_official 376:cb4d9db17537 538 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
mbed_official 376:cb4d9db17537 539 {
mbed_official 376:cb4d9db17537 540 if((HAL_GetTick() - tickstart ) > LSE_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 541 {
mbed_official 376:cb4d9db17537 542 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 543 }
mbed_official 376:cb4d9db17537 544 }
mbed_official 376:cb4d9db17537 545
mbed_official 376:cb4d9db17537 546 /* Set the new LSE configuration -----------------------------------------*/
mbed_official 376:cb4d9db17537 547 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
mbed_official 376:cb4d9db17537 548 /* Check the LSE State */
mbed_official 376:cb4d9db17537 549 if((RCC_OscInitStruct->LSEState) == RCC_LSE_ON)
mbed_official 376:cb4d9db17537 550 {
mbed_official 376:cb4d9db17537 551 /* Get timeout */
mbed_official 376:cb4d9db17537 552 tickstart = HAL_GetTick();
mbed_official 376:cb4d9db17537 553
mbed_official 376:cb4d9db17537 554 /* Wait till LSE is ready */
mbed_official 376:cb4d9db17537 555 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
mbed_official 376:cb4d9db17537 556 {
mbed_official 376:cb4d9db17537 557 if((HAL_GetTick() - tickstart ) > LSE_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 558 {
mbed_official 376:cb4d9db17537 559 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 560 }
mbed_official 376:cb4d9db17537 561 }
mbed_official 376:cb4d9db17537 562 }
mbed_official 376:cb4d9db17537 563 else
mbed_official 376:cb4d9db17537 564 {
mbed_official 376:cb4d9db17537 565 /* Get timeout */
mbed_official 376:cb4d9db17537 566 tickstart = HAL_GetTick();
mbed_official 376:cb4d9db17537 567
mbed_official 376:cb4d9db17537 568 /* Wait till LSE is ready */
mbed_official 376:cb4d9db17537 569 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
mbed_official 376:cb4d9db17537 570 {
mbed_official 376:cb4d9db17537 571 if((HAL_GetTick() - tickstart ) > LSE_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 572 {
mbed_official 376:cb4d9db17537 573 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 574 }
mbed_official 376:cb4d9db17537 575 }
mbed_official 376:cb4d9db17537 576 }
mbed_official 376:cb4d9db17537 577 }
mbed_official 376:cb4d9db17537 578 /*-------------------------------- PLL Configuration -----------------------*/
mbed_official 376:cb4d9db17537 579 /* Check the parameters */
mbed_official 376:cb4d9db17537 580 assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
mbed_official 376:cb4d9db17537 581 if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
mbed_official 376:cb4d9db17537 582 {
mbed_official 376:cb4d9db17537 583 /* Check if the PLL is used as system clock or not */
mbed_official 376:cb4d9db17537 584 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
mbed_official 376:cb4d9db17537 585 {
mbed_official 376:cb4d9db17537 586 if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
mbed_official 376:cb4d9db17537 587 {
mbed_official 376:cb4d9db17537 588 /* Check the parameters */
mbed_official 376:cb4d9db17537 589 assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
mbed_official 376:cb4d9db17537 590 assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
mbed_official 376:cb4d9db17537 591 assert_param(IS_RCC_PLL_DIV(RCC_OscInitStruct->PLL.PLLDIV));
mbed_official 376:cb4d9db17537 592
mbed_official 376:cb4d9db17537 593
mbed_official 376:cb4d9db17537 594 /* Disable the main PLL. */
mbed_official 376:cb4d9db17537 595 __HAL_RCC_PLL_DISABLE();
mbed_official 376:cb4d9db17537 596
mbed_official 376:cb4d9db17537 597 /* Get timeout */
mbed_official 376:cb4d9db17537 598 tickstart = HAL_GetTick();
mbed_official 376:cb4d9db17537 599
mbed_official 376:cb4d9db17537 600 /* Wait till PLL is ready */
mbed_official 376:cb4d9db17537 601 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
mbed_official 376:cb4d9db17537 602 {
mbed_official 376:cb4d9db17537 603 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 604 {
mbed_official 376:cb4d9db17537 605 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 606 }
mbed_official 376:cb4d9db17537 607 }
mbed_official 376:cb4d9db17537 608
mbed_official 376:cb4d9db17537 609 /* Configure the main PLL clock source, multiplication and division factors. */
mbed_official 376:cb4d9db17537 610 __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
mbed_official 376:cb4d9db17537 611 RCC_OscInitStruct->PLL.PLLMUL,
mbed_official 376:cb4d9db17537 612 RCC_OscInitStruct->PLL.PLLDIV);
mbed_official 376:cb4d9db17537 613 /* Enable the main PLL. */
mbed_official 376:cb4d9db17537 614 __HAL_RCC_PLL_ENABLE();
mbed_official 376:cb4d9db17537 615
mbed_official 376:cb4d9db17537 616 /* Get timeout */
mbed_official 376:cb4d9db17537 617 tickstart = HAL_GetTick();
mbed_official 376:cb4d9db17537 618
mbed_official 376:cb4d9db17537 619 /* Wait till PLL is ready */
mbed_official 376:cb4d9db17537 620 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official 376:cb4d9db17537 621 {
mbed_official 376:cb4d9db17537 622 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 623 {
mbed_official 376:cb4d9db17537 624 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 625 }
mbed_official 376:cb4d9db17537 626 }
mbed_official 376:cb4d9db17537 627 }
mbed_official 376:cb4d9db17537 628 else
mbed_official 376:cb4d9db17537 629 {
mbed_official 376:cb4d9db17537 630 /* Disable the main PLL. */
mbed_official 376:cb4d9db17537 631 __HAL_RCC_PLL_DISABLE();
mbed_official 376:cb4d9db17537 632 /* Get timeout */
mbed_official 376:cb4d9db17537 633 tickstart = HAL_GetTick();
mbed_official 376:cb4d9db17537 634
mbed_official 376:cb4d9db17537 635 /* Wait till PLL is ready */
mbed_official 376:cb4d9db17537 636 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
mbed_official 376:cb4d9db17537 637 {
mbed_official 376:cb4d9db17537 638 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 639 {
mbed_official 376:cb4d9db17537 640 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 641 }
mbed_official 376:cb4d9db17537 642 }
mbed_official 376:cb4d9db17537 643 }
mbed_official 376:cb4d9db17537 644 }
mbed_official 376:cb4d9db17537 645 else
mbed_official 376:cb4d9db17537 646 {
mbed_official 376:cb4d9db17537 647 return HAL_ERROR;
mbed_official 376:cb4d9db17537 648 }
mbed_official 376:cb4d9db17537 649 }
mbed_official 376:cb4d9db17537 650 return HAL_OK;
mbed_official 376:cb4d9db17537 651 }
mbed_official 376:cb4d9db17537 652
mbed_official 376:cb4d9db17537 653 /**
mbed_official 376:cb4d9db17537 654 * @brief Initializes the CPU, AHB and APB busses clocks according to the specified
mbed_official 376:cb4d9db17537 655 * parameters in the RCC_ClkInitStruct.
mbed_official 376:cb4d9db17537 656 * @param RCC_ClkInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official 376:cb4d9db17537 657 * contains the configuration information for the RCC peripheral.
mbed_official 376:cb4d9db17537 658 * @param FLatency: FLASH Latency, this parameter depends on System Clock Frequency
mbed_official 376:cb4d9db17537 659 *
mbed_official 376:cb4d9db17537 660 * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
mbed_official 376:cb4d9db17537 661 * and updated by HAL_RCC_GetHCLKFreq() function called within this function
mbed_official 376:cb4d9db17537 662 *
mbed_official 376:cb4d9db17537 663 * @note The MSI is used (enabled by hardware) as system clock source after
mbed_official 376:cb4d9db17537 664 * startup from Reset, wake-up from STOP and STANDBY mode, or in case
mbed_official 376:cb4d9db17537 665 * of failure of the HSE used directly or indirectly as system clock
mbed_official 376:cb4d9db17537 666 * (if the Clock Security System CSS is enabled).
mbed_official 376:cb4d9db17537 667 *
mbed_official 376:cb4d9db17537 668 * @note A switch from one clock source to another occurs only if the target
mbed_official 376:cb4d9db17537 669 * clock source is ready (clock stable after startup delay or PLL locked).
mbed_official 376:cb4d9db17537 670 * If a clock source which is not yet ready is selected, the switch will
mbed_official 376:cb4d9db17537 671 * occur when the clock source will be ready.
mbed_official 376:cb4d9db17537 672 * @retval None
mbed_official 376:cb4d9db17537 673 */
mbed_official 376:cb4d9db17537 674 HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
mbed_official 376:cb4d9db17537 675 {
mbed_official 376:cb4d9db17537 676
mbed_official 376:cb4d9db17537 677 uint32_t tickstart = 0;
mbed_official 376:cb4d9db17537 678
mbed_official 376:cb4d9db17537 679 /* Check the parameters */
mbed_official 376:cb4d9db17537 680 assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType));
mbed_official 376:cb4d9db17537 681 assert_param(IS_FLASH_LATENCY(FLatency));
mbed_official 376:cb4d9db17537 682
mbed_official 376:cb4d9db17537 683 /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
mbed_official 376:cb4d9db17537 684 must be correctly programmed according to the frequency of the CPU clock
mbed_official 376:cb4d9db17537 685 (HCLK) and the supply voltage of the device. */
mbed_official 376:cb4d9db17537 686
mbed_official 376:cb4d9db17537 687 /* Increasing the CPU frequency */
mbed_official 376:cb4d9db17537 688 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
mbed_official 376:cb4d9db17537 689 {
mbed_official 376:cb4d9db17537 690 /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
mbed_official 376:cb4d9db17537 691 __HAL_FLASH_SET_LATENCY(FLatency);
mbed_official 376:cb4d9db17537 692
mbed_official 376:cb4d9db17537 693 /* Check that the new number of wait states is taken into account to access the Flash
mbed_official 376:cb4d9db17537 694 memory by reading the FLASH_ACR register */
mbed_official 376:cb4d9db17537 695 if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
mbed_official 376:cb4d9db17537 696 {
mbed_official 376:cb4d9db17537 697 return HAL_ERROR;
mbed_official 376:cb4d9db17537 698 }
mbed_official 376:cb4d9db17537 699
mbed_official 376:cb4d9db17537 700 /*-------------------------- HCLK Configuration --------------------------*/
mbed_official 376:cb4d9db17537 701 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
mbed_official 376:cb4d9db17537 702 {
mbed_official 376:cb4d9db17537 703 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
mbed_official 376:cb4d9db17537 704 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
mbed_official 376:cb4d9db17537 705 }
mbed_official 376:cb4d9db17537 706
mbed_official 376:cb4d9db17537 707 /*------------------------- SYSCLK Configuration ---------------------------*/
mbed_official 376:cb4d9db17537 708 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
mbed_official 376:cb4d9db17537 709 {
mbed_official 376:cb4d9db17537 710 assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
mbed_official 376:cb4d9db17537 711
mbed_official 376:cb4d9db17537 712 /* HSE is selected as System Clock Source */
mbed_official 376:cb4d9db17537 713 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 376:cb4d9db17537 714 {
mbed_official 376:cb4d9db17537 715 /* Check the HSE ready flag */
mbed_official 376:cb4d9db17537 716 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official 376:cb4d9db17537 717 {
mbed_official 376:cb4d9db17537 718 return HAL_ERROR;
mbed_official 376:cb4d9db17537 719 }
mbed_official 376:cb4d9db17537 720 }
mbed_official 376:cb4d9db17537 721
mbed_official 376:cb4d9db17537 722 /* MSI is selected as System Clock Source */
mbed_official 376:cb4d9db17537 723 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_MSI)
mbed_official 376:cb4d9db17537 724 {
mbed_official 376:cb4d9db17537 725 /* Check the MSI ready flag */
mbed_official 376:cb4d9db17537 726 if(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == RESET)
mbed_official 376:cb4d9db17537 727 {
mbed_official 376:cb4d9db17537 728 return HAL_ERROR;
mbed_official 376:cb4d9db17537 729 }
mbed_official 376:cb4d9db17537 730 }
mbed_official 376:cb4d9db17537 731 /* PLL is selected as System Clock Source */
mbed_official 376:cb4d9db17537 732 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official 376:cb4d9db17537 733 {
mbed_official 376:cb4d9db17537 734 /* Check the PLL ready flag */
mbed_official 376:cb4d9db17537 735 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official 376:cb4d9db17537 736 {
mbed_official 376:cb4d9db17537 737 return HAL_ERROR;
mbed_official 376:cb4d9db17537 738 }
mbed_official 376:cb4d9db17537 739 }
mbed_official 376:cb4d9db17537 740 /* HSI is selected as System Clock Source */
mbed_official 376:cb4d9db17537 741 else
mbed_official 376:cb4d9db17537 742 {
mbed_official 376:cb4d9db17537 743 /* Check the HSI ready flag */
mbed_official 376:cb4d9db17537 744 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official 376:cb4d9db17537 745 {
mbed_official 376:cb4d9db17537 746 return HAL_ERROR;
mbed_official 376:cb4d9db17537 747 }
mbed_official 376:cb4d9db17537 748 }
mbed_official 376:cb4d9db17537 749 MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource);
mbed_official 376:cb4d9db17537 750
mbed_official 376:cb4d9db17537 751 /* Get timeout */
mbed_official 376:cb4d9db17537 752 tickstart = HAL_GetTick();
mbed_official 376:cb4d9db17537 753
mbed_official 376:cb4d9db17537 754 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 376:cb4d9db17537 755 {
mbed_official 376:cb4d9db17537 756 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_HSE)
mbed_official 376:cb4d9db17537 757 {
mbed_official 376:cb4d9db17537 758 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 759 {
mbed_official 376:cb4d9db17537 760 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 761 }
mbed_official 376:cb4d9db17537 762 }
mbed_official 376:cb4d9db17537 763 }
mbed_official 376:cb4d9db17537 764 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official 376:cb4d9db17537 765 {
mbed_official 376:cb4d9db17537 766 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
mbed_official 376:cb4d9db17537 767 {
mbed_official 376:cb4d9db17537 768 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 769 {
mbed_official 376:cb4d9db17537 770 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 771 }
mbed_official 376:cb4d9db17537 772 }
mbed_official 376:cb4d9db17537 773 }
mbed_official 376:cb4d9db17537 774 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_MSI)
mbed_official 376:cb4d9db17537 775 {
mbed_official 376:cb4d9db17537 776 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_MSI)
mbed_official 376:cb4d9db17537 777 {
mbed_official 376:cb4d9db17537 778 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 779 {
mbed_official 376:cb4d9db17537 780 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 781 }
mbed_official 376:cb4d9db17537 782 }
mbed_official 376:cb4d9db17537 783 }
mbed_official 376:cb4d9db17537 784 else
mbed_official 376:cb4d9db17537 785 {
mbed_official 376:cb4d9db17537 786 while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_HSI)
mbed_official 376:cb4d9db17537 787 {
mbed_official 376:cb4d9db17537 788 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 789 {
mbed_official 376:cb4d9db17537 790 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 791 }
mbed_official 376:cb4d9db17537 792 }
mbed_official 376:cb4d9db17537 793 }
mbed_official 376:cb4d9db17537 794 }
mbed_official 376:cb4d9db17537 795 }
mbed_official 376:cb4d9db17537 796 /* Decreasing the CPU frequency */
mbed_official 376:cb4d9db17537 797 else
mbed_official 376:cb4d9db17537 798 {
mbed_official 376:cb4d9db17537 799 /*-------------------------- HCLK Configuration --------------------------*/
mbed_official 376:cb4d9db17537 800 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
mbed_official 376:cb4d9db17537 801 {
mbed_official 376:cb4d9db17537 802 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
mbed_official 376:cb4d9db17537 803 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
mbed_official 376:cb4d9db17537 804 }
mbed_official 376:cb4d9db17537 805
mbed_official 376:cb4d9db17537 806 /*------------------------- SYSCLK Configuration -------------------------*/
mbed_official 376:cb4d9db17537 807 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
mbed_official 376:cb4d9db17537 808 {
mbed_official 376:cb4d9db17537 809 assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
mbed_official 376:cb4d9db17537 810
mbed_official 376:cb4d9db17537 811 /* HSE is selected as System Clock Source */
mbed_official 376:cb4d9db17537 812 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 376:cb4d9db17537 813 {
mbed_official 376:cb4d9db17537 814 /* Check the HSE ready flag */
mbed_official 376:cb4d9db17537 815 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official 376:cb4d9db17537 816 {
mbed_official 376:cb4d9db17537 817 return HAL_ERROR;
mbed_official 376:cb4d9db17537 818 }
mbed_official 376:cb4d9db17537 819 }
mbed_official 376:cb4d9db17537 820
mbed_official 376:cb4d9db17537 821 /* MSI is selected as System Clock Source */
mbed_official 376:cb4d9db17537 822 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_MSI)
mbed_official 376:cb4d9db17537 823 {
mbed_official 376:cb4d9db17537 824 /* Check the MSI ready flag */
mbed_official 376:cb4d9db17537 825 if(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == RESET)
mbed_official 376:cb4d9db17537 826 {
mbed_official 376:cb4d9db17537 827 return HAL_ERROR;
mbed_official 376:cb4d9db17537 828 }
mbed_official 376:cb4d9db17537 829 }
mbed_official 376:cb4d9db17537 830 /* PLL is selected as System Clock Source */
mbed_official 376:cb4d9db17537 831 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official 376:cb4d9db17537 832 {
mbed_official 376:cb4d9db17537 833 /* Check the PLL ready flag */
mbed_official 376:cb4d9db17537 834 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official 376:cb4d9db17537 835 {
mbed_official 376:cb4d9db17537 836 return HAL_ERROR;
mbed_official 376:cb4d9db17537 837 }
mbed_official 376:cb4d9db17537 838 }
mbed_official 376:cb4d9db17537 839 /* HSI is selected as System Clock Source */
mbed_official 376:cb4d9db17537 840 else
mbed_official 376:cb4d9db17537 841 {
mbed_official 376:cb4d9db17537 842 /* Check the HSI ready flag */
mbed_official 376:cb4d9db17537 843 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official 376:cb4d9db17537 844 {
mbed_official 376:cb4d9db17537 845 return HAL_ERROR;
mbed_official 376:cb4d9db17537 846 }
mbed_official 376:cb4d9db17537 847 }
mbed_official 376:cb4d9db17537 848 MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource);
mbed_official 376:cb4d9db17537 849
mbed_official 376:cb4d9db17537 850 /* Get timeout */
mbed_official 376:cb4d9db17537 851 tickstart = HAL_GetTick();
mbed_official 376:cb4d9db17537 852
mbed_official 376:cb4d9db17537 853 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 376:cb4d9db17537 854 {
mbed_official 376:cb4d9db17537 855 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_HSE)
mbed_official 376:cb4d9db17537 856 {
mbed_official 376:cb4d9db17537 857 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 858 {
mbed_official 376:cb4d9db17537 859 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 860 }
mbed_official 376:cb4d9db17537 861 }
mbed_official 376:cb4d9db17537 862 }
mbed_official 376:cb4d9db17537 863 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official 376:cb4d9db17537 864 {
mbed_official 376:cb4d9db17537 865 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
mbed_official 376:cb4d9db17537 866 {
mbed_official 376:cb4d9db17537 867 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 868 {
mbed_official 376:cb4d9db17537 869 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 870 }
mbed_official 376:cb4d9db17537 871 }
mbed_official 376:cb4d9db17537 872 }
mbed_official 376:cb4d9db17537 873 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_MSI)
mbed_official 376:cb4d9db17537 874 {
mbed_official 376:cb4d9db17537 875 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_MSI)
mbed_official 376:cb4d9db17537 876 {
mbed_official 376:cb4d9db17537 877 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 878 {
mbed_official 376:cb4d9db17537 879 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 880 }
mbed_official 376:cb4d9db17537 881 }
mbed_official 376:cb4d9db17537 882 }
mbed_official 376:cb4d9db17537 883 else
mbed_official 376:cb4d9db17537 884 {
mbed_official 376:cb4d9db17537 885 while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_HSI)
mbed_official 376:cb4d9db17537 886 {
mbed_official 376:cb4d9db17537 887 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 376:cb4d9db17537 888 {
mbed_official 376:cb4d9db17537 889 return HAL_TIMEOUT;
mbed_official 376:cb4d9db17537 890 }
mbed_official 376:cb4d9db17537 891 }
mbed_official 376:cb4d9db17537 892 }
mbed_official 376:cb4d9db17537 893 }
mbed_official 376:cb4d9db17537 894
mbed_official 376:cb4d9db17537 895 /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
mbed_official 376:cb4d9db17537 896 __HAL_FLASH_SET_LATENCY(FLatency);
mbed_official 376:cb4d9db17537 897
mbed_official 376:cb4d9db17537 898 /* Check that the new number of wait states is taken into account to access the Flash
mbed_official 376:cb4d9db17537 899 memory by reading the FLASH_ACR register */
mbed_official 376:cb4d9db17537 900 if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
mbed_official 376:cb4d9db17537 901 {
mbed_official 376:cb4d9db17537 902 return HAL_ERROR;
mbed_official 376:cb4d9db17537 903 }
mbed_official 376:cb4d9db17537 904 }
mbed_official 376:cb4d9db17537 905
mbed_official 376:cb4d9db17537 906 /*-------------------------- PCLK1 Configuration ---------------------------*/
mbed_official 376:cb4d9db17537 907 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
mbed_official 376:cb4d9db17537 908 {
mbed_official 376:cb4d9db17537 909 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
mbed_official 376:cb4d9db17537 910 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
mbed_official 376:cb4d9db17537 911 }
mbed_official 376:cb4d9db17537 912
mbed_official 376:cb4d9db17537 913 /*-------------------------- PCLK2 Configuration ---------------------------*/
mbed_official 376:cb4d9db17537 914 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
mbed_official 376:cb4d9db17537 915 {
mbed_official 376:cb4d9db17537 916 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
mbed_official 376:cb4d9db17537 917 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
mbed_official 376:cb4d9db17537 918 }
mbed_official 376:cb4d9db17537 919
mbed_official 376:cb4d9db17537 920 /* Configure the source of time base considering new system clocks settings*/
mbed_official 376:cb4d9db17537 921 HAL_InitTick (TICK_INT_PRIORITY);
mbed_official 376:cb4d9db17537 922
mbed_official 376:cb4d9db17537 923 return HAL_OK;
mbed_official 376:cb4d9db17537 924 }
mbed_official 376:cb4d9db17537 925
mbed_official 376:cb4d9db17537 926 /**
mbed_official 376:cb4d9db17537 927 * @}
mbed_official 376:cb4d9db17537 928 */
mbed_official 376:cb4d9db17537 929
mbed_official 376:cb4d9db17537 930 /** @defgroup RCC_Group2 Peripheral Control functions
mbed_official 376:cb4d9db17537 931 * @brief RCC clocks control functions
mbed_official 376:cb4d9db17537 932 *
mbed_official 376:cb4d9db17537 933 @verbatim
mbed_official 376:cb4d9db17537 934 ===============================================================================
mbed_official 376:cb4d9db17537 935 ##### Peripheral Control functions #####
mbed_official 376:cb4d9db17537 936 ===============================================================================
mbed_official 376:cb4d9db17537 937 [..]
mbed_official 376:cb4d9db17537 938 This subsection provides a set of functions allowing to control the RCC Clocks
mbed_official 376:cb4d9db17537 939 frequencies.
mbed_official 376:cb4d9db17537 940
mbed_official 376:cb4d9db17537 941 @endverbatim
mbed_official 376:cb4d9db17537 942 * @{
mbed_official 376:cb4d9db17537 943 */
mbed_official 376:cb4d9db17537 944
mbed_official 376:cb4d9db17537 945 /**
mbed_official 376:cb4d9db17537 946 * @brief Selects the clock source to output on MCO pin.
mbed_official 376:cb4d9db17537 947 * @note MCO pin should be configured in alternate function mode.
mbed_official 376:cb4d9db17537 948 * @param RCC_MCOx: specifies the output direction for the clock source.
mbed_official 376:cb4d9db17537 949 * For STM32L0xx family this parameter can have only one value:
mbed_official 376:cb4d9db17537 950 * @arg RCC_MCO1: Clock source to output on MCO pin(PA8).
mbed_official 376:cb4d9db17537 951 * @arg RCC_MCO2: Clock source to output on MCO pin(PA9).
mbed_official 376:cb4d9db17537 952 * @param RCC_MCOSource: specifies the clock source to output.
mbed_official 376:cb4d9db17537 953 * This parameter can be one of the following values:
mbed_official 376:cb4d9db17537 954 * @arg RCC_MCO1SOURCE_NOCLOCK: No clock selected
mbed_official 376:cb4d9db17537 955 * @arg RCC_MCO1SOURCE_SYSCLK: System clock selected
mbed_official 376:cb4d9db17537 956 * @arg RCC_MCO1SOURCE_HSI: HSI oscillator clock selected
mbed_official 376:cb4d9db17537 957 * @arg RCC_MCO1SOURCE_MSI: MSI oscillator clock selected
mbed_official 376:cb4d9db17537 958 * @arg RCC_MCO1SOURCE_HSE: HSE oscillator clock selected
mbed_official 376:cb4d9db17537 959 * @arg RCC_MCO1SOURCE_PLLCLK: PLL clock selected
mbed_official 376:cb4d9db17537 960 * @arg RCC_MCO1SOURCE_LSI: LSI clock selected
mbed_official 376:cb4d9db17537 961 * @arg RCC_MCO1SOURCE_LSE: LSE clock selected
mbed_official 376:cb4d9db17537 962 * @arg RCC_MCO1SOURCE_HSI48: HSI48 clock selected
mbed_official 376:cb4d9db17537 963 * @param RCC_MCODIV: specifies the MCO DIV.
mbed_official 376:cb4d9db17537 964 * This parameter can be one of the following values:
mbed_official 376:cb4d9db17537 965 * @arg RCC_MCODIV_1: no division applied to MCO clock
mbed_official 376:cb4d9db17537 966 * @arg RCC_MCODIV_2: division by 2 applied to MCO clock
mbed_official 376:cb4d9db17537 967 * @arg RCC_MCODIV_4: division by 4 applied to MCO clock
mbed_official 376:cb4d9db17537 968 * @arg RCC_MCODIV_8: division by 8 applied to MCO clock
mbed_official 376:cb4d9db17537 969 * @arg RCC_MCODIV_16: division by 16 applied to MCO clock
mbed_official 376:cb4d9db17537 970 * @retval None
mbed_official 376:cb4d9db17537 971 */
mbed_official 376:cb4d9db17537 972 void HAL_RCC_MCOConfig( uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv)
mbed_official 376:cb4d9db17537 973 {
mbed_official 376:cb4d9db17537 974 GPIO_InitTypeDef GPIO_InitStruct;
mbed_official 376:cb4d9db17537 975 /* Check the parameters */
mbed_official 376:cb4d9db17537 976 assert_param(IS_RCC_MCO(RCC_MCOx));
mbed_official 376:cb4d9db17537 977 assert_param(IS_RCC_MCODIV(RCC_MCODiv));
mbed_official 376:cb4d9db17537 978 assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource));
mbed_official 376:cb4d9db17537 979
mbed_official 376:cb4d9db17537 980 /* MCO Clock Enable */
mbed_official 376:cb4d9db17537 981 __MCO1_CLK_ENABLE();
mbed_official 376:cb4d9db17537 982
mbed_official 376:cb4d9db17537 983 /* Configure the MCO1 pin in alternate function mode */
mbed_official 376:cb4d9db17537 984 if(RCC_MCOx == RCC_MCO1)
mbed_official 376:cb4d9db17537 985 {
mbed_official 376:cb4d9db17537 986 GPIO_InitStruct.Pin = MCO1_PIN;
mbed_official 376:cb4d9db17537 987 }
mbed_official 376:cb4d9db17537 988 else
mbed_official 376:cb4d9db17537 989 {
mbed_official 376:cb4d9db17537 990 GPIO_InitStruct.Pin = MCO2_PIN;
mbed_official 376:cb4d9db17537 991 }
mbed_official 376:cb4d9db17537 992 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
mbed_official 376:cb4d9db17537 993 GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
mbed_official 376:cb4d9db17537 994 GPIO_InitStruct.Pull = GPIO_NOPULL;
mbed_official 376:cb4d9db17537 995 GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
mbed_official 376:cb4d9db17537 996 HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct);
mbed_official 376:cb4d9db17537 997
mbed_official 376:cb4d9db17537 998 /* Mask MCO1 and MCO1PRE[2:0] bits then Select MCO1 clock source and prescaler */
mbed_official 376:cb4d9db17537 999 MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCOSEL | RCC_CFGR_MCO_PRE), ((RCC_MCOSource << 24 | RCC_MCODiv )));
mbed_official 376:cb4d9db17537 1000 }
mbed_official 376:cb4d9db17537 1001
mbed_official 376:cb4d9db17537 1002 /**
mbed_official 376:cb4d9db17537 1003 * @brief Enables the Clock Security System.
mbed_official 376:cb4d9db17537 1004 * @note If a failure is detected on the HSE oscillator clock, this oscillator
mbed_official 376:cb4d9db17537 1005 * is automatically disabled and an interrupt is generated to inform the
mbed_official 376:cb4d9db17537 1006 * software about the failure (Clock Security System Interrupt, CSSI),
mbed_official 376:cb4d9db17537 1007 * allowing the MCU to perform rescue operations. The CSSI is linked to
mbed_official 376:cb4d9db17537 1008 * the Cortex-M0+ NMI (Non-Maskable Interrupt) exception vector.
mbed_official 376:cb4d9db17537 1009 * @param None
mbed_official 376:cb4d9db17537 1010 * @retval None
mbed_official 376:cb4d9db17537 1011 */
mbed_official 376:cb4d9db17537 1012 void HAL_RCC_EnableCSS(void)
mbed_official 376:cb4d9db17537 1013 {
mbed_official 376:cb4d9db17537 1014 SET_BIT(RCC->CR, RCC_CR_CSSHSEON) ;
mbed_official 376:cb4d9db17537 1015 }
mbed_official 376:cb4d9db17537 1016
mbed_official 376:cb4d9db17537 1017
mbed_official 376:cb4d9db17537 1018 /**
mbed_official 376:cb4d9db17537 1019 * @brief Returns the SYSCLK frequency
mbed_official 376:cb4d9db17537 1020 *
mbed_official 376:cb4d9db17537 1021 * @note The system frequency computed by this function is not the real
mbed_official 376:cb4d9db17537 1022 * frequency in the chip. It is calculated based on the predefined
mbed_official 376:cb4d9db17537 1023 * constant and the selected clock source:
mbed_official 376:cb4d9db17537 1024 * @note If SYSCLK source is MSI, function returns values based on MSI
mbed_official 376:cb4d9db17537 1025 * Value as defined by the MSI range.
mbed_official 376:cb4d9db17537 1026 * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*)
mbed_official 376:cb4d9db17537 1027 * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(**)
mbed_official 376:cb4d9db17537 1028 * @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(**)
mbed_official 376:cb4d9db17537 1029 * or HSI_VALUE(*) multiplied/divided by the PLL factors.
mbed_official 376:cb4d9db17537 1030 * @note (*) HSI_VALUE is a constant defined in stm32l0xx_hal_conf.h file (default value
mbed_official 376:cb4d9db17537 1031 * 16 MHz) but the real value may vary depending on the variations
mbed_official 376:cb4d9db17537 1032 * in voltage and temperature.
mbed_official 376:cb4d9db17537 1033 * @note (**) HSE_VALUE is a constant defined in stm32l0xx_hal_conf.h file (default value
mbed_official 376:cb4d9db17537 1034 * 8 MHz), user has to ensure that HSE_VALUE is same as the real
mbed_official 376:cb4d9db17537 1035 * frequency of the crystal used. Otherwise, this function may
mbed_official 376:cb4d9db17537 1036 * have wrong result.
mbed_official 376:cb4d9db17537 1037 *
mbed_official 376:cb4d9db17537 1038 * @note The result of this function could be not correct when using fractional
mbed_official 376:cb4d9db17537 1039 * value for HSE crystal.
mbed_official 376:cb4d9db17537 1040 *
mbed_official 376:cb4d9db17537 1041 * @note This function can be used by the user application to compute the
mbed_official 376:cb4d9db17537 1042 * baudrate for the communication peripherals or configure other parameters.
mbed_official 376:cb4d9db17537 1043 *
mbed_official 376:cb4d9db17537 1044 * @note Each time SYSCLK changes, this function must be called to update the
mbed_official 376:cb4d9db17537 1045 * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
mbed_official 376:cb4d9db17537 1046 *
mbed_official 376:cb4d9db17537 1047 *
mbed_official 376:cb4d9db17537 1048 * @param None
mbed_official 376:cb4d9db17537 1049 * @retval SYSCLK frequency
mbed_official 376:cb4d9db17537 1050 */
mbed_official 376:cb4d9db17537 1051 uint32_t HAL_RCC_GetSysClockFreq(void)
mbed_official 376:cb4d9db17537 1052 {
mbed_official 376:cb4d9db17537 1053 uint32_t pllmul = 0, plldiv = 0, pllsource = 0, msirange = 0;
mbed_official 376:cb4d9db17537 1054 uint32_t sysclockfreq = 0;
mbed_official 376:cb4d9db17537 1055
mbed_official 376:cb4d9db17537 1056 /* Get SYSCLK source -------------------------------------------------------*/
mbed_official 376:cb4d9db17537 1057
mbed_official 376:cb4d9db17537 1058 /*MSI frequency range in HZ*/
mbed_official 376:cb4d9db17537 1059 msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;
mbed_official 376:cb4d9db17537 1060 msirange = MSIRangeTable[msirange];
mbed_official 376:cb4d9db17537 1061
mbed_official 376:cb4d9db17537 1062 switch (RCC->CFGR & RCC_CFGR_SWS)
mbed_official 376:cb4d9db17537 1063 {
mbed_official 376:cb4d9db17537 1064 case RCC_CFGR_SWS_MSI: /* MSI used as system clock */
mbed_official 376:cb4d9db17537 1065 {
mbed_official 376:cb4d9db17537 1066 sysclockfreq = msirange;
mbed_official 376:cb4d9db17537 1067 break;
mbed_official 376:cb4d9db17537 1068 }
mbed_official 376:cb4d9db17537 1069 case RCC_CFGR_SWS_HSI: /* HSI used as system clock */
mbed_official 376:cb4d9db17537 1070 {
mbed_official 376:cb4d9db17537 1071 if ((RCC->CR & RCC_CR_HSIDIVF) != 0)
mbed_official 376:cb4d9db17537 1072 {
mbed_official 376:cb4d9db17537 1073 sysclockfreq = (HSI_VALUE >> 2);
mbed_official 376:cb4d9db17537 1074 }
mbed_official 376:cb4d9db17537 1075 else
mbed_official 376:cb4d9db17537 1076 {
mbed_official 376:cb4d9db17537 1077 sysclockfreq = HSI_VALUE;
mbed_official 376:cb4d9db17537 1078 }
mbed_official 376:cb4d9db17537 1079 break;
mbed_official 376:cb4d9db17537 1080 }
mbed_official 376:cb4d9db17537 1081 case RCC_CFGR_SWS_HSE: /* HSE used as system clock */
mbed_official 376:cb4d9db17537 1082 {
mbed_official 376:cb4d9db17537 1083 sysclockfreq = HSE_VALUE;
mbed_official 376:cb4d9db17537 1084 break;
mbed_official 376:cb4d9db17537 1085 }
mbed_official 376:cb4d9db17537 1086 case RCC_CFGR_SWS_PLL: /* PLL used as system clock */
mbed_official 376:cb4d9db17537 1087 {
mbed_official 376:cb4d9db17537 1088 /* Get PLL clock source and multiplication factor ----------------------*/
mbed_official 376:cb4d9db17537 1089 pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
mbed_official 376:cb4d9db17537 1090 plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
mbed_official 376:cb4d9db17537 1091 pllmul = PLLMulTable[(pllmul >> 18)];
mbed_official 376:cb4d9db17537 1092 plldiv = (plldiv >> 22) + 1;
mbed_official 376:cb4d9db17537 1093
mbed_official 376:cb4d9db17537 1094 pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
mbed_official 376:cb4d9db17537 1095
mbed_official 376:cb4d9db17537 1096 if (pllsource == RCC_CFGR_PLLSRC_HSI)
mbed_official 376:cb4d9db17537 1097 {
mbed_official 376:cb4d9db17537 1098 /* HSI oscillator clock selected as PLL clock source */
mbed_official 376:cb4d9db17537 1099 sysclockfreq =(((HSI_VALUE) * pllmul) / plldiv);
mbed_official 376:cb4d9db17537 1100 }
mbed_official 376:cb4d9db17537 1101 else
mbed_official 376:cb4d9db17537 1102 {
mbed_official 376:cb4d9db17537 1103 /* HSE selected as PLL clock source */
mbed_official 376:cb4d9db17537 1104 sysclockfreq = (((HSE_VALUE) * pllmul) / plldiv);
mbed_official 376:cb4d9db17537 1105 }
mbed_official 376:cb4d9db17537 1106 break;
mbed_official 376:cb4d9db17537 1107 }
mbed_official 376:cb4d9db17537 1108 default: /* MSI used as system clock */
mbed_official 376:cb4d9db17537 1109 {
mbed_official 376:cb4d9db17537 1110 sysclockfreq = msirange;
mbed_official 376:cb4d9db17537 1111 break;
mbed_official 376:cb4d9db17537 1112 }
mbed_official 376:cb4d9db17537 1113 }
mbed_official 376:cb4d9db17537 1114 return sysclockfreq;
mbed_official 376:cb4d9db17537 1115 }
mbed_official 376:cb4d9db17537 1116
mbed_official 376:cb4d9db17537 1117 /**
mbed_official 376:cb4d9db17537 1118 * @brief Returns the HCLK frequency
mbed_official 376:cb4d9db17537 1119 * @note Each time HCLK changes, this function must be called to update the
mbed_official 376:cb4d9db17537 1120 * right HCLK value. Otherwise, any configuration based on this function will be incorrect.
mbed_official 376:cb4d9db17537 1121 *
mbed_official 376:cb4d9db17537 1122 * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
mbed_official 376:cb4d9db17537 1123 * and updated within this function
mbed_official 376:cb4d9db17537 1124 * @param None
mbed_official 376:cb4d9db17537 1125 * @retval HCLK frequency
mbed_official 376:cb4d9db17537 1126 */
mbed_official 376:cb4d9db17537 1127 uint32_t HAL_RCC_GetHCLKFreq(void)
mbed_official 376:cb4d9db17537 1128 {
mbed_official 376:cb4d9db17537 1129 SystemCoreClock = HAL_RCC_GetSysClockFreq() >> APBAHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
mbed_official 376:cb4d9db17537 1130
mbed_official 376:cb4d9db17537 1131 return (SystemCoreClock);
mbed_official 376:cb4d9db17537 1132
mbed_official 376:cb4d9db17537 1133 }
mbed_official 376:cb4d9db17537 1134
mbed_official 376:cb4d9db17537 1135 /**
mbed_official 376:cb4d9db17537 1136 * @brief Returns the PCLK1 frequency
mbed_official 376:cb4d9db17537 1137 * @note Each time PCLK1 changes, this function must be called to update the
mbed_official 376:cb4d9db17537 1138 * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
mbed_official 376:cb4d9db17537 1139 * @param None
mbed_official 376:cb4d9db17537 1140 * @retval PCLK1 frequency
mbed_official 376:cb4d9db17537 1141 */
mbed_official 376:cb4d9db17537 1142 uint32_t HAL_RCC_GetPCLK1Freq(void)
mbed_official 376:cb4d9db17537 1143 {
mbed_official 376:cb4d9db17537 1144
mbed_official 376:cb4d9db17537 1145 return ( HAL_RCC_GetHCLKFreq() >> APBAHBPrescTable[((RCC->CFGR & RCC_CFGR_PPRE1) >> 8)]);
mbed_official 376:cb4d9db17537 1146
mbed_official 376:cb4d9db17537 1147 }
mbed_official 376:cb4d9db17537 1148
mbed_official 376:cb4d9db17537 1149 /**
mbed_official 376:cb4d9db17537 1150 * @brief Returns the PCLK2 frequency
mbed_official 376:cb4d9db17537 1151 * @note Each time PCLK2 changes, this function must be called to update the
mbed_official 376:cb4d9db17537 1152 * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
mbed_official 376:cb4d9db17537 1153 * @param None
mbed_official 376:cb4d9db17537 1154 * @retval PCLK2 frequency
mbed_official 376:cb4d9db17537 1155 */
mbed_official 376:cb4d9db17537 1156 uint32_t HAL_RCC_GetPCLK2Freq(void)
mbed_official 376:cb4d9db17537 1157 {
mbed_official 376:cb4d9db17537 1158
mbed_official 376:cb4d9db17537 1159 return ( HAL_RCC_GetHCLKFreq() >> APBAHBPrescTable[((RCC->CFGR & RCC_CFGR_PPRE2) >> 11)]);
mbed_official 376:cb4d9db17537 1160
mbed_official 376:cb4d9db17537 1161 }
mbed_official 376:cb4d9db17537 1162
mbed_official 376:cb4d9db17537 1163 /**
mbed_official 376:cb4d9db17537 1164 * @brief Configures the RCC_OscInitStruct according to the internal
mbed_official 376:cb4d9db17537 1165 * RCC configuration registers.
mbed_official 376:cb4d9db17537 1166 * @param RCC_OscInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official 376:cb4d9db17537 1167 * will be configured.
mbed_official 376:cb4d9db17537 1168 * @retval None
mbed_official 376:cb4d9db17537 1169 */
mbed_official 376:cb4d9db17537 1170 void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
mbed_official 376:cb4d9db17537 1171 {
mbed_official 376:cb4d9db17537 1172 /* Set all possible values for the Oscillator type parameter ---------------*/
mbed_official 376:cb4d9db17537 1173 RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_MSI | RCC_OSCILLATORTYPE_HSI | \
mbed_official 376:cb4d9db17537 1174 RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI;
mbed_official 376:cb4d9db17537 1175
mbed_official 376:cb4d9db17537 1176 /* Get the HSE configuration -----------------------------------------------*/
mbed_official 376:cb4d9db17537 1177 if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP)
mbed_official 376:cb4d9db17537 1178 {
mbed_official 376:cb4d9db17537 1179 RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS;
mbed_official 376:cb4d9db17537 1180 }
mbed_official 376:cb4d9db17537 1181 else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON)
mbed_official 376:cb4d9db17537 1182 {
mbed_official 376:cb4d9db17537 1183 RCC_OscInitStruct->HSEState = RCC_HSE_ON;
mbed_official 376:cb4d9db17537 1184 }
mbed_official 376:cb4d9db17537 1185 else
mbed_official 376:cb4d9db17537 1186 {
mbed_official 376:cb4d9db17537 1187 RCC_OscInitStruct->HSEState = RCC_HSE_OFF;
mbed_official 376:cb4d9db17537 1188 }
mbed_official 376:cb4d9db17537 1189
mbed_official 376:cb4d9db17537 1190 /* Get the MSI configuration -----------------------------------------------*/
mbed_official 376:cb4d9db17537 1191 if((RCC->CR &RCC_CR_MSION) == RCC_CR_MSION)
mbed_official 376:cb4d9db17537 1192 {
mbed_official 376:cb4d9db17537 1193 RCC_OscInitStruct->MSIState = RCC_MSI_ON;
mbed_official 376:cb4d9db17537 1194 }
mbed_official 376:cb4d9db17537 1195 else
mbed_official 376:cb4d9db17537 1196 {
mbed_official 376:cb4d9db17537 1197 RCC_OscInitStruct->MSIState = RCC_MSI_OFF;
mbed_official 376:cb4d9db17537 1198 }
mbed_official 376:cb4d9db17537 1199
mbed_official 376:cb4d9db17537 1200 RCC_OscInitStruct->MSICalibrationValue = (uint32_t)((RCC->CR &RCC_ICSCR_MSITRIM) >> 24);
mbed_official 376:cb4d9db17537 1201 RCC_OscInitStruct->MSIClockRange = (uint32_t)((RCC->ICSCR &RCC_ICSCR_MSIRANGE) >> 13);
mbed_official 376:cb4d9db17537 1202
mbed_official 376:cb4d9db17537 1203 /* Get the HSI48 configuration -----------------------------------------------*/
mbed_official 376:cb4d9db17537 1204 if((RCC->CRRCR &RCC_CRRCR_HSI48ON) == RCC_CRRCR_HSI48ON)
mbed_official 376:cb4d9db17537 1205 {
mbed_official 376:cb4d9db17537 1206 RCC_OscInitStruct->HSI48State = RCC_HSI48_ON;
mbed_official 376:cb4d9db17537 1207 }
mbed_official 376:cb4d9db17537 1208 else
mbed_official 376:cb4d9db17537 1209 {
mbed_official 376:cb4d9db17537 1210 RCC_OscInitStruct->HSI48State = RCC_HSI48_OFF;
mbed_official 376:cb4d9db17537 1211 }
mbed_official 376:cb4d9db17537 1212
mbed_official 376:cb4d9db17537 1213 /* Get the HSI configuration -----------------------------------------------*/
mbed_official 376:cb4d9db17537 1214 if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION)
mbed_official 376:cb4d9db17537 1215 {
mbed_official 376:cb4d9db17537 1216 RCC_OscInitStruct->HSIState = RCC_HSI_ON;
mbed_official 376:cb4d9db17537 1217 }
mbed_official 376:cb4d9db17537 1218 else
mbed_official 376:cb4d9db17537 1219 {
mbed_official 376:cb4d9db17537 1220 RCC_OscInitStruct->HSIState = RCC_HSI_OFF;
mbed_official 376:cb4d9db17537 1221 }
mbed_official 376:cb4d9db17537 1222
mbed_official 376:cb4d9db17537 1223 RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->ICSCR &RCC_ICSCR_HSITRIM) >> 8);
mbed_official 376:cb4d9db17537 1224
mbed_official 376:cb4d9db17537 1225 /* Get the LSE configuration -----------------------------------------------*/
mbed_official 376:cb4d9db17537 1226 if((RCC->CSR &RCC_CSR_LSEBYP) == RCC_CSR_LSEBYP)
mbed_official 376:cb4d9db17537 1227 {
mbed_official 376:cb4d9db17537 1228 RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS;
mbed_official 376:cb4d9db17537 1229 }
mbed_official 376:cb4d9db17537 1230 else if((RCC->CSR &RCC_CSR_LSEON) == RCC_CSR_LSEON)
mbed_official 376:cb4d9db17537 1231 {
mbed_official 376:cb4d9db17537 1232 RCC_OscInitStruct->LSEState = RCC_LSE_ON;
mbed_official 376:cb4d9db17537 1233 }
mbed_official 376:cb4d9db17537 1234 else
mbed_official 376:cb4d9db17537 1235 {
mbed_official 376:cb4d9db17537 1236 RCC_OscInitStruct->LSEState = RCC_LSE_OFF;
mbed_official 376:cb4d9db17537 1237 }
mbed_official 376:cb4d9db17537 1238
mbed_official 376:cb4d9db17537 1239 /* Get the LSI configuration -----------------------------------------------*/
mbed_official 376:cb4d9db17537 1240 if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION)
mbed_official 376:cb4d9db17537 1241 {
mbed_official 376:cb4d9db17537 1242 RCC_OscInitStruct->LSIState = RCC_LSI_ON;
mbed_official 376:cb4d9db17537 1243 }
mbed_official 376:cb4d9db17537 1244 else
mbed_official 376:cb4d9db17537 1245 {
mbed_official 376:cb4d9db17537 1246 RCC_OscInitStruct->LSIState = RCC_LSI_OFF;
mbed_official 376:cb4d9db17537 1247 }
mbed_official 376:cb4d9db17537 1248
mbed_official 376:cb4d9db17537 1249 /* Get the PLL configuration -----------------------------------------------*/
mbed_official 376:cb4d9db17537 1250 if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON)
mbed_official 376:cb4d9db17537 1251 {
mbed_official 376:cb4d9db17537 1252 RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON;
mbed_official 376:cb4d9db17537 1253 }
mbed_official 376:cb4d9db17537 1254 else
mbed_official 376:cb4d9db17537 1255 {
mbed_official 376:cb4d9db17537 1256 RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF;
mbed_official 376:cb4d9db17537 1257 }
mbed_official 376:cb4d9db17537 1258 RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLSRC);
mbed_official 376:cb4d9db17537 1259 RCC_OscInitStruct->PLL.PLLMUL = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLMUL) >> 18;
mbed_official 376:cb4d9db17537 1260 RCC_OscInitStruct->PLL.PLLDIV = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLDIV) >> 22;
mbed_official 376:cb4d9db17537 1261
mbed_official 376:cb4d9db17537 1262 }
mbed_official 376:cb4d9db17537 1263
mbed_official 376:cb4d9db17537 1264 /**
mbed_official 376:cb4d9db17537 1265 * @brief Configures the RCC_ClkInitStruct according to the internal
mbed_official 376:cb4d9db17537 1266 * RCC configuration registers.
mbed_official 376:cb4d9db17537 1267 * @param RCC_OscInitStruct: pointer to an RCC_ClkInitTypeDef structure that
mbed_official 376:cb4d9db17537 1268 * will be configured.
mbed_official 376:cb4d9db17537 1269 * @param pFLatency: Pointer on the Flash Latency.
mbed_official 376:cb4d9db17537 1270 * @retval None
mbed_official 376:cb4d9db17537 1271 */
mbed_official 376:cb4d9db17537 1272 void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency)
mbed_official 376:cb4d9db17537 1273 {
mbed_official 376:cb4d9db17537 1274 /* Set all possible values for the Clock type parameter --------------------*/
mbed_official 376:cb4d9db17537 1275 RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
mbed_official 376:cb4d9db17537 1276
mbed_official 376:cb4d9db17537 1277 /* Get the SYSCLK configuration --------------------------------------------*/
mbed_official 376:cb4d9db17537 1278 RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
mbed_official 376:cb4d9db17537 1279
mbed_official 376:cb4d9db17537 1280 /* Get the HCLK configuration ----------------------------------------------*/
mbed_official 376:cb4d9db17537 1281 RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE);
mbed_official 376:cb4d9db17537 1282
mbed_official 376:cb4d9db17537 1283 /* Get the APB1 configuration ----------------------------------------------*/
mbed_official 376:cb4d9db17537 1284 RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1);
mbed_official 376:cb4d9db17537 1285
mbed_official 376:cb4d9db17537 1286 /* Get the APB2 configuration ----------------------------------------------*/
mbed_official 376:cb4d9db17537 1287 RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3);
mbed_official 376:cb4d9db17537 1288
mbed_official 376:cb4d9db17537 1289 /* Get the Flash Wait State (Latency) configuration ------------------------*/
mbed_official 376:cb4d9db17537 1290 *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
mbed_official 376:cb4d9db17537 1291 }
mbed_official 376:cb4d9db17537 1292
mbed_official 376:cb4d9db17537 1293 /**
mbed_official 376:cb4d9db17537 1294 * @brief This function handles the RCC CSS interrupt request.
mbed_official 376:cb4d9db17537 1295 * @note This API should be called under the NMI_Handler().
mbed_official 376:cb4d9db17537 1296 * @param None
mbed_official 376:cb4d9db17537 1297 * @retval None
mbed_official 376:cb4d9db17537 1298 */
mbed_official 376:cb4d9db17537 1299 void HAL_RCC_NMI_IRQHandler(void)
mbed_official 376:cb4d9db17537 1300 {
mbed_official 376:cb4d9db17537 1301 /* Check RCC CSSF flag */
mbed_official 376:cb4d9db17537 1302 if(__HAL_RCC_GET_IT(RCC_IT_CSS))
mbed_official 376:cb4d9db17537 1303 {
mbed_official 376:cb4d9db17537 1304 /* RCC Clock Security System interrupt user callback */
mbed_official 376:cb4d9db17537 1305 HAL_RCC_CCSCallback();
mbed_official 376:cb4d9db17537 1306
mbed_official 376:cb4d9db17537 1307 /* Clear RCC CSS pending bit */
mbed_official 376:cb4d9db17537 1308 __HAL_RCC_CLEAR_IT(RCC_IT_CSS);
mbed_official 376:cb4d9db17537 1309 }
mbed_official 376:cb4d9db17537 1310 }
mbed_official 376:cb4d9db17537 1311
mbed_official 376:cb4d9db17537 1312 /**
mbed_official 376:cb4d9db17537 1313 * @brief RCC Clock Security System interrupt callback
mbed_official 376:cb4d9db17537 1314 * @param none
mbed_official 376:cb4d9db17537 1315 * @retval none
mbed_official 376:cb4d9db17537 1316 */
mbed_official 376:cb4d9db17537 1317 __weak void HAL_RCC_CCSCallback(void)
mbed_official 376:cb4d9db17537 1318 {
mbed_official 376:cb4d9db17537 1319 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 376:cb4d9db17537 1320 the HAL_RCC_CCSCallback could be implemented in the user file
mbed_official 376:cb4d9db17537 1321 */
mbed_official 376:cb4d9db17537 1322 }
mbed_official 376:cb4d9db17537 1323
mbed_official 376:cb4d9db17537 1324 /**
mbed_official 376:cb4d9db17537 1325 * @}
mbed_official 376:cb4d9db17537 1326 */
mbed_official 376:cb4d9db17537 1327
mbed_official 376:cb4d9db17537 1328 /**
mbed_official 376:cb4d9db17537 1329 * @}
mbed_official 376:cb4d9db17537 1330 */
mbed_official 376:cb4d9db17537 1331
mbed_official 376:cb4d9db17537 1332 #endif /* HAL_RCC_MODULE_ENABLED */
mbed_official 376:cb4d9db17537 1333 /**
mbed_official 376:cb4d9db17537 1334 * @}
mbed_official 376:cb4d9db17537 1335 */
mbed_official 376:cb4d9db17537 1336
mbed_official 376:cb4d9db17537 1337 /**
mbed_official 376:cb4d9db17537 1338 * @}
mbed_official 376:cb4d9db17537 1339 */
mbed_official 376:cb4d9db17537 1340
mbed_official 376:cb4d9db17537 1341 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/