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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_dma.h@382:ee426a420dbb, 2014-11-03 (annotated)

Committer:
mbed_official
Date:
Mon Nov 03 10:45:07 2014 +0000
Revision:
382:ee426a420dbb
Parent:
targets/cmsis/TARGET_STM/TARGET_DISCO_L053C8/stm32l0xx_hal_dma.h@376:cb4d9db17537
Child:
489:119543c9f674
Synchronized with git revision d54467eb07f62efd9ccdf44f1ede7fe1c1b0cf83



Full URL: https://github.com/mbedmicro/mbed/commit/d54467eb07f62efd9ccdf44f1ede7fe1c1b0cf83/

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 376:cb4d9db17537 1 /**
mbed_official 376:cb4d9db17537 2 ******************************************************************************
mbed_official 376:cb4d9db17537 3 * @file stm32l0xx_hal_dma.h
mbed_official 376:cb4d9db17537 4 * @author MCD Application Team
mbed_official 376:cb4d9db17537 5 * @version V1.1.0
mbed_official 376:cb4d9db17537 6 * @date 18-June-2014
mbed_official 376:cb4d9db17537 7 * @brief Header file of DMA HAL module.
mbed_official 376:cb4d9db17537 8 ******************************************************************************
mbed_official 376:cb4d9db17537 9 * @attention
mbed_official 376:cb4d9db17537 10 *
mbed_official 376:cb4d9db17537 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 376:cb4d9db17537 12 *
mbed_official 376:cb4d9db17537 13 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 376:cb4d9db17537 14 * are permitted provided that the following conditions are met:
mbed_official 376:cb4d9db17537 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 376:cb4d9db17537 16 * this list of conditions and the following disclaimer.
mbed_official 376:cb4d9db17537 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 376:cb4d9db17537 18 * this list of conditions and the following disclaimer in the documentation
mbed_official 376:cb4d9db17537 19 * and/or other materials provided with the distribution.
mbed_official 376:cb4d9db17537 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 376:cb4d9db17537 21 * may be used to endorse or promote products derived from this software
mbed_official 376:cb4d9db17537 22 * without specific prior written permission.
mbed_official 376:cb4d9db17537 23 *
mbed_official 376:cb4d9db17537 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 376:cb4d9db17537 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 376:cb4d9db17537 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 376:cb4d9db17537 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 376:cb4d9db17537 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 376:cb4d9db17537 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 376:cb4d9db17537 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 376:cb4d9db17537 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 376:cb4d9db17537 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 376:cb4d9db17537 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 376:cb4d9db17537 34 *
mbed_official 376:cb4d9db17537 35 ******************************************************************************
mbed_official 376:cb4d9db17537 36 */
mbed_official 376:cb4d9db17537 37
mbed_official 376:cb4d9db17537 38 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 376:cb4d9db17537 39 #ifndef __STM32L0xx_HAL_DMA_H
mbed_official 376:cb4d9db17537 40 #define __STM32L0xx_HAL_DMA_H
mbed_official 376:cb4d9db17537 41
mbed_official 376:cb4d9db17537 42 #ifdef __cplusplus
mbed_official 376:cb4d9db17537 43 extern "C" {
mbed_official 376:cb4d9db17537 44 #endif
mbed_official 376:cb4d9db17537 45
mbed_official 376:cb4d9db17537 46 /* Includes ------------------------------------------------------------------*/
mbed_official 376:cb4d9db17537 47 #include "stm32l0xx_hal_def.h"
mbed_official 376:cb4d9db17537 48
mbed_official 376:cb4d9db17537 49 /** @addtogroup STM32L0xx_HAL_Driver
mbed_official 376:cb4d9db17537 50 * @{
mbed_official 376:cb4d9db17537 51 */
mbed_official 376:cb4d9db17537 52
mbed_official 376:cb4d9db17537 53 /** @addtogroup DMA
mbed_official 376:cb4d9db17537 54 * @{
mbed_official 376:cb4d9db17537 55 */
mbed_official 376:cb4d9db17537 56
mbed_official 376:cb4d9db17537 57 /* Exported types ------------------------------------------------------------*/
mbed_official 376:cb4d9db17537 58
mbed_official 376:cb4d9db17537 59 /**
mbed_official 376:cb4d9db17537 60 * @brief DMA Configuration Structure definition
mbed_official 376:cb4d9db17537 61 */
mbed_official 376:cb4d9db17537 62 typedef struct
mbed_official 376:cb4d9db17537 63 {
mbed_official 376:cb4d9db17537 64 uint32_t Request; /*!< Specifies the request selected for the specified channel.
mbed_official 376:cb4d9db17537 65 This parameter can be a value of @ref DMA_request */
mbed_official 376:cb4d9db17537 66
mbed_official 376:cb4d9db17537 67 uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral,
mbed_official 376:cb4d9db17537 68 from memory to memory or from peripheral to memory.
mbed_official 376:cb4d9db17537 69 This parameter can be a value of @ref DMA_Data_transfer_direction */
mbed_official 376:cb4d9db17537 70
mbed_official 376:cb4d9db17537 71 uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should be incremented or not.
mbed_official 376:cb4d9db17537 72 This parameter can be a value of @ref DMA_Peripheral_incremented_mode */
mbed_official 376:cb4d9db17537 73
mbed_official 376:cb4d9db17537 74 uint32_t MemInc; /*!< Specifies whether the memory address register should be incremented or not.
mbed_official 376:cb4d9db17537 75 This parameter can be a value of @ref DMA_Memory_incremented_mode */
mbed_official 376:cb4d9db17537 76
mbed_official 376:cb4d9db17537 77 uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width.
mbed_official 376:cb4d9db17537 78 This parameter can be a value of @ref DMA_Peripheral_data_size */
mbed_official 376:cb4d9db17537 79
mbed_official 376:cb4d9db17537 80 uint32_t MemDataAlignment; /*!< Specifies the Memory data width.
mbed_official 376:cb4d9db17537 81 This parameter can be a value of @ref DMA_Memory_data_size */
mbed_official 376:cb4d9db17537 82
mbed_official 376:cb4d9db17537 83 uint32_t Mode; /*!< Specifies the operation mode of the DMAy Channelx.
mbed_official 376:cb4d9db17537 84 This parameter can be a value of @ref DMA_mode
mbed_official 376:cb4d9db17537 85 @note The circular buffer mode cannot be used if the memory-to-memory
mbed_official 376:cb4d9db17537 86 data transfer is configured on the selected Channel */
mbed_official 376:cb4d9db17537 87
mbed_official 376:cb4d9db17537 88 uint32_t Priority; /*!< Specifies the software priority for the DMAy Channelx.
mbed_official 376:cb4d9db17537 89 This parameter can be a value of @ref DMA_Priority_level */
mbed_official 376:cb4d9db17537 90 } DMA_InitTypeDef;
mbed_official 376:cb4d9db17537 91
mbed_official 376:cb4d9db17537 92 /**
mbed_official 376:cb4d9db17537 93 * @brief DMA Configuration enumeration values definition
mbed_official 376:cb4d9db17537 94 */
mbed_official 376:cb4d9db17537 95 typedef enum
mbed_official 376:cb4d9db17537 96 {
mbed_official 376:cb4d9db17537 97 DMA_MODE = 0, /*!< Control related DMA mode Parameter in DMA_InitTypeDef */
mbed_official 376:cb4d9db17537 98 DMA_PRIORITY = 1, /*!< Control related priority level Parameter in DMA_InitTypeDef */
mbed_official 376:cb4d9db17537 99
mbed_official 376:cb4d9db17537 100 } DMA_ControlTypeDef;
mbed_official 376:cb4d9db17537 101
mbed_official 376:cb4d9db17537 102 /**
mbed_official 376:cb4d9db17537 103 * @brief HAL DMA State structures definition
mbed_official 376:cb4d9db17537 104 */
mbed_official 376:cb4d9db17537 105 typedef enum
mbed_official 376:cb4d9db17537 106 {
mbed_official 376:cb4d9db17537 107 HAL_DMA_STATE_RESET = 0x00, /*!< DMA not yet initialized or disabled */
mbed_official 376:cb4d9db17537 108 HAL_DMA_STATE_READY = 0x01, /*!< DMA process success and ready for use */
mbed_official 376:cb4d9db17537 109 HAL_DMA_STATE_BUSY = 0x02, /*!< DMA process is ongoing */
mbed_official 376:cb4d9db17537 110 HAL_DMA_STATE_TIMEOUT = 0x03, /*!< DMA timeout state */
mbed_official 376:cb4d9db17537 111 HAL_DMA_STATE_ERROR = 0x04, /*!< DMA error state */
mbed_official 376:cb4d9db17537 112 HAL_DMA_STATE_READY_HALF = 0x05, /*!< DMA Half process success */
mbed_official 376:cb4d9db17537 113 }HAL_DMA_StateTypeDef;
mbed_official 376:cb4d9db17537 114
mbed_official 376:cb4d9db17537 115 /**
mbed_official 376:cb4d9db17537 116 * @brief HAL DMA Error Code structure definition
mbed_official 376:cb4d9db17537 117 */
mbed_official 376:cb4d9db17537 118 typedef enum
mbed_official 376:cb4d9db17537 119 {
mbed_official 376:cb4d9db17537 120 HAL_DMA_FULL_TRANSFER = 0x00, /*!< Full transfer */
mbed_official 376:cb4d9db17537 121 HAL_DMA_HALF_TRANSFER = 0x01, /*!< Half Transfer */
mbed_official 376:cb4d9db17537 122
mbed_official 376:cb4d9db17537 123 }HAL_DMA_LevelCompleteTypeDef;
mbed_official 376:cb4d9db17537 124
mbed_official 376:cb4d9db17537 125
mbed_official 376:cb4d9db17537 126 /**
mbed_official 376:cb4d9db17537 127 * @brief DMA handle Structure definition
mbed_official 376:cb4d9db17537 128 */
mbed_official 376:cb4d9db17537 129 typedef struct __DMA_HandleTypeDef
mbed_official 376:cb4d9db17537 130 {
mbed_official 376:cb4d9db17537 131 DMA_Channel_TypeDef *Instance; /*!< Register base address */
mbed_official 376:cb4d9db17537 132
mbed_official 376:cb4d9db17537 133 DMA_InitTypeDef Init; /*!< DMA communication parameters */
mbed_official 376:cb4d9db17537 134
mbed_official 376:cb4d9db17537 135 HAL_LockTypeDef Lock; /*!< DMA locking object */
mbed_official 376:cb4d9db17537 136
mbed_official 376:cb4d9db17537 137 __IO HAL_DMA_StateTypeDef State; /*!< DMA transfer state */
mbed_official 376:cb4d9db17537 138
mbed_official 376:cb4d9db17537 139 void *Parent; /*!< Parent object state */
mbed_official 376:cb4d9db17537 140
mbed_official 376:cb4d9db17537 141 void (* XferCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */
mbed_official 376:cb4d9db17537 142
mbed_official 376:cb4d9db17537 143 void (* XferHalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */
mbed_official 376:cb4d9db17537 144
mbed_official 376:cb4d9db17537 145 void (* XferErrorCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */
mbed_official 376:cb4d9db17537 146
mbed_official 376:cb4d9db17537 147 __IO uint32_t ErrorCode; /*!< DMA Error code */
mbed_official 376:cb4d9db17537 148
mbed_official 376:cb4d9db17537 149 } DMA_HandleTypeDef;
mbed_official 376:cb4d9db17537 150
mbed_official 376:cb4d9db17537 151 /* Exported constants --------------------------------------------------------*/
mbed_official 376:cb4d9db17537 152
mbed_official 376:cb4d9db17537 153 /** @defgroup DMA_Exported_Constants
mbed_official 376:cb4d9db17537 154 * @{
mbed_official 376:cb4d9db17537 155 */
mbed_official 376:cb4d9db17537 156
mbed_official 376:cb4d9db17537 157 /** @defgroup DMA_Error_Code
mbed_official 376:cb4d9db17537 158 * @{
mbed_official 376:cb4d9db17537 159 */
mbed_official 376:cb4d9db17537 160 #define HAL_DMA_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
mbed_official 376:cb4d9db17537 161 #define HAL_DMA_ERROR_TE ((uint32_t)0x00000001) /*!< Transfer error */
mbed_official 376:cb4d9db17537 162 #define HAL_DMA_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
mbed_official 376:cb4d9db17537 163 /**
mbed_official 376:cb4d9db17537 164 * @}
mbed_official 376:cb4d9db17537 165 */
mbed_official 376:cb4d9db17537 166
mbed_official 376:cb4d9db17537 167 #define IS_DMA_ALL_PERIPH(PERIPH) (((PERIPH) == DMA1_Channel1) || \
mbed_official 376:cb4d9db17537 168 ((PERIPH) == DMA1_Channel2) || \
mbed_official 376:cb4d9db17537 169 ((PERIPH) == DMA1_Channel3) || \
mbed_official 376:cb4d9db17537 170 ((PERIPH) == DMA1_Channel4) || \
mbed_official 376:cb4d9db17537 171 ((PERIPH) == DMA1_Channel5) || \
mbed_official 376:cb4d9db17537 172 ((PERIPH) == DMA1_Channel6) || \
mbed_official 376:cb4d9db17537 173 ((PERIPH) == DMA1_Channel7))
mbed_official 376:cb4d9db17537 174
mbed_official 376:cb4d9db17537 175 #define IS_DMA_ALL_CONTROLLER(CONTROLLER) (((CONTROLLER) == DMA1))
mbed_official 376:cb4d9db17537 176
mbed_official 376:cb4d9db17537 177 /**
mbed_official 376:cb4d9db17537 178 * @}
mbed_official 376:cb4d9db17537 179 */
mbed_official 376:cb4d9db17537 180
mbed_official 376:cb4d9db17537 181 /** @defgroup DMA_request
mbed_official 376:cb4d9db17537 182 * @{
mbed_official 376:cb4d9db17537 183 */
mbed_official 376:cb4d9db17537 184 #define DMA_REQUEST_0 ((uint32_t)0x00000000)
mbed_official 376:cb4d9db17537 185 #define DMA_REQUEST_1 ((uint32_t)0x00000001)
mbed_official 376:cb4d9db17537 186 #define DMA_REQUEST_2 ((uint32_t)0x00000002)
mbed_official 376:cb4d9db17537 187 #define DMA_REQUEST_3 ((uint32_t)0x00000003)
mbed_official 376:cb4d9db17537 188 #define DMA_REQUEST_4 ((uint32_t)0x00000004)
mbed_official 376:cb4d9db17537 189 #define DMA_REQUEST_5 ((uint32_t)0x00000005)
mbed_official 376:cb4d9db17537 190 #define DMA_REQUEST_6 ((uint32_t)0x00000006)
mbed_official 376:cb4d9db17537 191 #define DMA_REQUEST_7 ((uint32_t)0x00000007)
mbed_official 376:cb4d9db17537 192 #define DMA_REQUEST_8 ((uint32_t)0x00000008)
mbed_official 376:cb4d9db17537 193 #define DMA_REQUEST_9 ((uint32_t)0x00000009)
mbed_official 376:cb4d9db17537 194 #define DMA_REQUEST_11 ((uint32_t)0x0000000B)
mbed_official 376:cb4d9db17537 195
mbed_official 376:cb4d9db17537 196 #define IS_DMA_ALL_REQUEST(REQUEST) (((REQUEST) == DMA_REQUEST_0) || \
mbed_official 376:cb4d9db17537 197 ((REQUEST) == DMA_REQUEST_1) || \
mbed_official 376:cb4d9db17537 198 ((REQUEST) == DMA_REQUEST_2) || \
mbed_official 376:cb4d9db17537 199 ((REQUEST) == DMA_REQUEST_3) || \
mbed_official 376:cb4d9db17537 200 ((REQUEST) == DMA_REQUEST_4) || \
mbed_official 376:cb4d9db17537 201 ((REQUEST) == DMA_REQUEST_5) || \
mbed_official 376:cb4d9db17537 202 ((REQUEST) == DMA_REQUEST_6) || \
mbed_official 376:cb4d9db17537 203 ((REQUEST) == DMA_REQUEST_7) || \
mbed_official 376:cb4d9db17537 204 ((REQUEST) == DMA_REQUEST_8) || \
mbed_official 376:cb4d9db17537 205 ((REQUEST) == DMA_REQUEST_9) || \
mbed_official 376:cb4d9db17537 206 ((REQUEST) == DMA_REQUEST_11))
mbed_official 376:cb4d9db17537 207 /**
mbed_official 376:cb4d9db17537 208 * @}
mbed_official 376:cb4d9db17537 209 */
mbed_official 376:cb4d9db17537 210
mbed_official 376:cb4d9db17537 211 /** @defgroup DMA_Data_transfer_direction
mbed_official 376:cb4d9db17537 212 * @{
mbed_official 376:cb4d9db17537 213 */
mbed_official 376:cb4d9db17537 214 #define DMA_PERIPH_TO_MEMORY ((uint32_t)0x00000000) /*!< Peripheral to memory direction */
mbed_official 376:cb4d9db17537 215 #define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_CCR_DIR) /*!< Memory to peripheral direction */
mbed_official 376:cb4d9db17537 216 #define DMA_MEMORY_TO_MEMORY ((uint32_t)(DMA_CCR_MEM2MEM)) /*!< Memory to memory direction */
mbed_official 376:cb4d9db17537 217
mbed_official 376:cb4d9db17537 218 #define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \
mbed_official 376:cb4d9db17537 219 ((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \
mbed_official 376:cb4d9db17537 220 ((DIRECTION) == DMA_MEMORY_TO_MEMORY))
mbed_official 376:cb4d9db17537 221 /**
mbed_official 376:cb4d9db17537 222 * @}
mbed_official 376:cb4d9db17537 223 */
mbed_official 376:cb4d9db17537 224
mbed_official 376:cb4d9db17537 225 /** @defgroup DMA_Data_buffer_size
mbed_official 376:cb4d9db17537 226 * @{
mbed_official 376:cb4d9db17537 227 */
mbed_official 376:cb4d9db17537 228 #define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))
mbed_official 376:cb4d9db17537 229 /**
mbed_official 376:cb4d9db17537 230 * @}
mbed_official 376:cb4d9db17537 231 */
mbed_official 376:cb4d9db17537 232
mbed_official 376:cb4d9db17537 233 /** @defgroup DMA_Peripheral_incremented_mode
mbed_official 376:cb4d9db17537 234 * @{
mbed_official 376:cb4d9db17537 235 */
mbed_official 376:cb4d9db17537 236 #define DMA_PINC_ENABLE ((uint32_t)DMA_CCR_PINC) /*!< Peripheral increment mode Enable */
mbed_official 376:cb4d9db17537 237 #define DMA_PINC_DISABLE ((uint32_t)0x00000000) /*!< Peripheral increment mode Disable */
mbed_official 376:cb4d9db17537 238
mbed_official 376:cb4d9db17537 239 #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \
mbed_official 376:cb4d9db17537 240 ((STATE) == DMA_PINC_DISABLE))
mbed_official 376:cb4d9db17537 241 /**
mbed_official 376:cb4d9db17537 242 * @}
mbed_official 376:cb4d9db17537 243 */
mbed_official 376:cb4d9db17537 244
mbed_official 376:cb4d9db17537 245 /** @defgroup DMA_Memory_incremented_mode
mbed_official 376:cb4d9db17537 246 * @{
mbed_official 376:cb4d9db17537 247 */
mbed_official 376:cb4d9db17537 248 #define DMA_MINC_ENABLE ((uint32_t)DMA_CCR_MINC) /*!< Memory increment mode Enable */
mbed_official 376:cb4d9db17537 249 #define DMA_MINC_DISABLE ((uint32_t)0x00000000) /*!< Memory increment mode Disable */
mbed_official 376:cb4d9db17537 250
mbed_official 376:cb4d9db17537 251 #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \
mbed_official 376:cb4d9db17537 252 ((STATE) == DMA_MINC_DISABLE))
mbed_official 376:cb4d9db17537 253 /**
mbed_official 376:cb4d9db17537 254 * @}
mbed_official 376:cb4d9db17537 255 */
mbed_official 376:cb4d9db17537 256
mbed_official 376:cb4d9db17537 257 /** @defgroup DMA_Peripheral_data_size
mbed_official 376:cb4d9db17537 258 * @{
mbed_official 376:cb4d9db17537 259 */
mbed_official 376:cb4d9db17537 260 #define DMA_PDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Peripheral data alignment : Byte */
mbed_official 376:cb4d9db17537 261 #define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_PSIZE_0) /*!< Peripheral data alignment : HalfWord */
mbed_official 376:cb4d9db17537 262 #define DMA_PDATAALIGN_WORD ((uint32_t)DMA_CCR_PSIZE_1) /*!< Peripheral data alignment : Word */
mbed_official 376:cb4d9db17537 263
mbed_official 376:cb4d9db17537 264 #define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \
mbed_official 376:cb4d9db17537 265 ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \
mbed_official 376:cb4d9db17537 266 ((SIZE) == DMA_PDATAALIGN_WORD))
mbed_official 376:cb4d9db17537 267 /**
mbed_official 376:cb4d9db17537 268 * @}
mbed_official 376:cb4d9db17537 269 */
mbed_official 376:cb4d9db17537 270
mbed_official 376:cb4d9db17537 271
mbed_official 376:cb4d9db17537 272 /** @defgroup DMA_Memory_data_size
mbed_official 376:cb4d9db17537 273 * @{
mbed_official 376:cb4d9db17537 274 */
mbed_official 376:cb4d9db17537 275 #define DMA_MDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Memory data alignment : Byte */
mbed_official 376:cb4d9db17537 276 #define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_MSIZE_0) /*!< Memory data alignment : HalfWord */
mbed_official 376:cb4d9db17537 277 #define DMA_MDATAALIGN_WORD ((uint32_t)DMA_CCR_MSIZE_1) /*!< Memory data alignment : Word */
mbed_official 376:cb4d9db17537 278
mbed_official 376:cb4d9db17537 279 #define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \
mbed_official 376:cb4d9db17537 280 ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \
mbed_official 376:cb4d9db17537 281 ((SIZE) == DMA_MDATAALIGN_WORD ))
mbed_official 376:cb4d9db17537 282 /**
mbed_official 376:cb4d9db17537 283 * @}
mbed_official 376:cb4d9db17537 284 */
mbed_official 376:cb4d9db17537 285
mbed_official 376:cb4d9db17537 286 /** @defgroup DMA_mode
mbed_official 376:cb4d9db17537 287 * @{
mbed_official 376:cb4d9db17537 288 */
mbed_official 376:cb4d9db17537 289 #define DMA_NORMAL ((uint32_t)0x00000000) /*!< Normal Mode */
mbed_official 376:cb4d9db17537 290 #define DMA_CIRCULAR ((uint32_t)DMA_CCR_CIRC) /*!< Circular Mode */
mbed_official 376:cb4d9db17537 291
mbed_official 376:cb4d9db17537 292 #define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \
mbed_official 376:cb4d9db17537 293 ((MODE) == DMA_CIRCULAR))
mbed_official 376:cb4d9db17537 294 /**
mbed_official 376:cb4d9db17537 295 * @}
mbed_official 376:cb4d9db17537 296 */
mbed_official 376:cb4d9db17537 297
mbed_official 376:cb4d9db17537 298 /** @defgroup DMA_Priority_level
mbed_official 376:cb4d9db17537 299 * @{
mbed_official 376:cb4d9db17537 300 */
mbed_official 376:cb4d9db17537 301 #define DMA_PRIORITY_LOW ((uint32_t)0x00000000) /*!< Priority level : Low */
mbed_official 376:cb4d9db17537 302 #define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_CCR_PL_0) /*!< Priority level : Medium */
mbed_official 376:cb4d9db17537 303 #define DMA_PRIORITY_HIGH ((uint32_t)DMA_CCR_PL_1) /*!< Priority level : High */
mbed_official 376:cb4d9db17537 304 #define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_CCR_PL) /*!< Priority level : Very_High */
mbed_official 376:cb4d9db17537 305
mbed_official 376:cb4d9db17537 306 #define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \
mbed_official 376:cb4d9db17537 307 ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \
mbed_official 376:cb4d9db17537 308 ((PRIORITY) == DMA_PRIORITY_HIGH) || \
mbed_official 376:cb4d9db17537 309 ((PRIORITY) == DMA_PRIORITY_VERY_HIGH))
mbed_official 376:cb4d9db17537 310 /**
mbed_official 376:cb4d9db17537 311 * @}
mbed_official 376:cb4d9db17537 312 */
mbed_official 376:cb4d9db17537 313
mbed_official 376:cb4d9db17537 314
mbed_official 376:cb4d9db17537 315 /** @defgroup DMA_interrupt_enable_definitions
mbed_official 376:cb4d9db17537 316 * @{
mbed_official 376:cb4d9db17537 317 */
mbed_official 376:cb4d9db17537 318
mbed_official 376:cb4d9db17537 319 #define DMA_IT_TC ((uint32_t)DMA_CCR_TCIE)
mbed_official 376:cb4d9db17537 320 #define DMA_IT_HT ((uint32_t)DMA_CCR_HTIE)
mbed_official 376:cb4d9db17537 321 #define DMA_IT_TE ((uint32_t)DMA_CCR_TEIE)
mbed_official 376:cb4d9db17537 322
mbed_official 376:cb4d9db17537 323 /**
mbed_official 376:cb4d9db17537 324 * @}
mbed_official 376:cb4d9db17537 325 */
mbed_official 376:cb4d9db17537 326
mbed_official 376:cb4d9db17537 327 /** @defgroup DMA_flag_definitions
mbed_official 376:cb4d9db17537 328 * @{
mbed_official 376:cb4d9db17537 329 */
mbed_official 376:cb4d9db17537 330
mbed_official 376:cb4d9db17537 331 #define DMA_FLAG_GL1 ((uint32_t)0x00000001)
mbed_official 376:cb4d9db17537 332 #define DMA_FLAG_TC1 ((uint32_t)0x00000002)
mbed_official 376:cb4d9db17537 333 #define DMA_FLAG_HT1 ((uint32_t)0x00000004)
mbed_official 376:cb4d9db17537 334 #define DMA_FLAG_TE1 ((uint32_t)0x00000008)
mbed_official 376:cb4d9db17537 335 #define DMA_FLAG_GL2 ((uint32_t)0x00000010)
mbed_official 376:cb4d9db17537 336 #define DMA_FLAG_TC2 ((uint32_t)0x00000020)
mbed_official 376:cb4d9db17537 337 #define DMA_FLAG_HT2 ((uint32_t)0x00000040)
mbed_official 376:cb4d9db17537 338 #define DMA_FLAG_TE2 ((uint32_t)0x00000080)
mbed_official 376:cb4d9db17537 339 #define DMA_FLAG_GL3 ((uint32_t)0x00000100)
mbed_official 376:cb4d9db17537 340 #define DMA_FLAG_TC3 ((uint32_t)0x00000200)
mbed_official 376:cb4d9db17537 341 #define DMA_FLAG_HT3 ((uint32_t)0x00000400)
mbed_official 376:cb4d9db17537 342 #define DMA_FLAG_TE3 ((uint32_t)0x00000800)
mbed_official 376:cb4d9db17537 343 #define DMA_FLAG_GL4 ((uint32_t)0x00001000)
mbed_official 376:cb4d9db17537 344 #define DMA_FLAG_TC4 ((uint32_t)0x00002000)
mbed_official 376:cb4d9db17537 345 #define DMA_FLAG_HT4 ((uint32_t)0x00004000)
mbed_official 376:cb4d9db17537 346 #define DMA_FLAG_TE4 ((uint32_t)0x00008000)
mbed_official 376:cb4d9db17537 347 #define DMA_FLAG_GL5 ((uint32_t)0x00010000)
mbed_official 376:cb4d9db17537 348 #define DMA_FLAG_TC5 ((uint32_t)0x00020000)
mbed_official 376:cb4d9db17537 349 #define DMA_FLAG_HT5 ((uint32_t)0x00040000)
mbed_official 376:cb4d9db17537 350 #define DMA_FLAG_TE5 ((uint32_t)0x00080000)
mbed_official 376:cb4d9db17537 351 #define DMA_FLAG_GL6 ((uint32_t)0x00100000)
mbed_official 376:cb4d9db17537 352 #define DMA_FLAG_TC6 ((uint32_t)0x00200000)
mbed_official 376:cb4d9db17537 353 #define DMA_FLAG_HT6 ((uint32_t)0x00400000)
mbed_official 376:cb4d9db17537 354 #define DMA_FLAG_TE6 ((uint32_t)0x00800000)
mbed_official 376:cb4d9db17537 355 #define DMA_FLAG_GL7 ((uint32_t)0x01000000)
mbed_official 376:cb4d9db17537 356 #define DMA_FLAG_TC7 ((uint32_t)0x02000000)
mbed_official 376:cb4d9db17537 357 #define DMA_FLAG_HT7 ((uint32_t)0x04000000)
mbed_official 376:cb4d9db17537 358 #define DMA_FLAG_TE7 ((uint32_t)0x08000000)
mbed_official 376:cb4d9db17537 359
mbed_official 376:cb4d9db17537 360
mbed_official 376:cb4d9db17537 361 /**
mbed_official 376:cb4d9db17537 362 * @}
mbed_official 376:cb4d9db17537 363 */
mbed_official 376:cb4d9db17537 364
mbed_official 376:cb4d9db17537 365 /* Exported macro ------------------------------------------------------------*/
mbed_official 376:cb4d9db17537 366
mbed_official 376:cb4d9db17537 367 /** @brief Reset DMA handle state
mbed_official 376:cb4d9db17537 368 * @param __HANDLE__: DMA handle
mbed_official 376:cb4d9db17537 369 * @retval None
mbed_official 376:cb4d9db17537 370 */
mbed_official 376:cb4d9db17537 371 #define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
mbed_official 376:cb4d9db17537 372
mbed_official 376:cb4d9db17537 373 /**
mbed_official 376:cb4d9db17537 374 * @brief Enable the specified DMA Channel.
mbed_official 376:cb4d9db17537 375 * @param __HANDLE__: DMA handle
mbed_official 376:cb4d9db17537 376 * @retval None.
mbed_official 376:cb4d9db17537 377 */
mbed_official 376:cb4d9db17537 378 #define __HAL_DMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR |= DMA_CCR_EN)
mbed_official 376:cb4d9db17537 379
mbed_official 376:cb4d9db17537 380 /**
mbed_official 376:cb4d9db17537 381 * @brief Disable the specified DMA Channel.
mbed_official 376:cb4d9db17537 382 * @param __HANDLE__: DMA handle
mbed_official 376:cb4d9db17537 383 * @retval None.
mbed_official 376:cb4d9db17537 384 */
mbed_official 376:cb4d9db17537 385 #define __HAL_DMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR &= ~DMA_CCR_EN)
mbed_official 376:cb4d9db17537 386
mbed_official 376:cb4d9db17537 387
mbed_official 376:cb4d9db17537 388 /* Interrupt & Flag management */
mbed_official 376:cb4d9db17537 389
mbed_official 376:cb4d9db17537 390 /**
mbed_official 376:cb4d9db17537 391 * @brief Returns the current DMA Channel transfer complete flag.
mbed_official 376:cb4d9db17537 392 * @param __HANDLE__: DMA handle
mbed_official 376:cb4d9db17537 393 * @retval The specified transfer complete flag index.
mbed_official 376:cb4d9db17537 394 */
mbed_official 376:cb4d9db17537 395
mbed_official 376:cb4d9db17537 396 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
mbed_official 376:cb4d9db17537 397 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
mbed_official 376:cb4d9db17537 398 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
mbed_official 376:cb4d9db17537 399 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
mbed_official 376:cb4d9db17537 400 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
mbed_official 376:cb4d9db17537 401 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
mbed_official 376:cb4d9db17537 402 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
mbed_official 376:cb4d9db17537 403 DMA_FLAG_TC7)
mbed_official 376:cb4d9db17537 404
mbed_official 376:cb4d9db17537 405 /**
mbed_official 376:cb4d9db17537 406 * @brief Returns the current DMA Channel half transfer complete flag.
mbed_official 376:cb4d9db17537 407 * @param __HANDLE__: DMA handle
mbed_official 376:cb4d9db17537 408 * @retval The specified half transfer complete flag index.
mbed_official 376:cb4d9db17537 409 */
mbed_official 376:cb4d9db17537 410 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
mbed_official 376:cb4d9db17537 411 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
mbed_official 376:cb4d9db17537 412 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
mbed_official 376:cb4d9db17537 413 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
mbed_official 376:cb4d9db17537 414 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
mbed_official 376:cb4d9db17537 415 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
mbed_official 376:cb4d9db17537 416 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
mbed_official 376:cb4d9db17537 417 DMA_FLAG_HT7)
mbed_official 376:cb4d9db17537 418
mbed_official 376:cb4d9db17537 419 /**
mbed_official 376:cb4d9db17537 420 * @brief Returns the current DMA Channel transfer error flag.
mbed_official 376:cb4d9db17537 421 * @param __HANDLE__: DMA handle
mbed_official 376:cb4d9db17537 422 * @retval The specified transfer error flag index.
mbed_official 376:cb4d9db17537 423 */
mbed_official 376:cb4d9db17537 424 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
mbed_official 376:cb4d9db17537 425 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
mbed_official 376:cb4d9db17537 426 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
mbed_official 376:cb4d9db17537 427 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
mbed_official 376:cb4d9db17537 428 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
mbed_official 376:cb4d9db17537 429 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
mbed_official 376:cb4d9db17537 430 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
mbed_official 376:cb4d9db17537 431 DMA_FLAG_TE7)
mbed_official 376:cb4d9db17537 432
mbed_official 376:cb4d9db17537 433 /**
mbed_official 376:cb4d9db17537 434 * @brief Returns the current DMA Channel Global interrupt flag.
mbed_official 376:cb4d9db17537 435 * @param __HANDLE__: DMA handle
mbed_official 376:cb4d9db17537 436 * @retval The specified transfer error flag index.
mbed_official 376:cb4d9db17537 437 */
mbed_official 376:cb4d9db17537 438 #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
mbed_official 376:cb4d9db17537 439 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_ISR_GIF1 :\
mbed_official 376:cb4d9db17537 440 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_ISR_GIF2 :\
mbed_official 376:cb4d9db17537 441 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_ISR_GIF3 :\
mbed_official 376:cb4d9db17537 442 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_ISR_GIF4 :\
mbed_official 376:cb4d9db17537 443 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_ISR_GIF5 :\
mbed_official 376:cb4d9db17537 444 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_ISR_GIF6 :\
mbed_official 376:cb4d9db17537 445 DMA_ISR_GIF7)
mbed_official 376:cb4d9db17537 446 /**
mbed_official 376:cb4d9db17537 447 * @brief Get the DMA Channel pending flags.
mbed_official 376:cb4d9db17537 448 * @param __HANDLE__: DMA handle
mbed_official 376:cb4d9db17537 449 * @param __FLAG__: Get the specified flag.
mbed_official 376:cb4d9db17537 450 * This parameter can be any combination of the following values:
mbed_official 376:cb4d9db17537 451 * @arg DMA_FLAG_TCIFx: Transfer complete flag
mbed_official 376:cb4d9db17537 452 * @arg DMA_FLAG_HTIFx: Half transfer complete flag
mbed_official 376:cb4d9db17537 453 * @arg DMA_FLAG_TEIFx: Transfer error flag
mbed_official 376:cb4d9db17537 454 * @arg DMA_ISR_GIFx: Global interrupt flag
mbed_official 376:cb4d9db17537 455 * Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Channel flag.
mbed_official 376:cb4d9db17537 456 * @retval The state of FLAG (SET or RESET).
mbed_official 376:cb4d9db17537 457 */
mbed_official 376:cb4d9db17537 458 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (DMA1->ISR & (__FLAG__))
mbed_official 376:cb4d9db17537 459
mbed_official 376:cb4d9db17537 460 /**
mbed_official 376:cb4d9db17537 461 * @brief Clears the DMA Channel pending flags.
mbed_official 376:cb4d9db17537 462 * @param __HANDLE__: DMA handle
mbed_official 376:cb4d9db17537 463 * @param __FLAG__: specifies the flag to clear.
mbed_official 376:cb4d9db17537 464 * This parameter can be any combination of the following values:
mbed_official 376:cb4d9db17537 465 * @arg DMA_FLAG_TCIFx: Transfer complete flag
mbed_official 376:cb4d9db17537 466 * @arg DMA_FLAG_HTIFx: Half transfer complete flag
mbed_official 376:cb4d9db17537 467 * @arg DMA_FLAG_TEIFx: Transfer error flag
mbed_official 376:cb4d9db17537 468 * @arg DMA_ISR_GIFx: Global interrupt flag
mbed_official 376:cb4d9db17537 469 * Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Channel flag.
mbed_official 376:cb4d9db17537 470 * @retval None
mbed_official 376:cb4d9db17537 471 */
mbed_official 376:cb4d9db17537 472 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
mbed_official 376:cb4d9db17537 473
mbed_official 376:cb4d9db17537 474 /**
mbed_official 376:cb4d9db17537 475 * @brief Enables the specified DMA Channel interrupts.
mbed_official 376:cb4d9db17537 476 * @param __HANDLE__: DMA handle
mbed_official 376:cb4d9db17537 477 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
mbed_official 376:cb4d9db17537 478 * This parameter can be any combination of the following values:
mbed_official 376:cb4d9db17537 479 * @arg DMA_IT_TC: Transfer complete interrupt mask
mbed_official 376:cb4d9db17537 480 * @arg DMA_IT_HT: Half transfer complete interrupt mask
mbed_official 376:cb4d9db17537 481 * @arg DMA_IT_TE: Transfer error interrupt mask
mbed_official 376:cb4d9db17537 482 * @retval None
mbed_official 376:cb4d9db17537 483 */
mbed_official 376:cb4d9db17537 484 #define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR |= (__INTERRUPT__))
mbed_official 376:cb4d9db17537 485
mbed_official 376:cb4d9db17537 486 /**
mbed_official 376:cb4d9db17537 487 * @brief Disables the specified DMA Channel interrupts.
mbed_official 376:cb4d9db17537 488 * @param __HANDLE__: DMA handle
mbed_official 376:cb4d9db17537 489 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
mbed_official 376:cb4d9db17537 490 * This parameter can be any combination of the following values:
mbed_official 376:cb4d9db17537 491 * @arg DMA_IT_TC: Transfer complete interrupt mask
mbed_official 376:cb4d9db17537 492 * @arg DMA_IT_HT: Half transfer complete interrupt mask
mbed_official 376:cb4d9db17537 493 * @arg DMA_IT_TE: Transfer error interrupt mask
mbed_official 376:cb4d9db17537 494 * @retval None
mbed_official 376:cb4d9db17537 495 */
mbed_official 376:cb4d9db17537 496 #define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR &= ~(__INTERRUPT__))
mbed_official 376:cb4d9db17537 497
mbed_official 376:cb4d9db17537 498 /**
mbed_official 376:cb4d9db17537 499 * @brief Checks whether the specified DMA Channel interrupt has occurred or not.
mbed_official 376:cb4d9db17537 500 * @param __HANDLE__: DMA handle
mbed_official 376:cb4d9db17537 501 * @param __INTERRUPT__: specifies the DMA interrupt source to check.
mbed_official 376:cb4d9db17537 502 * This parameter can be one of the following values:
mbed_official 376:cb4d9db17537 503 * @arg DMA_IT_TC: Transfer complete interrupt mask
mbed_official 376:cb4d9db17537 504 * @arg DMA_IT_HT: Half transfer complete interrupt mask
mbed_official 376:cb4d9db17537 505 * @arg DMA_IT_TE: Transfer error interrupt mask
mbed_official 376:cb4d9db17537 506 * @retval The state of DMA_IT (SET or RESET).
mbed_official 376:cb4d9db17537 507 */
mbed_official 376:cb4d9db17537 508 #define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CCR & (__INTERRUPT__)))
mbed_official 376:cb4d9db17537 509
mbed_official 376:cb4d9db17537 510
mbed_official 376:cb4d9db17537 511 /* Exported functions --------------------------------------------------------*/
mbed_official 376:cb4d9db17537 512
mbed_official 376:cb4d9db17537 513 /* Initialization and de-initialization functions *****************************/
mbed_official 376:cb4d9db17537 514 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma);
mbed_official 376:cb4d9db17537 515 HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma);
mbed_official 376:cb4d9db17537 516
mbed_official 376:cb4d9db17537 517 /* IO operation functions *****************************************************/
mbed_official 376:cb4d9db17537 518 HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
mbed_official 376:cb4d9db17537 519 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
mbed_official 376:cb4d9db17537 520 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
mbed_official 376:cb4d9db17537 521 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout);
mbed_official 376:cb4d9db17537 522 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
mbed_official 376:cb4d9db17537 523
mbed_official 376:cb4d9db17537 524 /* Peripheral State and Error functions ***************************************/
mbed_official 376:cb4d9db17537 525 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma);
mbed_official 376:cb4d9db17537 526 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
mbed_official 376:cb4d9db17537 527
mbed_official 376:cb4d9db17537 528 /**
mbed_official 376:cb4d9db17537 529 * @}
mbed_official 376:cb4d9db17537 530 */
mbed_official 376:cb4d9db17537 531
mbed_official 376:cb4d9db17537 532 /**
mbed_official 376:cb4d9db17537 533 * @}
mbed_official 376:cb4d9db17537 534 */
mbed_official 376:cb4d9db17537 535
mbed_official 376:cb4d9db17537 536 #ifdef __cplusplus
mbed_official 376:cb4d9db17537 537 }
mbed_official 376:cb4d9db17537 538 #endif
mbed_official 376:cb4d9db17537 539
mbed_official 376:cb4d9db17537 540 #endif /* __STM32L0xx_HAL_DMA_H */
mbed_official 376:cb4d9db17537 541
mbed_official 376:cb4d9db17537 542 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/