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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_qspi.c@573:ad23fe03a082, 2015-06-19 (annotated)

Committer:
mbed_official
Date:
Fri Jun 19 09:15:11 2015 +0100
Revision:
573:ad23fe03a082
Child:
610:813dcc80987e
Synchronized with git revision d47834cd4d729e5b36b4c1ad4650f8b8f6a9ab86



Full URL: https://github.com/mbedmicro/mbed/commit/d47834cd4d729e5b36b4c1ad4650f8b8f6a9ab86/



DISCO_F746NG - Add new target

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 573:ad23fe03a082 1 /**
mbed_official 573:ad23fe03a082 2 ******************************************************************************
mbed_official 573:ad23fe03a082 3 * @file stm32f7xx_hal_qspi.c
mbed_official 573:ad23fe03a082 4 * @author MCD Application Team
mbed_official 573:ad23fe03a082 5 * @version V1.0.0
mbed_official 573:ad23fe03a082 6 * @date 12-May-2015
mbed_official 573:ad23fe03a082 7 * @brief QSPI HAL module driver.
mbed_official 573:ad23fe03a082 8 *
mbed_official 573:ad23fe03a082 9 * This file provides firmware functions to manage the following
mbed_official 573:ad23fe03a082 10 * functionalities of the QuadSPI interface (QSPI).
mbed_official 573:ad23fe03a082 11 * + Initialization and de-initialization functions
mbed_official 573:ad23fe03a082 12 * + Indirect functional mode management
mbed_official 573:ad23fe03a082 13 * + Memory-mapped functional mode management
mbed_official 573:ad23fe03a082 14 * + Auto-polling functional mode management
mbed_official 573:ad23fe03a082 15 * + Interrupts and flags management
mbed_official 573:ad23fe03a082 16 * + DMA channel configuration for indirect functional mode
mbed_official 573:ad23fe03a082 17 * + Errors management and abort functionality
mbed_official 573:ad23fe03a082 18 *
mbed_official 573:ad23fe03a082 19 *
mbed_official 573:ad23fe03a082 20 @verbatim
mbed_official 573:ad23fe03a082 21 ===============================================================================
mbed_official 573:ad23fe03a082 22 ##### How to use this driver #####
mbed_official 573:ad23fe03a082 23 ===============================================================================
mbed_official 573:ad23fe03a082 24 [..]
mbed_official 573:ad23fe03a082 25 *** Initialization ***
mbed_official 573:ad23fe03a082 26 ======================
mbed_official 573:ad23fe03a082 27 [..]
mbed_official 573:ad23fe03a082 28 (#) As prerequisite, fill in the HAL_QSPI_MspInit() :
mbed_official 573:ad23fe03a082 29 (+) Enable QuadSPI clock interface with __HAL_RCC_QSPI_CLK_ENABLE().
mbed_official 573:ad23fe03a082 30 (+) Reset QuadSPI IP with __HAL_RCC_QSPI_FORCE_RESET() and __HAL_RCC_QSPI_RELEASE_RESET().
mbed_official 573:ad23fe03a082 31 (+) Enable the clocks for the QuadSPI GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE().
mbed_official 573:ad23fe03a082 32 (+) Configure these QuadSPI pins in alternate mode using HAL_GPIO_Init().
mbed_official 573:ad23fe03a082 33 (+) If interrupt mode is used, enable and configure QuadSPI global
mbed_official 573:ad23fe03a082 34 interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
mbed_official 573:ad23fe03a082 35 (+) If DMA mode is used, enable the clocks for the QuadSPI DMA channel
mbed_official 573:ad23fe03a082 36 with __HAL_RCC_DMAx_CLK_ENABLE(), configure DMA with HAL_DMA_Init(),
mbed_official 573:ad23fe03a082 37 link it with QuadSPI handle using __HAL_LINKDMA(), enable and configure
mbed_official 573:ad23fe03a082 38 DMA channel global interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
mbed_official 573:ad23fe03a082 39 (#) Configure the flash size, the clock prescaler, the fifo threshold, the
mbed_official 573:ad23fe03a082 40 clock mode, the sample shifting and the CS high time using the HAL_QSPI_Init() function.
mbed_official 573:ad23fe03a082 41
mbed_official 573:ad23fe03a082 42 *** Indirect functional mode ***
mbed_official 573:ad23fe03a082 43 ================================
mbed_official 573:ad23fe03a082 44 [..]
mbed_official 573:ad23fe03a082 45 (#) Configure the command sequence using the HAL_QSPI_Command() or HAL_QSPI_Command_IT()
mbed_official 573:ad23fe03a082 46 functions :
mbed_official 573:ad23fe03a082 47 (+) Instruction phase : the mode used and if present the instruction opcode.
mbed_official 573:ad23fe03a082 48 (+) Address phase : the mode used and if present the size and the address value.
mbed_official 573:ad23fe03a082 49 (+) Alternate-bytes phase : the mode used and if present the size and the alternate
mbed_official 573:ad23fe03a082 50 bytes values.
mbed_official 573:ad23fe03a082 51 (+) Dummy-cycles phase : the number of dummy cycles (mode used is same as data phase).
mbed_official 573:ad23fe03a082 52 (+) Data phase : the mode used and if present the number of bytes.
mbed_official 573:ad23fe03a082 53 (+) Double Data Rate (DDR) mode : the activation (or not) of this mode and the delay
mbed_official 573:ad23fe03a082 54 if activated.
mbed_official 573:ad23fe03a082 55 (+) Sending Instruction Only Once (SIOO) mode : the activation (or not) of this mode.
mbed_official 573:ad23fe03a082 56 (#) If no data is required for the command, it is sent directly to the memory :
mbed_official 573:ad23fe03a082 57 (+) In polling mode, the output of the function is done when the transfer is complete.
mbed_official 573:ad23fe03a082 58 (+) In interrupt mode, HAL_QSPI_CmdCpltCallback() will be called when the transfer is complete.
mbed_official 573:ad23fe03a082 59 (#) For the indirect write mode, use HAL_QSPI_Transmit(), HAL_QSPI_Transmit_DMA() or
mbed_official 573:ad23fe03a082 60 HAL_QSPI_Transmit_IT() after the command configuration :
mbed_official 573:ad23fe03a082 61 (+) In polling mode, the output of the function is done when the transfer is complete.
mbed_official 573:ad23fe03a082 62 (+) In interrupt mode, HAL_QSPI_FifoThresholdCallback() will be called when the fifo threshold
mbed_official 573:ad23fe03a082 63 is reached and HAL_QSPI_TxCpltCallback() will be called when the transfer is complete.
mbed_official 573:ad23fe03a082 64 (+) In DMA mode, HAL_QSPI_TxHalfCpltCallback() will be called at the half transfer and
mbed_official 573:ad23fe03a082 65 HAL_QSPI_TxCpltCallback() will be called when the transfer is complete.
mbed_official 573:ad23fe03a082 66 (#) For the indirect read mode, use HAL_QSPI_Receive(), HAL_QSPI_Receive_DMA() or
mbed_official 573:ad23fe03a082 67 HAL_QSPI_Receive_IT() after the command configuration :
mbed_official 573:ad23fe03a082 68 (+) In polling mode, the output of the function is done when the transfer is complete.
mbed_official 573:ad23fe03a082 69 (+) In interrupt mode, HAL_QSPI_FifoThresholdCallback() will be called when the fifo threshold
mbed_official 573:ad23fe03a082 70 is reached and HAL_QSPI_RxCpltCallback() will be called when the transfer is complete.
mbed_official 573:ad23fe03a082 71 (+) In DMA mode, HAL_QSPI_RxHalfCpltCallback() will be called at the half transfer and
mbed_official 573:ad23fe03a082 72 HAL_QSPI_RxCpltCallback() will be called when the transfer is complete.
mbed_official 573:ad23fe03a082 73
mbed_official 573:ad23fe03a082 74 *** Auto-polling functional mode ***
mbed_official 573:ad23fe03a082 75 ====================================
mbed_official 573:ad23fe03a082 76 [..]
mbed_official 573:ad23fe03a082 77 (#) Configure the command sequence and the auto-polling functional mode using the
mbed_official 573:ad23fe03a082 78 HAL_QSPI_AutoPolling() or HAL_QSPI_AutoPolling_IT() functions :
mbed_official 573:ad23fe03a082 79 (+) Instruction phase : the mode used and if present the instruction opcode.
mbed_official 573:ad23fe03a082 80 (+) Address phase : the mode used and if present the size and the address value.
mbed_official 573:ad23fe03a082 81 (+) Alternate-bytes phase : the mode used and if present the size and the alternate
mbed_official 573:ad23fe03a082 82 bytes values.
mbed_official 573:ad23fe03a082 83 (+) Dummy-cycles phase : the number of dummy cycles (mode used is same as data phase).
mbed_official 573:ad23fe03a082 84 (+) Data phase : the mode used.
mbed_official 573:ad23fe03a082 85 (+) Double Data Rate (DDR) mode : the activation (or not) of this mode and the delay
mbed_official 573:ad23fe03a082 86 if activated.
mbed_official 573:ad23fe03a082 87 (+) Sending Instruction Only Once (SIOO) mode : the activation (or not) of this mode.
mbed_official 573:ad23fe03a082 88 (+) The size of the status bytes, the match value, the mask used, the match mode (OR/AND),
mbed_official 573:ad23fe03a082 89 the polling interval and the automatic stop activation.
mbed_official 573:ad23fe03a082 90 (#) After the configuration :
mbed_official 573:ad23fe03a082 91 (+) In polling mode, the output of the function is done when the status match is reached. The
mbed_official 573:ad23fe03a082 92 automatic stop is activated to avoid an infinite loop.
mbed_official 573:ad23fe03a082 93 (+) In interrupt mode, HAL_QSPI_StatusMatchCallback() will be called each time the status match is reached.
mbed_official 573:ad23fe03a082 94
mbed_official 573:ad23fe03a082 95 *** Memory-mapped functional mode ***
mbed_official 573:ad23fe03a082 96 =====================================
mbed_official 573:ad23fe03a082 97 [..]
mbed_official 573:ad23fe03a082 98 (#) Configure the command sequence and the memory-mapped functional mode using the
mbed_official 573:ad23fe03a082 99 HAL_QSPI_MemoryMapped() functions :
mbed_official 573:ad23fe03a082 100 (+) Instruction phase : the mode used and if present the instruction opcode.
mbed_official 573:ad23fe03a082 101 (+) Address phase : the mode used and the size.
mbed_official 573:ad23fe03a082 102 (+) Alternate-bytes phase : the mode used and if present the size and the alternate
mbed_official 573:ad23fe03a082 103 bytes values.
mbed_official 573:ad23fe03a082 104 (+) Dummy-cycles phase : the number of dummy cycles (mode used is same as data phase).
mbed_official 573:ad23fe03a082 105 (+) Data phase : the mode used.
mbed_official 573:ad23fe03a082 106 (+) Double Data Rate (DDR) mode : the activation (or not) of this mode and the delay
mbed_official 573:ad23fe03a082 107 if activated.
mbed_official 573:ad23fe03a082 108 (+) Sending Instruction Only Once (SIOO) mode : the activation (or not) of this mode.
mbed_official 573:ad23fe03a082 109 (+) The timeout activation and the timeout period.
mbed_official 573:ad23fe03a082 110 (#) After the configuration, the QuadSPI will be used as soon as an access on the AHB is done on
mbed_official 573:ad23fe03a082 111 the address range. HAL_QSPI_TimeOutCallback() will be called when the timeout expires.
mbed_official 573:ad23fe03a082 112
mbed_official 573:ad23fe03a082 113 *** Errors management and abort functionality ***
mbed_official 573:ad23fe03a082 114 ==================================================
mbed_official 573:ad23fe03a082 115 [..]
mbed_official 573:ad23fe03a082 116 (#) HAL_QSPI_GetError() function gives the error raised during the last operation.
mbed_official 573:ad23fe03a082 117 (#) HAL_QSPI_Abort() function aborts any on-going operation and flushes the fifo.
mbed_official 573:ad23fe03a082 118 (#) HAL_QSPI_GetState() function gives the current state of the HAL QuadSPI driver.
mbed_official 573:ad23fe03a082 119
mbed_official 573:ad23fe03a082 120 *** Workarounds linked to Silicon Limitation ***
mbed_official 573:ad23fe03a082 121 ====================================================
mbed_official 573:ad23fe03a082 122 [..]
mbed_official 573:ad23fe03a082 123 (#) Workarounds Implemented inside HAL Driver
mbed_official 573:ad23fe03a082 124 (+) Extra data written in the FIFO at the end of a read transfer
mbed_official 573:ad23fe03a082 125
mbed_official 573:ad23fe03a082 126 @endverbatim
mbed_official 573:ad23fe03a082 127 ******************************************************************************
mbed_official 573:ad23fe03a082 128 * @attention
mbed_official 573:ad23fe03a082 129 *
mbed_official 573:ad23fe03a082 130 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 573:ad23fe03a082 131 *
mbed_official 573:ad23fe03a082 132 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 573:ad23fe03a082 133 * are permitted provided that the following conditions are met:
mbed_official 573:ad23fe03a082 134 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 573:ad23fe03a082 135 * this list of conditions and the following disclaimer.
mbed_official 573:ad23fe03a082 136 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 573:ad23fe03a082 137 * this list of conditions and the following disclaimer in the documentation
mbed_official 573:ad23fe03a082 138 * and/or other materials provided with the distribution.
mbed_official 573:ad23fe03a082 139 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 573:ad23fe03a082 140 * may be used to endorse or promote products derived from this software
mbed_official 573:ad23fe03a082 141 * without specific prior written permission.
mbed_official 573:ad23fe03a082 142 *
mbed_official 573:ad23fe03a082 143 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 573:ad23fe03a082 144 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 573:ad23fe03a082 145 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 573:ad23fe03a082 146 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 573:ad23fe03a082 147 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 573:ad23fe03a082 148 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 573:ad23fe03a082 149 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 573:ad23fe03a082 150 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 573:ad23fe03a082 151 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 573:ad23fe03a082 152 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 573:ad23fe03a082 153 *
mbed_official 573:ad23fe03a082 154 ******************************************************************************
mbed_official 573:ad23fe03a082 155 */
mbed_official 573:ad23fe03a082 156
mbed_official 573:ad23fe03a082 157 /* Includes ------------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 158 #include "stm32f7xx_hal.h"
mbed_official 573:ad23fe03a082 159
mbed_official 573:ad23fe03a082 160 /** @addtogroup STM32F7xx_HAL_Driver
mbed_official 573:ad23fe03a082 161 * @{
mbed_official 573:ad23fe03a082 162 */
mbed_official 573:ad23fe03a082 163
mbed_official 573:ad23fe03a082 164 /** @defgroup QSPI QSPI
mbed_official 573:ad23fe03a082 165 * @brief HAL QSPI module driver
mbed_official 573:ad23fe03a082 166 * @{
mbed_official 573:ad23fe03a082 167 */
mbed_official 573:ad23fe03a082 168 #ifdef HAL_QSPI_MODULE_ENABLED
mbed_official 573:ad23fe03a082 169
mbed_official 573:ad23fe03a082 170 /* Private typedef -----------------------------------------------------------*/
mbed_official 573:ad23fe03a082 171 /* Private define ------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 172 /** @addtogroup QSPI_Private_Constants
mbed_official 573:ad23fe03a082 173 * @{
mbed_official 573:ad23fe03a082 174 */
mbed_official 573:ad23fe03a082 175 #define QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE ((uint32_t)0x00000000) /*!<Indirect write mode*/
mbed_official 573:ad23fe03a082 176 #define QSPI_FUNCTIONAL_MODE_INDIRECT_READ ((uint32_t)QUADSPI_CCR_FMODE_0) /*!<Indirect read mode*/
mbed_official 573:ad23fe03a082 177 #define QSPI_FUNCTIONAL_MODE_AUTO_POLLING ((uint32_t)QUADSPI_CCR_FMODE_1) /*!<Automatic polling mode*/
mbed_official 573:ad23fe03a082 178 #define QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED ((uint32_t)QUADSPI_CCR_FMODE) /*!<Memory-mapped mode*/
mbed_official 573:ad23fe03a082 179 /**
mbed_official 573:ad23fe03a082 180 * @}
mbed_official 573:ad23fe03a082 181 */
mbed_official 573:ad23fe03a082 182
mbed_official 573:ad23fe03a082 183 /* Private macro -------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 184 /** @addtogroup QSPI_Private_Macros QSPI Private Macros
mbed_official 573:ad23fe03a082 185 * @{
mbed_official 573:ad23fe03a082 186 */
mbed_official 573:ad23fe03a082 187 #define IS_QSPI_FUNCTIONAL_MODE(MODE) (((MODE) == QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE) || \
mbed_official 573:ad23fe03a082 188 ((MODE) == QSPI_FUNCTIONAL_MODE_INDIRECT_READ) || \
mbed_official 573:ad23fe03a082 189 ((MODE) == QSPI_FUNCTIONAL_MODE_AUTO_POLLING) || \
mbed_official 573:ad23fe03a082 190 ((MODE) == QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED))
mbed_official 573:ad23fe03a082 191 /**
mbed_official 573:ad23fe03a082 192 * @}
mbed_official 573:ad23fe03a082 193 */
mbed_official 573:ad23fe03a082 194
mbed_official 573:ad23fe03a082 195 /* Private variables ---------------------------------------------------------*/
mbed_official 573:ad23fe03a082 196 /* Private function prototypes -----------------------------------------------*/
mbed_official 573:ad23fe03a082 197 /** @addtogroup QSPI_Private_Functions QSPI Private Functions
mbed_official 573:ad23fe03a082 198 * @{
mbed_official 573:ad23fe03a082 199 */
mbed_official 573:ad23fe03a082 200 static void QSPI_DMARxCplt(DMA_HandleTypeDef *hdma);
mbed_official 573:ad23fe03a082 201 static void QSPI_DMATxCplt(DMA_HandleTypeDef *hdma);
mbed_official 573:ad23fe03a082 202 static void QSPI_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
mbed_official 573:ad23fe03a082 203 static void QSPI_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
mbed_official 573:ad23fe03a082 204 static void QSPI_DMAError(DMA_HandleTypeDef *hdma);
mbed_official 573:ad23fe03a082 205 static HAL_StatusTypeDef QSPI_WaitFlagStateUntilTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Flag, FlagStatus State, uint32_t Timeout);
mbed_official 573:ad23fe03a082 206 static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t FunctionalMode);
mbed_official 573:ad23fe03a082 207 /**
mbed_official 573:ad23fe03a082 208 * @}
mbed_official 573:ad23fe03a082 209 */
mbed_official 573:ad23fe03a082 210
mbed_official 573:ad23fe03a082 211 /* Exported functions ---------------------------------------------------------*/
mbed_official 573:ad23fe03a082 212
mbed_official 573:ad23fe03a082 213 /** @defgroup QSPI_Exported_Functions QSPI Exported Functions
mbed_official 573:ad23fe03a082 214 * @{
mbed_official 573:ad23fe03a082 215 */
mbed_official 573:ad23fe03a082 216
mbed_official 573:ad23fe03a082 217 /** @defgroup QSPI_Exported_Functions_Group1 Initialization/de-initialization functions
mbed_official 573:ad23fe03a082 218 * @brief Initialization and Configuration functions
mbed_official 573:ad23fe03a082 219 *
mbed_official 573:ad23fe03a082 220 @verbatim
mbed_official 573:ad23fe03a082 221 ===============================================================================
mbed_official 573:ad23fe03a082 222 ##### Initialization and Configuration functions #####
mbed_official 573:ad23fe03a082 223 ===============================================================================
mbed_official 573:ad23fe03a082 224 [..]
mbed_official 573:ad23fe03a082 225 This subsection provides a set of functions allowing to :
mbed_official 573:ad23fe03a082 226 (+) Initialize the QuadSPI.
mbed_official 573:ad23fe03a082 227 (+) De-initialize the QuadSPI.
mbed_official 573:ad23fe03a082 228
mbed_official 573:ad23fe03a082 229 @endverbatim
mbed_official 573:ad23fe03a082 230 * @{
mbed_official 573:ad23fe03a082 231 */
mbed_official 573:ad23fe03a082 232
mbed_official 573:ad23fe03a082 233 /**
mbed_official 573:ad23fe03a082 234 * @brief Initializes the QSPI mode according to the specified parameters
mbed_official 573:ad23fe03a082 235 * in the QSPI_InitTypeDef and creates the associated handle.
mbed_official 573:ad23fe03a082 236 * @param hqspi: qspi handle
mbed_official 573:ad23fe03a082 237 * @retval HAL status
mbed_official 573:ad23fe03a082 238 */
mbed_official 573:ad23fe03a082 239 HAL_StatusTypeDef HAL_QSPI_Init(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 240 {
mbed_official 573:ad23fe03a082 241 HAL_StatusTypeDef status = HAL_ERROR;
mbed_official 573:ad23fe03a082 242
mbed_official 573:ad23fe03a082 243 /* Check the QSPI handle allocation */
mbed_official 573:ad23fe03a082 244 if(hqspi == NULL)
mbed_official 573:ad23fe03a082 245 {
mbed_official 573:ad23fe03a082 246 return HAL_ERROR;
mbed_official 573:ad23fe03a082 247 }
mbed_official 573:ad23fe03a082 248
mbed_official 573:ad23fe03a082 249 /* Check the parameters */
mbed_official 573:ad23fe03a082 250 assert_param(IS_QSPI_ALL_INSTANCE(hqspi->Instance));
mbed_official 573:ad23fe03a082 251 assert_param(IS_QSPI_CLOCK_PRESCALER(hqspi->Init.ClockPrescaler));
mbed_official 573:ad23fe03a082 252 assert_param(IS_QSPI_FIFO_THRESHOLD(hqspi->Init.FifoThreshold));
mbed_official 573:ad23fe03a082 253 assert_param(IS_QSPI_SSHIFT(hqspi->Init.SampleShifting));
mbed_official 573:ad23fe03a082 254 assert_param(IS_QSPI_FLASH_SIZE(hqspi->Init.FlashSize));
mbed_official 573:ad23fe03a082 255 assert_param(IS_QSPI_CS_HIGH_TIME(hqspi->Init.ChipSelectHighTime));
mbed_official 573:ad23fe03a082 256 assert_param(IS_QSPI_CLOCK_MODE(hqspi->Init.ClockMode));
mbed_official 573:ad23fe03a082 257 assert_param(IS_QSPI_DUAL_FLASH_MODE(hqspi->Init.DualFlash));
mbed_official 573:ad23fe03a082 258
mbed_official 573:ad23fe03a082 259 if (hqspi->Init.DualFlash != QSPI_DUALFLASH_ENABLE )
mbed_official 573:ad23fe03a082 260 {
mbed_official 573:ad23fe03a082 261 assert_param(IS_QSPI_FLASH_ID(hqspi->Init.FlashID));
mbed_official 573:ad23fe03a082 262 }
mbed_official 573:ad23fe03a082 263
mbed_official 573:ad23fe03a082 264 /* Process locked */
mbed_official 573:ad23fe03a082 265 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 266
mbed_official 573:ad23fe03a082 267 if(hqspi->State == HAL_QSPI_STATE_RESET)
mbed_official 573:ad23fe03a082 268 {
mbed_official 573:ad23fe03a082 269 /* Allocate lock resource and initialize it */
mbed_official 573:ad23fe03a082 270 hqspi->Lock = HAL_UNLOCKED;
mbed_official 573:ad23fe03a082 271
mbed_official 573:ad23fe03a082 272 /* Init the low level hardware : GPIO, CLOCK */
mbed_official 573:ad23fe03a082 273 HAL_QSPI_MspInit(hqspi);
mbed_official 573:ad23fe03a082 274
mbed_official 573:ad23fe03a082 275 /* Configure the default timeout for the QSPI memory access */
mbed_official 573:ad23fe03a082 276 HAL_QSPI_SetTimeout(hqspi, HAL_QPSI_TIMEOUT_DEFAULT_VALUE);
mbed_official 573:ad23fe03a082 277 }
mbed_official 573:ad23fe03a082 278
mbed_official 573:ad23fe03a082 279 /* Configure QSPI FIFO Threshold */
mbed_official 573:ad23fe03a082 280 MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_FTHRES, ((hqspi->Init.FifoThreshold - 1) << 8));
mbed_official 573:ad23fe03a082 281
mbed_official 573:ad23fe03a082 282 /* Wait till BUSY flag reset */
mbed_official 573:ad23fe03a082 283 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, hqspi->Timeout);
mbed_official 573:ad23fe03a082 284
mbed_official 573:ad23fe03a082 285 if(status == HAL_OK)
mbed_official 573:ad23fe03a082 286 {
mbed_official 573:ad23fe03a082 287
mbed_official 573:ad23fe03a082 288 /* Configure QSPI Clock Prescaler and Sample Shift */
mbed_official 573:ad23fe03a082 289 MODIFY_REG(hqspi->Instance->CR,(QUADSPI_CR_PRESCALER | QUADSPI_CR_SSHIFT | QUADSPI_CR_FSEL | QUADSPI_CR_DFM), ((hqspi->Init.ClockPrescaler << 24)| hqspi->Init.SampleShifting | hqspi->Init.FlashID| hqspi->Init.DualFlash ));
mbed_official 573:ad23fe03a082 290
mbed_official 573:ad23fe03a082 291 /* Configure QSPI Flash Size, CS High Time and Clock Mode */
mbed_official 573:ad23fe03a082 292 MODIFY_REG(hqspi->Instance->DCR, (QUADSPI_DCR_FSIZE | QUADSPI_DCR_CSHT | QUADSPI_DCR_CKMODE),
mbed_official 573:ad23fe03a082 293 ((hqspi->Init.FlashSize << 16) | hqspi->Init.ChipSelectHighTime | hqspi->Init.ClockMode));
mbed_official 573:ad23fe03a082 294
mbed_official 573:ad23fe03a082 295 /* Enable the QSPI peripheral */
mbed_official 573:ad23fe03a082 296 __HAL_QSPI_ENABLE(hqspi);
mbed_official 573:ad23fe03a082 297
mbed_official 573:ad23fe03a082 298 /* Set QSPI error code to none */
mbed_official 573:ad23fe03a082 299 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 300
mbed_official 573:ad23fe03a082 301 /* Initialize the QSPI state */
mbed_official 573:ad23fe03a082 302 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 303 }
mbed_official 573:ad23fe03a082 304
mbed_official 573:ad23fe03a082 305 /* Release Lock */
mbed_official 573:ad23fe03a082 306 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 307
mbed_official 573:ad23fe03a082 308 /* Return function status */
mbed_official 573:ad23fe03a082 309 return status;
mbed_official 573:ad23fe03a082 310 }
mbed_official 573:ad23fe03a082 311
mbed_official 573:ad23fe03a082 312 /**
mbed_official 573:ad23fe03a082 313 * @brief DeInitializes the QSPI peripheral
mbed_official 573:ad23fe03a082 314 * @param hqspi: qspi handle
mbed_official 573:ad23fe03a082 315 * @retval HAL status
mbed_official 573:ad23fe03a082 316 */
mbed_official 573:ad23fe03a082 317 HAL_StatusTypeDef HAL_QSPI_DeInit(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 318 {
mbed_official 573:ad23fe03a082 319 /* Check the QSPI handle allocation */
mbed_official 573:ad23fe03a082 320 if(hqspi == NULL)
mbed_official 573:ad23fe03a082 321 {
mbed_official 573:ad23fe03a082 322 return HAL_ERROR;
mbed_official 573:ad23fe03a082 323 }
mbed_official 573:ad23fe03a082 324
mbed_official 573:ad23fe03a082 325 /* Process locked */
mbed_official 573:ad23fe03a082 326 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 327
mbed_official 573:ad23fe03a082 328 /* Disable the QSPI Peripheral Clock */
mbed_official 573:ad23fe03a082 329 __HAL_QSPI_DISABLE(hqspi);
mbed_official 573:ad23fe03a082 330
mbed_official 573:ad23fe03a082 331 /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
mbed_official 573:ad23fe03a082 332 HAL_QSPI_MspDeInit(hqspi);
mbed_official 573:ad23fe03a082 333
mbed_official 573:ad23fe03a082 334 /* Set QSPI error code to none */
mbed_official 573:ad23fe03a082 335 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 336
mbed_official 573:ad23fe03a082 337 /* Initialize the QSPI state */
mbed_official 573:ad23fe03a082 338 hqspi->State = HAL_QSPI_STATE_RESET;
mbed_official 573:ad23fe03a082 339
mbed_official 573:ad23fe03a082 340 /* Release Lock */
mbed_official 573:ad23fe03a082 341 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 342
mbed_official 573:ad23fe03a082 343 return HAL_OK;
mbed_official 573:ad23fe03a082 344 }
mbed_official 573:ad23fe03a082 345
mbed_official 573:ad23fe03a082 346 /**
mbed_official 573:ad23fe03a082 347 * @brief QSPI MSP Init
mbed_official 573:ad23fe03a082 348 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 349 * @retval None
mbed_official 573:ad23fe03a082 350 */
mbed_official 573:ad23fe03a082 351 __weak void HAL_QSPI_MspInit(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 352 {
mbed_official 573:ad23fe03a082 353 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 354 the HAL_QSPI_MspInit can be implemented in the user file
mbed_official 573:ad23fe03a082 355 */
mbed_official 573:ad23fe03a082 356 }
mbed_official 573:ad23fe03a082 357
mbed_official 573:ad23fe03a082 358 /**
mbed_official 573:ad23fe03a082 359 * @brief QSPI MSP DeInit
mbed_official 573:ad23fe03a082 360 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 361 * @retval None
mbed_official 573:ad23fe03a082 362 */
mbed_official 573:ad23fe03a082 363 __weak void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 364 {
mbed_official 573:ad23fe03a082 365 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 366 the HAL_QSPI_MspDeInit can be implemented in the user file
mbed_official 573:ad23fe03a082 367 */
mbed_official 573:ad23fe03a082 368 }
mbed_official 573:ad23fe03a082 369
mbed_official 573:ad23fe03a082 370 /**
mbed_official 573:ad23fe03a082 371 * @}
mbed_official 573:ad23fe03a082 372 */
mbed_official 573:ad23fe03a082 373
mbed_official 573:ad23fe03a082 374 /** @defgroup QSPI_Exported_Functions_Group2 IO operation functions
mbed_official 573:ad23fe03a082 375 * @brief QSPI Transmit/Receive functions
mbed_official 573:ad23fe03a082 376 *
mbed_official 573:ad23fe03a082 377 @verbatim
mbed_official 573:ad23fe03a082 378 ===============================================================================
mbed_official 573:ad23fe03a082 379 ##### I/O operation functions #####
mbed_official 573:ad23fe03a082 380 ===============================================================================
mbed_official 573:ad23fe03a082 381 [..]
mbed_official 573:ad23fe03a082 382 This subsection provides a set of functions allowing to :
mbed_official 573:ad23fe03a082 383 (+) Handle the interrupts.
mbed_official 573:ad23fe03a082 384 (+) Handle the command sequence.
mbed_official 573:ad23fe03a082 385 (+) Transmit data in blocking, interrupt or DMA mode.
mbed_official 573:ad23fe03a082 386 (+) Receive data in blocking, interrupt or DMA mode.
mbed_official 573:ad23fe03a082 387 (+) Manage the auto-polling functional mode.
mbed_official 573:ad23fe03a082 388 (+) Manage the memory-mapped functional mode.
mbed_official 573:ad23fe03a082 389
mbed_official 573:ad23fe03a082 390 @endverbatim
mbed_official 573:ad23fe03a082 391 * @{
mbed_official 573:ad23fe03a082 392 */
mbed_official 573:ad23fe03a082 393
mbed_official 573:ad23fe03a082 394 /**
mbed_official 573:ad23fe03a082 395 * @brief This function handles QSPI interrupt request.
mbed_official 573:ad23fe03a082 396 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 397 * @retval None.
mbed_official 573:ad23fe03a082 398 */
mbed_official 573:ad23fe03a082 399 void HAL_QSPI_IRQHandler(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 400 {
mbed_official 573:ad23fe03a082 401 __IO uint32_t *data_reg;
mbed_official 573:ad23fe03a082 402 uint32_t flag = 0, itsource = 0;
mbed_official 573:ad23fe03a082 403
mbed_official 573:ad23fe03a082 404 /* QSPI FIFO Threshold interrupt occurred ----------------------------------*/
mbed_official 573:ad23fe03a082 405 flag = __HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT);
mbed_official 573:ad23fe03a082 406 itsource = __HAL_QSPI_GET_IT_SOURCE(hqspi, QSPI_IT_FT);
mbed_official 573:ad23fe03a082 407
mbed_official 573:ad23fe03a082 408 if((flag != RESET) && (itsource != RESET))
mbed_official 573:ad23fe03a082 409 {
mbed_official 573:ad23fe03a082 410 data_reg = &hqspi->Instance->DR;
mbed_official 573:ad23fe03a082 411
mbed_official 573:ad23fe03a082 412 if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX)
mbed_official 573:ad23fe03a082 413 {
mbed_official 573:ad23fe03a082 414 /* Transmission process */
mbed_official 573:ad23fe03a082 415 while(__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT) != 0)
mbed_official 573:ad23fe03a082 416 {
mbed_official 573:ad23fe03a082 417 if (hqspi->TxXferCount > 0)
mbed_official 573:ad23fe03a082 418 {
mbed_official 573:ad23fe03a082 419 /* Fill the FIFO until it is full */
mbed_official 573:ad23fe03a082 420 *(__IO uint8_t *)data_reg = *hqspi->pTxBuffPtr++;
mbed_official 573:ad23fe03a082 421 hqspi->TxXferCount--;
mbed_official 573:ad23fe03a082 422 }
mbed_official 573:ad23fe03a082 423 else
mbed_official 573:ad23fe03a082 424 {
mbed_official 573:ad23fe03a082 425 /* No more data available for the transfer */
mbed_official 573:ad23fe03a082 426 break;
mbed_official 573:ad23fe03a082 427 }
mbed_official 573:ad23fe03a082 428 }
mbed_official 573:ad23fe03a082 429 }
mbed_official 573:ad23fe03a082 430 else if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_RX)
mbed_official 573:ad23fe03a082 431 {
mbed_official 573:ad23fe03a082 432 /* Receiving Process */
mbed_official 573:ad23fe03a082 433 while(__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT) != 0)
mbed_official 573:ad23fe03a082 434 {
mbed_official 573:ad23fe03a082 435 if (hqspi->RxXferCount > 0)
mbed_official 573:ad23fe03a082 436 {
mbed_official 573:ad23fe03a082 437 /* Read the FIFO until it is empty */
mbed_official 573:ad23fe03a082 438 *hqspi->pRxBuffPtr++ = *(__IO uint8_t *)data_reg;
mbed_official 573:ad23fe03a082 439 hqspi->RxXferCount--;
mbed_official 573:ad23fe03a082 440 }
mbed_official 573:ad23fe03a082 441 else
mbed_official 573:ad23fe03a082 442 {
mbed_official 573:ad23fe03a082 443 /* All data have been received for the transfer */
mbed_official 573:ad23fe03a082 444 break;
mbed_official 573:ad23fe03a082 445 }
mbed_official 573:ad23fe03a082 446 }
mbed_official 573:ad23fe03a082 447 }
mbed_official 573:ad23fe03a082 448
mbed_official 573:ad23fe03a082 449 /* FIFO Threshold callback */
mbed_official 573:ad23fe03a082 450 HAL_QSPI_FifoThresholdCallback(hqspi);
mbed_official 573:ad23fe03a082 451 }
mbed_official 573:ad23fe03a082 452
mbed_official 573:ad23fe03a082 453 /* QSPI Transfer Complete interrupt occurred -------------------------------*/
mbed_official 573:ad23fe03a082 454 flag = __HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 573:ad23fe03a082 455 itsource = __HAL_QSPI_GET_IT_SOURCE(hqspi, QSPI_IT_TC);
mbed_official 573:ad23fe03a082 456
mbed_official 573:ad23fe03a082 457 if((flag != RESET) && (itsource != RESET))
mbed_official 573:ad23fe03a082 458 {
mbed_official 573:ad23fe03a082 459 /* Clear interrupt */
mbed_official 573:ad23fe03a082 460 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 573:ad23fe03a082 461
mbed_official 573:ad23fe03a082 462 /* Disable the QSPI FIFO Threshold, Transfer Error and Transfer complete Interrupts */
mbed_official 573:ad23fe03a082 463 __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_TC | QSPI_IT_TE | QSPI_IT_FT);
mbed_official 573:ad23fe03a082 464
mbed_official 573:ad23fe03a082 465 /* Transfer complete callback */
mbed_official 573:ad23fe03a082 466 if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX)
mbed_official 573:ad23fe03a082 467 {
mbed_official 573:ad23fe03a082 468 /* Clear Busy bit */
mbed_official 573:ad23fe03a082 469 HAL_QSPI_Abort(hqspi);
mbed_official 573:ad23fe03a082 470
mbed_official 573:ad23fe03a082 471 /* TX Complete callback */
mbed_official 573:ad23fe03a082 472 HAL_QSPI_TxCpltCallback(hqspi);
mbed_official 573:ad23fe03a082 473 }
mbed_official 573:ad23fe03a082 474 else if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_RX)
mbed_official 573:ad23fe03a082 475 {
mbed_official 573:ad23fe03a082 476 data_reg = &hqspi->Instance->DR;
mbed_official 573:ad23fe03a082 477 while(READ_BIT(hqspi->Instance->SR, QUADSPI_SR_FLEVEL) != 0)
mbed_official 573:ad23fe03a082 478 {
mbed_official 573:ad23fe03a082 479 if (hqspi->RxXferCount > 0)
mbed_official 573:ad23fe03a082 480 {
mbed_official 573:ad23fe03a082 481 /* Read the last data received in the FIFO until it is empty */
mbed_official 573:ad23fe03a082 482 *hqspi->pRxBuffPtr++ = *(__IO uint8_t *)data_reg;
mbed_official 573:ad23fe03a082 483 hqspi->RxXferCount--;
mbed_official 573:ad23fe03a082 484 }
mbed_official 573:ad23fe03a082 485 else
mbed_official 573:ad23fe03a082 486 {
mbed_official 573:ad23fe03a082 487 /* All data have been received for the transfer */
mbed_official 573:ad23fe03a082 488 break;
mbed_official 573:ad23fe03a082 489 }
mbed_official 573:ad23fe03a082 490 }
mbed_official 573:ad23fe03a082 491
mbed_official 573:ad23fe03a082 492 /* Workaround - Extra data written in the FIFO at the end of a read transfer */
mbed_official 573:ad23fe03a082 493 HAL_QSPI_Abort(hqspi);
mbed_official 573:ad23fe03a082 494
mbed_official 573:ad23fe03a082 495 /* RX Complete callback */
mbed_official 573:ad23fe03a082 496 HAL_QSPI_RxCpltCallback(hqspi);
mbed_official 573:ad23fe03a082 497 }
mbed_official 573:ad23fe03a082 498 else if(hqspi->State == HAL_QSPI_STATE_BUSY)
mbed_official 573:ad23fe03a082 499 {
mbed_official 573:ad23fe03a082 500 /* Command Complete callback */
mbed_official 573:ad23fe03a082 501 HAL_QSPI_CmdCpltCallback(hqspi);
mbed_official 573:ad23fe03a082 502 }
mbed_official 573:ad23fe03a082 503
mbed_official 573:ad23fe03a082 504 /* Change state of QSPI */
mbed_official 573:ad23fe03a082 505 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 506 }
mbed_official 573:ad23fe03a082 507
mbed_official 573:ad23fe03a082 508 /* QSPI Status Match interrupt occurred ------------------------------------*/
mbed_official 573:ad23fe03a082 509 flag = __HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_SM);
mbed_official 573:ad23fe03a082 510 itsource = __HAL_QSPI_GET_IT_SOURCE(hqspi, QSPI_IT_SM);
mbed_official 573:ad23fe03a082 511
mbed_official 573:ad23fe03a082 512 if((flag != RESET) && (itsource != RESET))
mbed_official 573:ad23fe03a082 513 {
mbed_official 573:ad23fe03a082 514 /* Clear interrupt */
mbed_official 573:ad23fe03a082 515 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_SM);
mbed_official 573:ad23fe03a082 516
mbed_official 573:ad23fe03a082 517 /* Check if the automatic poll mode stop is activated */
mbed_official 573:ad23fe03a082 518 if(READ_BIT(hqspi->Instance->CR, QUADSPI_CR_APMS) != 0)
mbed_official 573:ad23fe03a082 519 {
mbed_official 573:ad23fe03a082 520 /* Disable the QSPI FIFO Threshold, Transfer Error and Status Match Interrupts */
mbed_official 573:ad23fe03a082 521 __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_SM | QSPI_IT_FT | QSPI_IT_TE);
mbed_official 573:ad23fe03a082 522
mbed_official 573:ad23fe03a082 523 /* Change state of QSPI */
mbed_official 573:ad23fe03a082 524 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 525 }
mbed_official 573:ad23fe03a082 526
mbed_official 573:ad23fe03a082 527 /* Status match callback */
mbed_official 573:ad23fe03a082 528 HAL_QSPI_StatusMatchCallback(hqspi);
mbed_official 573:ad23fe03a082 529 }
mbed_official 573:ad23fe03a082 530
mbed_official 573:ad23fe03a082 531 /* QSPI Transfer Error interrupt occurred ----------------------------------*/
mbed_official 573:ad23fe03a082 532 flag = __HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_TE);
mbed_official 573:ad23fe03a082 533 itsource = __HAL_QSPI_GET_IT_SOURCE(hqspi, QSPI_IT_TE);
mbed_official 573:ad23fe03a082 534
mbed_official 573:ad23fe03a082 535 if((flag != RESET) && (itsource != RESET))
mbed_official 573:ad23fe03a082 536 {
mbed_official 573:ad23fe03a082 537 /* Clear interrupt */
mbed_official 573:ad23fe03a082 538 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TE);
mbed_official 573:ad23fe03a082 539
mbed_official 573:ad23fe03a082 540 /* Disable all the QSPI Interrupts */
mbed_official 573:ad23fe03a082 541 __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_SM | QSPI_IT_TC | QSPI_IT_TE | QSPI_IT_FT);
mbed_official 573:ad23fe03a082 542
mbed_official 573:ad23fe03a082 543 /* Set error code */
mbed_official 573:ad23fe03a082 544 hqspi->ErrorCode |= HAL_QSPI_ERROR_TRANSFER;
mbed_official 573:ad23fe03a082 545
mbed_official 573:ad23fe03a082 546 /* Change state of QSPI */
mbed_official 573:ad23fe03a082 547 hqspi->State = HAL_QSPI_STATE_ERROR;
mbed_official 573:ad23fe03a082 548
mbed_official 573:ad23fe03a082 549 /* Error callback */
mbed_official 573:ad23fe03a082 550 HAL_QSPI_ErrorCallback(hqspi);
mbed_official 573:ad23fe03a082 551 }
mbed_official 573:ad23fe03a082 552
mbed_official 573:ad23fe03a082 553 /* QSPI Time out interrupt occurred -----------------------------------------*/
mbed_official 573:ad23fe03a082 554 flag = __HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_TO);
mbed_official 573:ad23fe03a082 555 itsource = __HAL_QSPI_GET_IT_SOURCE(hqspi, QSPI_IT_TO);
mbed_official 573:ad23fe03a082 556
mbed_official 573:ad23fe03a082 557 if((flag != RESET) && (itsource != RESET))
mbed_official 573:ad23fe03a082 558 {
mbed_official 573:ad23fe03a082 559 /* Clear interrupt */
mbed_official 573:ad23fe03a082 560 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TO);
mbed_official 573:ad23fe03a082 561
mbed_official 573:ad23fe03a082 562 /* Time out callback */
mbed_official 573:ad23fe03a082 563 HAL_QSPI_TimeOutCallback(hqspi);
mbed_official 573:ad23fe03a082 564 }
mbed_official 573:ad23fe03a082 565 }
mbed_official 573:ad23fe03a082 566
mbed_official 573:ad23fe03a082 567 /**
mbed_official 573:ad23fe03a082 568 * @brief Sets the command configuration.
mbed_official 573:ad23fe03a082 569 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 570 * @param cmd : structure that contains the command configuration information
mbed_official 573:ad23fe03a082 571 * @param Timeout : Time out duration
mbed_official 573:ad23fe03a082 572 * @note This function is used only in Indirect Read or Write Modes
mbed_official 573:ad23fe03a082 573 * @retval HAL status
mbed_official 573:ad23fe03a082 574 */
mbed_official 573:ad23fe03a082 575 HAL_StatusTypeDef HAL_QSPI_Command(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t Timeout)
mbed_official 573:ad23fe03a082 576 {
mbed_official 573:ad23fe03a082 577 HAL_StatusTypeDef status = HAL_ERROR;
mbed_official 573:ad23fe03a082 578
mbed_official 573:ad23fe03a082 579 /* Check the parameters */
mbed_official 573:ad23fe03a082 580 assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode));
mbed_official 573:ad23fe03a082 581 if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
mbed_official 573:ad23fe03a082 582 {
mbed_official 573:ad23fe03a082 583 assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction));
mbed_official 573:ad23fe03a082 584 }
mbed_official 573:ad23fe03a082 585
mbed_official 573:ad23fe03a082 586 assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode));
mbed_official 573:ad23fe03a082 587 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 573:ad23fe03a082 588 {
mbed_official 573:ad23fe03a082 589 assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize));
mbed_official 573:ad23fe03a082 590 }
mbed_official 573:ad23fe03a082 591
mbed_official 573:ad23fe03a082 592 assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode));
mbed_official 573:ad23fe03a082 593 if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
mbed_official 573:ad23fe03a082 594 {
mbed_official 573:ad23fe03a082 595 assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize));
mbed_official 573:ad23fe03a082 596 }
mbed_official 573:ad23fe03a082 597
mbed_official 573:ad23fe03a082 598 assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles));
mbed_official 573:ad23fe03a082 599 assert_param(IS_QSPI_DATA_MODE(cmd->DataMode));
mbed_official 573:ad23fe03a082 600
mbed_official 573:ad23fe03a082 601 assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode));
mbed_official 573:ad23fe03a082 602 assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle));
mbed_official 573:ad23fe03a082 603 assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode));
mbed_official 573:ad23fe03a082 604
mbed_official 573:ad23fe03a082 605 /* Process locked */
mbed_official 573:ad23fe03a082 606 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 607
mbed_official 573:ad23fe03a082 608 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 573:ad23fe03a082 609 {
mbed_official 573:ad23fe03a082 610 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 611
mbed_official 573:ad23fe03a082 612 /* Update QSPI state */
mbed_official 573:ad23fe03a082 613 hqspi->State = HAL_QSPI_STATE_BUSY;
mbed_official 573:ad23fe03a082 614
mbed_official 573:ad23fe03a082 615 /* Wait till BUSY flag reset */
mbed_official 573:ad23fe03a082 616 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, Timeout);
mbed_official 573:ad23fe03a082 617
mbed_official 573:ad23fe03a082 618 if (status == HAL_OK)
mbed_official 573:ad23fe03a082 619 {
mbed_official 573:ad23fe03a082 620 /* Call the configuration function */
mbed_official 573:ad23fe03a082 621 QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE);
mbed_official 573:ad23fe03a082 622
mbed_official 573:ad23fe03a082 623 if (cmd->DataMode == QSPI_DATA_NONE)
mbed_official 573:ad23fe03a082 624 {
mbed_official 573:ad23fe03a082 625 /* When there is no data phase, the transfer start as soon as the configuration is done
mbed_official 573:ad23fe03a082 626 so wait until TC flag is set to go back in idle state */
mbed_official 573:ad23fe03a082 627 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 628 {
mbed_official 573:ad23fe03a082 629 status = HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 630 }
mbed_official 573:ad23fe03a082 631 else
mbed_official 573:ad23fe03a082 632 {
mbed_official 573:ad23fe03a082 633 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 573:ad23fe03a082 634
mbed_official 573:ad23fe03a082 635 /* Update QSPI state */
mbed_official 573:ad23fe03a082 636 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 637 }
mbed_official 573:ad23fe03a082 638
mbed_official 573:ad23fe03a082 639 }
mbed_official 573:ad23fe03a082 640 else
mbed_official 573:ad23fe03a082 641 {
mbed_official 573:ad23fe03a082 642 /* Update QSPI state */
mbed_official 573:ad23fe03a082 643 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 644 }
mbed_official 573:ad23fe03a082 645 }
mbed_official 573:ad23fe03a082 646 }
mbed_official 573:ad23fe03a082 647 else
mbed_official 573:ad23fe03a082 648 {
mbed_official 573:ad23fe03a082 649 status = HAL_BUSY;
mbed_official 573:ad23fe03a082 650 }
mbed_official 573:ad23fe03a082 651
mbed_official 573:ad23fe03a082 652 /* Process unlocked */
mbed_official 573:ad23fe03a082 653 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 654
mbed_official 573:ad23fe03a082 655 /* Return function status */
mbed_official 573:ad23fe03a082 656 return status;
mbed_official 573:ad23fe03a082 657 }
mbed_official 573:ad23fe03a082 658
mbed_official 573:ad23fe03a082 659 /**
mbed_official 573:ad23fe03a082 660 * @brief Sets the command configuration in interrupt mode.
mbed_official 573:ad23fe03a082 661 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 662 * @param cmd : structure that contains the command configuration information
mbed_official 573:ad23fe03a082 663 * @note This function is used only in Indirect Read or Write Modes
mbed_official 573:ad23fe03a082 664 * @retval HAL status
mbed_official 573:ad23fe03a082 665 */
mbed_official 573:ad23fe03a082 666 HAL_StatusTypeDef HAL_QSPI_Command_IT(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd)
mbed_official 573:ad23fe03a082 667 {
mbed_official 573:ad23fe03a082 668 HAL_StatusTypeDef status = HAL_ERROR;
mbed_official 573:ad23fe03a082 669
mbed_official 573:ad23fe03a082 670 /* Check the parameters */
mbed_official 573:ad23fe03a082 671 assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode));
mbed_official 573:ad23fe03a082 672 if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
mbed_official 573:ad23fe03a082 673 {
mbed_official 573:ad23fe03a082 674 assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction));
mbed_official 573:ad23fe03a082 675 }
mbed_official 573:ad23fe03a082 676
mbed_official 573:ad23fe03a082 677 assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode));
mbed_official 573:ad23fe03a082 678 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 573:ad23fe03a082 679 {
mbed_official 573:ad23fe03a082 680 assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize));
mbed_official 573:ad23fe03a082 681 }
mbed_official 573:ad23fe03a082 682
mbed_official 573:ad23fe03a082 683 assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode));
mbed_official 573:ad23fe03a082 684 if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
mbed_official 573:ad23fe03a082 685 {
mbed_official 573:ad23fe03a082 686 assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize));
mbed_official 573:ad23fe03a082 687 }
mbed_official 573:ad23fe03a082 688
mbed_official 573:ad23fe03a082 689 assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles));
mbed_official 573:ad23fe03a082 690 assert_param(IS_QSPI_DATA_MODE(cmd->DataMode));
mbed_official 573:ad23fe03a082 691
mbed_official 573:ad23fe03a082 692 assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode));
mbed_official 573:ad23fe03a082 693 assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle));
mbed_official 573:ad23fe03a082 694 assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode));
mbed_official 573:ad23fe03a082 695
mbed_official 573:ad23fe03a082 696 /* Process locked */
mbed_official 573:ad23fe03a082 697 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 698
mbed_official 573:ad23fe03a082 699 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 573:ad23fe03a082 700 {
mbed_official 573:ad23fe03a082 701 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 702
mbed_official 573:ad23fe03a082 703 /* Update QSPI state */
mbed_official 573:ad23fe03a082 704 hqspi->State = HAL_QSPI_STATE_BUSY;
mbed_official 573:ad23fe03a082 705
mbed_official 573:ad23fe03a082 706 /* Wait till BUSY flag reset */
mbed_official 573:ad23fe03a082 707 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, hqspi->Timeout);
mbed_official 573:ad23fe03a082 708
mbed_official 573:ad23fe03a082 709 if (status == HAL_OK)
mbed_official 573:ad23fe03a082 710 {
mbed_official 573:ad23fe03a082 711 if (cmd->DataMode == QSPI_DATA_NONE)
mbed_official 573:ad23fe03a082 712 {
mbed_official 573:ad23fe03a082 713 /* When there is no data phase, the transfer start as soon as the configuration is done
mbed_official 573:ad23fe03a082 714 so activate TC and TE interrupts */
mbed_official 573:ad23fe03a082 715 /* Enable the QSPI Transfer Error Interrupt */
mbed_official 573:ad23fe03a082 716 __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE | QSPI_IT_TC);
mbed_official 573:ad23fe03a082 717 }
mbed_official 573:ad23fe03a082 718
mbed_official 573:ad23fe03a082 719 /* Call the configuration function */
mbed_official 573:ad23fe03a082 720 QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE);
mbed_official 573:ad23fe03a082 721
mbed_official 573:ad23fe03a082 722 if (cmd->DataMode != QSPI_DATA_NONE)
mbed_official 573:ad23fe03a082 723 {
mbed_official 573:ad23fe03a082 724 /* Update QSPI state */
mbed_official 573:ad23fe03a082 725 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 726 }
mbed_official 573:ad23fe03a082 727 }
mbed_official 573:ad23fe03a082 728 }
mbed_official 573:ad23fe03a082 729 else
mbed_official 573:ad23fe03a082 730 {
mbed_official 573:ad23fe03a082 731 status = HAL_BUSY;
mbed_official 573:ad23fe03a082 732 }
mbed_official 573:ad23fe03a082 733
mbed_official 573:ad23fe03a082 734 /* Process unlocked */
mbed_official 573:ad23fe03a082 735 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 736
mbed_official 573:ad23fe03a082 737 /* Return function status */
mbed_official 573:ad23fe03a082 738 return status;
mbed_official 573:ad23fe03a082 739 }
mbed_official 573:ad23fe03a082 740
mbed_official 573:ad23fe03a082 741 /**
mbed_official 573:ad23fe03a082 742 * @brief Transmit an amount of data in blocking mode.
mbed_official 573:ad23fe03a082 743 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 744 * @param pData: pointer to data buffer
mbed_official 573:ad23fe03a082 745 * @param Timeout : Time out duration
mbed_official 573:ad23fe03a082 746 * @note This function is used only in Indirect Write Mode
mbed_official 573:ad23fe03a082 747 * @retval HAL status
mbed_official 573:ad23fe03a082 748 */
mbed_official 573:ad23fe03a082 749 HAL_StatusTypeDef HAL_QSPI_Transmit(QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout)
mbed_official 573:ad23fe03a082 750 {
mbed_official 573:ad23fe03a082 751 HAL_StatusTypeDef status = HAL_OK;
mbed_official 573:ad23fe03a082 752 __IO uint32_t *data_reg = &hqspi->Instance->DR;
mbed_official 573:ad23fe03a082 753
mbed_official 573:ad23fe03a082 754 /* Process locked */
mbed_official 573:ad23fe03a082 755 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 756
mbed_official 573:ad23fe03a082 757 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 573:ad23fe03a082 758 {
mbed_official 573:ad23fe03a082 759 if(pData != NULL )
mbed_official 573:ad23fe03a082 760 {
mbed_official 573:ad23fe03a082 761 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 762
mbed_official 573:ad23fe03a082 763 /* Update state */
mbed_official 573:ad23fe03a082 764 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_TX;
mbed_official 573:ad23fe03a082 765
mbed_official 573:ad23fe03a082 766 /* Configure counters and size of the handle */
mbed_official 573:ad23fe03a082 767 hqspi->TxXferCount = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 768 hqspi->TxXferSize = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 769 hqspi->pTxBuffPtr = pData;
mbed_official 573:ad23fe03a082 770
mbed_official 573:ad23fe03a082 771 /* Configure QSPI: CCR register with functional as indirect write */
mbed_official 573:ad23fe03a082 772 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE);
mbed_official 573:ad23fe03a082 773
mbed_official 573:ad23fe03a082 774 while(hqspi->TxXferCount > 0)
mbed_official 573:ad23fe03a082 775 {
mbed_official 573:ad23fe03a082 776 /* Wait until FT flag is set to send data */
mbed_official 573:ad23fe03a082 777 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_FT, SET, Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 778 {
mbed_official 573:ad23fe03a082 779 status = HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 780 break;
mbed_official 573:ad23fe03a082 781 }
mbed_official 573:ad23fe03a082 782
mbed_official 573:ad23fe03a082 783 *(__IO uint8_t *)data_reg = *hqspi->pTxBuffPtr++;
mbed_official 573:ad23fe03a082 784 hqspi->TxXferCount--;
mbed_official 573:ad23fe03a082 785 }
mbed_official 573:ad23fe03a082 786
mbed_official 573:ad23fe03a082 787 if (status == HAL_OK)
mbed_official 573:ad23fe03a082 788 {
mbed_official 573:ad23fe03a082 789 /* Wait until TC flag is set to go back in idle state */
mbed_official 573:ad23fe03a082 790 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 791 {
mbed_official 573:ad23fe03a082 792 status = HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 793 }
mbed_official 573:ad23fe03a082 794 else
mbed_official 573:ad23fe03a082 795 {
mbed_official 573:ad23fe03a082 796 /* Clear Transfer Complete bit */
mbed_official 573:ad23fe03a082 797 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 573:ad23fe03a082 798
mbed_official 573:ad23fe03a082 799 /* Clear Busy bit */
mbed_official 573:ad23fe03a082 800 status = HAL_QSPI_Abort(hqspi);
mbed_official 573:ad23fe03a082 801 }
mbed_official 573:ad23fe03a082 802 }
mbed_official 573:ad23fe03a082 803
mbed_official 573:ad23fe03a082 804 /* Update QSPI state */
mbed_official 573:ad23fe03a082 805 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 806 }
mbed_official 573:ad23fe03a082 807 else
mbed_official 573:ad23fe03a082 808 {
mbed_official 573:ad23fe03a082 809 status = HAL_ERROR;
mbed_official 573:ad23fe03a082 810 }
mbed_official 573:ad23fe03a082 811 }
mbed_official 573:ad23fe03a082 812 else
mbed_official 573:ad23fe03a082 813 {
mbed_official 573:ad23fe03a082 814 status = HAL_BUSY;
mbed_official 573:ad23fe03a082 815 }
mbed_official 573:ad23fe03a082 816
mbed_official 573:ad23fe03a082 817 /* Process unlocked */
mbed_official 573:ad23fe03a082 818 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 819
mbed_official 573:ad23fe03a082 820 return status;
mbed_official 573:ad23fe03a082 821 }
mbed_official 573:ad23fe03a082 822
mbed_official 573:ad23fe03a082 823
mbed_official 573:ad23fe03a082 824 /**
mbed_official 573:ad23fe03a082 825 * @brief Receive an amount of data in blocking mode
mbed_official 573:ad23fe03a082 826 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 827 * @param pData: pointer to data buffer
mbed_official 573:ad23fe03a082 828 * @param Timeout : Time out duration
mbed_official 573:ad23fe03a082 829 * @note This function is used only in Indirect Read Mode
mbed_official 573:ad23fe03a082 830 * @retval HAL status
mbed_official 573:ad23fe03a082 831 */
mbed_official 573:ad23fe03a082 832 HAL_StatusTypeDef HAL_QSPI_Receive(QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout)
mbed_official 573:ad23fe03a082 833 {
mbed_official 573:ad23fe03a082 834 HAL_StatusTypeDef status = HAL_OK;
mbed_official 573:ad23fe03a082 835 uint32_t addr_reg = READ_REG(hqspi->Instance->AR);
mbed_official 573:ad23fe03a082 836 __IO uint32_t *data_reg = &hqspi->Instance->DR;
mbed_official 573:ad23fe03a082 837
mbed_official 573:ad23fe03a082 838 /* Process locked */
mbed_official 573:ad23fe03a082 839 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 840
mbed_official 573:ad23fe03a082 841 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 573:ad23fe03a082 842 {
mbed_official 573:ad23fe03a082 843 if(pData != NULL )
mbed_official 573:ad23fe03a082 844 {
mbed_official 573:ad23fe03a082 845 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 846
mbed_official 573:ad23fe03a082 847 /* Update state */
mbed_official 573:ad23fe03a082 848 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_RX;
mbed_official 573:ad23fe03a082 849
mbed_official 573:ad23fe03a082 850 /* Configure counters and size of the handle */
mbed_official 573:ad23fe03a082 851 hqspi->RxXferCount = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 852 hqspi->RxXferSize = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 853 hqspi->pRxBuffPtr = pData;
mbed_official 573:ad23fe03a082 854
mbed_official 573:ad23fe03a082 855 /* Configure QSPI: CCR register with functional as indirect read */
mbed_official 573:ad23fe03a082 856 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ);
mbed_official 573:ad23fe03a082 857
mbed_official 573:ad23fe03a082 858 /* Start the transfer by re-writing the address in AR register */
mbed_official 573:ad23fe03a082 859 WRITE_REG(hqspi->Instance->AR, addr_reg);
mbed_official 573:ad23fe03a082 860
mbed_official 573:ad23fe03a082 861 while(hqspi->RxXferCount > 0)
mbed_official 573:ad23fe03a082 862 {
mbed_official 573:ad23fe03a082 863 /* Wait until FT or TC flag is set to read received data */
mbed_official 573:ad23fe03a082 864 if(QSPI_WaitFlagStateUntilTimeout(hqspi, (QSPI_FLAG_FT | QSPI_FLAG_TC), SET, Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 865 {
mbed_official 573:ad23fe03a082 866 status = HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 867 break;
mbed_official 573:ad23fe03a082 868 }
mbed_official 573:ad23fe03a082 869
mbed_official 573:ad23fe03a082 870 *hqspi->pRxBuffPtr++ = *(__IO uint8_t *)data_reg;
mbed_official 573:ad23fe03a082 871 hqspi->RxXferCount--;
mbed_official 573:ad23fe03a082 872 }
mbed_official 573:ad23fe03a082 873
mbed_official 573:ad23fe03a082 874 if (status == HAL_OK)
mbed_official 573:ad23fe03a082 875 {
mbed_official 573:ad23fe03a082 876 /* Wait until TC flag is set to go back in idle state */
mbed_official 573:ad23fe03a082 877 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 878 {
mbed_official 573:ad23fe03a082 879 status = HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 880 }
mbed_official 573:ad23fe03a082 881 else
mbed_official 573:ad23fe03a082 882 {
mbed_official 573:ad23fe03a082 883 /* Clear Transfer Complete bit */
mbed_official 573:ad23fe03a082 884 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 573:ad23fe03a082 885
mbed_official 573:ad23fe03a082 886 /* Workaround - Extra data written in the FIFO at the end of a read transfer */
mbed_official 573:ad23fe03a082 887 status = HAL_QSPI_Abort(hqspi);
mbed_official 573:ad23fe03a082 888 }
mbed_official 573:ad23fe03a082 889 }
mbed_official 573:ad23fe03a082 890
mbed_official 573:ad23fe03a082 891 /* Update QSPI state */
mbed_official 573:ad23fe03a082 892 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 893 }
mbed_official 573:ad23fe03a082 894 else
mbed_official 573:ad23fe03a082 895 {
mbed_official 573:ad23fe03a082 896 status = HAL_ERROR;
mbed_official 573:ad23fe03a082 897 }
mbed_official 573:ad23fe03a082 898 }
mbed_official 573:ad23fe03a082 899 else
mbed_official 573:ad23fe03a082 900 {
mbed_official 573:ad23fe03a082 901 status = HAL_BUSY;
mbed_official 573:ad23fe03a082 902 }
mbed_official 573:ad23fe03a082 903
mbed_official 573:ad23fe03a082 904 /* Process unlocked */
mbed_official 573:ad23fe03a082 905 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 906
mbed_official 573:ad23fe03a082 907 return status;
mbed_official 573:ad23fe03a082 908 }
mbed_official 573:ad23fe03a082 909
mbed_official 573:ad23fe03a082 910 /**
mbed_official 573:ad23fe03a082 911 * @brief Send an amount of data in interrupt mode
mbed_official 573:ad23fe03a082 912 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 913 * @param pData: pointer to data buffer
mbed_official 573:ad23fe03a082 914 * @note This function is used only in Indirect Write Mode
mbed_official 573:ad23fe03a082 915 * @retval HAL status
mbed_official 573:ad23fe03a082 916 */
mbed_official 573:ad23fe03a082 917 HAL_StatusTypeDef HAL_QSPI_Transmit_IT(QSPI_HandleTypeDef *hqspi, uint8_t *pData)
mbed_official 573:ad23fe03a082 918 {
mbed_official 573:ad23fe03a082 919 HAL_StatusTypeDef status = HAL_OK;
mbed_official 573:ad23fe03a082 920
mbed_official 573:ad23fe03a082 921 /* Process locked */
mbed_official 573:ad23fe03a082 922 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 923
mbed_official 573:ad23fe03a082 924 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 573:ad23fe03a082 925 {
mbed_official 573:ad23fe03a082 926 if(pData != NULL )
mbed_official 573:ad23fe03a082 927 {
mbed_official 573:ad23fe03a082 928 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 929
mbed_official 573:ad23fe03a082 930 /* Update state */
mbed_official 573:ad23fe03a082 931 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_TX;
mbed_official 573:ad23fe03a082 932
mbed_official 573:ad23fe03a082 933 /* Configure counters and size of the handle */
mbed_official 573:ad23fe03a082 934 hqspi->TxXferCount = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 935 hqspi->TxXferSize = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 936 hqspi->pTxBuffPtr = pData;
mbed_official 573:ad23fe03a082 937
mbed_official 573:ad23fe03a082 938 /* Configure QSPI: CCR register with functional as indirect write */
mbed_official 573:ad23fe03a082 939 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE);
mbed_official 573:ad23fe03a082 940
mbed_official 573:ad23fe03a082 941 /* Enable the QSPI transfer error, FIFO threshold and transfer complete Interrupts */
mbed_official 573:ad23fe03a082 942 __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE | QSPI_IT_FT | QSPI_IT_TC);
mbed_official 573:ad23fe03a082 943
mbed_official 573:ad23fe03a082 944 }
mbed_official 573:ad23fe03a082 945 else
mbed_official 573:ad23fe03a082 946 {
mbed_official 573:ad23fe03a082 947 status = HAL_ERROR;
mbed_official 573:ad23fe03a082 948 }
mbed_official 573:ad23fe03a082 949 }
mbed_official 573:ad23fe03a082 950 else
mbed_official 573:ad23fe03a082 951 {
mbed_official 573:ad23fe03a082 952 status = HAL_BUSY;
mbed_official 573:ad23fe03a082 953 }
mbed_official 573:ad23fe03a082 954
mbed_official 573:ad23fe03a082 955 /* Process unlocked */
mbed_official 573:ad23fe03a082 956 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 957
mbed_official 573:ad23fe03a082 958 return status;
mbed_official 573:ad23fe03a082 959 }
mbed_official 573:ad23fe03a082 960
mbed_official 573:ad23fe03a082 961 /**
mbed_official 573:ad23fe03a082 962 * @brief Receive an amount of data in no-blocking mode with Interrupt
mbed_official 573:ad23fe03a082 963 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 964 * @param pData: pointer to data buffer
mbed_official 573:ad23fe03a082 965 * @note This function is used only in Indirect Read Mode
mbed_official 573:ad23fe03a082 966 * @retval HAL status
mbed_official 573:ad23fe03a082 967 */
mbed_official 573:ad23fe03a082 968 HAL_StatusTypeDef HAL_QSPI_Receive_IT(QSPI_HandleTypeDef *hqspi, uint8_t *pData)
mbed_official 573:ad23fe03a082 969 {
mbed_official 573:ad23fe03a082 970 HAL_StatusTypeDef status = HAL_OK;
mbed_official 573:ad23fe03a082 971 uint32_t addr_reg = READ_REG(hqspi->Instance->AR);
mbed_official 573:ad23fe03a082 972
mbed_official 573:ad23fe03a082 973 /* Process locked */
mbed_official 573:ad23fe03a082 974 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 975
mbed_official 573:ad23fe03a082 976 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 573:ad23fe03a082 977 {
mbed_official 573:ad23fe03a082 978 if(pData != NULL )
mbed_official 573:ad23fe03a082 979 {
mbed_official 573:ad23fe03a082 980 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 981
mbed_official 573:ad23fe03a082 982 /* Update state */
mbed_official 573:ad23fe03a082 983 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_RX;
mbed_official 573:ad23fe03a082 984
mbed_official 573:ad23fe03a082 985 /* Configure counters and size of the handle */
mbed_official 573:ad23fe03a082 986 hqspi->RxXferCount = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 987 hqspi->RxXferSize = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 988 hqspi->pRxBuffPtr = pData;
mbed_official 573:ad23fe03a082 989
mbed_official 573:ad23fe03a082 990 /* Configure QSPI: CCR register with functional as indirect read */
mbed_official 573:ad23fe03a082 991 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ);
mbed_official 573:ad23fe03a082 992
mbed_official 573:ad23fe03a082 993 /* Start the transfer by re-writing the address in AR register */
mbed_official 573:ad23fe03a082 994 WRITE_REG(hqspi->Instance->AR, addr_reg);
mbed_official 573:ad23fe03a082 995
mbed_official 573:ad23fe03a082 996 /* Enable the QSPI transfer error, FIFO threshold and transfer complete Interrupts */
mbed_official 573:ad23fe03a082 997 __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE | QSPI_IT_FT | QSPI_IT_TC);
mbed_official 573:ad23fe03a082 998 }
mbed_official 573:ad23fe03a082 999 else
mbed_official 573:ad23fe03a082 1000 {
mbed_official 573:ad23fe03a082 1001 status = HAL_ERROR;
mbed_official 573:ad23fe03a082 1002 }
mbed_official 573:ad23fe03a082 1003 }
mbed_official 573:ad23fe03a082 1004 else
mbed_official 573:ad23fe03a082 1005 {
mbed_official 573:ad23fe03a082 1006 status = HAL_BUSY;
mbed_official 573:ad23fe03a082 1007 }
mbed_official 573:ad23fe03a082 1008
mbed_official 573:ad23fe03a082 1009 /* Process unlocked */
mbed_official 573:ad23fe03a082 1010 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 1011
mbed_official 573:ad23fe03a082 1012 return status;
mbed_official 573:ad23fe03a082 1013 }
mbed_official 573:ad23fe03a082 1014
mbed_official 573:ad23fe03a082 1015 /**
mbed_official 573:ad23fe03a082 1016 * @brief Sends an amount of data in non blocking mode with DMA.
mbed_official 573:ad23fe03a082 1017 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1018 * @param pData: pointer to data buffer
mbed_official 573:ad23fe03a082 1019 * @note This function is used only in Indirect Write Mode
mbed_official 573:ad23fe03a082 1020 * @retval HAL status
mbed_official 573:ad23fe03a082 1021 */
mbed_official 573:ad23fe03a082 1022 HAL_StatusTypeDef HAL_QSPI_Transmit_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pData)
mbed_official 573:ad23fe03a082 1023 {
mbed_official 573:ad23fe03a082 1024 HAL_StatusTypeDef status = HAL_OK;
mbed_official 573:ad23fe03a082 1025 uint32_t *tmp;
mbed_official 573:ad23fe03a082 1026
mbed_official 573:ad23fe03a082 1027 /* Process locked */
mbed_official 573:ad23fe03a082 1028 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 1029
mbed_official 573:ad23fe03a082 1030 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 573:ad23fe03a082 1031 {
mbed_official 573:ad23fe03a082 1032 if(pData != NULL )
mbed_official 573:ad23fe03a082 1033 {
mbed_official 573:ad23fe03a082 1034 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 1035
mbed_official 573:ad23fe03a082 1036 /* Update state */
mbed_official 573:ad23fe03a082 1037 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_TX;
mbed_official 573:ad23fe03a082 1038
mbed_official 573:ad23fe03a082 1039 /* Configure counters and size of the handle */
mbed_official 573:ad23fe03a082 1040 hqspi->TxXferCount = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 1041 hqspi->TxXferSize = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 1042 hqspi->pTxBuffPtr = pData;
mbed_official 573:ad23fe03a082 1043
mbed_official 573:ad23fe03a082 1044 /* Configure QSPI: CCR register with functional mode as indirect write */
mbed_official 573:ad23fe03a082 1045 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE);
mbed_official 573:ad23fe03a082 1046
mbed_official 573:ad23fe03a082 1047 /* Set the QSPI DMA transfer complete callback */
mbed_official 573:ad23fe03a082 1048 hqspi->hdma->XferCpltCallback = QSPI_DMATxCplt;
mbed_official 573:ad23fe03a082 1049
mbed_official 573:ad23fe03a082 1050 /* Set the QSPI DMA Half transfer complete callback */
mbed_official 573:ad23fe03a082 1051 hqspi->hdma->XferHalfCpltCallback = QSPI_DMATxHalfCplt;
mbed_official 573:ad23fe03a082 1052
mbed_official 573:ad23fe03a082 1053 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 1054 hqspi->hdma->XferErrorCallback = QSPI_DMAError;
mbed_official 573:ad23fe03a082 1055
mbed_official 573:ad23fe03a082 1056 /* Configure the direction of the DMA */
mbed_official 573:ad23fe03a082 1057 hqspi->hdma->Init.Direction = DMA_MEMORY_TO_PERIPH;
mbed_official 573:ad23fe03a082 1058 MODIFY_REG(hqspi->hdma->Instance->CR, DMA_SxCR_DIR, hqspi->hdma->Init.Direction);
mbed_official 573:ad23fe03a082 1059
mbed_official 573:ad23fe03a082 1060 /* Enable the QSPI transmit DMA Channel */
mbed_official 573:ad23fe03a082 1061 tmp = (uint32_t*)&pData;
mbed_official 573:ad23fe03a082 1062 HAL_DMA_Start_IT(hqspi->hdma, *(uint32_t*)tmp, (uint32_t)&hqspi->Instance->DR, hqspi->TxXferSize);
mbed_official 573:ad23fe03a082 1063
mbed_official 573:ad23fe03a082 1064 /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */
mbed_official 573:ad23fe03a082 1065 SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
mbed_official 573:ad23fe03a082 1066 }
mbed_official 573:ad23fe03a082 1067 else
mbed_official 573:ad23fe03a082 1068 {
mbed_official 573:ad23fe03a082 1069 status = HAL_OK;
mbed_official 573:ad23fe03a082 1070 }
mbed_official 573:ad23fe03a082 1071 }
mbed_official 573:ad23fe03a082 1072 else
mbed_official 573:ad23fe03a082 1073 {
mbed_official 573:ad23fe03a082 1074 status = HAL_BUSY;
mbed_official 573:ad23fe03a082 1075 }
mbed_official 573:ad23fe03a082 1076
mbed_official 573:ad23fe03a082 1077 /* Process unlocked */
mbed_official 573:ad23fe03a082 1078 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 1079
mbed_official 573:ad23fe03a082 1080 return status;
mbed_official 573:ad23fe03a082 1081 }
mbed_official 573:ad23fe03a082 1082
mbed_official 573:ad23fe03a082 1083 /**
mbed_official 573:ad23fe03a082 1084 * @brief Receives an amount of data in non blocking mode with DMA.
mbed_official 573:ad23fe03a082 1085 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1086 * @param pData: pointer to data buffer.
mbed_official 573:ad23fe03a082 1087 * @note This function is used only in Indirect Read Mode
mbed_official 573:ad23fe03a082 1088 * @retval HAL status
mbed_official 573:ad23fe03a082 1089 */
mbed_official 573:ad23fe03a082 1090 HAL_StatusTypeDef HAL_QSPI_Receive_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pData)
mbed_official 573:ad23fe03a082 1091 {
mbed_official 573:ad23fe03a082 1092 HAL_StatusTypeDef status = HAL_OK;
mbed_official 573:ad23fe03a082 1093 uint32_t *tmp;
mbed_official 573:ad23fe03a082 1094 uint32_t addr_reg = READ_REG(hqspi->Instance->AR);
mbed_official 573:ad23fe03a082 1095
mbed_official 573:ad23fe03a082 1096 /* Process locked */
mbed_official 573:ad23fe03a082 1097 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 1098
mbed_official 573:ad23fe03a082 1099 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 573:ad23fe03a082 1100 {
mbed_official 573:ad23fe03a082 1101 if(pData != NULL )
mbed_official 573:ad23fe03a082 1102 {
mbed_official 573:ad23fe03a082 1103 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 1104
mbed_official 573:ad23fe03a082 1105 /* Update state */
mbed_official 573:ad23fe03a082 1106 hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_RX;
mbed_official 573:ad23fe03a082 1107
mbed_official 573:ad23fe03a082 1108 /* Configure counters and size of the handle */
mbed_official 573:ad23fe03a082 1109 hqspi->RxXferCount = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 1110 hqspi->RxXferSize = READ_REG(hqspi->Instance->DLR) + 1;
mbed_official 573:ad23fe03a082 1111 hqspi->pRxBuffPtr = pData;
mbed_official 573:ad23fe03a082 1112
mbed_official 573:ad23fe03a082 1113 /* Set the QSPI DMA transfer complete callback */
mbed_official 573:ad23fe03a082 1114 hqspi->hdma->XferCpltCallback = QSPI_DMARxCplt;
mbed_official 573:ad23fe03a082 1115
mbed_official 573:ad23fe03a082 1116 /* Set the QSPI DMA Half transfer complete callback */
mbed_official 573:ad23fe03a082 1117 hqspi->hdma->XferHalfCpltCallback = QSPI_DMARxHalfCplt;
mbed_official 573:ad23fe03a082 1118
mbed_official 573:ad23fe03a082 1119 /* Set the DMA error callback */
mbed_official 573:ad23fe03a082 1120 hqspi->hdma->XferErrorCallback = QSPI_DMAError;
mbed_official 573:ad23fe03a082 1121
mbed_official 573:ad23fe03a082 1122 /* Configure the direction of the DMA */
mbed_official 573:ad23fe03a082 1123 hqspi->hdma->Init.Direction = DMA_PERIPH_TO_MEMORY;
mbed_official 573:ad23fe03a082 1124 MODIFY_REG(hqspi->hdma->Instance->CR, DMA_SxCR_DIR, hqspi->hdma->Init.Direction);
mbed_official 573:ad23fe03a082 1125
mbed_official 573:ad23fe03a082 1126 /* Enable the DMA Channel */
mbed_official 573:ad23fe03a082 1127 tmp = (uint32_t*)&pData;
mbed_official 573:ad23fe03a082 1128 HAL_DMA_Start_IT(hqspi->hdma, (uint32_t)&hqspi->Instance->DR, *(uint32_t*)tmp, hqspi->RxXferSize);
mbed_official 573:ad23fe03a082 1129
mbed_official 573:ad23fe03a082 1130 /* Configure QSPI: CCR register with functional as indirect read */
mbed_official 573:ad23fe03a082 1131 MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ);
mbed_official 573:ad23fe03a082 1132
mbed_official 573:ad23fe03a082 1133 /* Start the transfer by re-writing the address in AR register */
mbed_official 573:ad23fe03a082 1134 WRITE_REG(hqspi->Instance->AR, addr_reg);
mbed_official 573:ad23fe03a082 1135
mbed_official 573:ad23fe03a082 1136 /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */
mbed_official 573:ad23fe03a082 1137 SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
mbed_official 573:ad23fe03a082 1138 }
mbed_official 573:ad23fe03a082 1139 else
mbed_official 573:ad23fe03a082 1140 {
mbed_official 573:ad23fe03a082 1141 status = HAL_ERROR;
mbed_official 573:ad23fe03a082 1142 }
mbed_official 573:ad23fe03a082 1143 }
mbed_official 573:ad23fe03a082 1144 else
mbed_official 573:ad23fe03a082 1145 {
mbed_official 573:ad23fe03a082 1146 status = HAL_BUSY;
mbed_official 573:ad23fe03a082 1147 }
mbed_official 573:ad23fe03a082 1148
mbed_official 573:ad23fe03a082 1149 /* Process unlocked */
mbed_official 573:ad23fe03a082 1150 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 1151
mbed_official 573:ad23fe03a082 1152 return status;
mbed_official 573:ad23fe03a082 1153 }
mbed_official 573:ad23fe03a082 1154
mbed_official 573:ad23fe03a082 1155 /**
mbed_official 573:ad23fe03a082 1156 * @brief Configure the QSPI Automatic Polling Mode in blocking mode.
mbed_official 573:ad23fe03a082 1157 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1158 * @param cmd: structure that contains the command configuration information.
mbed_official 573:ad23fe03a082 1159 * @param cfg: structure that contains the polling configuration information.
mbed_official 573:ad23fe03a082 1160 * @param Timeout : Time out duration
mbed_official 573:ad23fe03a082 1161 * @note This function is used only in Automatic Polling Mode
mbed_official 573:ad23fe03a082 1162 * @retval HAL status
mbed_official 573:ad23fe03a082 1163 */
mbed_official 573:ad23fe03a082 1164 HAL_StatusTypeDef HAL_QSPI_AutoPolling(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg, uint32_t Timeout)
mbed_official 573:ad23fe03a082 1165 {
mbed_official 573:ad23fe03a082 1166 HAL_StatusTypeDef status = HAL_ERROR;
mbed_official 573:ad23fe03a082 1167
mbed_official 573:ad23fe03a082 1168 /* Check the parameters */
mbed_official 573:ad23fe03a082 1169 assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode));
mbed_official 573:ad23fe03a082 1170 if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
mbed_official 573:ad23fe03a082 1171 {
mbed_official 573:ad23fe03a082 1172 assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction));
mbed_official 573:ad23fe03a082 1173 }
mbed_official 573:ad23fe03a082 1174
mbed_official 573:ad23fe03a082 1175 assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode));
mbed_official 573:ad23fe03a082 1176 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 573:ad23fe03a082 1177 {
mbed_official 573:ad23fe03a082 1178 assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize));
mbed_official 573:ad23fe03a082 1179 }
mbed_official 573:ad23fe03a082 1180
mbed_official 573:ad23fe03a082 1181 assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode));
mbed_official 573:ad23fe03a082 1182 if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
mbed_official 573:ad23fe03a082 1183 {
mbed_official 573:ad23fe03a082 1184 assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize));
mbed_official 573:ad23fe03a082 1185 }
mbed_official 573:ad23fe03a082 1186
mbed_official 573:ad23fe03a082 1187 assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles));
mbed_official 573:ad23fe03a082 1188 assert_param(IS_QSPI_DATA_MODE(cmd->DataMode));
mbed_official 573:ad23fe03a082 1189
mbed_official 573:ad23fe03a082 1190 assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode));
mbed_official 573:ad23fe03a082 1191 assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle));
mbed_official 573:ad23fe03a082 1192 assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode));
mbed_official 573:ad23fe03a082 1193
mbed_official 573:ad23fe03a082 1194 assert_param(IS_QSPI_INTERVAL(cfg->Interval));
mbed_official 573:ad23fe03a082 1195 assert_param(IS_QSPI_STATUS_BYTES_SIZE(cfg->StatusBytesSize));
mbed_official 573:ad23fe03a082 1196 assert_param(IS_QSPI_MATCH_MODE(cfg->MatchMode));
mbed_official 573:ad23fe03a082 1197
mbed_official 573:ad23fe03a082 1198 /* Process locked */
mbed_official 573:ad23fe03a082 1199 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 1200
mbed_official 573:ad23fe03a082 1201 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 573:ad23fe03a082 1202 {
mbed_official 573:ad23fe03a082 1203
mbed_official 573:ad23fe03a082 1204 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 1205
mbed_official 573:ad23fe03a082 1206 /* Update state */
mbed_official 573:ad23fe03a082 1207 hqspi->State = HAL_QSPI_STATE_BUSY_AUTO_POLLING;
mbed_official 573:ad23fe03a082 1208
mbed_official 573:ad23fe03a082 1209 /* Wait till BUSY flag reset */
mbed_official 573:ad23fe03a082 1210 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, Timeout);
mbed_official 573:ad23fe03a082 1211
mbed_official 573:ad23fe03a082 1212 if (status == HAL_OK)
mbed_official 573:ad23fe03a082 1213 {
mbed_official 573:ad23fe03a082 1214 /* Configure QSPI: PSMAR register with the status match value */
mbed_official 573:ad23fe03a082 1215 WRITE_REG(hqspi->Instance->PSMAR, cfg->Match);
mbed_official 573:ad23fe03a082 1216
mbed_official 573:ad23fe03a082 1217 /* Configure QSPI: PSMKR register with the status mask value */
mbed_official 573:ad23fe03a082 1218 WRITE_REG(hqspi->Instance->PSMKR, cfg->Mask);
mbed_official 573:ad23fe03a082 1219
mbed_official 573:ad23fe03a082 1220 /* Configure QSPI: PIR register with the interval value */
mbed_official 573:ad23fe03a082 1221 WRITE_REG(hqspi->Instance->PIR, cfg->Interval);
mbed_official 573:ad23fe03a082 1222
mbed_official 573:ad23fe03a082 1223 /* Configure QSPI: CR register with Match mode and Automatic stop enabled
mbed_official 573:ad23fe03a082 1224 (otherwise there will be an infinite loop in blocking mode) */
mbed_official 573:ad23fe03a082 1225 MODIFY_REG(hqspi->Instance->CR, (QUADSPI_CR_PMM | QUADSPI_CR_APMS),
mbed_official 573:ad23fe03a082 1226 (cfg->MatchMode | QSPI_AUTOMATIC_STOP_ENABLE));
mbed_official 573:ad23fe03a082 1227
mbed_official 573:ad23fe03a082 1228 /* Call the configuration function */
mbed_official 573:ad23fe03a082 1229 cmd->NbData = cfg->StatusBytesSize;
mbed_official 573:ad23fe03a082 1230 QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_AUTO_POLLING);
mbed_official 573:ad23fe03a082 1231
mbed_official 573:ad23fe03a082 1232 /* Wait until SM flag is set to go back in idle state */
mbed_official 573:ad23fe03a082 1233 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_SM, SET, Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 1234 {
mbed_official 573:ad23fe03a082 1235 status = HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 1236 }
mbed_official 573:ad23fe03a082 1237 else
mbed_official 573:ad23fe03a082 1238 {
mbed_official 573:ad23fe03a082 1239 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_SM);
mbed_official 573:ad23fe03a082 1240
mbed_official 573:ad23fe03a082 1241 /* Update state */
mbed_official 573:ad23fe03a082 1242 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 1243 }
mbed_official 573:ad23fe03a082 1244 }
mbed_official 573:ad23fe03a082 1245 }
mbed_official 573:ad23fe03a082 1246 else
mbed_official 573:ad23fe03a082 1247 {
mbed_official 573:ad23fe03a082 1248 status = HAL_BUSY;
mbed_official 573:ad23fe03a082 1249 }
mbed_official 573:ad23fe03a082 1250 /* Process unlocked */
mbed_official 573:ad23fe03a082 1251 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 1252
mbed_official 573:ad23fe03a082 1253 /* Return function status */
mbed_official 573:ad23fe03a082 1254 return status;
mbed_official 573:ad23fe03a082 1255 }
mbed_official 573:ad23fe03a082 1256
mbed_official 573:ad23fe03a082 1257 /**
mbed_official 573:ad23fe03a082 1258 * @brief Configure the QSPI Automatic Polling Mode in non-blocking mode.
mbed_official 573:ad23fe03a082 1259 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1260 * @param cmd: structure that contains the command configuration information.
mbed_official 573:ad23fe03a082 1261 * @param cfg: structure that contains the polling configuration information.
mbed_official 573:ad23fe03a082 1262 * @note This function is used only in Automatic Polling Mode
mbed_official 573:ad23fe03a082 1263 * @retval HAL status
mbed_official 573:ad23fe03a082 1264 */
mbed_official 573:ad23fe03a082 1265 HAL_StatusTypeDef HAL_QSPI_AutoPolling_IT(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg)
mbed_official 573:ad23fe03a082 1266 {
mbed_official 573:ad23fe03a082 1267 HAL_StatusTypeDef status = HAL_ERROR;
mbed_official 573:ad23fe03a082 1268
mbed_official 573:ad23fe03a082 1269 /* Check the parameters */
mbed_official 573:ad23fe03a082 1270 assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode));
mbed_official 573:ad23fe03a082 1271 if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
mbed_official 573:ad23fe03a082 1272 {
mbed_official 573:ad23fe03a082 1273 assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction));
mbed_official 573:ad23fe03a082 1274 }
mbed_official 573:ad23fe03a082 1275
mbed_official 573:ad23fe03a082 1276 assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode));
mbed_official 573:ad23fe03a082 1277 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 573:ad23fe03a082 1278 {
mbed_official 573:ad23fe03a082 1279 assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize));
mbed_official 573:ad23fe03a082 1280 }
mbed_official 573:ad23fe03a082 1281
mbed_official 573:ad23fe03a082 1282 assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode));
mbed_official 573:ad23fe03a082 1283 if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
mbed_official 573:ad23fe03a082 1284 {
mbed_official 573:ad23fe03a082 1285 assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize));
mbed_official 573:ad23fe03a082 1286 }
mbed_official 573:ad23fe03a082 1287
mbed_official 573:ad23fe03a082 1288 assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles));
mbed_official 573:ad23fe03a082 1289 assert_param(IS_QSPI_DATA_MODE(cmd->DataMode));
mbed_official 573:ad23fe03a082 1290
mbed_official 573:ad23fe03a082 1291 assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode));
mbed_official 573:ad23fe03a082 1292 assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle));
mbed_official 573:ad23fe03a082 1293 assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode));
mbed_official 573:ad23fe03a082 1294
mbed_official 573:ad23fe03a082 1295 assert_param(IS_QSPI_INTERVAL(cfg->Interval));
mbed_official 573:ad23fe03a082 1296 assert_param(IS_QSPI_STATUS_BYTES_SIZE(cfg->StatusBytesSize));
mbed_official 573:ad23fe03a082 1297 assert_param(IS_QSPI_MATCH_MODE(cfg->MatchMode));
mbed_official 573:ad23fe03a082 1298 assert_param(IS_QSPI_AUTOMATIC_STOP(cfg->AutomaticStop));
mbed_official 573:ad23fe03a082 1299
mbed_official 573:ad23fe03a082 1300 /* Process locked */
mbed_official 573:ad23fe03a082 1301 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 1302
mbed_official 573:ad23fe03a082 1303 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 573:ad23fe03a082 1304 {
mbed_official 573:ad23fe03a082 1305 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 1306
mbed_official 573:ad23fe03a082 1307 /* Update state */
mbed_official 573:ad23fe03a082 1308 hqspi->State = HAL_QSPI_STATE_BUSY_AUTO_POLLING;
mbed_official 573:ad23fe03a082 1309
mbed_official 573:ad23fe03a082 1310 /* Wait till BUSY flag reset */
mbed_official 573:ad23fe03a082 1311 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, hqspi->Timeout);
mbed_official 573:ad23fe03a082 1312
mbed_official 573:ad23fe03a082 1313 if (status == HAL_OK)
mbed_official 573:ad23fe03a082 1314 {
mbed_official 573:ad23fe03a082 1315 /* Configure QSPI: PSMAR register with the status match value */
mbed_official 573:ad23fe03a082 1316 WRITE_REG(hqspi->Instance->PSMAR, cfg->Match);
mbed_official 573:ad23fe03a082 1317
mbed_official 573:ad23fe03a082 1318 /* Configure QSPI: PSMKR register with the status mask value */
mbed_official 573:ad23fe03a082 1319 WRITE_REG(hqspi->Instance->PSMKR, cfg->Mask);
mbed_official 573:ad23fe03a082 1320
mbed_official 573:ad23fe03a082 1321 /* Configure QSPI: PIR register with the interval value */
mbed_official 573:ad23fe03a082 1322 WRITE_REG(hqspi->Instance->PIR, cfg->Interval);
mbed_official 573:ad23fe03a082 1323
mbed_official 573:ad23fe03a082 1324 /* Configure QSPI: CR register with Match mode and Automatic stop mode */
mbed_official 573:ad23fe03a082 1325 MODIFY_REG(hqspi->Instance->CR, (QUADSPI_CR_PMM | QUADSPI_CR_APMS),
mbed_official 573:ad23fe03a082 1326 (cfg->MatchMode | cfg->AutomaticStop));
mbed_official 573:ad23fe03a082 1327
mbed_official 573:ad23fe03a082 1328 /* Call the configuration function */
mbed_official 573:ad23fe03a082 1329 cmd->NbData = cfg->StatusBytesSize;
mbed_official 573:ad23fe03a082 1330 QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_AUTO_POLLING);
mbed_official 573:ad23fe03a082 1331
mbed_official 573:ad23fe03a082 1332 /* Enable the QSPI Transfer Error, FIFO threshold and status match Interrupt */
mbed_official 573:ad23fe03a082 1333 __HAL_QSPI_ENABLE_IT(hqspi, (QSPI_IT_FT | QSPI_IT_SM | QSPI_IT_TE));
mbed_official 573:ad23fe03a082 1334 }
mbed_official 573:ad23fe03a082 1335 }
mbed_official 573:ad23fe03a082 1336 else
mbed_official 573:ad23fe03a082 1337 {
mbed_official 573:ad23fe03a082 1338 status = HAL_BUSY;
mbed_official 573:ad23fe03a082 1339 }
mbed_official 573:ad23fe03a082 1340
mbed_official 573:ad23fe03a082 1341 /* Process unlocked */
mbed_official 573:ad23fe03a082 1342 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 1343
mbed_official 573:ad23fe03a082 1344 /* Return function status */
mbed_official 573:ad23fe03a082 1345 return status;
mbed_official 573:ad23fe03a082 1346 }
mbed_official 573:ad23fe03a082 1347
mbed_official 573:ad23fe03a082 1348 /**
mbed_official 573:ad23fe03a082 1349 * @brief Configure the Memory Mapped mode.
mbed_official 573:ad23fe03a082 1350 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1351 * @param cmd: structure that contains the command configuration information.
mbed_official 573:ad23fe03a082 1352 * @param cfg: structure that contains the memory mapped configuration information.
mbed_official 573:ad23fe03a082 1353 * @note This function is used only in Memory mapped Mode
mbed_official 573:ad23fe03a082 1354 * @retval HAL status
mbed_official 573:ad23fe03a082 1355 */
mbed_official 573:ad23fe03a082 1356 HAL_StatusTypeDef HAL_QSPI_MemoryMapped(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_MemoryMappedTypeDef *cfg)
mbed_official 573:ad23fe03a082 1357 {
mbed_official 573:ad23fe03a082 1358 HAL_StatusTypeDef status = HAL_ERROR;
mbed_official 573:ad23fe03a082 1359
mbed_official 573:ad23fe03a082 1360 /* Check the parameters */
mbed_official 573:ad23fe03a082 1361 assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode));
mbed_official 573:ad23fe03a082 1362 if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
mbed_official 573:ad23fe03a082 1363 {
mbed_official 573:ad23fe03a082 1364 assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction));
mbed_official 573:ad23fe03a082 1365 }
mbed_official 573:ad23fe03a082 1366
mbed_official 573:ad23fe03a082 1367 assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode));
mbed_official 573:ad23fe03a082 1368 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 573:ad23fe03a082 1369 {
mbed_official 573:ad23fe03a082 1370 assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize));
mbed_official 573:ad23fe03a082 1371 }
mbed_official 573:ad23fe03a082 1372
mbed_official 573:ad23fe03a082 1373 assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode));
mbed_official 573:ad23fe03a082 1374 if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
mbed_official 573:ad23fe03a082 1375 {
mbed_official 573:ad23fe03a082 1376 assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize));
mbed_official 573:ad23fe03a082 1377 }
mbed_official 573:ad23fe03a082 1378
mbed_official 573:ad23fe03a082 1379 assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles));
mbed_official 573:ad23fe03a082 1380 assert_param(IS_QSPI_DATA_MODE(cmd->DataMode));
mbed_official 573:ad23fe03a082 1381
mbed_official 573:ad23fe03a082 1382 assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode));
mbed_official 573:ad23fe03a082 1383 assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle));
mbed_official 573:ad23fe03a082 1384 assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode));
mbed_official 573:ad23fe03a082 1385
mbed_official 573:ad23fe03a082 1386 assert_param(IS_QSPI_TIMEOUT_ACTIVATION(cfg->TimeOutActivation));
mbed_official 573:ad23fe03a082 1387
mbed_official 573:ad23fe03a082 1388 /* Process locked */
mbed_official 573:ad23fe03a082 1389 __HAL_LOCK(hqspi);
mbed_official 573:ad23fe03a082 1390
mbed_official 573:ad23fe03a082 1391 if(hqspi->State == HAL_QSPI_STATE_READY)
mbed_official 573:ad23fe03a082 1392 {
mbed_official 573:ad23fe03a082 1393 hqspi->ErrorCode = HAL_QSPI_ERROR_NONE;
mbed_official 573:ad23fe03a082 1394
mbed_official 573:ad23fe03a082 1395 /* Update state */
mbed_official 573:ad23fe03a082 1396 hqspi->State = HAL_QSPI_STATE_BUSY_MEM_MAPPED;
mbed_official 573:ad23fe03a082 1397
mbed_official 573:ad23fe03a082 1398 /* Wait till BUSY flag reset */
mbed_official 573:ad23fe03a082 1399 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, hqspi->Timeout);
mbed_official 573:ad23fe03a082 1400
mbed_official 573:ad23fe03a082 1401 if (status == HAL_OK)
mbed_official 573:ad23fe03a082 1402 {
mbed_official 573:ad23fe03a082 1403 /* Configure QSPI: CR register with time out counter enable */
mbed_official 573:ad23fe03a082 1404 MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_TCEN, cfg->TimeOutActivation);
mbed_official 573:ad23fe03a082 1405
mbed_official 573:ad23fe03a082 1406 if (cfg->TimeOutActivation == QSPI_TIMEOUT_COUNTER_ENABLE)
mbed_official 573:ad23fe03a082 1407 {
mbed_official 573:ad23fe03a082 1408 assert_param(IS_QSPI_TIMEOUT_PERIOD(cfg->TimeOutPeriod));
mbed_official 573:ad23fe03a082 1409
mbed_official 573:ad23fe03a082 1410 /* Configure QSPI: LPTR register with the low-power time out value */
mbed_official 573:ad23fe03a082 1411 WRITE_REG(hqspi->Instance->LPTR, cfg->TimeOutPeriod);
mbed_official 573:ad23fe03a082 1412
mbed_official 573:ad23fe03a082 1413 /* Enable the QSPI TimeOut Interrupt */
mbed_official 573:ad23fe03a082 1414 __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TO);
mbed_official 573:ad23fe03a082 1415 }
mbed_official 573:ad23fe03a082 1416
mbed_official 573:ad23fe03a082 1417 /* Call the configuration function */
mbed_official 573:ad23fe03a082 1418 QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED);
mbed_official 573:ad23fe03a082 1419
mbed_official 573:ad23fe03a082 1420 }
mbed_official 573:ad23fe03a082 1421 }
mbed_official 573:ad23fe03a082 1422 else
mbed_official 573:ad23fe03a082 1423 {
mbed_official 573:ad23fe03a082 1424 status = HAL_BUSY;
mbed_official 573:ad23fe03a082 1425
mbed_official 573:ad23fe03a082 1426 }
mbed_official 573:ad23fe03a082 1427
mbed_official 573:ad23fe03a082 1428 /* Process unlocked */
mbed_official 573:ad23fe03a082 1429 __HAL_UNLOCK(hqspi);
mbed_official 573:ad23fe03a082 1430
mbed_official 573:ad23fe03a082 1431 /* Return function status */
mbed_official 573:ad23fe03a082 1432 return status;
mbed_official 573:ad23fe03a082 1433 }
mbed_official 573:ad23fe03a082 1434
mbed_official 573:ad23fe03a082 1435 /**
mbed_official 573:ad23fe03a082 1436 * @brief Transfer Error callbacks
mbed_official 573:ad23fe03a082 1437 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1438 * @retval None
mbed_official 573:ad23fe03a082 1439 */
mbed_official 573:ad23fe03a082 1440 __weak void HAL_QSPI_ErrorCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1441 {
mbed_official 573:ad23fe03a082 1442 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 1443 the HAL_QSPI_ErrorCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 1444 */
mbed_official 573:ad23fe03a082 1445 }
mbed_official 573:ad23fe03a082 1446
mbed_official 573:ad23fe03a082 1447 /**
mbed_official 573:ad23fe03a082 1448 * @brief Command completed callbacks.
mbed_official 573:ad23fe03a082 1449 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1450 * @retval None
mbed_official 573:ad23fe03a082 1451 */
mbed_official 573:ad23fe03a082 1452 __weak void HAL_QSPI_CmdCpltCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1453 {
mbed_official 573:ad23fe03a082 1454 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 1455 the HAL_QSPI_CmdCpltCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 1456 */
mbed_official 573:ad23fe03a082 1457 }
mbed_official 573:ad23fe03a082 1458
mbed_official 573:ad23fe03a082 1459 /**
mbed_official 573:ad23fe03a082 1460 * @brief Rx Transfer completed callbacks.
mbed_official 573:ad23fe03a082 1461 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1462 * @retval None
mbed_official 573:ad23fe03a082 1463 */
mbed_official 573:ad23fe03a082 1464 __weak void HAL_QSPI_RxCpltCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1465 {
mbed_official 573:ad23fe03a082 1466 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 1467 the HAL_QSPI_RxCpltCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 1468 */
mbed_official 573:ad23fe03a082 1469 }
mbed_official 573:ad23fe03a082 1470
mbed_official 573:ad23fe03a082 1471 /**
mbed_official 573:ad23fe03a082 1472 * @brief Tx Transfer completed callbacks.
mbed_official 573:ad23fe03a082 1473 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1474 * @retval None
mbed_official 573:ad23fe03a082 1475 */
mbed_official 573:ad23fe03a082 1476 __weak void HAL_QSPI_TxCpltCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1477 {
mbed_official 573:ad23fe03a082 1478 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 1479 the HAL_QSPI_TxCpltCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 1480 */
mbed_official 573:ad23fe03a082 1481 }
mbed_official 573:ad23fe03a082 1482
mbed_official 573:ad23fe03a082 1483 /**
mbed_official 573:ad23fe03a082 1484 * @brief Rx Half Transfer completed callbacks.
mbed_official 573:ad23fe03a082 1485 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1486 * @retval None
mbed_official 573:ad23fe03a082 1487 */
mbed_official 573:ad23fe03a082 1488 __weak void HAL_QSPI_RxHalfCpltCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1489 {
mbed_official 573:ad23fe03a082 1490 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 1491 the HAL_QSPI_RxHalfCpltCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 1492 */
mbed_official 573:ad23fe03a082 1493 }
mbed_official 573:ad23fe03a082 1494
mbed_official 573:ad23fe03a082 1495 /**
mbed_official 573:ad23fe03a082 1496 * @brief Tx Half Transfer completed callbacks.
mbed_official 573:ad23fe03a082 1497 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1498 * @retval None
mbed_official 573:ad23fe03a082 1499 */
mbed_official 573:ad23fe03a082 1500 __weak void HAL_QSPI_TxHalfCpltCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1501 {
mbed_official 573:ad23fe03a082 1502 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 1503 the HAL_QSPI_TxHalfCpltCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 1504 */
mbed_official 573:ad23fe03a082 1505 }
mbed_official 573:ad23fe03a082 1506
mbed_official 573:ad23fe03a082 1507 /**
mbed_official 573:ad23fe03a082 1508 * @brief FIFO Threshold callbacks
mbed_official 573:ad23fe03a082 1509 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1510 * @retval None
mbed_official 573:ad23fe03a082 1511 */
mbed_official 573:ad23fe03a082 1512 __weak void HAL_QSPI_FifoThresholdCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1513 {
mbed_official 573:ad23fe03a082 1514 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 1515 the HAL_QSPI_FIFOThresholdCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 1516 */
mbed_official 573:ad23fe03a082 1517 }
mbed_official 573:ad23fe03a082 1518
mbed_official 573:ad23fe03a082 1519 /**
mbed_official 573:ad23fe03a082 1520 * @brief Status Match callbacks
mbed_official 573:ad23fe03a082 1521 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1522 * @retval None
mbed_official 573:ad23fe03a082 1523 */
mbed_official 573:ad23fe03a082 1524 __weak void HAL_QSPI_StatusMatchCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1525 {
mbed_official 573:ad23fe03a082 1526 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 1527 the HAL_QSPI_StatusMatchCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 1528 */
mbed_official 573:ad23fe03a082 1529 }
mbed_official 573:ad23fe03a082 1530
mbed_official 573:ad23fe03a082 1531 /**
mbed_official 573:ad23fe03a082 1532 * @brief Timeout callbacks
mbed_official 573:ad23fe03a082 1533 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1534 * @retval None
mbed_official 573:ad23fe03a082 1535 */
mbed_official 573:ad23fe03a082 1536 __weak void HAL_QSPI_TimeOutCallback(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1537 {
mbed_official 573:ad23fe03a082 1538 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 573:ad23fe03a082 1539 the HAL_QSPI_TimeOutCallback could be implemented in the user file
mbed_official 573:ad23fe03a082 1540 */
mbed_official 573:ad23fe03a082 1541 }
mbed_official 573:ad23fe03a082 1542
mbed_official 573:ad23fe03a082 1543 /**
mbed_official 573:ad23fe03a082 1544 * @}
mbed_official 573:ad23fe03a082 1545 */
mbed_official 573:ad23fe03a082 1546
mbed_official 573:ad23fe03a082 1547 /** @defgroup QSPI_Exported_Functions_Group3 Peripheral Control and State functions
mbed_official 573:ad23fe03a082 1548 * @brief QSPI control and State functions
mbed_official 573:ad23fe03a082 1549 *
mbed_official 573:ad23fe03a082 1550 @verbatim
mbed_official 573:ad23fe03a082 1551 ===============================================================================
mbed_official 573:ad23fe03a082 1552 ##### Peripheral Control and State functions #####
mbed_official 573:ad23fe03a082 1553 ===============================================================================
mbed_official 573:ad23fe03a082 1554 [..]
mbed_official 573:ad23fe03a082 1555 This subsection provides a set of functions allowing to :
mbed_official 573:ad23fe03a082 1556 (+) Check in run-time the state of the driver.
mbed_official 573:ad23fe03a082 1557 (+) Check the error code set during last operation.
mbed_official 573:ad23fe03a082 1558 (+) Abort any operation.
mbed_official 573:ad23fe03a082 1559 .....
mbed_official 573:ad23fe03a082 1560 @endverbatim
mbed_official 573:ad23fe03a082 1561 * @{
mbed_official 573:ad23fe03a082 1562 */
mbed_official 573:ad23fe03a082 1563
mbed_official 573:ad23fe03a082 1564 /**
mbed_official 573:ad23fe03a082 1565 * @brief Return the QSPI state.
mbed_official 573:ad23fe03a082 1566 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1567 * @retval HAL state
mbed_official 573:ad23fe03a082 1568 */
mbed_official 573:ad23fe03a082 1569 HAL_QSPI_StateTypeDef HAL_QSPI_GetState(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1570 {
mbed_official 573:ad23fe03a082 1571 return hqspi->State;
mbed_official 573:ad23fe03a082 1572 }
mbed_official 573:ad23fe03a082 1573
mbed_official 573:ad23fe03a082 1574 /**
mbed_official 573:ad23fe03a082 1575 * @brief Return the QSPI error code
mbed_official 573:ad23fe03a082 1576 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1577 * @retval QSPI Error Code
mbed_official 573:ad23fe03a082 1578 */
mbed_official 573:ad23fe03a082 1579 uint32_t HAL_QSPI_GetError(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1580 {
mbed_official 573:ad23fe03a082 1581 return hqspi->ErrorCode;
mbed_official 573:ad23fe03a082 1582 }
mbed_official 573:ad23fe03a082 1583
mbed_official 573:ad23fe03a082 1584 /**
mbed_official 573:ad23fe03a082 1585 * @brief Abort the current transmission
mbed_official 573:ad23fe03a082 1586 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1587 * @retval HAL status
mbed_official 573:ad23fe03a082 1588 */
mbed_official 573:ad23fe03a082 1589 HAL_StatusTypeDef HAL_QSPI_Abort(QSPI_HandleTypeDef *hqspi)
mbed_official 573:ad23fe03a082 1590 {
mbed_official 573:ad23fe03a082 1591 HAL_StatusTypeDef status = HAL_ERROR;
mbed_official 573:ad23fe03a082 1592
mbed_official 573:ad23fe03a082 1593 /* Configure QSPI: CR register with Abort request */
mbed_official 573:ad23fe03a082 1594 SET_BIT(hqspi->Instance->CR, QUADSPI_CR_ABORT);
mbed_official 573:ad23fe03a082 1595
mbed_official 573:ad23fe03a082 1596 /* Wait until TC flag is set to go back in idle state */
mbed_official 573:ad23fe03a082 1597 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, hqspi->Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 1598 {
mbed_official 573:ad23fe03a082 1599 status = HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 1600 }
mbed_official 573:ad23fe03a082 1601 else
mbed_official 573:ad23fe03a082 1602 {
mbed_official 573:ad23fe03a082 1603 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 573:ad23fe03a082 1604
mbed_official 573:ad23fe03a082 1605 /* Wait until BUSY flag is reset */
mbed_official 573:ad23fe03a082 1606 status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, hqspi->Timeout);
mbed_official 573:ad23fe03a082 1607
mbed_official 573:ad23fe03a082 1608 /* Update state */
mbed_official 573:ad23fe03a082 1609 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 1610 }
mbed_official 573:ad23fe03a082 1611
mbed_official 573:ad23fe03a082 1612 return status;
mbed_official 573:ad23fe03a082 1613 }
mbed_official 573:ad23fe03a082 1614
mbed_official 573:ad23fe03a082 1615 /** @brief Set QSPI timeout
mbed_official 573:ad23fe03a082 1616 * @param hqspi: QSPI handle.
mbed_official 573:ad23fe03a082 1617 * @param Timeout: Timeout for the QSPI memory access.
mbed_official 573:ad23fe03a082 1618 * @retval None
mbed_official 573:ad23fe03a082 1619 */
mbed_official 573:ad23fe03a082 1620 void HAL_QSPI_SetTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Timeout)
mbed_official 573:ad23fe03a082 1621 {
mbed_official 573:ad23fe03a082 1622 hqspi->Timeout = Timeout;
mbed_official 573:ad23fe03a082 1623 }
mbed_official 573:ad23fe03a082 1624
mbed_official 573:ad23fe03a082 1625 /**
mbed_official 573:ad23fe03a082 1626 * @}
mbed_official 573:ad23fe03a082 1627 */
mbed_official 573:ad23fe03a082 1628
mbed_official 573:ad23fe03a082 1629 /* Private functions ---------------------------------------------------------*/
mbed_official 573:ad23fe03a082 1630
mbed_official 573:ad23fe03a082 1631 /**
mbed_official 573:ad23fe03a082 1632 * @brief DMA QSPI receive process complete callback.
mbed_official 573:ad23fe03a082 1633 * @param hdma: DMA handle
mbed_official 573:ad23fe03a082 1634 * @retval None
mbed_official 573:ad23fe03a082 1635 */
mbed_official 573:ad23fe03a082 1636 static void QSPI_DMARxCplt(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 1637 {
mbed_official 573:ad23fe03a082 1638 QSPI_HandleTypeDef* hqspi = ( QSPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 573:ad23fe03a082 1639 hqspi->RxXferCount = 0;
mbed_official 573:ad23fe03a082 1640
mbed_official 573:ad23fe03a082 1641 /* Wait for QSPI TC Flag */
mbed_official 573:ad23fe03a082 1642 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, hqspi->Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 1643 {
mbed_official 573:ad23fe03a082 1644 /* Time out Occurred */
mbed_official 573:ad23fe03a082 1645 HAL_QSPI_ErrorCallback(hqspi);
mbed_official 573:ad23fe03a082 1646 }
mbed_official 573:ad23fe03a082 1647 else
mbed_official 573:ad23fe03a082 1648 {
mbed_official 573:ad23fe03a082 1649 /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */
mbed_official 573:ad23fe03a082 1650 CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
mbed_official 573:ad23fe03a082 1651
mbed_official 573:ad23fe03a082 1652 /* Disable the DMA channel */
mbed_official 573:ad23fe03a082 1653 HAL_DMA_Abort(hdma);
mbed_official 573:ad23fe03a082 1654
mbed_official 573:ad23fe03a082 1655 /* Clear Transfer Complete bit */
mbed_official 573:ad23fe03a082 1656 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 573:ad23fe03a082 1657
mbed_official 573:ad23fe03a082 1658 /* Workaround - Extra data written in the FIFO at the end of a read transfer */
mbed_official 573:ad23fe03a082 1659 HAL_QSPI_Abort(hqspi);
mbed_official 573:ad23fe03a082 1660
mbed_official 573:ad23fe03a082 1661 /* Update state */
mbed_official 573:ad23fe03a082 1662 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 1663
mbed_official 573:ad23fe03a082 1664 HAL_QSPI_RxCpltCallback(hqspi);
mbed_official 573:ad23fe03a082 1665 }
mbed_official 573:ad23fe03a082 1666 }
mbed_official 573:ad23fe03a082 1667
mbed_official 573:ad23fe03a082 1668 /**
mbed_official 573:ad23fe03a082 1669 * @brief DMA QSPI transmit process complete callback.
mbed_official 573:ad23fe03a082 1670 * @param hdma: DMA handle
mbed_official 573:ad23fe03a082 1671 * @retval None
mbed_official 573:ad23fe03a082 1672 */
mbed_official 573:ad23fe03a082 1673 static void QSPI_DMATxCplt(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 1674 {
mbed_official 573:ad23fe03a082 1675 QSPI_HandleTypeDef* hqspi = ( QSPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 573:ad23fe03a082 1676 hqspi->TxXferCount = 0;
mbed_official 573:ad23fe03a082 1677
mbed_official 573:ad23fe03a082 1678 /* Wait for QSPI TC Flag */
mbed_official 573:ad23fe03a082 1679 if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, hqspi->Timeout) != HAL_OK)
mbed_official 573:ad23fe03a082 1680 {
mbed_official 573:ad23fe03a082 1681 /* Time out Occurred */
mbed_official 573:ad23fe03a082 1682 HAL_QSPI_ErrorCallback(hqspi);
mbed_official 573:ad23fe03a082 1683 }
mbed_official 573:ad23fe03a082 1684 else
mbed_official 573:ad23fe03a082 1685 {
mbed_official 573:ad23fe03a082 1686 /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */
mbed_official 573:ad23fe03a082 1687 CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN);
mbed_official 573:ad23fe03a082 1688
mbed_official 573:ad23fe03a082 1689 /* Disable the DMA channel */
mbed_official 573:ad23fe03a082 1690 HAL_DMA_Abort(hdma);
mbed_official 573:ad23fe03a082 1691
mbed_official 573:ad23fe03a082 1692 /* Clear Transfer Complete bit */
mbed_official 573:ad23fe03a082 1693 __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC);
mbed_official 573:ad23fe03a082 1694
mbed_official 573:ad23fe03a082 1695 /* Clear Busy bit */
mbed_official 573:ad23fe03a082 1696 HAL_QSPI_Abort(hqspi);
mbed_official 573:ad23fe03a082 1697
mbed_official 573:ad23fe03a082 1698 /* Update state */
mbed_official 573:ad23fe03a082 1699 hqspi->State = HAL_QSPI_STATE_READY;
mbed_official 573:ad23fe03a082 1700
mbed_official 573:ad23fe03a082 1701 HAL_QSPI_TxCpltCallback(hqspi);
mbed_official 573:ad23fe03a082 1702 }
mbed_official 573:ad23fe03a082 1703 }
mbed_official 573:ad23fe03a082 1704
mbed_official 573:ad23fe03a082 1705 /**
mbed_official 573:ad23fe03a082 1706 * @brief DMA QSPI receive process half complete callback
mbed_official 573:ad23fe03a082 1707 * @param hdma : DMA handle
mbed_official 573:ad23fe03a082 1708 * @retval None
mbed_official 573:ad23fe03a082 1709 */
mbed_official 573:ad23fe03a082 1710 static void QSPI_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 1711 {
mbed_official 573:ad23fe03a082 1712 QSPI_HandleTypeDef* hqspi = (QSPI_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
mbed_official 573:ad23fe03a082 1713
mbed_official 573:ad23fe03a082 1714 HAL_QSPI_RxHalfCpltCallback(hqspi);
mbed_official 573:ad23fe03a082 1715 }
mbed_official 573:ad23fe03a082 1716
mbed_official 573:ad23fe03a082 1717 /**
mbed_official 573:ad23fe03a082 1718 * @brief DMA QSPI transmit process half complete callback
mbed_official 573:ad23fe03a082 1719 * @param hdma : DMA handle
mbed_official 573:ad23fe03a082 1720 * @retval None
mbed_official 573:ad23fe03a082 1721 */
mbed_official 573:ad23fe03a082 1722 static void QSPI_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 1723 {
mbed_official 573:ad23fe03a082 1724 QSPI_HandleTypeDef* hqspi = (QSPI_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
mbed_official 573:ad23fe03a082 1725
mbed_official 573:ad23fe03a082 1726 HAL_QSPI_TxHalfCpltCallback(hqspi);
mbed_official 573:ad23fe03a082 1727 }
mbed_official 573:ad23fe03a082 1728
mbed_official 573:ad23fe03a082 1729 /**
mbed_official 573:ad23fe03a082 1730 * @brief DMA QSPI communication error callback.
mbed_official 573:ad23fe03a082 1731 * @param hdma: DMA handle
mbed_official 573:ad23fe03a082 1732 * @retval None
mbed_official 573:ad23fe03a082 1733 */
mbed_official 573:ad23fe03a082 1734 static void QSPI_DMAError(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 1735 {
mbed_official 573:ad23fe03a082 1736 QSPI_HandleTypeDef* hqspi = ( QSPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 573:ad23fe03a082 1737
mbed_official 573:ad23fe03a082 1738 hqspi->RxXferCount = 0;
mbed_official 573:ad23fe03a082 1739 hqspi->TxXferCount = 0;
mbed_official 573:ad23fe03a082 1740 hqspi->State = HAL_QSPI_STATE_ERROR;
mbed_official 573:ad23fe03a082 1741 hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA;
mbed_official 573:ad23fe03a082 1742
mbed_official 573:ad23fe03a082 1743 HAL_QSPI_ErrorCallback(hqspi);
mbed_official 573:ad23fe03a082 1744 }
mbed_official 573:ad23fe03a082 1745
mbed_official 573:ad23fe03a082 1746 /**
mbed_official 573:ad23fe03a082 1747 * @brief This function wait a flag state until time out.
mbed_official 573:ad23fe03a082 1748 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1749 * @param Flag: Flag checked
mbed_official 573:ad23fe03a082 1750 * @param State: Value of the flag expected
mbed_official 573:ad23fe03a082 1751 * @param Timeout: Duration of the time out
mbed_official 573:ad23fe03a082 1752 * @retval HAL status
mbed_official 573:ad23fe03a082 1753 */
mbed_official 573:ad23fe03a082 1754 static HAL_StatusTypeDef QSPI_WaitFlagStateUntilTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Flag,
mbed_official 573:ad23fe03a082 1755 FlagStatus State, uint32_t Timeout)
mbed_official 573:ad23fe03a082 1756 {
mbed_official 573:ad23fe03a082 1757 uint32_t tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 1758
mbed_official 573:ad23fe03a082 1759 /* Wait until flag is in expected state */
mbed_official 573:ad23fe03a082 1760 while((FlagStatus)(__HAL_QSPI_GET_FLAG(hqspi, Flag)) != State)
mbed_official 573:ad23fe03a082 1761 {
mbed_official 573:ad23fe03a082 1762 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 1763 if (Timeout != HAL_MAX_DELAY)
mbed_official 573:ad23fe03a082 1764 {
mbed_official 573:ad23fe03a082 1765 if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
mbed_official 573:ad23fe03a082 1766 {
mbed_official 573:ad23fe03a082 1767 hqspi->State = HAL_QSPI_STATE_ERROR;
mbed_official 573:ad23fe03a082 1768 hqspi->ErrorCode |= HAL_QSPI_ERROR_TIMEOUT;
mbed_official 573:ad23fe03a082 1769
mbed_official 573:ad23fe03a082 1770 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 1771 }
mbed_official 573:ad23fe03a082 1772 }
mbed_official 573:ad23fe03a082 1773 }
mbed_official 573:ad23fe03a082 1774 return HAL_OK;
mbed_official 573:ad23fe03a082 1775 }
mbed_official 573:ad23fe03a082 1776
mbed_official 573:ad23fe03a082 1777 /**
mbed_official 573:ad23fe03a082 1778 * @brief This function configures the communication registers
mbed_official 573:ad23fe03a082 1779 * @param hqspi: QSPI handle
mbed_official 573:ad23fe03a082 1780 * @param cmd: structure that contains the command configuration information
mbed_official 573:ad23fe03a082 1781 * @param FunctionalMode: functional mode to configured
mbed_official 573:ad23fe03a082 1782 * This parameter can be one of the following values:
mbed_official 573:ad23fe03a082 1783 * @arg QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE: Indirect write mode
mbed_official 573:ad23fe03a082 1784 * @arg QSPI_FUNCTIONAL_MODE_INDIRECT_READ: Indirect read mode
mbed_official 573:ad23fe03a082 1785 * @arg QSPI_FUNCTIONAL_MODE_AUTO_POLLING: Automatic polling mode
mbed_official 573:ad23fe03a082 1786 * @arg QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED: Memory-mapped mode
mbed_official 573:ad23fe03a082 1787 * @retval None
mbed_official 573:ad23fe03a082 1788 */
mbed_official 573:ad23fe03a082 1789 static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t FunctionalMode)
mbed_official 573:ad23fe03a082 1790 {
mbed_official 573:ad23fe03a082 1791 assert_param(IS_QSPI_FUNCTIONAL_MODE(FunctionalMode));
mbed_official 573:ad23fe03a082 1792
mbed_official 573:ad23fe03a082 1793 if ((cmd->DataMode != QSPI_DATA_NONE) && (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED))
mbed_official 573:ad23fe03a082 1794 {
mbed_official 573:ad23fe03a082 1795 /* Configure QSPI: DLR register with the number of data to read or write */
mbed_official 573:ad23fe03a082 1796 WRITE_REG(hqspi->Instance->DLR, (cmd->NbData - 1));
mbed_official 573:ad23fe03a082 1797 }
mbed_official 573:ad23fe03a082 1798
mbed_official 573:ad23fe03a082 1799 if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE)
mbed_official 573:ad23fe03a082 1800 {
mbed_official 573:ad23fe03a082 1801 if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
mbed_official 573:ad23fe03a082 1802 {
mbed_official 573:ad23fe03a082 1803 /* Configure QSPI: ABR register with alternate bytes value */
mbed_official 573:ad23fe03a082 1804 WRITE_REG(hqspi->Instance->ABR, cmd->AlternateBytes);
mbed_official 573:ad23fe03a082 1805
mbed_official 573:ad23fe03a082 1806 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 573:ad23fe03a082 1807 {
mbed_official 573:ad23fe03a082 1808 /*---- Command with instruction, address and alternate bytes ----*/
mbed_official 573:ad23fe03a082 1809 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 573:ad23fe03a082 1810 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 573:ad23fe03a082 1811 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateBytesSize |
mbed_official 573:ad23fe03a082 1812 cmd->AlternateByteMode | cmd->AddressSize | cmd->AddressMode |
mbed_official 573:ad23fe03a082 1813 cmd->InstructionMode | cmd->Instruction | FunctionalMode));
mbed_official 573:ad23fe03a082 1814
mbed_official 573:ad23fe03a082 1815 if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED)
mbed_official 573:ad23fe03a082 1816 {
mbed_official 573:ad23fe03a082 1817 /* Configure QSPI: AR register with address value */
mbed_official 573:ad23fe03a082 1818 WRITE_REG(hqspi->Instance->AR, cmd->Address);
mbed_official 573:ad23fe03a082 1819 }
mbed_official 573:ad23fe03a082 1820 }
mbed_official 573:ad23fe03a082 1821 else
mbed_official 573:ad23fe03a082 1822 {
mbed_official 573:ad23fe03a082 1823 /*---- Command with instruction and alternate bytes ----*/
mbed_official 573:ad23fe03a082 1824 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 573:ad23fe03a082 1825 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 573:ad23fe03a082 1826 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateBytesSize |
mbed_official 573:ad23fe03a082 1827 cmd->AlternateByteMode | cmd->AddressMode | cmd->InstructionMode |
mbed_official 573:ad23fe03a082 1828 cmd->Instruction | FunctionalMode));
mbed_official 573:ad23fe03a082 1829 }
mbed_official 573:ad23fe03a082 1830 }
mbed_official 573:ad23fe03a082 1831 else
mbed_official 573:ad23fe03a082 1832 {
mbed_official 573:ad23fe03a082 1833 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 573:ad23fe03a082 1834 {
mbed_official 573:ad23fe03a082 1835 /*---- Command with instruction and address ----*/
mbed_official 573:ad23fe03a082 1836 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 573:ad23fe03a082 1837 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 573:ad23fe03a082 1838 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateByteMode |
mbed_official 573:ad23fe03a082 1839 cmd->AddressSize | cmd->AddressMode | cmd->InstructionMode |
mbed_official 573:ad23fe03a082 1840 cmd->Instruction | FunctionalMode));
mbed_official 573:ad23fe03a082 1841
mbed_official 573:ad23fe03a082 1842 if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED)
mbed_official 573:ad23fe03a082 1843 {
mbed_official 573:ad23fe03a082 1844 /* Configure QSPI: AR register with address value */
mbed_official 573:ad23fe03a082 1845 WRITE_REG(hqspi->Instance->AR, cmd->Address);
mbed_official 573:ad23fe03a082 1846 }
mbed_official 573:ad23fe03a082 1847 }
mbed_official 573:ad23fe03a082 1848 else
mbed_official 573:ad23fe03a082 1849 {
mbed_official 573:ad23fe03a082 1850 /*---- Command with only instruction ----*/
mbed_official 573:ad23fe03a082 1851 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 573:ad23fe03a082 1852 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 573:ad23fe03a082 1853 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateByteMode |
mbed_official 573:ad23fe03a082 1854 cmd->AddressMode | cmd->InstructionMode | cmd->Instruction |
mbed_official 573:ad23fe03a082 1855 FunctionalMode));
mbed_official 573:ad23fe03a082 1856 }
mbed_official 573:ad23fe03a082 1857 }
mbed_official 573:ad23fe03a082 1858 }
mbed_official 573:ad23fe03a082 1859 else
mbed_official 573:ad23fe03a082 1860 {
mbed_official 573:ad23fe03a082 1861 if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE)
mbed_official 573:ad23fe03a082 1862 {
mbed_official 573:ad23fe03a082 1863 /* Configure QSPI: ABR register with alternate bytes value */
mbed_official 573:ad23fe03a082 1864 WRITE_REG(hqspi->Instance->ABR, cmd->AlternateBytes);
mbed_official 573:ad23fe03a082 1865
mbed_official 573:ad23fe03a082 1866 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 573:ad23fe03a082 1867 {
mbed_official 573:ad23fe03a082 1868 /*---- Command with address and alternate bytes ----*/
mbed_official 573:ad23fe03a082 1869 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 573:ad23fe03a082 1870 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 573:ad23fe03a082 1871 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateBytesSize |
mbed_official 573:ad23fe03a082 1872 cmd->AlternateByteMode | cmd->AddressSize | cmd->AddressMode |
mbed_official 573:ad23fe03a082 1873 cmd->InstructionMode | FunctionalMode));
mbed_official 573:ad23fe03a082 1874
mbed_official 573:ad23fe03a082 1875 if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED)
mbed_official 573:ad23fe03a082 1876 {
mbed_official 573:ad23fe03a082 1877 /* Configure QSPI: AR register with address value */
mbed_official 573:ad23fe03a082 1878 WRITE_REG(hqspi->Instance->AR, cmd->Address);
mbed_official 573:ad23fe03a082 1879 }
mbed_official 573:ad23fe03a082 1880 }
mbed_official 573:ad23fe03a082 1881 else
mbed_official 573:ad23fe03a082 1882 {
mbed_official 573:ad23fe03a082 1883 /*---- Command with only alternate bytes ----*/
mbed_official 573:ad23fe03a082 1884 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 573:ad23fe03a082 1885 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 573:ad23fe03a082 1886 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateBytesSize |
mbed_official 573:ad23fe03a082 1887 cmd->AlternateByteMode | cmd->AddressMode | cmd->InstructionMode |
mbed_official 573:ad23fe03a082 1888 FunctionalMode));
mbed_official 573:ad23fe03a082 1889 }
mbed_official 573:ad23fe03a082 1890 }
mbed_official 573:ad23fe03a082 1891 else
mbed_official 573:ad23fe03a082 1892 {
mbed_official 573:ad23fe03a082 1893 if (cmd->AddressMode != QSPI_ADDRESS_NONE)
mbed_official 573:ad23fe03a082 1894 {
mbed_official 573:ad23fe03a082 1895 /*---- Command with only address ----*/
mbed_official 573:ad23fe03a082 1896 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 573:ad23fe03a082 1897 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 573:ad23fe03a082 1898 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateByteMode |
mbed_official 573:ad23fe03a082 1899 cmd->AddressSize | cmd->AddressMode | cmd->InstructionMode |
mbed_official 573:ad23fe03a082 1900 FunctionalMode));
mbed_official 573:ad23fe03a082 1901
mbed_official 573:ad23fe03a082 1902 if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED)
mbed_official 573:ad23fe03a082 1903 {
mbed_official 573:ad23fe03a082 1904 /* Configure QSPI: AR register with address value */
mbed_official 573:ad23fe03a082 1905 WRITE_REG(hqspi->Instance->AR, cmd->Address);
mbed_official 573:ad23fe03a082 1906 }
mbed_official 573:ad23fe03a082 1907 }
mbed_official 573:ad23fe03a082 1908 else
mbed_official 573:ad23fe03a082 1909 {
mbed_official 573:ad23fe03a082 1910 /*---- Command with only data phase ----*/
mbed_official 573:ad23fe03a082 1911 if (cmd->DataMode != QSPI_DATA_NONE)
mbed_official 573:ad23fe03a082 1912 {
mbed_official 573:ad23fe03a082 1913 /* Configure QSPI: CCR register with all communications parameters */
mbed_official 573:ad23fe03a082 1914 WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode |
mbed_official 573:ad23fe03a082 1915 cmd->DataMode | (cmd->DummyCycles << 18) | cmd->AlternateByteMode |
mbed_official 573:ad23fe03a082 1916 cmd->AddressMode | cmd->InstructionMode | FunctionalMode));
mbed_official 573:ad23fe03a082 1917 }
mbed_official 573:ad23fe03a082 1918 }
mbed_official 573:ad23fe03a082 1919 }
mbed_official 573:ad23fe03a082 1920 }
mbed_official 573:ad23fe03a082 1921 }
mbed_official 573:ad23fe03a082 1922 /**
mbed_official 573:ad23fe03a082 1923 * @}
mbed_official 573:ad23fe03a082 1924 */
mbed_official 573:ad23fe03a082 1925
mbed_official 573:ad23fe03a082 1926 #endif /* HAL_QSPI_MODULE_ENABLED */
mbed_official 573:ad23fe03a082 1927 /**
mbed_official 573:ad23fe03a082 1928 * @}
mbed_official 573:ad23fe03a082 1929 */
mbed_official 573:ad23fe03a082 1930
mbed_official 573:ad23fe03a082 1931 /**
mbed_official 573:ad23fe03a082 1932 * @}
mbed_official 573:ad23fe03a082 1933 */
mbed_official 573:ad23fe03a082 1934
mbed_official 573:ad23fe03a082 1935 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/