mbed library sources

Dependents:   Encrypted my_mbed lklk CyaSSL_DTLS_Cellular ... more

Superseded

This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

Import librarymbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Committer:
mbed_official
Date:
Wed Nov 19 09:00:07 2014 +0000
Revision:
409:a95c696104d3
Parent:
401:6d559ae9fd59
Child:
482:d9a48e768ce0
Synchronized with git revision f364b76d2fc9a89ffad67121dc2a131647263935

Full URL: https://github.com/mbedmicro/mbed/commit/f364b76d2fc9a89ffad67121dc2a131647263935/

Targets: RZ_A1H - Fixed a bug of serial interrupt

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 390:35c2c1cf29cd 1 /**************************************************************************//**
mbed_official 390:35c2c1cf29cd 2 * @file mmu_Renesas_RZ_A1.c
mbed_official 390:35c2c1cf29cd 3 * @brief MMU Startup File for
mbed_official 390:35c2c1cf29cd 4 * mmu_Renesas_RZ_A1 Device Series
mbed_official 390:35c2c1cf29cd 5 * @version V1.01
mbed_official 390:35c2c1cf29cd 6 * @date 2 Aug 2013
mbed_official 390:35c2c1cf29cd 7 *
mbed_official 390:35c2c1cf29cd 8 * @note
mbed_official 390:35c2c1cf29cd 9 *
mbed_official 390:35c2c1cf29cd 10 ******************************************************************************/
mbed_official 390:35c2c1cf29cd 11 /* Copyright (c) 2011 - 2013 ARM LIMITED
mbed_official 390:35c2c1cf29cd 12
mbed_official 390:35c2c1cf29cd 13 All rights reserved.
mbed_official 390:35c2c1cf29cd 14 Redistribution and use in source and binary forms, with or without
mbed_official 390:35c2c1cf29cd 15 modification, are permitted provided that the following conditions are met:
mbed_official 390:35c2c1cf29cd 16 - Redistributions of source code must retain the above copyright
mbed_official 390:35c2c1cf29cd 17 notice, this list of conditions and the following disclaimer.
mbed_official 390:35c2c1cf29cd 18 - Redistributions in binary form must reproduce the above copyright
mbed_official 390:35c2c1cf29cd 19 notice, this list of conditions and the following disclaimer in the
mbed_official 390:35c2c1cf29cd 20 documentation and/or other materials provided with the distribution.
mbed_official 390:35c2c1cf29cd 21 - Neither the name of ARM nor the names of its contributors may be used
mbed_official 390:35c2c1cf29cd 22 to endorse or promote products derived from this software without
mbed_official 390:35c2c1cf29cd 23 specific prior written permission.
mbed_official 390:35c2c1cf29cd 24 *
mbed_official 390:35c2c1cf29cd 25 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 390:35c2c1cf29cd 26 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 390:35c2c1cf29cd 27 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
mbed_official 390:35c2c1cf29cd 28 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
mbed_official 390:35c2c1cf29cd 29 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
mbed_official 390:35c2c1cf29cd 30 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
mbed_official 390:35c2c1cf29cd 31 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
mbed_official 390:35c2c1cf29cd 32 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
mbed_official 390:35c2c1cf29cd 33 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
mbed_official 390:35c2c1cf29cd 34 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 390:35c2c1cf29cd 35 POSSIBILITY OF SUCH DAMAGE.
mbed_official 390:35c2c1cf29cd 36 ---------------------------------------------------------------------------*/
mbed_official 390:35c2c1cf29cd 37
mbed_official 390:35c2c1cf29cd 38
mbed_official 390:35c2c1cf29cd 39 #define Renesas_RZ_A1_SPI_MIO_BASE (0x3fe00000UL) /*!< (SPI_MIO ) Base Address */
mbed_official 390:35c2c1cf29cd 40 #define Renesas_RZ_A1_BSC_BASE (0x3ff00000UL) /*!< (BSC ) Base Address */
mbed_official 390:35c2c1cf29cd 41 #define Renesas_RZ_A1_PERIPH_BASE0 (0xe8000000UL) /*!< (PERIPH0 ) Base Address */
mbed_official 390:35c2c1cf29cd 42 #define Renesas_RZ_A1_PERIPH_BASE1 (0xfcf00000UL) /*!< (PERIPH1 ) Base Address */
mbed_official 390:35c2c1cf29cd 43 // L1 Cache info and restrictions about architecture of the caches (CCSIR register):
mbed_official 390:35c2c1cf29cd 44 // Write-Through support *not* available
mbed_official 390:35c2c1cf29cd 45 // Write-Back support available.
mbed_official 390:35c2c1cf29cd 46 // Read allocation support available.
mbed_official 390:35c2c1cf29cd 47 // Write allocation support available.
mbed_official 390:35c2c1cf29cd 48
mbed_official 390:35c2c1cf29cd 49 //Note: You should use the Shareable attribute carefully.
mbed_official 390:35c2c1cf29cd 50 //For cores without coherency logic (such as SCU) marking a region as shareable forces the processor to not cache that region regardless the inner cache settings.
mbed_official 390:35c2c1cf29cd 51 //CA9-RTX uses LDREX/STREX instructions relying on Local monitors. Local monitors will be used only when the region gets cached, regions that are not cached will use the Global Monitor.
mbed_official 390:35c2c1cf29cd 52 //Some A9 implementations does not include Global Monitors, so wrongly setting the attribute Shareable may cause STREX to fail.
mbed_official 390:35c2c1cf29cd 53
mbed_official 390:35c2c1cf29cd 54 //Recall: When the Shareable attribute is applied to a memory region that is not Write-Back, Normal memory, data held in this region is treated as Non-cacheable.
mbed_official 390:35c2c1cf29cd 55 //When SMP bit = 0, Inner WB/WA Cacheable Shareable attributes are treated as Non-cacheable.
mbed_official 390:35c2c1cf29cd 56 //When SMP bit = 1, Inner WB/WA Cacheable Shareable attributes are treated as Cacheable.
mbed_official 390:35c2c1cf29cd 57
mbed_official 390:35c2c1cf29cd 58
mbed_official 390:35c2c1cf29cd 59 //Following MMU configuration is expected
mbed_official 390:35c2c1cf29cd 60 //SCTLR.AFE == 1 (Simplified access permissions model - AP[2:1] define access permissions, AP[0] is an access flag)
mbed_official 390:35c2c1cf29cd 61 //SCTLR.TRE == 0 (TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor)
mbed_official 390:35c2c1cf29cd 62 //Domain 0 is always the Client domain
mbed_official 390:35c2c1cf29cd 63 //Descriptors place all memory in domain 0
mbed_official 390:35c2c1cf29cd 64 //There are no restrictions by privilege level (PL0 can access all memory)
mbed_official 390:35c2c1cf29cd 65
mbed_official 390:35c2c1cf29cd 66 #include <stdint.h>
mbed_official 390:35c2c1cf29cd 67 #include "MBRZA1H.h"
mbed_official 390:35c2c1cf29cd 68
mbed_official 390:35c2c1cf29cd 69 //Import symbols from linker
mbed_official 390:35c2c1cf29cd 70 extern uint32_t Image$$VECTORS$$Base;
mbed_official 390:35c2c1cf29cd 71 extern uint32_t Image$$RO_DATA$$Base;
mbed_official 390:35c2c1cf29cd 72 extern uint32_t Image$$RW_DATA$$Base;
mbed_official 390:35c2c1cf29cd 73 extern uint32_t Image$$ZI_DATA$$Base;
mbed_official 390:35c2c1cf29cd 74 extern uint32_t Image$$TTB$$ZI$$Base;
mbed_official 390:35c2c1cf29cd 75
mbed_official 409:a95c696104d3 76 extern uint32_t Image$$VECTORS$$Limit;
mbed_official 409:a95c696104d3 77 extern uint32_t Image$$RO_DATA$$Limit;
mbed_official 409:a95c696104d3 78 extern uint32_t Image$$RW_DATA$$Limit;
mbed_official 409:a95c696104d3 79 extern uint32_t Image$$ZI_DATA$$Limit;
mbed_official 409:a95c696104d3 80
mbed_official 409:a95c696104d3 81 #define VECTORS_SIZE (((uint32_t)&Image$$VECTORS$$Limit >> 20) - ((uint32_t)&Image$$VECTORS$$Base >> 20) + 1)
mbed_official 409:a95c696104d3 82 #define RO_DATA_SIZE (((uint32_t)&Image$$RO_DATA$$Limit >> 20) - ((uint32_t)&Image$$RO_DATA$$Base >> 20) + 1)
mbed_official 409:a95c696104d3 83 #define RW_DATA_SIZE (((uint32_t)&Image$$RW_DATA$$Limit >> 20) - ((uint32_t)&Image$$RW_DATA$$Base >> 20) + 1)
mbed_official 409:a95c696104d3 84 #define ZI_DATA_SIZE (((uint32_t)&Image$$ZI_DATA$$Limit >> 20) - ((uint32_t)&Image$$ZI_DATA$$Base >> 20) + 1)
mbed_official 409:a95c696104d3 85
mbed_official 390:35c2c1cf29cd 86 static uint32_t Sect_Normal; //outer & inner wb/wa, non-shareable, executable, rw, domain 0, base addr 0
mbed_official 390:35c2c1cf29cd 87 static uint32_t Sect_Normal_NC; //non-shareable, non-executable, rw, domain 0, base addr 0
mbed_official 390:35c2c1cf29cd 88 static uint32_t Sect_Normal_Cod; //outer & inner wb/wa, non-shareable, executable, ro, domain 0, base addr 0
mbed_official 390:35c2c1cf29cd 89 static uint32_t Sect_Normal_RO; //as Sect_Normal_Cod, but not executable
mbed_official 390:35c2c1cf29cd 90 static uint32_t Sect_Normal_RW; //as Sect_Normal_Cod, but writeable and not executable
mbed_official 390:35c2c1cf29cd 91 static uint32_t Sect_Device_RO; //device, non-shareable, non-executable, ro, domain 0, base addr 0
mbed_official 390:35c2c1cf29cd 92 static uint32_t Sect_Device_RW; //as Sect_Device_RO, but writeable
mbed_official 390:35c2c1cf29cd 93
mbed_official 390:35c2c1cf29cd 94 /* Define global descriptors */
mbed_official 390:35c2c1cf29cd 95 static uint32_t Page_L1_4k = 0x0; //generic
mbed_official 390:35c2c1cf29cd 96 static uint32_t Page_L1_64k = 0x0; //generic
mbed_official 390:35c2c1cf29cd 97 static uint32_t Page_4k_Device_RW; //Shared device, not executable, rw, domain 0
mbed_official 390:35c2c1cf29cd 98 static uint32_t Page_64k_Device_RW; //Shared device, not executable, rw, domain 0
mbed_official 390:35c2c1cf29cd 99
mbed_official 390:35c2c1cf29cd 100 void create_translation_table(void)
mbed_official 390:35c2c1cf29cd 101 {
mbed_official 390:35c2c1cf29cd 102 mmu_region_attributes_Type region;
mbed_official 390:35c2c1cf29cd 103
mbed_official 390:35c2c1cf29cd 104 /*
mbed_official 390:35c2c1cf29cd 105 * Generate descriptors. Refer to MBRZA1H.h to get information about attributes
mbed_official 390:35c2c1cf29cd 106 *
mbed_official 390:35c2c1cf29cd 107 */
mbed_official 390:35c2c1cf29cd 108 //Create descriptors for Vectors, RO, RW, ZI sections
mbed_official 390:35c2c1cf29cd 109 section_normal(Sect_Normal, region);
mbed_official 390:35c2c1cf29cd 110 section_normal_cod(Sect_Normal_Cod, region);
mbed_official 390:35c2c1cf29cd 111 section_normal_ro(Sect_Normal_RO, region);
mbed_official 390:35c2c1cf29cd 112 section_normal_rw(Sect_Normal_RW, region);
mbed_official 390:35c2c1cf29cd 113 //Create descriptors for peripherals
mbed_official 390:35c2c1cf29cd 114 section_device_ro(Sect_Device_RO, region);
mbed_official 390:35c2c1cf29cd 115 section_device_rw(Sect_Device_RW, region);
mbed_official 390:35c2c1cf29cd 116 section_normal_nc(Sect_Normal_NC, region);
mbed_official 390:35c2c1cf29cd 117 //Create descriptors for 64k pages
mbed_official 390:35c2c1cf29cd 118 page64k_device_rw(Page_L1_64k, Page_64k_Device_RW, region);
mbed_official 390:35c2c1cf29cd 119 //Create descriptors for 4k pages
mbed_official 390:35c2c1cf29cd 120 page4k_device_rw(Page_L1_4k, Page_4k_Device_RW, region);
mbed_official 390:35c2c1cf29cd 121
mbed_official 390:35c2c1cf29cd 122 /*
mbed_official 390:35c2c1cf29cd 123 * Define MMU flat-map regions and attributes
mbed_official 390:35c2c1cf29cd 124 *
mbed_official 390:35c2c1cf29cd 125 */
mbed_official 390:35c2c1cf29cd 126
mbed_official 390:35c2c1cf29cd 127 //Create 4GB of faulting entries
mbed_official 390:35c2c1cf29cd 128 __TTSection (&Image$$TTB$$ZI$$Base, 0, 4096, DESCRIPTOR_FAULT);
mbed_official 390:35c2c1cf29cd 129
mbed_official 390:35c2c1cf29cd 130 // R7S72100 memory map.
mbed_official 390:35c2c1cf29cd 131 __TTSection (&Image$$TTB$$ZI$$Base, Renesas_RZ_A1_NORFLASH_BASE0 , 64, Sect_Normal_RO);
mbed_official 390:35c2c1cf29cd 132 __TTSection (&Image$$TTB$$ZI$$Base, Renesas_RZ_A1_NORFLASH_BASE1 , 64, Sect_Normal_RO);
mbed_official 390:35c2c1cf29cd 133 __TTSection (&Image$$TTB$$ZI$$Base, Renesas_RZ_A1_SDRAM_BASE0 , 64, Sect_Normal_RW);
mbed_official 390:35c2c1cf29cd 134 __TTSection (&Image$$TTB$$ZI$$Base, Renesas_RZ_A1_SDRAM_BASE1 , 64, Sect_Normal_RW);
mbed_official 390:35c2c1cf29cd 135 __TTSection (&Image$$TTB$$ZI$$Base, Renesas_RZ_A1_USER_AREA0 , 64, Sect_Normal_RW);
mbed_official 390:35c2c1cf29cd 136 __TTSection (&Image$$TTB$$ZI$$Base, Renesas_RZ_A1_USER_AREA1 , 64, Sect_Normal_RW);
mbed_official 390:35c2c1cf29cd 137 __TTSection (&Image$$TTB$$ZI$$Base, Renesas_RZ_A1_SPI_IO0 , 64, Sect_Normal_RO);
mbed_official 390:35c2c1cf29cd 138 __TTSection (&Image$$TTB$$ZI$$Base, Renesas_RZ_A1_SPI_IO1 , 64, Sect_Normal_RO);
mbed_official 390:35c2c1cf29cd 139 __TTSection (&Image$$TTB$$ZI$$Base, Renesas_RZ_A1_ONCHIP_SRAM_BASE , 10, Sect_Normal_RW);
mbed_official 390:35c2c1cf29cd 140 __TTSection (&Image$$TTB$$ZI$$Base, Renesas_RZ_A1_SPI_MIO_BASE , 1, Sect_Device_RW);
mbed_official 390:35c2c1cf29cd 141 __TTSection (&Image$$TTB$$ZI$$Base, Renesas_RZ_A1_BSC_BASE , 1, Sect_Device_RW);
mbed_official 390:35c2c1cf29cd 142 __TTSection (&Image$$TTB$$ZI$$Base, Renesas_RZ_A1_PERIPH_BASE0 , 3, Sect_Device_RW);
mbed_official 390:35c2c1cf29cd 143 __TTSection (&Image$$TTB$$ZI$$Base, Renesas_RZ_A1_PERIPH_BASE1 , 49, Sect_Device_RW);
mbed_official 390:35c2c1cf29cd 144
mbed_official 390:35c2c1cf29cd 145 //Define Image
mbed_official 409:a95c696104d3 146 __TTSection (&Image$$TTB$$ZI$$Base, (uint32_t)&Image$$RO_DATA$$Base, RO_DATA_SIZE, Sect_Normal_RO);
mbed_official 409:a95c696104d3 147 __TTSection (&Image$$TTB$$ZI$$Base, (uint32_t)&Image$$VECTORS$$Base, VECTORS_SIZE, Sect_Normal_Cod);
mbed_official 409:a95c696104d3 148 __TTSection (&Image$$TTB$$ZI$$Base, (uint32_t)&Image$$RW_DATA$$Base, RW_DATA_SIZE, Sect_Normal_RW);
mbed_official 409:a95c696104d3 149 __TTSection (&Image$$TTB$$ZI$$Base, (uint32_t)&Image$$ZI_DATA$$Base, ZI_DATA_SIZE, Sect_Normal_RW);
mbed_official 409:a95c696104d3 150 __TTSection (&Image$$TTB$$ZI$$Base, Renesas_RZ_A1_ONCHIP_SRAM_NC_BASE, 10, Sect_Normal_NC);
mbed_official 390:35c2c1cf29cd 151
mbed_official 390:35c2c1cf29cd 152 /* Set location of level 1 page table
mbed_official 390:35c2c1cf29cd 153 ; 31:14 - Translation table base addr (31:14-TTBCR.N, TTBCR.N is 0 out of reset)
mbed_official 390:35c2c1cf29cd 154 ; 13:7 - 0x0
mbed_official 390:35c2c1cf29cd 155 ; 6 - IRGN[0] 0x0 (Inner WB WA)
mbed_official 390:35c2c1cf29cd 156 ; 5 - NOS 0x0 (Non-shared)
mbed_official 390:35c2c1cf29cd 157 ; 4:3 - RGN 0x1 (Outer WB WA)
mbed_official 390:35c2c1cf29cd 158 ; 2 - IMP 0x0 (Implementation Defined)
mbed_official 390:35c2c1cf29cd 159 ; 1 - S 0x0 (Non-shared)
mbed_official 390:35c2c1cf29cd 160 ; 0 - IRGN[1] 0x1 (Inner WB WA) */
mbed_official 390:35c2c1cf29cd 161 __set_TTBR0(((uint32_t)&Image$$TTB$$ZI$$Base) | 9);
mbed_official 390:35c2c1cf29cd 162
mbed_official 390:35c2c1cf29cd 163 /* Set up domain access control register
mbed_official 390:35c2c1cf29cd 164 ; We set domain 0 to Client and all other domains to No Access.
mbed_official 390:35c2c1cf29cd 165 ; All translation table entries specify domain 0 */
mbed_official 390:35c2c1cf29cd 166 __set_DACR(1);
mbed_official 390:35c2c1cf29cd 167 }
mbed_official 390:35c2c1cf29cd 168
mbed_official 390:35c2c1cf29cd 169
mbed_official 390:35c2c1cf29cd 170 /*----------------------------------------------------------------------------
mbed_official 390:35c2c1cf29cd 171 * end of file
mbed_official 390:35c2c1cf29cd 172 *---------------------------------------------------------------------------*/