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This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

targets/hal/TARGET_NXP/TARGET_LPC408X/gpio_irq_api.c@440:8a0b45cd594f, 2014-12-16 (annotated)

Committer:
mbed_official
Date:
Tue Dec 16 08:15:08 2014 +0000
Revision:
440:8a0b45cd594f
Parent:
285:31249416b6f9 
Synchronized with git revision 67fbbf0b635d0c0d93fbe433306c537c2ad206aa



Full URL: https://github.com/mbedmicro/mbed/commit/67fbbf0b635d0c0d93fbe433306c537c2ad206aa/



Targets: nrf51 - updating app_timer.c from Norid'c SDKv7.1.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 15:4892fe388435 1 /* mbed Microcontroller Library
bogdanm 15:4892fe388435 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 15:4892fe388435 3 *
bogdanm 15:4892fe388435 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 15:4892fe388435 5 * you may not use this file except in compliance with the License.
bogdanm 15:4892fe388435 6 * You may obtain a copy of the License at
bogdanm 15:4892fe388435 7 *
bogdanm 15:4892fe388435 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 15:4892fe388435 9 *
bogdanm 15:4892fe388435 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 15:4892fe388435 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 15:4892fe388435 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 15:4892fe388435 13 * See the License for the specific language governing permissions and
bogdanm 15:4892fe388435 14 * limitations under the License.
bogdanm 15:4892fe388435 15 */
bogdanm 15:4892fe388435 16 #include <stddef.h>
bogdanm 15:4892fe388435 17 #include "gpio_irq_api.h"
mbed_official 285:31249416b6f9 18 #include "mbed_error.h"
bogdanm 15:4892fe388435 19 #include "cmsis.h"
bogdanm 15:4892fe388435 20
bogdanm 15:4892fe388435 21 #define CHANNEL_NUM 64
bogdanm 15:4892fe388435 22
bogdanm 15:4892fe388435 23 static uint32_t channel_ids[CHANNEL_NUM] = {0};
bogdanm 15:4892fe388435 24 static gpio_irq_handler irq_handler;
bogdanm 15:4892fe388435 25
bogdanm 15:4892fe388435 26 static void handle_interrupt_in(void) {
bogdanm 15:4892fe388435 27 // Read in all current interrupt registers. We do this once as the
bogdanm 15:4892fe388435 28 // GPIO interrupt registers are on the APB bus, and this is slow.
bogdanm 15:4892fe388435 29 uint32_t rise0 = LPC_GPIOINT->IO0IntStatR;
bogdanm 15:4892fe388435 30 uint32_t fall0 = LPC_GPIOINT->IO0IntStatF;
bogdanm 15:4892fe388435 31 uint32_t rise2 = LPC_GPIOINT->IO2IntStatR;
bogdanm 15:4892fe388435 32 uint32_t fall2 = LPC_GPIOINT->IO2IntStatF;
mbed_official 29:6ac4027eff2b 33
mbed_official 29:6ac4027eff2b 34 uint8_t bitloc;
mbed_official 29:6ac4027eff2b 35
mbed_official 29:6ac4027eff2b 36 // Continue as long as there are interrupts pending
mbed_official 29:6ac4027eff2b 37 while(rise0 > 0) {
mbed_official 29:6ac4027eff2b 38 // CLZ returns number of leading zeros, 31 minus that is location of
mbed_official 29:6ac4027eff2b 39 // first pending interrupt
mbed_official 29:6ac4027eff2b 40 bitloc = 31 - __CLZ(rise0);
mbed_official 29:6ac4027eff2b 41 if (channel_ids[bitloc] != 0)
mbed_official 29:6ac4027eff2b 42 irq_handler(channel_ids[bitloc], IRQ_RISE); //Run that interrupt
mbed_official 29:6ac4027eff2b 43
mbed_official 29:6ac4027eff2b 44 // Both clear the interrupt with clear register, and remove it from
mbed_official 29:6ac4027eff2b 45 // our local copy of the interrupt pending register
mbed_official 29:6ac4027eff2b 46 LPC_GPIOINT->IO0IntClr = 1 << bitloc;
mbed_official 29:6ac4027eff2b 47 rise0 -= 1<<bitloc;
mbed_official 29:6ac4027eff2b 48 }
mbed_official 29:6ac4027eff2b 49
mbed_official 29:6ac4027eff2b 50 // Continue as long as there are interrupts pending
mbed_official 29:6ac4027eff2b 51 while(fall0 > 0) {
mbed_official 29:6ac4027eff2b 52 // CLZ returns number of leading zeros, 31 minus that is location of
mbed_official 29:6ac4027eff2b 53 // first pending interrupt
mbed_official 29:6ac4027eff2b 54 bitloc = 31 - __CLZ(fall0);
mbed_official 29:6ac4027eff2b 55 if (channel_ids[bitloc] != 0)
mbed_official 29:6ac4027eff2b 56 irq_handler(channel_ids[bitloc], IRQ_FALL); //Run that interrupt
mbed_official 29:6ac4027eff2b 57
mbed_official 29:6ac4027eff2b 58 // Both clear the interrupt with clear register, and remove it from
mbed_official 29:6ac4027eff2b 59 // our local copy of the interrupt pending register
mbed_official 29:6ac4027eff2b 60 LPC_GPIOINT->IO0IntClr = 1 << bitloc;
mbed_official 29:6ac4027eff2b 61 fall0 -= 1<<bitloc;
bogdanm 15:4892fe388435 62 }
mbed_official 29:6ac4027eff2b 63
mbed_official 29:6ac4027eff2b 64 // Same for port 2
mbed_official 29:6ac4027eff2b 65
mbed_official 29:6ac4027eff2b 66 // Continue as long as there are interrupts pending
mbed_official 29:6ac4027eff2b 67 while(rise2 > 0) {
mbed_official 29:6ac4027eff2b 68 // CLZ returns number of leading zeros, 31 minus that is location of
mbed_official 29:6ac4027eff2b 69 // first pending interrupt
mbed_official 29:6ac4027eff2b 70 bitloc = 31 - __CLZ(rise2);
mbed_official 29:6ac4027eff2b 71 if (channel_ids[bitloc+32] != 0)
mbed_official 29:6ac4027eff2b 72 irq_handler(channel_ids[bitloc+32], IRQ_RISE); //Run that interrupt
mbed_official 29:6ac4027eff2b 73
mbed_official 29:6ac4027eff2b 74 // Both clear the interrupt with clear register, and remove it from
mbed_official 29:6ac4027eff2b 75 // our local copy of the interrupt pending register
mbed_official 29:6ac4027eff2b 76 LPC_GPIOINT->IO2IntClr = 1 << bitloc;
mbed_official 29:6ac4027eff2b 77 rise2 -= 1<<bitloc;
bogdanm 15:4892fe388435 78 }
mbed_official 29:6ac4027eff2b 79
mbed_official 29:6ac4027eff2b 80 // Continue as long as there are interrupts pending
mbed_official 29:6ac4027eff2b 81 while(fall2 > 0) {
mbed_official 29:6ac4027eff2b 82 // CLZ returns number of leading zeros, 31 minus that is location of
mbed_official 29:6ac4027eff2b 83 // first pending interrupt
mbed_official 29:6ac4027eff2b 84 bitloc = 31 - __CLZ(fall2);
mbed_official 29:6ac4027eff2b 85 if (channel_ids[bitloc+32] != 0)
mbed_official 29:6ac4027eff2b 86 irq_handler(channel_ids[bitloc+32], IRQ_FALL); //Run that interrupt
mbed_official 29:6ac4027eff2b 87
mbed_official 29:6ac4027eff2b 88 // Both clear the interrupt with clear register, and remove it from
mbed_official 29:6ac4027eff2b 89 // our local copy of the interrupt pending register
mbed_official 29:6ac4027eff2b 90 LPC_GPIOINT->IO2IntClr = 1 << bitloc;
mbed_official 29:6ac4027eff2b 91 fall2 -= 1<<bitloc;
mbed_official 29:6ac4027eff2b 92 }
bogdanm 15:4892fe388435 93 }
bogdanm 15:4892fe388435 94
bogdanm 15:4892fe388435 95 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
bogdanm 15:4892fe388435 96 if (pin == NC) return -1;
bogdanm 15:4892fe388435 97
bogdanm 15:4892fe388435 98 irq_handler = handler;
bogdanm 15:4892fe388435 99
bogdanm 15:4892fe388435 100 obj->port = ((int)(LPC_GPIO0_BASE+pin) & ~0x1F);
bogdanm 15:4892fe388435 101 obj->pin = (int)pin % 32;
bogdanm 15:4892fe388435 102
bogdanm 15:4892fe388435 103 // Interrupts available only on GPIO0 and GPIO2
bogdanm 15:4892fe388435 104 if (obj->port != LPC_GPIO0_BASE && obj->port != LPC_GPIO2_BASE) {
mbed_official 158:3121b9889f7b 105 error("pins on this port cannot generate interrupts");
bogdanm 15:4892fe388435 106 }
bogdanm 15:4892fe388435 107
bogdanm 15:4892fe388435 108 // put us in the interrupt table
bogdanm 15:4892fe388435 109 int index = (obj->port == LPC_GPIO0_BASE) ? obj->pin : obj->pin + 32;
bogdanm 15:4892fe388435 110 channel_ids[index] = id;
bogdanm 15:4892fe388435 111 obj->ch = index;
bogdanm 15:4892fe388435 112
bogdanm 15:4892fe388435 113 NVIC_SetVector(GPIO_IRQn, (uint32_t)handle_interrupt_in);
bogdanm 15:4892fe388435 114 NVIC_EnableIRQ(GPIO_IRQn);
bogdanm 15:4892fe388435 115
bogdanm 15:4892fe388435 116 return 0;
bogdanm 15:4892fe388435 117 }
bogdanm 15:4892fe388435 118
bogdanm 15:4892fe388435 119 void gpio_irq_free(gpio_irq_t *obj) {
bogdanm 15:4892fe388435 120 channel_ids[obj->ch] = 0;
bogdanm 15:4892fe388435 121 }
bogdanm 15:4892fe388435 122
bogdanm 15:4892fe388435 123 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
bogdanm 15:4892fe388435 124 // ensure nothing is pending
bogdanm 15:4892fe388435 125 switch (obj->port) {
bogdanm 15:4892fe388435 126 case LPC_GPIO0_BASE: LPC_GPIOINT->IO0IntClr = 1 << obj->pin; break;
bogdanm 15:4892fe388435 127 case LPC_GPIO2_BASE: LPC_GPIOINT->IO2IntClr = 1 << obj->pin; break;
bogdanm 15:4892fe388435 128 }
bogdanm 15:4892fe388435 129
bogdanm 15:4892fe388435 130 // enable the pin interrupt
bogdanm 15:4892fe388435 131 if (event == IRQ_RISE) {
bogdanm 15:4892fe388435 132 switch (obj->port) {
bogdanm 15:4892fe388435 133 case LPC_GPIO0_BASE:
bogdanm 15:4892fe388435 134 if (enable) {
bogdanm 15:4892fe388435 135 LPC_GPIOINT->IO0IntEnR |= 1 << obj->pin;
bogdanm 15:4892fe388435 136 } else {
bogdanm 15:4892fe388435 137 LPC_GPIOINT->IO0IntEnR &= ~(1 << obj->pin);
bogdanm 15:4892fe388435 138 }
bogdanm 15:4892fe388435 139 break;
bogdanm 15:4892fe388435 140 case LPC_GPIO2_BASE:
bogdanm 15:4892fe388435 141 if (enable) {
bogdanm 15:4892fe388435 142 LPC_GPIOINT->IO2IntEnR |= 1 << obj->pin;
bogdanm 15:4892fe388435 143 } else {
bogdanm 15:4892fe388435 144 LPC_GPIOINT->IO2IntEnR &= ~(1 << obj->pin);
bogdanm 15:4892fe388435 145 }
bogdanm 15:4892fe388435 146 break;
bogdanm 15:4892fe388435 147 }
bogdanm 15:4892fe388435 148 } else {
bogdanm 15:4892fe388435 149 switch (obj->port) {
bogdanm 15:4892fe388435 150 case LPC_GPIO0_BASE:
bogdanm 15:4892fe388435 151 if (enable) {
bogdanm 15:4892fe388435 152 LPC_GPIOINT->IO0IntEnF |= 1 << obj->pin;
bogdanm 15:4892fe388435 153 } else {
bogdanm 15:4892fe388435 154 LPC_GPIOINT->IO0IntEnF &= ~(1 << obj->pin);
bogdanm 15:4892fe388435 155 }
bogdanm 15:4892fe388435 156 break;
bogdanm 15:4892fe388435 157 case LPC_GPIO2_BASE:
bogdanm 15:4892fe388435 158 if (enable) {
bogdanm 15:4892fe388435 159 LPC_GPIOINT->IO2IntEnF |= 1 << obj->pin;
bogdanm 15:4892fe388435 160 } else {
bogdanm 15:4892fe388435 161 LPC_GPIOINT->IO2IntEnF &= ~(1 << obj->pin);
bogdanm 15:4892fe388435 162 }
bogdanm 15:4892fe388435 163 break;
bogdanm 15:4892fe388435 164 }
bogdanm 15:4892fe388435 165 }
bogdanm 15:4892fe388435 166 }
mbed_official 35:371630885ad6 167
mbed_official 35:371630885ad6 168 void gpio_irq_enable(gpio_irq_t *obj) {
mbed_official 35:371630885ad6 169 NVIC_EnableIRQ(GPIO_IRQn);
mbed_official 35:371630885ad6 170 }
mbed_official 35:371630885ad6 171
mbed_official 35:371630885ad6 172 void gpio_irq_disable(gpio_irq_t *obj) {
mbed_official 35:371630885ad6 173 NVIC_DisableIRQ(GPIO_IRQn);
mbed_official 35:371630885ad6 174 }