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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_rcc_ex.c@610:813dcc80987e, 2015-08-14 (annotated)

Committer:
mbed_official
Date:
Fri Aug 14 13:15:17 2015 +0100
Revision:
610:813dcc80987e
Synchronized with git revision 6d84db41c6833e0b9b024741eb0616a5f62d5599



Full URL: https://github.com/mbedmicro/mbed/commit/6d84db41c6833e0b9b024741eb0616a5f62d5599/



DISCO_F746NG - Improvements

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 610:813dcc80987e 1 /**
mbed_official 610:813dcc80987e 2 ******************************************************************************
mbed_official 610:813dcc80987e 3 * @file stm32l4xx_hal_rcc_ex.c
mbed_official 610:813dcc80987e 4 * @author MCD Application Team
mbed_official 610:813dcc80987e 5 * @version V1.0.0
mbed_official 610:813dcc80987e 6 * @date 26-June-2015
mbed_official 610:813dcc80987e 7 * @brief Extended RCC HAL module driver.
mbed_official 610:813dcc80987e 8 * This file provides firmware functions to manage the following
mbed_official 610:813dcc80987e 9 * functionalities RCC extended peripheral:
mbed_official 610:813dcc80987e 10 * + Extended Peripheral Control functions
mbed_official 610:813dcc80987e 11 *
mbed_official 610:813dcc80987e 12 ******************************************************************************
mbed_official 610:813dcc80987e 13 * @attention
mbed_official 610:813dcc80987e 14 *
mbed_official 610:813dcc80987e 15 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 610:813dcc80987e 16 *
mbed_official 610:813dcc80987e 17 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 610:813dcc80987e 18 * are permitted provided that the following conditions are met:
mbed_official 610:813dcc80987e 19 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 610:813dcc80987e 20 * this list of conditions and the following disclaimer.
mbed_official 610:813dcc80987e 21 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 610:813dcc80987e 22 * this list of conditions and the following disclaimer in the documentation
mbed_official 610:813dcc80987e 23 * and/or other materials provided with the distribution.
mbed_official 610:813dcc80987e 24 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 610:813dcc80987e 25 * may be used to endorse or promote products derived from this software
mbed_official 610:813dcc80987e 26 * without specific prior written permission.
mbed_official 610:813dcc80987e 27 *
mbed_official 610:813dcc80987e 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 610:813dcc80987e 29 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 610:813dcc80987e 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 610:813dcc80987e 31 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 610:813dcc80987e 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 610:813dcc80987e 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 610:813dcc80987e 34 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 610:813dcc80987e 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 610:813dcc80987e 36 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 610:813dcc80987e 37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 610:813dcc80987e 38 *
mbed_official 610:813dcc80987e 39 ******************************************************************************
mbed_official 610:813dcc80987e 40 */
mbed_official 610:813dcc80987e 41
mbed_official 610:813dcc80987e 42 /* Includes ------------------------------------------------------------------*/
mbed_official 610:813dcc80987e 43 #include "stm32l4xx_hal.h"
mbed_official 610:813dcc80987e 44
mbed_official 610:813dcc80987e 45 /** @addtogroup STM32L4xx_HAL_Driver
mbed_official 610:813dcc80987e 46 * @{
mbed_official 610:813dcc80987e 47 */
mbed_official 610:813dcc80987e 48
mbed_official 610:813dcc80987e 49 /** @defgroup RCCEx RCCEx
mbed_official 610:813dcc80987e 50 * @brief RCC Extended HAL module driver
mbed_official 610:813dcc80987e 51 * @{
mbed_official 610:813dcc80987e 52 */
mbed_official 610:813dcc80987e 53
mbed_official 610:813dcc80987e 54 #ifdef HAL_RCC_MODULE_ENABLED
mbed_official 610:813dcc80987e 55
mbed_official 610:813dcc80987e 56 /* Private typedef -----------------------------------------------------------*/
mbed_official 610:813dcc80987e 57 /* Private defines -----------------------------------------------------------*/
mbed_official 610:813dcc80987e 58 /** @defgroup RCCEx_Private_Constants RCCEx Private Constants
mbed_official 610:813dcc80987e 59 * @{
mbed_official 610:813dcc80987e 60 */
mbed_official 610:813dcc80987e 61 #define PLLSAI1_TIMEOUT_VALUE 1000U /* Timeout value fixed to 100 ms */
mbed_official 610:813dcc80987e 62 #define PLLSAI2_TIMEOUT_VALUE 1000U /* Timeout value fixed to 100 ms */
mbed_official 610:813dcc80987e 63 #define PLL_TIMEOUT_VALUE 100U /* Timeout value fixed to 100 ms */
mbed_official 610:813dcc80987e 64
mbed_official 610:813dcc80987e 65 #define __LSCO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
mbed_official 610:813dcc80987e 66 #define LSCO_GPIO_PORT GPIOA
mbed_official 610:813dcc80987e 67 #define LSCO_PIN GPIO_PIN_2
mbed_official 610:813dcc80987e 68 /**
mbed_official 610:813dcc80987e 69 * @}
mbed_official 610:813dcc80987e 70 */
mbed_official 610:813dcc80987e 71
mbed_official 610:813dcc80987e 72 /* Private macros ------------------------------------------------------------*/
mbed_official 610:813dcc80987e 73 /* Private variables ---------------------------------------------------------*/
mbed_official 610:813dcc80987e 74 /* Private function prototypes -----------------------------------------------*/
mbed_official 610:813dcc80987e 75 /** @defgroup RCCEx_Private_Functions RCCEx Private Functions
mbed_official 610:813dcc80987e 76 * @{
mbed_official 610:813dcc80987e 77 */
mbed_official 610:813dcc80987e 78 static HAL_StatusTypeDef RCCEx_PLLSAI1_ConfigNP(RCC_PLLSAI1InitTypeDef *PllSai1);
mbed_official 610:813dcc80987e 79 static HAL_StatusTypeDef RCCEx_PLLSAI1_ConfigNQ(RCC_PLLSAI1InitTypeDef *PllSai1);
mbed_official 610:813dcc80987e 80 static HAL_StatusTypeDef RCCEx_PLLSAI1_ConfigNR(RCC_PLLSAI1InitTypeDef *PllSai1);
mbed_official 610:813dcc80987e 81 static HAL_StatusTypeDef RCCEx_PLLSAI2_ConfigNP(RCC_PLLSAI2InitTypeDef *PllSai2);
mbed_official 610:813dcc80987e 82 static HAL_StatusTypeDef RCCEx_PLLSAI2_ConfigNR(RCC_PLLSAI2InitTypeDef *PllSai2);
mbed_official 610:813dcc80987e 83 /**
mbed_official 610:813dcc80987e 84 * @}
mbed_official 610:813dcc80987e 85 */
mbed_official 610:813dcc80987e 86
mbed_official 610:813dcc80987e 87 /* Exported functions --------------------------------------------------------*/
mbed_official 610:813dcc80987e 88
mbed_official 610:813dcc80987e 89 /** @defgroup RCCEx_Exported_Functions RCCEx Exported Functions
mbed_official 610:813dcc80987e 90 * @{
mbed_official 610:813dcc80987e 91 */
mbed_official 610:813dcc80987e 92
mbed_official 610:813dcc80987e 93 /** @defgroup RCCEx_Exported_Functions_Group1 Extended Peripheral Control functions
mbed_official 610:813dcc80987e 94 * @brief Extended Peripheral Control functions
mbed_official 610:813dcc80987e 95 *
mbed_official 610:813dcc80987e 96 @verbatim
mbed_official 610:813dcc80987e 97 ===============================================================================
mbed_official 610:813dcc80987e 98 ##### Extended Peripheral Control functions #####
mbed_official 610:813dcc80987e 99 ===============================================================================
mbed_official 610:813dcc80987e 100 [..]
mbed_official 610:813dcc80987e 101 This subsection provides a set of functions allowing to control the RCC Clocks
mbed_official 610:813dcc80987e 102 frequencies.
mbed_official 610:813dcc80987e 103 [..]
mbed_official 610:813dcc80987e 104 (@) Important note: Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to
mbed_official 610:813dcc80987e 105 select the RTC clock source; in this case the Backup domain will be reset in
mbed_official 610:813dcc80987e 106 order to modify the RTC Clock source, as consequence RTC registers (including
mbed_official 610:813dcc80987e 107 the backup registers) and RCC_BDCR register are set to their reset values.
mbed_official 610:813dcc80987e 108
mbed_official 610:813dcc80987e 109 @endverbatim
mbed_official 610:813dcc80987e 110 * @{
mbed_official 610:813dcc80987e 111 */
mbed_official 610:813dcc80987e 112 /**
mbed_official 610:813dcc80987e 113 * @brief Initialize the RCC extended peripherals clocks according to the specified
mbed_official 610:813dcc80987e 114 * parameters in the RCC_PeriphCLKInitTypeDef.
mbed_official 610:813dcc80987e 115 * @param PeriphClkInit: pointer to an RCC_PeriphCLKInitTypeDef structure that
mbed_official 610:813dcc80987e 116 * contains the configuration information for the Extended Peripherals
mbed_official 610:813dcc80987e 117 * clocks(SAI1, SAI2, LPTIM1, LPTIM2, I2C1, I2C2, I2C3, LPUART,
mbed_official 610:813dcc80987e 118 * USART1, USART2, USART3, UART4, UART5, RTC, ADC1, DFSDM, SWPMI1 and USB).
mbed_official 610:813dcc80987e 119 *
mbed_official 610:813dcc80987e 120 * @note Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to select
mbed_official 610:813dcc80987e 121 * the RTC clock source: in this case the access to Backup domain is enabled.
mbed_official 610:813dcc80987e 122 *
mbed_official 610:813dcc80987e 123 * @retval HAL status
mbed_official 610:813dcc80987e 124 */
mbed_official 610:813dcc80987e 125 HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
mbed_official 610:813dcc80987e 126 {
mbed_official 610:813dcc80987e 127 uint32_t tmpreg = 0;
mbed_official 610:813dcc80987e 128 uint32_t tickstart = 0;
mbed_official 610:813dcc80987e 129 HAL_StatusTypeDef ret = HAL_OK; /* Intermediate status */
mbed_official 610:813dcc80987e 130 HAL_StatusTypeDef status = HAL_OK; /* Final status */
mbed_official 610:813dcc80987e 131
mbed_official 610:813dcc80987e 132 /* Check the parameters */
mbed_official 610:813dcc80987e 133 assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
mbed_official 610:813dcc80987e 134
mbed_official 610:813dcc80987e 135 /*-------------------------- SAI1 clock source configuration ---------------------*/
mbed_official 610:813dcc80987e 136 if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1))
mbed_official 610:813dcc80987e 137 {
mbed_official 610:813dcc80987e 138 switch(PeriphClkInit->Sai1ClockSelection)
mbed_official 610:813dcc80987e 139 {
mbed_official 610:813dcc80987e 140 case RCC_SAI1CLKSOURCE_PLL: /* PLL is used as clock source for SAI1*/
mbed_official 610:813dcc80987e 141 /* Enable SAI Clock output generated form System PLL . */
mbed_official 610:813dcc80987e 142 __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_SAI3CLK);
mbed_official 610:813dcc80987e 143 /* SAI1 clock source config set later after clock selection check */
mbed_official 610:813dcc80987e 144 break;
mbed_official 610:813dcc80987e 145
mbed_official 610:813dcc80987e 146 case RCC_SAI1CLKSOURCE_PLLSAI1: /* PLLSAI1 is used as clock source for SAI1*/
mbed_official 610:813dcc80987e 147 /* PLLSAI1 parameters N & P configuration and clock output (PLLSAI1ClockOut) */
mbed_official 610:813dcc80987e 148 ret = RCCEx_PLLSAI1_ConfigNP(&(PeriphClkInit->PLLSAI1));
mbed_official 610:813dcc80987e 149 /* SAI1 clock source config set later after clock selection check */
mbed_official 610:813dcc80987e 150 break;
mbed_official 610:813dcc80987e 151
mbed_official 610:813dcc80987e 152 case RCC_SAI1CLKSOURCE_PLLSAI2: /* PLLSAI2 is used as clock source for SAI1*/
mbed_official 610:813dcc80987e 153 /* PLLSAI2 parameters N & P configuration and clock output (PLLSAI2ClockOut) */
mbed_official 610:813dcc80987e 154 ret = RCCEx_PLLSAI2_ConfigNP(&(PeriphClkInit->PLLSAI2));
mbed_official 610:813dcc80987e 155 /* SAI1 clock source config set later after clock selection check */
mbed_official 610:813dcc80987e 156 break;
mbed_official 610:813dcc80987e 157
mbed_official 610:813dcc80987e 158 case RCC_SAI1CLKSOURCE_PIN: /* External clock is used as source of SAI1 clock*/
mbed_official 610:813dcc80987e 159 /* SAI1 clock source config set later after clock selection check */
mbed_official 610:813dcc80987e 160 break;
mbed_official 610:813dcc80987e 161
mbed_official 610:813dcc80987e 162 default:
mbed_official 610:813dcc80987e 163 ret = HAL_ERROR;
mbed_official 610:813dcc80987e 164 break;
mbed_official 610:813dcc80987e 165 }
mbed_official 610:813dcc80987e 166
mbed_official 610:813dcc80987e 167 if(ret == HAL_OK)
mbed_official 610:813dcc80987e 168 {
mbed_official 610:813dcc80987e 169 /* Set the source of SAI1 clock*/
mbed_official 610:813dcc80987e 170 __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection);
mbed_official 610:813dcc80987e 171 }
mbed_official 610:813dcc80987e 172 else
mbed_official 610:813dcc80987e 173 {
mbed_official 610:813dcc80987e 174 /* set overall return value */
mbed_official 610:813dcc80987e 175 status = ret;
mbed_official 610:813dcc80987e 176 }
mbed_official 610:813dcc80987e 177 }
mbed_official 610:813dcc80987e 178
mbed_official 610:813dcc80987e 179 /*-------------------------- SAI2 clock source configuration ---------------------*/
mbed_official 610:813dcc80987e 180 if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2))
mbed_official 610:813dcc80987e 181 {
mbed_official 610:813dcc80987e 182 switch(PeriphClkInit->Sai2ClockSelection)
mbed_official 610:813dcc80987e 183 {
mbed_official 610:813dcc80987e 184 case RCC_SAI2CLKSOURCE_PLL: /* PLL is used as clock source for SAI2*/
mbed_official 610:813dcc80987e 185 /* Enable SAI Clock output generated form System PLL . */
mbed_official 610:813dcc80987e 186 __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_SAI3CLK);
mbed_official 610:813dcc80987e 187 /* SAI2 clock source config set later after clock selection check */
mbed_official 610:813dcc80987e 188 break;
mbed_official 610:813dcc80987e 189
mbed_official 610:813dcc80987e 190 case RCC_SAI2CLKSOURCE_PLLSAI1: /* PLLSAI1 is used as clock source for SAI2*/
mbed_official 610:813dcc80987e 191 /* PLLSAI1 parameters N & P configuration and clock output (PLLSAI1ClockOut) */
mbed_official 610:813dcc80987e 192 ret = RCCEx_PLLSAI1_ConfigNP(&(PeriphClkInit->PLLSAI1));
mbed_official 610:813dcc80987e 193 /* SAI2 clock source config set later after clock selection check */
mbed_official 610:813dcc80987e 194 break;
mbed_official 610:813dcc80987e 195
mbed_official 610:813dcc80987e 196 case RCC_SAI2CLKSOURCE_PLLSAI2: /* PLLSAI2 is used as clock source for SAI2*/
mbed_official 610:813dcc80987e 197 /* PLLSAI2 parameters N & P configuration and clock output (PLLSAI2ClockOut) */
mbed_official 610:813dcc80987e 198 ret = RCCEx_PLLSAI2_ConfigNP(&(PeriphClkInit->PLLSAI2));
mbed_official 610:813dcc80987e 199 /* SAI2 clock source config set later after clock selection check */
mbed_official 610:813dcc80987e 200 break;
mbed_official 610:813dcc80987e 201
mbed_official 610:813dcc80987e 202 case RCC_SAI2CLKSOURCE_PIN: /* External clock is used as source of SAI2 clock*/
mbed_official 610:813dcc80987e 203 /* SAI2 clock source config set later after clock selection check */
mbed_official 610:813dcc80987e 204 break;
mbed_official 610:813dcc80987e 205
mbed_official 610:813dcc80987e 206 default:
mbed_official 610:813dcc80987e 207 ret = HAL_ERROR;
mbed_official 610:813dcc80987e 208 break;
mbed_official 610:813dcc80987e 209 }
mbed_official 610:813dcc80987e 210
mbed_official 610:813dcc80987e 211 if(ret == HAL_OK)
mbed_official 610:813dcc80987e 212 {
mbed_official 610:813dcc80987e 213 /* Set the source of SAI2 clock*/
mbed_official 610:813dcc80987e 214 __HAL_RCC_SAI2_CONFIG(PeriphClkInit->Sai2ClockSelection);
mbed_official 610:813dcc80987e 215 }
mbed_official 610:813dcc80987e 216 else
mbed_official 610:813dcc80987e 217 {
mbed_official 610:813dcc80987e 218 /* set overall return value */
mbed_official 610:813dcc80987e 219 status = ret;
mbed_official 610:813dcc80987e 220 }
mbed_official 610:813dcc80987e 221 }
mbed_official 610:813dcc80987e 222
mbed_official 610:813dcc80987e 223 /*-------------------------- RTC clock source configuration ----------------------*/
mbed_official 610:813dcc80987e 224 if((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)
mbed_official 610:813dcc80987e 225 {
mbed_official 610:813dcc80987e 226 FlagStatus pwrclkchanged = RESET;
mbed_official 610:813dcc80987e 227
mbed_official 610:813dcc80987e 228 /* Check for RTC Parameters used to output RTCCLK */
mbed_official 610:813dcc80987e 229 assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
mbed_official 610:813dcc80987e 230
mbed_official 610:813dcc80987e 231 /* Reset the Backup domain only if the RTC Clock source selection is modified */
mbed_official 610:813dcc80987e 232 if(READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL) != PeriphClkInit->RTCClockSelection)
mbed_official 610:813dcc80987e 233 {
mbed_official 610:813dcc80987e 234 /* Enable Power Clock */
mbed_official 610:813dcc80987e 235 if(__HAL_RCC_PWR_IS_CLK_DISABLED())
mbed_official 610:813dcc80987e 236 {
mbed_official 610:813dcc80987e 237 __HAL_RCC_PWR_CLK_ENABLE();
mbed_official 610:813dcc80987e 238 pwrclkchanged = SET;
mbed_official 610:813dcc80987e 239 }
mbed_official 610:813dcc80987e 240
mbed_official 610:813dcc80987e 241 /* Enable write access to Backup domain */
mbed_official 610:813dcc80987e 242 SET_BIT(PWR->CR1, PWR_CR1_DBP);
mbed_official 610:813dcc80987e 243
mbed_official 610:813dcc80987e 244 /* Wait for Backup domain Write protection disable */
mbed_official 610:813dcc80987e 245 tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 246
mbed_official 610:813dcc80987e 247 while((PWR->CR1 & PWR_CR1_DBP) == RESET)
mbed_official 610:813dcc80987e 248 {
mbed_official 610:813dcc80987e 249 if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
mbed_official 610:813dcc80987e 250 {
mbed_official 610:813dcc80987e 251 ret = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 252 break;
mbed_official 610:813dcc80987e 253 }
mbed_official 610:813dcc80987e 254 }
mbed_official 610:813dcc80987e 255
mbed_official 610:813dcc80987e 256 if(ret == HAL_OK)
mbed_official 610:813dcc80987e 257 {
mbed_official 610:813dcc80987e 258 /* Store the content of BDCR register before the reset of Backup Domain */
mbed_official 610:813dcc80987e 259 tmpreg = READ_BIT(RCC->BDCR, ~(RCC_BDCR_RTCSEL));
mbed_official 610:813dcc80987e 260 /* RTC Clock selection can be changed only if the Backup Domain is reset */
mbed_official 610:813dcc80987e 261 __HAL_RCC_BACKUPRESET_FORCE();
mbed_official 610:813dcc80987e 262 __HAL_RCC_BACKUPRESET_RELEASE();
mbed_official 610:813dcc80987e 263 /* Restore the Content of BDCR register */
mbed_official 610:813dcc80987e 264 RCC->BDCR = tmpreg;
mbed_official 610:813dcc80987e 265 }
mbed_official 610:813dcc80987e 266
mbed_official 610:813dcc80987e 267 /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */
mbed_official 610:813dcc80987e 268 if (HAL_IS_BIT_SET(tmpreg, RCC_BDCR_LSERDY))
mbed_official 610:813dcc80987e 269 {
mbed_official 610:813dcc80987e 270 /* Get Start Tick*/
mbed_official 610:813dcc80987e 271 tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 272
mbed_official 610:813dcc80987e 273 /* Wait till LSE is ready */
mbed_official 610:813dcc80987e 274 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
mbed_official 610:813dcc80987e 275 {
mbed_official 610:813dcc80987e 276 if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
mbed_official 610:813dcc80987e 277 {
mbed_official 610:813dcc80987e 278 ret = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 279 break;
mbed_official 610:813dcc80987e 280 }
mbed_official 610:813dcc80987e 281 }
mbed_official 610:813dcc80987e 282 }
mbed_official 610:813dcc80987e 283
mbed_official 610:813dcc80987e 284 if(ret == HAL_OK)
mbed_official 610:813dcc80987e 285 {
mbed_official 610:813dcc80987e 286 /* Apply new RTC clock source selection */
mbed_official 610:813dcc80987e 287 __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
mbed_official 610:813dcc80987e 288
mbed_official 610:813dcc80987e 289 /* Restore clock configuration if changed */
mbed_official 610:813dcc80987e 290 if(pwrclkchanged == SET)
mbed_official 610:813dcc80987e 291 {
mbed_official 610:813dcc80987e 292 __HAL_RCC_PWR_CLK_DISABLE();
mbed_official 610:813dcc80987e 293 }
mbed_official 610:813dcc80987e 294 }
mbed_official 610:813dcc80987e 295 else
mbed_official 610:813dcc80987e 296 {
mbed_official 610:813dcc80987e 297 /* set overall return value */
mbed_official 610:813dcc80987e 298 status = ret;
mbed_official 610:813dcc80987e 299 }
mbed_official 610:813dcc80987e 300 }
mbed_official 610:813dcc80987e 301 else
mbed_official 610:813dcc80987e 302 {
mbed_official 610:813dcc80987e 303 /* set overall return value */
mbed_official 610:813dcc80987e 304 status = ret;
mbed_official 610:813dcc80987e 305 }
mbed_official 610:813dcc80987e 306 }
mbed_official 610:813dcc80987e 307
mbed_official 610:813dcc80987e 308 /*-------------------------- USART1 clock source configuration -------------------*/
mbed_official 610:813dcc80987e 309 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1)
mbed_official 610:813dcc80987e 310 {
mbed_official 610:813dcc80987e 311 /* Check the parameters */
mbed_official 610:813dcc80987e 312 assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection));
mbed_official 610:813dcc80987e 313
mbed_official 610:813dcc80987e 314 /* Configure the USART1 clock source */
mbed_official 610:813dcc80987e 315 __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection);
mbed_official 610:813dcc80987e 316 }
mbed_official 610:813dcc80987e 317
mbed_official 610:813dcc80987e 318 /*-------------------------- USART2 clock source configuration -------------------*/
mbed_official 610:813dcc80987e 319 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2)
mbed_official 610:813dcc80987e 320 {
mbed_official 610:813dcc80987e 321 /* Check the parameters */
mbed_official 610:813dcc80987e 322 assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection));
mbed_official 610:813dcc80987e 323
mbed_official 610:813dcc80987e 324 /* Configure the USART2 clock source */
mbed_official 610:813dcc80987e 325 __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection);
mbed_official 610:813dcc80987e 326 }
mbed_official 610:813dcc80987e 327
mbed_official 610:813dcc80987e 328 /*-------------------------- USART3 clock source configuration -------------------*/
mbed_official 610:813dcc80987e 329 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3)
mbed_official 610:813dcc80987e 330 {
mbed_official 610:813dcc80987e 331 /* Check the parameters */
mbed_official 610:813dcc80987e 332 assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection));
mbed_official 610:813dcc80987e 333
mbed_official 610:813dcc80987e 334 /* Configure the USART3 clock source */
mbed_official 610:813dcc80987e 335 __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection);
mbed_official 610:813dcc80987e 336 }
mbed_official 610:813dcc80987e 337
mbed_official 610:813dcc80987e 338 /*-------------------------- UART4 clock source configuration --------------------*/
mbed_official 610:813dcc80987e 339 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4)
mbed_official 610:813dcc80987e 340 {
mbed_official 610:813dcc80987e 341 /* Check the parameters */
mbed_official 610:813dcc80987e 342 assert_param(IS_RCC_UART4CLKSOURCE(PeriphClkInit->Uart4ClockSelection));
mbed_official 610:813dcc80987e 343
mbed_official 610:813dcc80987e 344 /* Configure the UART4 clock source */
mbed_official 610:813dcc80987e 345 __HAL_RCC_UART4_CONFIG(PeriphClkInit->Uart4ClockSelection);
mbed_official 610:813dcc80987e 346 }
mbed_official 610:813dcc80987e 347
mbed_official 610:813dcc80987e 348 /*-------------------------- UART5 clock source configuration --------------------*/
mbed_official 610:813dcc80987e 349 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5)
mbed_official 610:813dcc80987e 350 {
mbed_official 610:813dcc80987e 351 /* Check the parameters */
mbed_official 610:813dcc80987e 352 assert_param(IS_RCC_UART5CLKSOURCE(PeriphClkInit->Uart5ClockSelection));
mbed_official 610:813dcc80987e 353
mbed_official 610:813dcc80987e 354 /* Configure the UART5 clock source */
mbed_official 610:813dcc80987e 355 __HAL_RCC_UART5_CONFIG(PeriphClkInit->Uart5ClockSelection);
mbed_official 610:813dcc80987e 356 }
mbed_official 610:813dcc80987e 357
mbed_official 610:813dcc80987e 358 /*-------------------------- LPUART1 clock source configuration ------------------*/
mbed_official 610:813dcc80987e 359 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1)
mbed_official 610:813dcc80987e 360 {
mbed_official 610:813dcc80987e 361 /* Check the parameters */
mbed_official 610:813dcc80987e 362 assert_param(IS_RCC_LPUART1CLKSOURCE(PeriphClkInit->Lpuart1ClockSelection));
mbed_official 610:813dcc80987e 363
mbed_official 610:813dcc80987e 364 /* Configure the LPUAR1 clock source */
mbed_official 610:813dcc80987e 365 __HAL_RCC_LPUART1_CONFIG(PeriphClkInit->Lpuart1ClockSelection);
mbed_official 610:813dcc80987e 366 }
mbed_official 610:813dcc80987e 367
mbed_official 610:813dcc80987e 368 /*-------------------------- LPTIM1 clock source configuration -------------------*/
mbed_official 610:813dcc80987e 369 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == (RCC_PERIPHCLK_LPTIM1))
mbed_official 610:813dcc80987e 370 {
mbed_official 610:813dcc80987e 371 assert_param(IS_RCC_LPTIM1CLK(PeriphClkInit->Lptim1ClockSelection));
mbed_official 610:813dcc80987e 372 __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection);
mbed_official 610:813dcc80987e 373 }
mbed_official 610:813dcc80987e 374
mbed_official 610:813dcc80987e 375 /*-------------------------- LPTIM2 clock source configuration -------------------*/
mbed_official 610:813dcc80987e 376 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM2) == (RCC_PERIPHCLK_LPTIM2))
mbed_official 610:813dcc80987e 377 {
mbed_official 610:813dcc80987e 378 assert_param(IS_RCC_LPTIM2CLK(PeriphClkInit->Lptim2ClockSelection));
mbed_official 610:813dcc80987e 379 __HAL_RCC_LPTIM2_CONFIG(PeriphClkInit->Lptim2ClockSelection);
mbed_official 610:813dcc80987e 380 }
mbed_official 610:813dcc80987e 381
mbed_official 610:813dcc80987e 382 /*-------------------------- I2C1 clock source configuration ---------------------*/
mbed_official 610:813dcc80987e 383 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1)
mbed_official 610:813dcc80987e 384 {
mbed_official 610:813dcc80987e 385 /* Check the parameters */
mbed_official 610:813dcc80987e 386 assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection));
mbed_official 610:813dcc80987e 387
mbed_official 610:813dcc80987e 388 /* Configure the I2C1 clock source */
mbed_official 610:813dcc80987e 389 __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection);
mbed_official 610:813dcc80987e 390 }
mbed_official 610:813dcc80987e 391
mbed_official 610:813dcc80987e 392 /*-------------------------- I2C2 clock source configuration ---------------------*/
mbed_official 610:813dcc80987e 393 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2)
mbed_official 610:813dcc80987e 394 {
mbed_official 610:813dcc80987e 395 /* Check the parameters */
mbed_official 610:813dcc80987e 396 assert_param(IS_RCC_I2C2CLKSOURCE(PeriphClkInit->I2c2ClockSelection));
mbed_official 610:813dcc80987e 397
mbed_official 610:813dcc80987e 398 /* Configure the I2C2 clock source */
mbed_official 610:813dcc80987e 399 __HAL_RCC_I2C2_CONFIG(PeriphClkInit->I2c2ClockSelection);
mbed_official 610:813dcc80987e 400 }
mbed_official 610:813dcc80987e 401
mbed_official 610:813dcc80987e 402 /*-------------------------- I2C3 clock source configuration ---------------------*/
mbed_official 610:813dcc80987e 403 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3)
mbed_official 610:813dcc80987e 404 {
mbed_official 610:813dcc80987e 405 /* Check the parameters */
mbed_official 610:813dcc80987e 406 assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection));
mbed_official 610:813dcc80987e 407
mbed_official 610:813dcc80987e 408 /* Configure the I2C3 clock source */
mbed_official 610:813dcc80987e 409 __HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection);
mbed_official 610:813dcc80987e 410 }
mbed_official 610:813dcc80987e 411
mbed_official 610:813dcc80987e 412 #if defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)
mbed_official 610:813dcc80987e 413 /*-------------------------- USB clock source configuration ----------------------*/
mbed_official 610:813dcc80987e 414 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == (RCC_PERIPHCLK_USB))
mbed_official 610:813dcc80987e 415 {
mbed_official 610:813dcc80987e 416 assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->UsbClockSelection));
mbed_official 610:813dcc80987e 417 __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
mbed_official 610:813dcc80987e 418
mbed_official 610:813dcc80987e 419 if(PeriphClkInit->UsbClockSelection == RCC_USBCLKSOURCE_PLL)
mbed_official 610:813dcc80987e 420 {
mbed_official 610:813dcc80987e 421 /* Enable PLL48M1CLK output */
mbed_official 610:813dcc80987e 422 __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_48M1CLK);
mbed_official 610:813dcc80987e 423 }
mbed_official 610:813dcc80987e 424 else if(PeriphClkInit->UsbClockSelection == RCC_USBCLKSOURCE_PLLSAI1)
mbed_official 610:813dcc80987e 425 {
mbed_official 610:813dcc80987e 426 /* PLLSAI1 parameters N & Q configuration and clock output (PLLSAI1ClockOut) */
mbed_official 610:813dcc80987e 427 ret = RCCEx_PLLSAI1_ConfigNQ(&(PeriphClkInit->PLLSAI1));
mbed_official 610:813dcc80987e 428
mbed_official 610:813dcc80987e 429 if(ret != HAL_OK)
mbed_official 610:813dcc80987e 430 {
mbed_official 610:813dcc80987e 431 /* set overall return value */
mbed_official 610:813dcc80987e 432 status = ret;
mbed_official 610:813dcc80987e 433 }
mbed_official 610:813dcc80987e 434 }
mbed_official 610:813dcc80987e 435 }
mbed_official 610:813dcc80987e 436 #endif /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
mbed_official 610:813dcc80987e 437
mbed_official 610:813dcc80987e 438 /*-------------------------- SDMMC1 clock source configuration -------------------*/
mbed_official 610:813dcc80987e 439 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC1) == (RCC_PERIPHCLK_SDMMC1))
mbed_official 610:813dcc80987e 440 {
mbed_official 610:813dcc80987e 441 assert_param(IS_RCC_SDMMC1CLKSOURCE(PeriphClkInit->Sdmmc1ClockSelection));
mbed_official 610:813dcc80987e 442 __HAL_RCC_SDMMC1_CONFIG(PeriphClkInit->Sdmmc1ClockSelection);
mbed_official 610:813dcc80987e 443
mbed_official 610:813dcc80987e 444 if(PeriphClkInit->Sdmmc1ClockSelection == RCC_SDMMC1CLKSOURCE_PLL)
mbed_official 610:813dcc80987e 445 {
mbed_official 610:813dcc80987e 446 /* Enable PLL48M1CLK output */
mbed_official 610:813dcc80987e 447 __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_48M1CLK);
mbed_official 610:813dcc80987e 448 }
mbed_official 610:813dcc80987e 449 else if(PeriphClkInit->Sdmmc1ClockSelection == RCC_SDMMC1CLKSOURCE_PLLSAI1)
mbed_official 610:813dcc80987e 450 {
mbed_official 610:813dcc80987e 451 /* PLLSAI1 parameters N & Q configuration and clock output (PLLSAI1ClockOut) */
mbed_official 610:813dcc80987e 452 ret = RCCEx_PLLSAI1_ConfigNQ(&(PeriphClkInit->PLLSAI1));
mbed_official 610:813dcc80987e 453
mbed_official 610:813dcc80987e 454 if(ret != HAL_OK)
mbed_official 610:813dcc80987e 455 {
mbed_official 610:813dcc80987e 456 /* set overall return value */
mbed_official 610:813dcc80987e 457 status = ret;
mbed_official 610:813dcc80987e 458 }
mbed_official 610:813dcc80987e 459 }
mbed_official 610:813dcc80987e 460 }
mbed_official 610:813dcc80987e 461
mbed_official 610:813dcc80987e 462 /*-------------------------- RNG clock source configuration ----------------------*/
mbed_official 610:813dcc80987e 463 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RNG) == (RCC_PERIPHCLK_RNG))
mbed_official 610:813dcc80987e 464 {
mbed_official 610:813dcc80987e 465 assert_param(IS_RCC_RNGCLKSOURCE(PeriphClkInit->RngClockSelection));
mbed_official 610:813dcc80987e 466 __HAL_RCC_RNG_CONFIG(PeriphClkInit->RngClockSelection);
mbed_official 610:813dcc80987e 467
mbed_official 610:813dcc80987e 468 if(PeriphClkInit->RngClockSelection == RCC_RNGCLKSOURCE_PLL)
mbed_official 610:813dcc80987e 469 {
mbed_official 610:813dcc80987e 470 /* Enable PLL48M1CLK output */
mbed_official 610:813dcc80987e 471 __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_48M1CLK);
mbed_official 610:813dcc80987e 472 }
mbed_official 610:813dcc80987e 473 else if(PeriphClkInit->RngClockSelection == RCC_RNGCLKSOURCE_PLLSAI1)
mbed_official 610:813dcc80987e 474 {
mbed_official 610:813dcc80987e 475 /* PLLSAI1 parameters N & Q configuration and clock output (PLLSAI1ClockOut) */
mbed_official 610:813dcc80987e 476 ret = RCCEx_PLLSAI1_ConfigNQ(&(PeriphClkInit->PLLSAI1));
mbed_official 610:813dcc80987e 477
mbed_official 610:813dcc80987e 478 if(ret != HAL_OK)
mbed_official 610:813dcc80987e 479 {
mbed_official 610:813dcc80987e 480 /* set overall return value */
mbed_official 610:813dcc80987e 481 status = ret;
mbed_official 610:813dcc80987e 482 }
mbed_official 610:813dcc80987e 483 }
mbed_official 610:813dcc80987e 484 }
mbed_official 610:813dcc80987e 485
mbed_official 610:813dcc80987e 486 /*-------------------------- ADC clock source configuration ----------------------*/
mbed_official 610:813dcc80987e 487 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
mbed_official 610:813dcc80987e 488 {
mbed_official 610:813dcc80987e 489 /* Check the parameters */
mbed_official 610:813dcc80987e 490 assert_param(IS_RCC_ADCCLKSOURCE(PeriphClkInit->AdcClockSelection));
mbed_official 610:813dcc80987e 491
mbed_official 610:813dcc80987e 492 /* Configure the ADC interface clock source */
mbed_official 610:813dcc80987e 493 __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
mbed_official 610:813dcc80987e 494
mbed_official 610:813dcc80987e 495 if(PeriphClkInit->AdcClockSelection == RCC_ADCCLKSOURCE_PLLSAI1)
mbed_official 610:813dcc80987e 496 {
mbed_official 610:813dcc80987e 497 /* PLLSAI1 parameters N & R configuration and clock output (PLLSAI1ClockOut) */
mbed_official 610:813dcc80987e 498 ret = RCCEx_PLLSAI1_ConfigNR(&(PeriphClkInit->PLLSAI1));
mbed_official 610:813dcc80987e 499 }
mbed_official 610:813dcc80987e 500 else if(PeriphClkInit->AdcClockSelection == RCC_ADCCLKSOURCE_PLLSAI2)
mbed_official 610:813dcc80987e 501 {
mbed_official 610:813dcc80987e 502 /* PLLSAI2 parameters N & R configuration and clock output (PLLSAI2ClockOut) */
mbed_official 610:813dcc80987e 503 ret = RCCEx_PLLSAI2_ConfigNR(&(PeriphClkInit->PLLSAI2));
mbed_official 610:813dcc80987e 504
mbed_official 610:813dcc80987e 505 if(ret != HAL_OK)
mbed_official 610:813dcc80987e 506 {
mbed_official 610:813dcc80987e 507 /* set overall return value */
mbed_official 610:813dcc80987e 508 status = ret;
mbed_official 610:813dcc80987e 509 }
mbed_official 610:813dcc80987e 510 }
mbed_official 610:813dcc80987e 511 }
mbed_official 610:813dcc80987e 512
mbed_official 610:813dcc80987e 513 /*-------------------------- SWPMI1 clock source configuration -------------------*/
mbed_official 610:813dcc80987e 514 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1)
mbed_official 610:813dcc80987e 515 {
mbed_official 610:813dcc80987e 516 /* Check the parameters */
mbed_official 610:813dcc80987e 517 assert_param(IS_RCC_SWPMI1CLKSOURCE(PeriphClkInit->Swpmi1ClockSelection));
mbed_official 610:813dcc80987e 518
mbed_official 610:813dcc80987e 519 /* Configure the SWPMI1 clock source */
mbed_official 610:813dcc80987e 520 __HAL_RCC_SWPMI1_CONFIG(PeriphClkInit->Swpmi1ClockSelection);
mbed_official 610:813dcc80987e 521 }
mbed_official 610:813dcc80987e 522
mbed_official 610:813dcc80987e 523 /*-------------------------- DFSDM clock source configuration --------------------*/
mbed_official 610:813dcc80987e 524 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM) == RCC_PERIPHCLK_DFSDM)
mbed_official 610:813dcc80987e 525 {
mbed_official 610:813dcc80987e 526 /* Check the parameters */
mbed_official 610:813dcc80987e 527 assert_param(IS_RCC_DFSDMCLKSOURCE(PeriphClkInit->DfsdmClockSelection));
mbed_official 610:813dcc80987e 528
mbed_official 610:813dcc80987e 529 /* Configure the DFSDM interface clock source */
mbed_official 610:813dcc80987e 530 __HAL_RCC_DFSDM_CONFIG(PeriphClkInit->DfsdmClockSelection);
mbed_official 610:813dcc80987e 531 }
mbed_official 610:813dcc80987e 532
mbed_official 610:813dcc80987e 533 return status;
mbed_official 610:813dcc80987e 534 }
mbed_official 610:813dcc80987e 535
mbed_official 610:813dcc80987e 536 /**
mbed_official 610:813dcc80987e 537 * @brief Get the RCC_ClkInitStruct according to the internal RCC configuration registers.
mbed_official 610:813dcc80987e 538 * @param PeriphClkInit: pointer to an RCC_PeriphCLKInitTypeDef structure that
mbed_official 610:813dcc80987e 539 * returns the configuration information for the Extended Peripherals
mbed_official 610:813dcc80987e 540 * clocks(SAI1, SAI2, LPTIM1, LPTIM2, I2C1, I2C2, I2C3, LPUART,
mbed_official 610:813dcc80987e 541 * USART1, USART2, USART3, UART4, UART5, RTC, ADCx, DFSDMx, SWPMI1, USB, SDMMC1 and RNG).
mbed_official 610:813dcc80987e 542 * @retval None
mbed_official 610:813dcc80987e 543 */
mbed_official 610:813dcc80987e 544 void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
mbed_official 610:813dcc80987e 545 {
mbed_official 610:813dcc80987e 546 /* Set all possible values for the extended clock type parameter------------*/
mbed_official 610:813dcc80987e 547 #if defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)
mbed_official 610:813dcc80987e 548 PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4 | RCC_PERIPHCLK_UART5 | \
mbed_official 610:813dcc80987e 549 RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | RCC_PERIPHCLK_LPTIM1 | \
mbed_official 610:813dcc80987e 550 RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_SAI2 | RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SDMMC1 | \
mbed_official 610:813dcc80987e 551 RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_SWPMI1 | RCC_PERIPHCLK_DFSDM | RCC_PERIPHCLK_RTC ;
mbed_official 610:813dcc80987e 552 #else
mbed_official 610:813dcc80987e 553 PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4 | RCC_PERIPHCLK_UART5 | \
mbed_official 610:813dcc80987e 554 RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | RCC_PERIPHCLK_LPTIM1 | \
mbed_official 610:813dcc80987e 555 RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_SAI2 | RCC_PERIPHCLK_SDMMC1 | \
mbed_official 610:813dcc80987e 556 RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_SWPMI1 | RCC_PERIPHCLK_DFSDM | RCC_PERIPHCLK_RTC ;
mbed_official 610:813dcc80987e 557 #endif /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
mbed_official 610:813dcc80987e 558
mbed_official 610:813dcc80987e 559 /* Get the PLLSAI1 Clock configuration -----------------------------------------------*/
mbed_official 610:813dcc80987e 560 PeriphClkInit->PLLSAI1.PLLSAI1N = (uint32_t)((RCC->PLLSAI1CFGR & RCC_PLLSAI1CFGR_PLLSAI1N) >> POSITION_VAL(RCC_PLLSAI1CFGR_PLLSAI1N));
mbed_official 610:813dcc80987e 561 PeriphClkInit->PLLSAI1.PLLSAI1P = (uint32_t)(((RCC->PLLSAI1CFGR & RCC_PLLSAI1CFGR_PLLSAI1P) >> POSITION_VAL(RCC_PLLSAI1CFGR_PLLSAI1P)) << 4)+7;
mbed_official 610:813dcc80987e 562 PeriphClkInit->PLLSAI1.PLLSAI1R = (uint32_t)(((RCC->PLLSAI1CFGR & RCC_PLLSAI1CFGR_PLLSAI1R) >> POSITION_VAL(RCC_PLLSAI1CFGR_PLLSAI1R))+1)* 2;
mbed_official 610:813dcc80987e 563 PeriphClkInit->PLLSAI1.PLLSAI1Q = (uint32_t)(((RCC->PLLSAI1CFGR & RCC_PLLSAI1CFGR_PLLSAI1Q) >> POSITION_VAL(RCC_PLLSAI1CFGR_PLLSAI1Q))+1)* 2;
mbed_official 610:813dcc80987e 564 /* Get the PLLSAI2 Clock configuration -----------------------------------------------*/
mbed_official 610:813dcc80987e 565 PeriphClkInit->PLLSAI2.PLLSAI2N = (uint32_t)((RCC->PLLSAI2CFGR & RCC_PLLSAI2CFGR_PLLSAI2N) >> POSITION_VAL(RCC_PLLSAI2CFGR_PLLSAI2N));
mbed_official 610:813dcc80987e 566 PeriphClkInit->PLLSAI2.PLLSAI2P = (uint32_t)(((RCC->PLLSAI2CFGR & RCC_PLLSAI2CFGR_PLLSAI2P) >> POSITION_VAL(RCC_PLLSAI2CFGR_PLLSAI2P)) << 4)+7;
mbed_official 610:813dcc80987e 567 PeriphClkInit->PLLSAI2.PLLSAI2R = (uint32_t)(((RCC->PLLSAI2CFGR & RCC_PLLSAI2CFGR_PLLSAI2R)>> POSITION_VAL(RCC_PLLSAI2CFGR_PLLSAI2R))+1)* 2;
mbed_official 610:813dcc80987e 568
mbed_official 610:813dcc80987e 569 /* Get the USART1 clock source ---------------------------------------------*/
mbed_official 610:813dcc80987e 570 PeriphClkInit->Usart1ClockSelection = __HAL_RCC_GET_USART1_SOURCE();
mbed_official 610:813dcc80987e 571 /* Get the USART2 clock source ---------------------------------------------*/
mbed_official 610:813dcc80987e 572 PeriphClkInit->Usart2ClockSelection = __HAL_RCC_GET_USART2_SOURCE();
mbed_official 610:813dcc80987e 573 /* Get the USART3 clock source ---------------------------------------------*/
mbed_official 610:813dcc80987e 574 PeriphClkInit->Usart3ClockSelection = __HAL_RCC_GET_USART3_SOURCE();
mbed_official 610:813dcc80987e 575 /* Get the UART4 clock source ----------------------------------------------*/
mbed_official 610:813dcc80987e 576 PeriphClkInit->Uart4ClockSelection = __HAL_RCC_GET_UART4_SOURCE();
mbed_official 610:813dcc80987e 577 /* Get the UART5 clock source ----------------------------------------------*/
mbed_official 610:813dcc80987e 578 PeriphClkInit->Uart5ClockSelection = __HAL_RCC_GET_UART5_SOURCE();
mbed_official 610:813dcc80987e 579 /* Get the LPUART1 clock source --------------------------------------------*/
mbed_official 610:813dcc80987e 580 PeriphClkInit->Lpuart1ClockSelection = __HAL_RCC_GET_LPUART1_SOURCE();
mbed_official 610:813dcc80987e 581 /* Get the I2C1 clock source -----------------------------------------------*/
mbed_official 610:813dcc80987e 582 PeriphClkInit->I2c1ClockSelection = __HAL_RCC_GET_I2C1_SOURCE();
mbed_official 610:813dcc80987e 583 /* Get the I2C2 clock source ----------------------------------------------*/
mbed_official 610:813dcc80987e 584 PeriphClkInit->I2c2ClockSelection = __HAL_RCC_GET_I2C2_SOURCE();
mbed_official 610:813dcc80987e 585 /* Get the I2C3 clock source -----------------------------------------------*/
mbed_official 610:813dcc80987e 586 PeriphClkInit->I2c3ClockSelection = __HAL_RCC_GET_I2C3_SOURCE();
mbed_official 610:813dcc80987e 587 /* Get the LPTIM1 clock source ---------------------------------------------*/
mbed_official 610:813dcc80987e 588 PeriphClkInit->Lptim1ClockSelection = __HAL_RCC_GET_LPTIM1_SOURCE();
mbed_official 610:813dcc80987e 589 /* Get the LPTIM2 clock source ---------------------------------------------*/
mbed_official 610:813dcc80987e 590 PeriphClkInit->Lptim2ClockSelection = __HAL_RCC_GET_LPTIM2_SOURCE();
mbed_official 610:813dcc80987e 591 /* Get the SAI1 clock source -----------------------------------------------*/
mbed_official 610:813dcc80987e 592 PeriphClkInit->Sai1ClockSelection = __HAL_RCC_GET_SAI1_SOURCE();
mbed_official 610:813dcc80987e 593 /* Get the SAI2 clock source -----------------------------------------------*/
mbed_official 610:813dcc80987e 594 PeriphClkInit->Sai2ClockSelection = __HAL_RCC_GET_SAI2_SOURCE();
mbed_official 610:813dcc80987e 595 /* Get the RTC clock source ------------------------------------------------*/
mbed_official 610:813dcc80987e 596 PeriphClkInit->RTCClockSelection = __HAL_RCC_GET_RTC_SOURCE();
mbed_official 610:813dcc80987e 597
mbed_official 610:813dcc80987e 598 #if defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)
mbed_official 610:813dcc80987e 599 /* Get the USB clock source ------------------------------------------------*/
mbed_official 610:813dcc80987e 600 PeriphClkInit->UsbClockSelection = __HAL_RCC_GET_USB_SOURCE();
mbed_official 610:813dcc80987e 601 #endif /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
mbed_official 610:813dcc80987e 602
mbed_official 610:813dcc80987e 603 /* Get the SDMMC1 clock source ---------------------------------------------*/
mbed_official 610:813dcc80987e 604 PeriphClkInit->Sdmmc1ClockSelection = __HAL_RCC_GET_SDMMC1_SOURCE();
mbed_official 610:813dcc80987e 605 /* Get the RNG clock source ------------------------------------------------*/
mbed_official 610:813dcc80987e 606 PeriphClkInit->RngClockSelection = __HAL_RCC_GET_RNG_SOURCE();
mbed_official 610:813dcc80987e 607 /* Get the ADC clock source -----------------------------------------------*/
mbed_official 610:813dcc80987e 608 PeriphClkInit->AdcClockSelection = __HAL_RCC_GET_ADC_SOURCE();
mbed_official 610:813dcc80987e 609 /* Get the SWPMI1 clock source ----------------------------------------------*/
mbed_official 610:813dcc80987e 610 PeriphClkInit->Swpmi1ClockSelection = __HAL_RCC_GET_SWPMI1_SOURCE();
mbed_official 610:813dcc80987e 611 /* Get the DFSDM clock source -------------------------------------------*/
mbed_official 610:813dcc80987e 612 PeriphClkInit->DfsdmClockSelection = __HAL_RCC_GET_DFSDM_SOURCE();
mbed_official 610:813dcc80987e 613 }
mbed_official 610:813dcc80987e 614
mbed_official 610:813dcc80987e 615 /**
mbed_official 610:813dcc80987e 616 * @brief Return the peripheral clock frequency for peripherals with clock source from PLLSAIs
mbed_official 610:813dcc80987e 617 * @note Return 0 if peripheral clock identifier not managed by this API
mbed_official 610:813dcc80987e 618 * @param PeriphClk: Peripheral clock identifier
mbed_official 610:813dcc80987e 619 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 620 * @arg RCC_PERIPHCLK_SAI1: SAI1 peripheral clock
mbed_official 610:813dcc80987e 621 * @arg RCC_PERIPHCLK_SAI2: SAI2 peripheral clock
mbed_official 610:813dcc80987e 622 * @arg RCC_PERIPHCLK_ADC: ADC peripheral clock
mbed_official 610:813dcc80987e 623 * @arg RCC_PERIPHCLK_USB: USB, RNG, SDMMC1 peripheral clock
mbed_official 610:813dcc80987e 624 * @retval Frequency in KHz
mbed_official 610:813dcc80987e 625 */
mbed_official 610:813dcc80987e 626 uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
mbed_official 610:813dcc80987e 627 {
mbed_official 610:813dcc80987e 628 uint32_t frequency = 0;
mbed_official 610:813dcc80987e 629 uint32_t pllvco = 0, plln = 0;
mbed_official 610:813dcc80987e 630
mbed_official 610:813dcc80987e 631 /* Compute PLL clock input */
mbed_official 610:813dcc80987e 632 if(__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_MSI)
mbed_official 610:813dcc80987e 633 {
mbed_official 610:813dcc80987e 634 pllvco = (1 << ((__HAL_RCC_GET_MSI_RANGE() >> 4) - 4)) * 1000000;
mbed_official 610:813dcc80987e 635 }
mbed_official 610:813dcc80987e 636 else if(__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI)
mbed_official 610:813dcc80987e 637 {
mbed_official 610:813dcc80987e 638 pllvco = HSI_VALUE;
mbed_official 610:813dcc80987e 639 }
mbed_official 610:813dcc80987e 640 else /* HSE source */
mbed_official 610:813dcc80987e 641 {
mbed_official 610:813dcc80987e 642 pllvco = HSE_VALUE;
mbed_official 610:813dcc80987e 643 }
mbed_official 610:813dcc80987e 644
mbed_official 610:813dcc80987e 645 /* f(PLL Source) / PLLM */
mbed_official 610:813dcc80987e 646 pllvco = (pllvco / ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> 4) + 1));
mbed_official 610:813dcc80987e 647
mbed_official 610:813dcc80987e 648 if((PeriphClk == RCC_PERIPHCLK_SAI1) || (PeriphClk == RCC_PERIPHCLK_SAI2))
mbed_official 610:813dcc80987e 649 {
mbed_official 610:813dcc80987e 650
mbed_official 610:813dcc80987e 651 if(__HAL_RCC_GET_PLLCLKOUT_CONFIG(RCC_PLL_SAI3CLK) != RESET)
mbed_official 610:813dcc80987e 652 {
mbed_official 610:813dcc80987e 653 /* f(PLLSAI3CLK) = f(VCO input) * PLLN / PLLP */
mbed_official 610:813dcc80987e 654 plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> 8;
mbed_official 610:813dcc80987e 655 if(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLP) != RESET)
mbed_official 610:813dcc80987e 656 {
mbed_official 610:813dcc80987e 657 frequency = (pllvco * plln) / 17;
mbed_official 610:813dcc80987e 658 }
mbed_official 610:813dcc80987e 659 else
mbed_official 610:813dcc80987e 660 {
mbed_official 610:813dcc80987e 661 frequency = (pllvco * plln) / 7;
mbed_official 610:813dcc80987e 662 }
mbed_official 610:813dcc80987e 663 }
mbed_official 610:813dcc80987e 664 else if(__HAL_RCC_GET_PLLSAI1CLKOUT_CONFIG(RCC_PLLSAI1_SAI1CLK) != RESET)
mbed_official 610:813dcc80987e 665 {
mbed_official 610:813dcc80987e 666 /* f(PLLSAI1CLK) = f(VCOSAI1 input) * PLLSAI1N / PLLSAI1P */
mbed_official 610:813dcc80987e 667 plln = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N) >> 8;
mbed_official 610:813dcc80987e 668 if(READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1P) != RESET)
mbed_official 610:813dcc80987e 669 {
mbed_official 610:813dcc80987e 670 frequency = (pllvco * plln) / 17;
mbed_official 610:813dcc80987e 671 }
mbed_official 610:813dcc80987e 672 else
mbed_official 610:813dcc80987e 673 {
mbed_official 610:813dcc80987e 674 frequency = (pllvco * plln) / 7;
mbed_official 610:813dcc80987e 675 }
mbed_official 610:813dcc80987e 676 }
mbed_official 610:813dcc80987e 677 else if(__HAL_RCC_GET_PLLSAI2CLKOUT_CONFIG(RCC_PLLSAI2_SAI2CLK) != RESET)
mbed_official 610:813dcc80987e 678 {
mbed_official 610:813dcc80987e 679 /* f(PLLSAI2CLK) = f(VCOSAI2 input) * PLLSAI2N / PLLSAI2P */
mbed_official 610:813dcc80987e 680 plln = READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2N) >> 8;
mbed_official 610:813dcc80987e 681 if(READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2P) != RESET)
mbed_official 610:813dcc80987e 682 {
mbed_official 610:813dcc80987e 683 frequency = (pllvco * plln) / 17;
mbed_official 610:813dcc80987e 684 }
mbed_official 610:813dcc80987e 685 else
mbed_official 610:813dcc80987e 686 {
mbed_official 610:813dcc80987e 687 frequency = (pllvco * plln) / 7;
mbed_official 610:813dcc80987e 688 }
mbed_official 610:813dcc80987e 689 }
mbed_official 610:813dcc80987e 690 else
mbed_official 610:813dcc80987e 691 {
mbed_official 610:813dcc80987e 692 if(PeriphClk == RCC_PERIPHCLK_SAI1)
mbed_official 610:813dcc80987e 693 {
mbed_official 610:813dcc80987e 694 frequency = EXTERNAL_SAI1_CLOCK_VALUE;
mbed_official 610:813dcc80987e 695 }
mbed_official 610:813dcc80987e 696 else
mbed_official 610:813dcc80987e 697 {
mbed_official 610:813dcc80987e 698 frequency = EXTERNAL_SAI2_CLOCK_VALUE;
mbed_official 610:813dcc80987e 699 }
mbed_official 610:813dcc80987e 700 }
mbed_official 610:813dcc80987e 701 }
mbed_official 610:813dcc80987e 702 else if(PeriphClk == RCC_PERIPHCLK_ADC)
mbed_official 610:813dcc80987e 703 {
mbed_official 610:813dcc80987e 704 if(__HAL_RCC_GET_ADC_SOURCE() == RCC_ADCCLKSOURCE_SYSCLK)
mbed_official 610:813dcc80987e 705 {
mbed_official 610:813dcc80987e 706 frequency = HAL_RCC_GetSysClockFreq();
mbed_official 610:813dcc80987e 707 }
mbed_official 610:813dcc80987e 708 else if(__HAL_RCC_GET_ADC_SOURCE() == RCC_ADCCLKSOURCE_PLLSAI1)
mbed_official 610:813dcc80987e 709 {
mbed_official 610:813dcc80987e 710 if(__HAL_RCC_GET_PLLSAI1CLKOUT_CONFIG(RCC_PLLSAI1_ADC1CLK) != RESET)
mbed_official 610:813dcc80987e 711 {
mbed_official 610:813dcc80987e 712 /* f(PLLADC1CLK) = f(VCOSAI1 input) * PLLSAI1N / PLLSAI1R */
mbed_official 610:813dcc80987e 713 plln = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N) >> 8;
mbed_official 610:813dcc80987e 714 frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1R) >> 24) + 1) << 1);
mbed_official 610:813dcc80987e 715 }
mbed_official 610:813dcc80987e 716 }
mbed_official 610:813dcc80987e 717 else /* RCC_ADCCLKSOURCE_PLLSAI2 */
mbed_official 610:813dcc80987e 718 {
mbed_official 610:813dcc80987e 719 if(__HAL_RCC_GET_PLLSAI2CLKOUT_CONFIG(RCC_PLLSAI2_ADC2CLK) != RESET)
mbed_official 610:813dcc80987e 720 {
mbed_official 610:813dcc80987e 721 /* f(PLLADC2CLK) = f(VCOSAI2 input) * PLLSAI2N / PLLSAI2R */
mbed_official 610:813dcc80987e 722 plln = READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2N) >> 8;
mbed_official 610:813dcc80987e 723 frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2R) >> 24) + 1) << 1);
mbed_official 610:813dcc80987e 724 }
mbed_official 610:813dcc80987e 725 }
mbed_official 610:813dcc80987e 726 }
mbed_official 610:813dcc80987e 727
mbed_official 610:813dcc80987e 728 #if defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)
mbed_official 610:813dcc80987e 729 else if(PeriphClk == RCC_PERIPHCLK_USB)
mbed_official 610:813dcc80987e 730 {
mbed_official 610:813dcc80987e 731 if(__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_MSI)
mbed_official 610:813dcc80987e 732 {
mbed_official 610:813dcc80987e 733 frequency = (1 << ((__HAL_RCC_GET_MSI_RANGE() >> 4) - 4)) * 1000000;
mbed_official 610:813dcc80987e 734 }
mbed_official 610:813dcc80987e 735 else if(__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_PLL)
mbed_official 610:813dcc80987e 736 {
mbed_official 610:813dcc80987e 737 /* f(PLL48M1CLK) = f(VCO input) * PLLN / PLLQ */
mbed_official 610:813dcc80987e 738 plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> 8;
mbed_official 610:813dcc80987e 739 frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> 21) + 1) << 1);
mbed_official 610:813dcc80987e 740 }
mbed_official 610:813dcc80987e 741 else if(__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_PLLSAI1)
mbed_official 610:813dcc80987e 742 {
mbed_official 610:813dcc80987e 743 /* f(PLL48M2CLK) = f(VCOSAI1 input) * PLLSAI1N / PLLSAI1Q */
mbed_official 610:813dcc80987e 744 plln = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N) >> 8;
mbed_official 610:813dcc80987e 745 frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1Q) >> 21) + 1) << 1);
mbed_official 610:813dcc80987e 746 }
mbed_official 610:813dcc80987e 747 else /* RCC_USBCLKSOURCE_NONE */
mbed_official 610:813dcc80987e 748 {
mbed_official 610:813dcc80987e 749 frequency = 0;
mbed_official 610:813dcc80987e 750 }
mbed_official 610:813dcc80987e 751 }
mbed_official 610:813dcc80987e 752 #endif /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
mbed_official 610:813dcc80987e 753
mbed_official 610:813dcc80987e 754 return(frequency);
mbed_official 610:813dcc80987e 755 }
mbed_official 610:813dcc80987e 756
mbed_official 610:813dcc80987e 757 /**
mbed_official 610:813dcc80987e 758 * @}
mbed_official 610:813dcc80987e 759 */
mbed_official 610:813dcc80987e 760
mbed_official 610:813dcc80987e 761 /** @defgroup RCCEx_Exported_Functions_Group2 Extended clock management functions
mbed_official 610:813dcc80987e 762 * @brief Extended clock management functions
mbed_official 610:813dcc80987e 763 *
mbed_official 610:813dcc80987e 764 @verbatim
mbed_official 610:813dcc80987e 765 ===============================================================================
mbed_official 610:813dcc80987e 766 ##### Extended clock management functions #####
mbed_official 610:813dcc80987e 767 ===============================================================================
mbed_official 610:813dcc80987e 768 [..]
mbed_official 610:813dcc80987e 769 This subsection provides a set of functions allowing to control the
mbed_official 610:813dcc80987e 770 activation or deactivation of MSI PLL-mode, PLLSAI1, PLLSAI2, LSE CSS,
mbed_official 610:813dcc80987e 771 Low speed clock output and clock after wake-up from STOP mode.
mbed_official 610:813dcc80987e 772 @endverbatim
mbed_official 610:813dcc80987e 773 * @{
mbed_official 610:813dcc80987e 774 */
mbed_official 610:813dcc80987e 775
mbed_official 610:813dcc80987e 776 /**
mbed_official 610:813dcc80987e 777 * @brief Enable PLLSAI1.
mbed_official 610:813dcc80987e 778 * @param PLLSAI1Init: pointer to an RCC_PLLSAI1InitTypeDef structure that
mbed_official 610:813dcc80987e 779 * contains the configuration information for the PLLSAI1
mbed_official 610:813dcc80987e 780 * @retval HAL status
mbed_official 610:813dcc80987e 781 */
mbed_official 610:813dcc80987e 782 HAL_StatusTypeDef HAL_RCCEx_EnablePLLSAI1(RCC_PLLSAI1InitTypeDef *PLLSAI1Init)
mbed_official 610:813dcc80987e 783 {
mbed_official 610:813dcc80987e 784 uint32_t tickstart = 0;
mbed_official 610:813dcc80987e 785 HAL_StatusTypeDef status = HAL_OK;
mbed_official 610:813dcc80987e 786
mbed_official 610:813dcc80987e 787 /* check for PLLSAI1 Parameters used to output PLLSAI1CLK */
mbed_official 610:813dcc80987e 788 assert_param(IS_RCC_PLLSAI1N_VALUE(PLLSAI1Init->PLLSAI1N));
mbed_official 610:813dcc80987e 789 assert_param(IS_RCC_PLLSAI1P_VALUE(PLLSAI1Init->PLLSAI1P));
mbed_official 610:813dcc80987e 790 assert_param(IS_RCC_PLLSAI1Q_VALUE(PLLSAI1Init->PLLSAI1Q));
mbed_official 610:813dcc80987e 791 assert_param(IS_RCC_PLLSAI1R_VALUE(PLLSAI1Init->PLLSAI1R));
mbed_official 610:813dcc80987e 792 assert_param(IS_RCC_PLLSAI1CLOCKOUT_VALUE(PLLSAI1Init->PLLSAI1ClockOut));
mbed_official 610:813dcc80987e 793
mbed_official 610:813dcc80987e 794 /* Disable the PLLSAI1 */
mbed_official 610:813dcc80987e 795 __HAL_RCC_PLLSAI1_DISABLE();
mbed_official 610:813dcc80987e 796
mbed_official 610:813dcc80987e 797 /* Get Start Tick*/
mbed_official 610:813dcc80987e 798 tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 799
mbed_official 610:813dcc80987e 800 /* Wait till PLLSAI1 is ready to be updated */
mbed_official 610:813dcc80987e 801 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI1RDY) != RESET)
mbed_official 610:813dcc80987e 802 {
mbed_official 610:813dcc80987e 803 if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE)
mbed_official 610:813dcc80987e 804 {
mbed_official 610:813dcc80987e 805 status = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 806 break;
mbed_official 610:813dcc80987e 807 }
mbed_official 610:813dcc80987e 808 }
mbed_official 610:813dcc80987e 809
mbed_official 610:813dcc80987e 810 if(status == HAL_OK)
mbed_official 610:813dcc80987e 811 {
mbed_official 610:813dcc80987e 812 /* Configure the PLLSAI1 Multiplication factor N */
mbed_official 610:813dcc80987e 813 /* Configure the PLLSAI1 Division factors P, Q and R */
mbed_official 610:813dcc80987e 814 __HAL_RCC_PLLSAI1_CONFIG(PLLSAI1Init->PLLSAI1N, PLLSAI1Init->PLLSAI1P, PLLSAI1Init->PLLSAI1Q, PLLSAI1Init->PLLSAI1R);
mbed_official 610:813dcc80987e 815 /* Configure the PLLSAI1 Clock output(s) */
mbed_official 610:813dcc80987e 816 __HAL_RCC_PLLSAI1CLKOUT_ENABLE(PLLSAI1Init->PLLSAI1ClockOut);
mbed_official 610:813dcc80987e 817
mbed_official 610:813dcc80987e 818 /* Enable the PLLSAI1 again by setting PLLSAI1ON to 1*/
mbed_official 610:813dcc80987e 819 __HAL_RCC_PLLSAI1_ENABLE();
mbed_official 610:813dcc80987e 820
mbed_official 610:813dcc80987e 821 /* Get Start Tick*/
mbed_official 610:813dcc80987e 822 tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 823
mbed_official 610:813dcc80987e 824 /* Wait till PLLSAI1 is ready */
mbed_official 610:813dcc80987e 825 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI1RDY) == RESET)
mbed_official 610:813dcc80987e 826 {
mbed_official 610:813dcc80987e 827 if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE)
mbed_official 610:813dcc80987e 828 {
mbed_official 610:813dcc80987e 829 status = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 830 break;
mbed_official 610:813dcc80987e 831 }
mbed_official 610:813dcc80987e 832 }
mbed_official 610:813dcc80987e 833 }
mbed_official 610:813dcc80987e 834
mbed_official 610:813dcc80987e 835 return status;
mbed_official 610:813dcc80987e 836 }
mbed_official 610:813dcc80987e 837
mbed_official 610:813dcc80987e 838 /**
mbed_official 610:813dcc80987e 839 * @brief Disable PLLSAI1.
mbed_official 610:813dcc80987e 840 * @retval HAL status
mbed_official 610:813dcc80987e 841 */
mbed_official 610:813dcc80987e 842 HAL_StatusTypeDef HAL_RCCEx_DisablePLLSAI1(void)
mbed_official 610:813dcc80987e 843 {
mbed_official 610:813dcc80987e 844 uint32_t tickstart = 0;
mbed_official 610:813dcc80987e 845 HAL_StatusTypeDef status = HAL_OK;
mbed_official 610:813dcc80987e 846
mbed_official 610:813dcc80987e 847 /* Disable the PLLSAI1 */
mbed_official 610:813dcc80987e 848 __HAL_RCC_PLLSAI1_DISABLE();
mbed_official 610:813dcc80987e 849
mbed_official 610:813dcc80987e 850 /* Get Start Tick*/
mbed_official 610:813dcc80987e 851 tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 852
mbed_official 610:813dcc80987e 853 /* Wait till PLLSAI1 is ready */
mbed_official 610:813dcc80987e 854 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI1RDY) != RESET)
mbed_official 610:813dcc80987e 855 {
mbed_official 610:813dcc80987e 856 if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE)
mbed_official 610:813dcc80987e 857 {
mbed_official 610:813dcc80987e 858 status = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 859 break;
mbed_official 610:813dcc80987e 860 }
mbed_official 610:813dcc80987e 861 }
mbed_official 610:813dcc80987e 862
mbed_official 610:813dcc80987e 863 return status;
mbed_official 610:813dcc80987e 864 }
mbed_official 610:813dcc80987e 865
mbed_official 610:813dcc80987e 866 /**
mbed_official 610:813dcc80987e 867 * @brief Enable PLLSAI2.
mbed_official 610:813dcc80987e 868 * @param PLLSAI2Init: pointer to an RCC_PLLSAI2InitTypeDef structure that
mbed_official 610:813dcc80987e 869 * contains the configuration information for the PLLSAI2
mbed_official 610:813dcc80987e 870 * @retval HAL status
mbed_official 610:813dcc80987e 871 */
mbed_official 610:813dcc80987e 872 HAL_StatusTypeDef HAL_RCCEx_EnablePLLSAI2(RCC_PLLSAI2InitTypeDef *PLLSAI2Init)
mbed_official 610:813dcc80987e 873 {
mbed_official 610:813dcc80987e 874 uint32_t tickstart = 0;
mbed_official 610:813dcc80987e 875 HAL_StatusTypeDef status = HAL_OK;
mbed_official 610:813dcc80987e 876
mbed_official 610:813dcc80987e 877 /* check for PLLSAI2 Parameters used to output PLLSAI2CLK */
mbed_official 610:813dcc80987e 878 assert_param(IS_RCC_PLLSAI2N_VALUE(PLLSAI2Init->PLLSAI2N));
mbed_official 610:813dcc80987e 879 assert_param(IS_RCC_PLLSAI2P_VALUE(PLLSAI2Init->PLLSAI2P));
mbed_official 610:813dcc80987e 880 assert_param(IS_RCC_PLLSAI2R_VALUE(PLLSAI2Init->PLLSAI2R));
mbed_official 610:813dcc80987e 881 assert_param(IS_RCC_PLLSAI2CLOCKOUT_VALUE(PLLSAI2Init->PLLSAI2ClockOut));
mbed_official 610:813dcc80987e 882
mbed_official 610:813dcc80987e 883 /* Disable the PLLSAI2 */
mbed_official 610:813dcc80987e 884 __HAL_RCC_PLLSAI2_DISABLE();
mbed_official 610:813dcc80987e 885
mbed_official 610:813dcc80987e 886 /* Get Start Tick*/
mbed_official 610:813dcc80987e 887 tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 888
mbed_official 610:813dcc80987e 889 /* Wait till PLLSAI2 is ready to be updated */
mbed_official 610:813dcc80987e 890 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI2RDY) != RESET)
mbed_official 610:813dcc80987e 891 {
mbed_official 610:813dcc80987e 892 if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE)
mbed_official 610:813dcc80987e 893 {
mbed_official 610:813dcc80987e 894 status = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 895 break;
mbed_official 610:813dcc80987e 896 }
mbed_official 610:813dcc80987e 897 }
mbed_official 610:813dcc80987e 898
mbed_official 610:813dcc80987e 899 if(status == HAL_OK)
mbed_official 610:813dcc80987e 900 {
mbed_official 610:813dcc80987e 901 /* Configure the PLLSAI2 Multiplication factor N */
mbed_official 610:813dcc80987e 902 /* Configure the PLLSAI2 Division factors P and R */
mbed_official 610:813dcc80987e 903 __HAL_RCC_PLLSAI2_CONFIG(PLLSAI2Init->PLLSAI2N, PLLSAI2Init->PLLSAI2P, PLLSAI2Init->PLLSAI2R);
mbed_official 610:813dcc80987e 904 /* Configure the PLLSAI2 Clock output(s) */
mbed_official 610:813dcc80987e 905 __HAL_RCC_PLLSAI2CLKOUT_ENABLE(PLLSAI2Init->PLLSAI2ClockOut);
mbed_official 610:813dcc80987e 906
mbed_official 610:813dcc80987e 907 /* Enable the PLLSAI2 again by setting PLLSAI2ON to 1*/
mbed_official 610:813dcc80987e 908 __HAL_RCC_PLLSAI2_ENABLE();
mbed_official 610:813dcc80987e 909
mbed_official 610:813dcc80987e 910 /* Get Start Tick*/
mbed_official 610:813dcc80987e 911 tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 912
mbed_official 610:813dcc80987e 913 /* Wait till PLLSAI2 is ready */
mbed_official 610:813dcc80987e 914 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI2RDY) == RESET)
mbed_official 610:813dcc80987e 915 {
mbed_official 610:813dcc80987e 916 if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE)
mbed_official 610:813dcc80987e 917 {
mbed_official 610:813dcc80987e 918 status = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 919 break;
mbed_official 610:813dcc80987e 920 }
mbed_official 610:813dcc80987e 921 }
mbed_official 610:813dcc80987e 922 }
mbed_official 610:813dcc80987e 923
mbed_official 610:813dcc80987e 924 return status;
mbed_official 610:813dcc80987e 925 }
mbed_official 610:813dcc80987e 926
mbed_official 610:813dcc80987e 927 /**
mbed_official 610:813dcc80987e 928 * @brief Disable PLLISAI2.
mbed_official 610:813dcc80987e 929 * @retval HAL status
mbed_official 610:813dcc80987e 930 */
mbed_official 610:813dcc80987e 931 HAL_StatusTypeDef HAL_RCCEx_DisablePLLSAI2(void)
mbed_official 610:813dcc80987e 932 {
mbed_official 610:813dcc80987e 933 uint32_t tickstart = 0;
mbed_official 610:813dcc80987e 934 HAL_StatusTypeDef status = HAL_OK;
mbed_official 610:813dcc80987e 935
mbed_official 610:813dcc80987e 936 /* Disable the PLLSAI2 */
mbed_official 610:813dcc80987e 937 __HAL_RCC_PLLSAI2_DISABLE();
mbed_official 610:813dcc80987e 938
mbed_official 610:813dcc80987e 939 /* Get Start Tick*/
mbed_official 610:813dcc80987e 940 tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 941
mbed_official 610:813dcc80987e 942 /* Wait till PLLSAI2 is ready */
mbed_official 610:813dcc80987e 943 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI2RDY) != RESET)
mbed_official 610:813dcc80987e 944 {
mbed_official 610:813dcc80987e 945 if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE)
mbed_official 610:813dcc80987e 946 {
mbed_official 610:813dcc80987e 947 status = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 948 break;
mbed_official 610:813dcc80987e 949 }
mbed_official 610:813dcc80987e 950 }
mbed_official 610:813dcc80987e 951
mbed_official 610:813dcc80987e 952 return status;
mbed_official 610:813dcc80987e 953 }
mbed_official 610:813dcc80987e 954
mbed_official 610:813dcc80987e 955 /**
mbed_official 610:813dcc80987e 956 * @brief Configure the oscillator clock source for wakeup from Stop and CSS backup clock.
mbed_official 610:813dcc80987e 957 * @param WakeUpClk: Wakeup clock
mbed_official 610:813dcc80987e 958 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 959 * @arg RCC_STOP_WAKEUPCLOCK_MSI: MSI oscillator selection
mbed_official 610:813dcc80987e 960 * @arg RCC_STOP_WAKEUPCLOCK_HSI: HSI oscillator selection
mbed_official 610:813dcc80987e 961 * @note This function shall not be called after the Clock Security System on HSE has been
mbed_official 610:813dcc80987e 962 * enabled.
mbed_official 610:813dcc80987e 963 * @retval None
mbed_official 610:813dcc80987e 964 */
mbed_official 610:813dcc80987e 965 void HAL_RCCEx_WakeUpStopCLKConfig(uint32_t WakeUpClk)
mbed_official 610:813dcc80987e 966 {
mbed_official 610:813dcc80987e 967 assert_param(IS_RCC_STOP_WAKEUPCLOCK(WakeUpClk));
mbed_official 610:813dcc80987e 968
mbed_official 610:813dcc80987e 969 __HAL_RCC_WAKEUPSTOP_CLK_CONFIG(WakeUpClk);
mbed_official 610:813dcc80987e 970 }
mbed_official 610:813dcc80987e 971
mbed_official 610:813dcc80987e 972 /**
mbed_official 610:813dcc80987e 973 * @brief Configure the MSI range after standby mode.
mbed_official 610:813dcc80987e 974 * @note After Standby its frequency can be selected between 4 possible values (1, 2, 4 or 8 MHz).
mbed_official 610:813dcc80987e 975 * @param MSIRange: MSI range
mbed_official 610:813dcc80987e 976 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 977 * @arg RCC_MSIRANGE_4: Range 4 around 1 MHz
mbed_official 610:813dcc80987e 978 * @arg RCC_MSIRANGE_5: Range 5 around 2 MHz
mbed_official 610:813dcc80987e 979 * @arg RCC_MSIRANGE_6: Range 6 around 4 MHz (reset value)
mbed_official 610:813dcc80987e 980 * @arg RCC_MSIRANGE_7: Range 7 around 8 MHz
mbed_official 610:813dcc80987e 981 * @retval None
mbed_official 610:813dcc80987e 982 */
mbed_official 610:813dcc80987e 983 void HAL_RCCEx_StandbyMSIRangeConfig(uint32_t MSIRange)
mbed_official 610:813dcc80987e 984 {
mbed_official 610:813dcc80987e 985 assert_param(IS_RCC_MSI_STANDBY_CLOCK_RANGE(MSIRange));
mbed_official 610:813dcc80987e 986
mbed_official 610:813dcc80987e 987 __HAL_RCC_MSI_STANDBY_RANGE_CONFIG(MSIRange);
mbed_official 610:813dcc80987e 988 }
mbed_official 610:813dcc80987e 989
mbed_official 610:813dcc80987e 990 /**
mbed_official 610:813dcc80987e 991 * @brief Enable the LSE Clock Security System.
mbed_official 610:813dcc80987e 992 * @note Prior to enable the LSE Clock Security System, LSE oscillator is to be enabled
mbed_official 610:813dcc80987e 993 * with HAL_RCC_OscConfig() and the LSE oscillator clock is to be selected as RTC
mbed_official 610:813dcc80987e 994 * clock with HAL_RCCEx_PeriphCLKConfig().
mbed_official 610:813dcc80987e 995 * @retval None
mbed_official 610:813dcc80987e 996 */
mbed_official 610:813dcc80987e 997 void HAL_RCCEx_EnableLSECSS(void)
mbed_official 610:813dcc80987e 998 {
mbed_official 610:813dcc80987e 999 SET_BIT(RCC->BDCR, RCC_BDCR_LSECSSON) ;
mbed_official 610:813dcc80987e 1000 }
mbed_official 610:813dcc80987e 1001
mbed_official 610:813dcc80987e 1002 /**
mbed_official 610:813dcc80987e 1003 * @brief Disable the LSE Clock Security System.
mbed_official 610:813dcc80987e 1004 * @note LSE Clock Security System can only be disabled after a LSE failure detection.
mbed_official 610:813dcc80987e 1005 * @retval None
mbed_official 610:813dcc80987e 1006 */
mbed_official 610:813dcc80987e 1007 void HAL_RCCEx_DisableLSECSS(void)
mbed_official 610:813dcc80987e 1008 {
mbed_official 610:813dcc80987e 1009 CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSECSSON) ;
mbed_official 610:813dcc80987e 1010 }
mbed_official 610:813dcc80987e 1011
mbed_official 610:813dcc80987e 1012 /**
mbed_official 610:813dcc80987e 1013 * @brief Select the Low Speed clock source to output on LSCO pin (PA2).
mbed_official 610:813dcc80987e 1014 * @param LSCOSource: specifies the Low Speed clock source to output.
mbed_official 610:813dcc80987e 1015 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 1016 * @arg RCC_LSCOSOURCE_LSI: LSI clock selected as LSCO source
mbed_official 610:813dcc80987e 1017 * @arg RCC_LSCOSOURCE_LSE: LSE clock selected as LSCO source
mbed_official 610:813dcc80987e 1018 * @retval None
mbed_official 610:813dcc80987e 1019 */
mbed_official 610:813dcc80987e 1020 void HAL_RCCEx_EnableLSCO(uint32_t LSCOSource)
mbed_official 610:813dcc80987e 1021 {
mbed_official 610:813dcc80987e 1022 GPIO_InitTypeDef GPIO_InitStruct;
mbed_official 610:813dcc80987e 1023 FlagStatus pwrclkchanged = RESET;
mbed_official 610:813dcc80987e 1024 FlagStatus backupchanged = RESET;
mbed_official 610:813dcc80987e 1025
mbed_official 610:813dcc80987e 1026 /* Check the parameters */
mbed_official 610:813dcc80987e 1027 assert_param(IS_RCC_LSCOSOURCE(LSCOSource));
mbed_official 610:813dcc80987e 1028
mbed_official 610:813dcc80987e 1029 /* LSCO Pin Clock Enable */
mbed_official 610:813dcc80987e 1030 __LSCO_CLK_ENABLE();
mbed_official 610:813dcc80987e 1031
mbed_official 610:813dcc80987e 1032 /* Configue the LSCO pin in analog mode */
mbed_official 610:813dcc80987e 1033 GPIO_InitStruct.Pin = LSCO_PIN;
mbed_official 610:813dcc80987e 1034 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
mbed_official 610:813dcc80987e 1035 GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
mbed_official 610:813dcc80987e 1036 GPIO_InitStruct.Pull = GPIO_NOPULL;
mbed_official 610:813dcc80987e 1037 HAL_GPIO_Init(LSCO_GPIO_PORT, &GPIO_InitStruct);
mbed_official 610:813dcc80987e 1038
mbed_official 610:813dcc80987e 1039 /* Update LSCOSEL clock source in Backup Domain control register */
mbed_official 610:813dcc80987e 1040 if(__HAL_RCC_PWR_IS_CLK_DISABLED())
mbed_official 610:813dcc80987e 1041 {
mbed_official 610:813dcc80987e 1042 __HAL_RCC_PWR_CLK_ENABLE();
mbed_official 610:813dcc80987e 1043 pwrclkchanged = SET;
mbed_official 610:813dcc80987e 1044 }
mbed_official 610:813dcc80987e 1045 if(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
mbed_official 610:813dcc80987e 1046 {
mbed_official 610:813dcc80987e 1047 HAL_PWR_EnableBkUpAccess();
mbed_official 610:813dcc80987e 1048 backupchanged = SET;
mbed_official 610:813dcc80987e 1049 }
mbed_official 610:813dcc80987e 1050
mbed_official 610:813dcc80987e 1051 MODIFY_REG(RCC->BDCR, RCC_BDCR_LSCOSEL | RCC_BDCR_LSCOEN, LSCOSource | RCC_BDCR_LSCOEN);
mbed_official 610:813dcc80987e 1052
mbed_official 610:813dcc80987e 1053 if(backupchanged == SET)
mbed_official 610:813dcc80987e 1054 {
mbed_official 610:813dcc80987e 1055 HAL_PWR_DisableBkUpAccess();
mbed_official 610:813dcc80987e 1056 }
mbed_official 610:813dcc80987e 1057 if(pwrclkchanged == SET)
mbed_official 610:813dcc80987e 1058 {
mbed_official 610:813dcc80987e 1059 __HAL_RCC_PWR_CLK_DISABLE();
mbed_official 610:813dcc80987e 1060 }
mbed_official 610:813dcc80987e 1061 }
mbed_official 610:813dcc80987e 1062
mbed_official 610:813dcc80987e 1063 /**
mbed_official 610:813dcc80987e 1064 * @brief Disable the Low Speed clock output.
mbed_official 610:813dcc80987e 1065 * @retval None
mbed_official 610:813dcc80987e 1066 */
mbed_official 610:813dcc80987e 1067 void HAL_RCCEx_DisableLSCO(void)
mbed_official 610:813dcc80987e 1068 {
mbed_official 610:813dcc80987e 1069 FlagStatus pwrclkchanged = RESET;
mbed_official 610:813dcc80987e 1070 FlagStatus backupchanged = RESET;
mbed_official 610:813dcc80987e 1071
mbed_official 610:813dcc80987e 1072 /* Update LSCOEN bit in Backup Domain control register */
mbed_official 610:813dcc80987e 1073 if(__HAL_RCC_PWR_IS_CLK_DISABLED())
mbed_official 610:813dcc80987e 1074 {
mbed_official 610:813dcc80987e 1075 __HAL_RCC_PWR_CLK_ENABLE();
mbed_official 610:813dcc80987e 1076 pwrclkchanged = SET;
mbed_official 610:813dcc80987e 1077 }
mbed_official 610:813dcc80987e 1078 if(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
mbed_official 610:813dcc80987e 1079 {
mbed_official 610:813dcc80987e 1080 /* Enable access to the backup domain */
mbed_official 610:813dcc80987e 1081 HAL_PWR_EnableBkUpAccess();
mbed_official 610:813dcc80987e 1082 backupchanged = SET;
mbed_official 610:813dcc80987e 1083 }
mbed_official 610:813dcc80987e 1084
mbed_official 610:813dcc80987e 1085 CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSCOEN);
mbed_official 610:813dcc80987e 1086
mbed_official 610:813dcc80987e 1087 /* Restore previous configuration */
mbed_official 610:813dcc80987e 1088 if(backupchanged == SET)
mbed_official 610:813dcc80987e 1089 {
mbed_official 610:813dcc80987e 1090 /* Disable access to the backup domain */
mbed_official 610:813dcc80987e 1091 HAL_PWR_DisableBkUpAccess();
mbed_official 610:813dcc80987e 1092 }
mbed_official 610:813dcc80987e 1093 if(pwrclkchanged == SET)
mbed_official 610:813dcc80987e 1094 {
mbed_official 610:813dcc80987e 1095 __HAL_RCC_PWR_CLK_DISABLE();
mbed_official 610:813dcc80987e 1096 }
mbed_official 610:813dcc80987e 1097 }
mbed_official 610:813dcc80987e 1098
mbed_official 610:813dcc80987e 1099 /**
mbed_official 610:813dcc80987e 1100 * @brief Enable the PLL-mode of the MSI.
mbed_official 610:813dcc80987e 1101 * @note Prior to enable the PLL-mode of the MSI for automatic hardware
mbed_official 610:813dcc80987e 1102 * calibration LSE oscillator is to be enabled with HAL_RCC_OscConfig().
mbed_official 610:813dcc80987e 1103 * @retval None
mbed_official 610:813dcc80987e 1104 */
mbed_official 610:813dcc80987e 1105 void HAL_RCCEx_EnableMSIPLLMode(void)
mbed_official 610:813dcc80987e 1106 {
mbed_official 610:813dcc80987e 1107 SET_BIT(RCC->CR, RCC_CR_MSIPLLEN) ;
mbed_official 610:813dcc80987e 1108 }
mbed_official 610:813dcc80987e 1109
mbed_official 610:813dcc80987e 1110 /**
mbed_official 610:813dcc80987e 1111 * @brief Disable the PLL-mode of the MSI.
mbed_official 610:813dcc80987e 1112 * @note PLL-mode of the MSI is automatically reset when LSE oscillator is disabled.
mbed_official 610:813dcc80987e 1113 * @retval None
mbed_official 610:813dcc80987e 1114 */
mbed_official 610:813dcc80987e 1115 void HAL_RCCEx_DisableMSIPLLMode(void)
mbed_official 610:813dcc80987e 1116 {
mbed_official 610:813dcc80987e 1117 CLEAR_BIT(RCC->CR, RCC_CR_MSIPLLEN) ;
mbed_official 610:813dcc80987e 1118 }
mbed_official 610:813dcc80987e 1119
mbed_official 610:813dcc80987e 1120 /**
mbed_official 610:813dcc80987e 1121 * @}
mbed_official 610:813dcc80987e 1122 */
mbed_official 610:813dcc80987e 1123
mbed_official 610:813dcc80987e 1124 /**
mbed_official 610:813dcc80987e 1125 * @}
mbed_official 610:813dcc80987e 1126 */
mbed_official 610:813dcc80987e 1127
mbed_official 610:813dcc80987e 1128 /** @addtogroup RCCEx_Private_Functions
mbed_official 610:813dcc80987e 1129 * @{
mbed_official 610:813dcc80987e 1130 */
mbed_official 610:813dcc80987e 1131
mbed_official 610:813dcc80987e 1132 /**
mbed_official 610:813dcc80987e 1133 * @brief Configure the parameters N & P of PLLSAI1 and enable PLLSAI1 output clock(s).
mbed_official 610:813dcc80987e 1134 * @param PllSai1: pointer to an RCC_PLLSAI1InitTypeDef structure that
mbed_official 610:813dcc80987e 1135 * contains the configuration parameters N & P as well as PLLSAI1 output clock(s)
mbed_official 610:813dcc80987e 1136 *
mbed_official 610:813dcc80987e 1137 * @note PLLSAI1 is temporary disable to apply new parameters
mbed_official 610:813dcc80987e 1138 *
mbed_official 610:813dcc80987e 1139 * @retval HAL status
mbed_official 610:813dcc80987e 1140 */
mbed_official 610:813dcc80987e 1141 static HAL_StatusTypeDef RCCEx_PLLSAI1_ConfigNP(RCC_PLLSAI1InitTypeDef *PllSai1)
mbed_official 610:813dcc80987e 1142 {
mbed_official 610:813dcc80987e 1143 uint32_t tickstart = 0;
mbed_official 610:813dcc80987e 1144 HAL_StatusTypeDef status = HAL_OK;
mbed_official 610:813dcc80987e 1145
mbed_official 610:813dcc80987e 1146 /* check for PLLSAI1 Parameters used to output PLLSAI1CLK */
mbed_official 610:813dcc80987e 1147 assert_param(IS_RCC_PLLSAI1N_VALUE(PllSai1->PLLSAI1N));
mbed_official 610:813dcc80987e 1148 assert_param(IS_RCC_PLLSAI1P_VALUE(PllSai1->PLLSAI1P));
mbed_official 610:813dcc80987e 1149 assert_param(IS_RCC_PLLSAI1CLOCKOUT_VALUE(PllSai1->PLLSAI1ClockOut));
mbed_official 610:813dcc80987e 1150
mbed_official 610:813dcc80987e 1151 /* Disable the PLLSAI1 */
mbed_official 610:813dcc80987e 1152 __HAL_RCC_PLLSAI1_DISABLE();
mbed_official 610:813dcc80987e 1153
mbed_official 610:813dcc80987e 1154 /* Get Start Tick*/
mbed_official 610:813dcc80987e 1155 tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 1156
mbed_official 610:813dcc80987e 1157 /* Wait till PLLSAI1 is ready to be updated */
mbed_official 610:813dcc80987e 1158 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI1RDY) != RESET)
mbed_official 610:813dcc80987e 1159 {
mbed_official 610:813dcc80987e 1160 if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE)
mbed_official 610:813dcc80987e 1161 {
mbed_official 610:813dcc80987e 1162 status = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 1163 break;
mbed_official 610:813dcc80987e 1164 }
mbed_official 610:813dcc80987e 1165 }
mbed_official 610:813dcc80987e 1166
mbed_official 610:813dcc80987e 1167 if(status == HAL_OK)
mbed_official 610:813dcc80987e 1168 {
mbed_official 610:813dcc80987e 1169 /* Configure the PLLSAI1 Multiplication factor N */
mbed_official 610:813dcc80987e 1170 __HAL_RCC_PLLSAI1_MULN_CONFIG(PllSai1->PLLSAI1N);
mbed_official 610:813dcc80987e 1171 /* Configure the PLLSAI1 Division factor P */
mbed_official 610:813dcc80987e 1172 __HAL_RCC_PLLSAI1_DIVP_CONFIG(PllSai1->PLLSAI1P);
mbed_official 610:813dcc80987e 1173 /* Configure the PLLSAI1 Clock output(s) */
mbed_official 610:813dcc80987e 1174 __HAL_RCC_PLLSAI1CLKOUT_ENABLE(PllSai1->PLLSAI1ClockOut);
mbed_official 610:813dcc80987e 1175
mbed_official 610:813dcc80987e 1176 /* Enable the PLLSAI1 again by setting PLLSAI1ON to 1*/
mbed_official 610:813dcc80987e 1177 __HAL_RCC_PLLSAI1_ENABLE();
mbed_official 610:813dcc80987e 1178
mbed_official 610:813dcc80987e 1179 /* Get Start Tick*/
mbed_official 610:813dcc80987e 1180 tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 1181
mbed_official 610:813dcc80987e 1182 /* Wait till PLLSAI1 is ready */
mbed_official 610:813dcc80987e 1183 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI1RDY) == RESET)
mbed_official 610:813dcc80987e 1184 {
mbed_official 610:813dcc80987e 1185 if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE)
mbed_official 610:813dcc80987e 1186 {
mbed_official 610:813dcc80987e 1187 status = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 1188 break;
mbed_official 610:813dcc80987e 1189 }
mbed_official 610:813dcc80987e 1190 }
mbed_official 610:813dcc80987e 1191 }
mbed_official 610:813dcc80987e 1192
mbed_official 610:813dcc80987e 1193 return status;
mbed_official 610:813dcc80987e 1194 }
mbed_official 610:813dcc80987e 1195
mbed_official 610:813dcc80987e 1196 /**
mbed_official 610:813dcc80987e 1197 * @brief Configure the parameters N & Q of PLLSAI1 and enable PLLSAI1 output clock(s).
mbed_official 610:813dcc80987e 1198 * @param PllSai1: pointer to an RCC_PLLSAI1InitTypeDef structure that
mbed_official 610:813dcc80987e 1199 * contains the configuration parameters N & Q as well as PLLSAI1 output clock(s)
mbed_official 610:813dcc80987e 1200 *
mbed_official 610:813dcc80987e 1201 * @note PLLSAI1 is temporary disable to apply new parameters
mbed_official 610:813dcc80987e 1202 *
mbed_official 610:813dcc80987e 1203 * @retval HAL status
mbed_official 610:813dcc80987e 1204 */
mbed_official 610:813dcc80987e 1205 static HAL_StatusTypeDef RCCEx_PLLSAI1_ConfigNQ(RCC_PLLSAI1InitTypeDef *PllSai1)
mbed_official 610:813dcc80987e 1206 {
mbed_official 610:813dcc80987e 1207 uint32_t tickstart = 0;
mbed_official 610:813dcc80987e 1208 HAL_StatusTypeDef status = HAL_OK;
mbed_official 610:813dcc80987e 1209
mbed_official 610:813dcc80987e 1210 /* check for PLLSAI1 Parameters used to output PLLSAI1CLK */
mbed_official 610:813dcc80987e 1211 assert_param(IS_RCC_PLLSAI1N_VALUE(PllSai1->PLLSAI1N));
mbed_official 610:813dcc80987e 1212 assert_param(IS_RCC_PLLSAI1Q_VALUE(PllSai1->PLLSAI1Q));
mbed_official 610:813dcc80987e 1213 assert_param(IS_RCC_PLLSAI1CLOCKOUT_VALUE(PllSai1->PLLSAI1ClockOut));
mbed_official 610:813dcc80987e 1214
mbed_official 610:813dcc80987e 1215 /* Disable the PLLSAI1 */
mbed_official 610:813dcc80987e 1216 __HAL_RCC_PLLSAI1_DISABLE();
mbed_official 610:813dcc80987e 1217
mbed_official 610:813dcc80987e 1218 /* Get Start Tick*/
mbed_official 610:813dcc80987e 1219 tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 1220
mbed_official 610:813dcc80987e 1221 /* Wait till PLLSAI1 is ready to be updated */
mbed_official 610:813dcc80987e 1222 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI1RDY) != RESET)
mbed_official 610:813dcc80987e 1223 {
mbed_official 610:813dcc80987e 1224 if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE)
mbed_official 610:813dcc80987e 1225 {
mbed_official 610:813dcc80987e 1226 status = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 1227 break;
mbed_official 610:813dcc80987e 1228 }
mbed_official 610:813dcc80987e 1229 }
mbed_official 610:813dcc80987e 1230
mbed_official 610:813dcc80987e 1231 if(status == HAL_OK)
mbed_official 610:813dcc80987e 1232 {
mbed_official 610:813dcc80987e 1233 /* Configure the PLLSAI1 Multiplication factor N */
mbed_official 610:813dcc80987e 1234 __HAL_RCC_PLLSAI1_MULN_CONFIG(PllSai1->PLLSAI1N);
mbed_official 610:813dcc80987e 1235 /* Configure the PLLSAI1 Division factor Q */
mbed_official 610:813dcc80987e 1236 __HAL_RCC_PLLSAI1_DIVQ_CONFIG(PllSai1->PLLSAI1Q);
mbed_official 610:813dcc80987e 1237 /* Configure the PLLSAI1 Clock output(s) */
mbed_official 610:813dcc80987e 1238 __HAL_RCC_PLLSAI1CLKOUT_ENABLE(PllSai1->PLLSAI1ClockOut);
mbed_official 610:813dcc80987e 1239
mbed_official 610:813dcc80987e 1240 /* Enable the PLLSAI1 again by setting PLLSAI1ON to 1*/
mbed_official 610:813dcc80987e 1241 __HAL_RCC_PLLSAI1_ENABLE();
mbed_official 610:813dcc80987e 1242
mbed_official 610:813dcc80987e 1243 /* Get Start Tick*/
mbed_official 610:813dcc80987e 1244 tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 1245
mbed_official 610:813dcc80987e 1246 /* Wait till PLLSAI1 is ready */
mbed_official 610:813dcc80987e 1247 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI1RDY) == RESET)
mbed_official 610:813dcc80987e 1248 {
mbed_official 610:813dcc80987e 1249 if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE)
mbed_official 610:813dcc80987e 1250 {
mbed_official 610:813dcc80987e 1251 status = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 1252 break;
mbed_official 610:813dcc80987e 1253 }
mbed_official 610:813dcc80987e 1254 }
mbed_official 610:813dcc80987e 1255 }
mbed_official 610:813dcc80987e 1256
mbed_official 610:813dcc80987e 1257 return status;
mbed_official 610:813dcc80987e 1258 }
mbed_official 610:813dcc80987e 1259
mbed_official 610:813dcc80987e 1260 /**
mbed_official 610:813dcc80987e 1261 * @brief Configure the parameters N & R of PLLSAI1 and enable PLLSAI1 output clock(s).
mbed_official 610:813dcc80987e 1262 * @param PllSai1: pointer to an RCC_PLLSAI1InitTypeDef structure that
mbed_official 610:813dcc80987e 1263 * contains the configuration parameters N & R as well as PLLSAI1 output clock(s)
mbed_official 610:813dcc80987e 1264 *
mbed_official 610:813dcc80987e 1265 * @note PLLSAI1 is temporary disable to apply new parameters
mbed_official 610:813dcc80987e 1266 *
mbed_official 610:813dcc80987e 1267 * @retval HAL status
mbed_official 610:813dcc80987e 1268 */
mbed_official 610:813dcc80987e 1269 static HAL_StatusTypeDef RCCEx_PLLSAI1_ConfigNR(RCC_PLLSAI1InitTypeDef *PllSai1)
mbed_official 610:813dcc80987e 1270 {
mbed_official 610:813dcc80987e 1271 uint32_t tickstart = 0;
mbed_official 610:813dcc80987e 1272 HAL_StatusTypeDef status = HAL_OK;
mbed_official 610:813dcc80987e 1273
mbed_official 610:813dcc80987e 1274 /* check for PLLSAI1 Parameters used to output PLLSAI1CLK */
mbed_official 610:813dcc80987e 1275 assert_param(IS_RCC_PLLSAI1N_VALUE(PllSai1->PLLSAI1N));
mbed_official 610:813dcc80987e 1276 assert_param(IS_RCC_PLLSAI1R_VALUE(PllSai1->PLLSAI1R));
mbed_official 610:813dcc80987e 1277 assert_param(IS_RCC_PLLSAI1CLOCKOUT_VALUE(PllSai1->PLLSAI1ClockOut));
mbed_official 610:813dcc80987e 1278
mbed_official 610:813dcc80987e 1279 /* Disable the PLLSAI1 */
mbed_official 610:813dcc80987e 1280 __HAL_RCC_PLLSAI1_DISABLE();
mbed_official 610:813dcc80987e 1281
mbed_official 610:813dcc80987e 1282 /* Get Start Tick*/
mbed_official 610:813dcc80987e 1283 tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 1284
mbed_official 610:813dcc80987e 1285 /* Wait till PLLSAI1 is ready to be updated */
mbed_official 610:813dcc80987e 1286 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI1RDY) != RESET)
mbed_official 610:813dcc80987e 1287 {
mbed_official 610:813dcc80987e 1288 if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE)
mbed_official 610:813dcc80987e 1289 {
mbed_official 610:813dcc80987e 1290 status = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 1291 break;
mbed_official 610:813dcc80987e 1292 }
mbed_official 610:813dcc80987e 1293 }
mbed_official 610:813dcc80987e 1294
mbed_official 610:813dcc80987e 1295 if(status == HAL_OK)
mbed_official 610:813dcc80987e 1296 {
mbed_official 610:813dcc80987e 1297 /* Configure the PLLSAI1 Multiplication factor N */
mbed_official 610:813dcc80987e 1298 __HAL_RCC_PLLSAI1_MULN_CONFIG(PllSai1->PLLSAI1N);
mbed_official 610:813dcc80987e 1299 /* Configure the PLLSAI1 Division factor R */
mbed_official 610:813dcc80987e 1300 __HAL_RCC_PLLSAI1_DIVR_CONFIG(PllSai1->PLLSAI1R);
mbed_official 610:813dcc80987e 1301 /* Configure the PLLSAI1 Clock output(s) */
mbed_official 610:813dcc80987e 1302 __HAL_RCC_PLLSAI1CLKOUT_ENABLE(PllSai1->PLLSAI1ClockOut);
mbed_official 610:813dcc80987e 1303
mbed_official 610:813dcc80987e 1304 /* Enable the PLLSAI1 again by setting PLLSAI1ON to 1*/
mbed_official 610:813dcc80987e 1305 __HAL_RCC_PLLSAI1_ENABLE();
mbed_official 610:813dcc80987e 1306
mbed_official 610:813dcc80987e 1307 /* Get Start Tick*/
mbed_official 610:813dcc80987e 1308 tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 1309
mbed_official 610:813dcc80987e 1310 /* Wait till PLLSAI1 is ready */
mbed_official 610:813dcc80987e 1311 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI1RDY) == RESET)
mbed_official 610:813dcc80987e 1312 {
mbed_official 610:813dcc80987e 1313 if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE)
mbed_official 610:813dcc80987e 1314 {
mbed_official 610:813dcc80987e 1315 status = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 1316 break;
mbed_official 610:813dcc80987e 1317 }
mbed_official 610:813dcc80987e 1318 }
mbed_official 610:813dcc80987e 1319 }
mbed_official 610:813dcc80987e 1320
mbed_official 610:813dcc80987e 1321 return status;
mbed_official 610:813dcc80987e 1322 }
mbed_official 610:813dcc80987e 1323
mbed_official 610:813dcc80987e 1324 /**
mbed_official 610:813dcc80987e 1325 * @brief Configure the parameters N & P of PLLSAI2 and enable PLLSAI2 output clock(s).
mbed_official 610:813dcc80987e 1326 * @param PllSai2: pointer to an RCC_PLLSAI2InitTypeDef structure that
mbed_official 610:813dcc80987e 1327 * contains the configuration parameters N & P as well as PLLSAI2 output clock(s)
mbed_official 610:813dcc80987e 1328 *
mbed_official 610:813dcc80987e 1329 * @note PLLSAI2 is temporary disable to apply new parameters
mbed_official 610:813dcc80987e 1330 *
mbed_official 610:813dcc80987e 1331 * @retval HAL status
mbed_official 610:813dcc80987e 1332 */
mbed_official 610:813dcc80987e 1333 static HAL_StatusTypeDef RCCEx_PLLSAI2_ConfigNP(RCC_PLLSAI2InitTypeDef *PllSai2)
mbed_official 610:813dcc80987e 1334 {
mbed_official 610:813dcc80987e 1335 uint32_t tickstart = 0;
mbed_official 610:813dcc80987e 1336 HAL_StatusTypeDef status = HAL_OK;
mbed_official 610:813dcc80987e 1337
mbed_official 610:813dcc80987e 1338 /* check for PLLSAI2 Parameters */
mbed_official 610:813dcc80987e 1339 assert_param(IS_RCC_PLLSAI2N_VALUE(PllSai2->PLLSAI2N));
mbed_official 610:813dcc80987e 1340 assert_param(IS_RCC_PLLSAI2P_VALUE(PllSai2->PLLSAI2P));
mbed_official 610:813dcc80987e 1341 assert_param(IS_RCC_PLLSAI2CLOCKOUT_VALUE(PllSai2->PLLSAI2ClockOut));
mbed_official 610:813dcc80987e 1342
mbed_official 610:813dcc80987e 1343 /* Disable the PLLSAI2 */
mbed_official 610:813dcc80987e 1344 __HAL_RCC_PLLSAI2_DISABLE();
mbed_official 610:813dcc80987e 1345
mbed_official 610:813dcc80987e 1346 /* Get Start Tick*/
mbed_official 610:813dcc80987e 1347 tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 1348
mbed_official 610:813dcc80987e 1349 /* Wait till PLLSAI2 is ready */
mbed_official 610:813dcc80987e 1350 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI2RDY) != RESET)
mbed_official 610:813dcc80987e 1351 {
mbed_official 610:813dcc80987e 1352 if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE)
mbed_official 610:813dcc80987e 1353 {
mbed_official 610:813dcc80987e 1354 status = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 1355 break;
mbed_official 610:813dcc80987e 1356 }
mbed_official 610:813dcc80987e 1357 }
mbed_official 610:813dcc80987e 1358
mbed_official 610:813dcc80987e 1359 if(status == HAL_OK)
mbed_official 610:813dcc80987e 1360 {
mbed_official 610:813dcc80987e 1361 /* Configure the PLLSAI2 Multiplication factor N */
mbed_official 610:813dcc80987e 1362 __HAL_RCC_PLLSAI2_MULN_CONFIG(PllSai2->PLLSAI2N);
mbed_official 610:813dcc80987e 1363 /* Configure the PLLSAI2 Division factor P */
mbed_official 610:813dcc80987e 1364 __HAL_RCC_PLLSAI2_DIVP_CONFIG(PllSai2->PLLSAI2P);
mbed_official 610:813dcc80987e 1365 /* Configure the PLLSAI2 Clock output(s) */
mbed_official 610:813dcc80987e 1366 __HAL_RCC_PLLSAI2CLKOUT_ENABLE(PllSai2->PLLSAI2ClockOut);
mbed_official 610:813dcc80987e 1367
mbed_official 610:813dcc80987e 1368 /* Enable the PLLSAI2 again by setting PLLSAI2ON to 1*/
mbed_official 610:813dcc80987e 1369 __HAL_RCC_PLLSAI2_ENABLE();
mbed_official 610:813dcc80987e 1370
mbed_official 610:813dcc80987e 1371 /* Get Start Tick*/
mbed_official 610:813dcc80987e 1372 tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 1373
mbed_official 610:813dcc80987e 1374 /* Wait till PLLSAI2 is ready */
mbed_official 610:813dcc80987e 1375 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI2RDY) == RESET)
mbed_official 610:813dcc80987e 1376 {
mbed_official 610:813dcc80987e 1377 if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE)
mbed_official 610:813dcc80987e 1378 {
mbed_official 610:813dcc80987e 1379 status = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 1380 break;
mbed_official 610:813dcc80987e 1381 }
mbed_official 610:813dcc80987e 1382 }
mbed_official 610:813dcc80987e 1383 }
mbed_official 610:813dcc80987e 1384
mbed_official 610:813dcc80987e 1385 return status;
mbed_official 610:813dcc80987e 1386 }
mbed_official 610:813dcc80987e 1387
mbed_official 610:813dcc80987e 1388 /**
mbed_official 610:813dcc80987e 1389 * @brief Configure the parameters N & R of PLLSAI2 and enable PLLSAI2 output clock(s).
mbed_official 610:813dcc80987e 1390 * @param PllSai2: pointer to an RCC_PLLSAI2InitTypeDef structure that
mbed_official 610:813dcc80987e 1391 * contains the configuration parameters N & R as well as PLLSAI2 output clock(s)
mbed_official 610:813dcc80987e 1392 *
mbed_official 610:813dcc80987e 1393 * @note PLLSAI2 is temporary disable to apply new parameters
mbed_official 610:813dcc80987e 1394 *
mbed_official 610:813dcc80987e 1395 * @retval HAL status
mbed_official 610:813dcc80987e 1396 */
mbed_official 610:813dcc80987e 1397 static HAL_StatusTypeDef RCCEx_PLLSAI2_ConfigNR(RCC_PLLSAI2InitTypeDef *PllSai2)
mbed_official 610:813dcc80987e 1398 {
mbed_official 610:813dcc80987e 1399 uint32_t tickstart = 0;
mbed_official 610:813dcc80987e 1400 HAL_StatusTypeDef status = HAL_OK;
mbed_official 610:813dcc80987e 1401
mbed_official 610:813dcc80987e 1402 /* check for PLLSAI2 Parameters */
mbed_official 610:813dcc80987e 1403 assert_param(IS_RCC_PLLSAI2N_VALUE(PllSai2->PLLSAI2N));
mbed_official 610:813dcc80987e 1404 assert_param(IS_RCC_PLLSAI2R_VALUE(PllSai2->PLLSAI2R));
mbed_official 610:813dcc80987e 1405 assert_param(IS_RCC_PLLSAI2CLOCKOUT_VALUE(PllSai2->PLLSAI2ClockOut));
mbed_official 610:813dcc80987e 1406
mbed_official 610:813dcc80987e 1407 /* Disable the PLLSAI2 */
mbed_official 610:813dcc80987e 1408 __HAL_RCC_PLLSAI2_DISABLE();
mbed_official 610:813dcc80987e 1409
mbed_official 610:813dcc80987e 1410 /* Get Start Tick*/
mbed_official 610:813dcc80987e 1411 tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 1412
mbed_official 610:813dcc80987e 1413 /* Wait till PLLSAI2 is ready */
mbed_official 610:813dcc80987e 1414 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI2RDY) != RESET)
mbed_official 610:813dcc80987e 1415 {
mbed_official 610:813dcc80987e 1416 if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE)
mbed_official 610:813dcc80987e 1417 {
mbed_official 610:813dcc80987e 1418 status = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 1419 break;
mbed_official 610:813dcc80987e 1420 }
mbed_official 610:813dcc80987e 1421 }
mbed_official 610:813dcc80987e 1422
mbed_official 610:813dcc80987e 1423 if(status == HAL_OK)
mbed_official 610:813dcc80987e 1424 {
mbed_official 610:813dcc80987e 1425 /* Configure the PLLSAI2 Multiplication factor N */
mbed_official 610:813dcc80987e 1426 __HAL_RCC_PLLSAI2_MULN_CONFIG(PllSai2->PLLSAI2N);
mbed_official 610:813dcc80987e 1427 /* Configure the PLLSAI2 Division factor R */
mbed_official 610:813dcc80987e 1428 __HAL_RCC_PLLSAI2_DIVR_CONFIG(PllSai2->PLLSAI2R);
mbed_official 610:813dcc80987e 1429 /* Configure the PLLSAI2 Clock output(s) */
mbed_official 610:813dcc80987e 1430 __HAL_RCC_PLLSAI2CLKOUT_ENABLE(PllSai2->PLLSAI2ClockOut);
mbed_official 610:813dcc80987e 1431
mbed_official 610:813dcc80987e 1432 /* Enable the PLLSAI2 again by setting PLLSAI2ON to 1*/
mbed_official 610:813dcc80987e 1433 __HAL_RCC_PLLSAI2_ENABLE();
mbed_official 610:813dcc80987e 1434
mbed_official 610:813dcc80987e 1435 /* Get Start Tick*/
mbed_official 610:813dcc80987e 1436 tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 1437
mbed_official 610:813dcc80987e 1438 /* Wait till PLLSAI2 is ready */
mbed_official 610:813dcc80987e 1439 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI2RDY) == RESET)
mbed_official 610:813dcc80987e 1440 {
mbed_official 610:813dcc80987e 1441 if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE)
mbed_official 610:813dcc80987e 1442 {
mbed_official 610:813dcc80987e 1443 status = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 1444 break;
mbed_official 610:813dcc80987e 1445 }
mbed_official 610:813dcc80987e 1446 }
mbed_official 610:813dcc80987e 1447 }
mbed_official 610:813dcc80987e 1448
mbed_official 610:813dcc80987e 1449 return status;
mbed_official 610:813dcc80987e 1450 }
mbed_official 610:813dcc80987e 1451
mbed_official 610:813dcc80987e 1452 /**
mbed_official 610:813dcc80987e 1453 * @}
mbed_official 610:813dcc80987e 1454 */
mbed_official 610:813dcc80987e 1455
mbed_official 610:813dcc80987e 1456 /**
mbed_official 610:813dcc80987e 1457 * @}
mbed_official 610:813dcc80987e 1458 */
mbed_official 610:813dcc80987e 1459
mbed_official 610:813dcc80987e 1460 #endif /* HAL_RCC_MODULE_ENABLED */
mbed_official 610:813dcc80987e 1461 /**
mbed_official 610:813dcc80987e 1462 * @}
mbed_official 610:813dcc80987e 1463 */
mbed_official 610:813dcc80987e 1464
mbed_official 610:813dcc80987e 1465 /**
mbed_official 610:813dcc80987e 1466 * @}
mbed_official 610:813dcc80987e 1467 */
mbed_official 610:813dcc80987e 1468
mbed_official 610:813dcc80987e 1469 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
mbed_official 610:813dcc80987e 1470