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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_dma.c@610:813dcc80987e, 2015-08-14 (annotated)

Committer:
mbed_official
Date:
Fri Aug 14 13:15:17 2015 +0100
Revision:
610:813dcc80987e
Synchronized with git revision 6d84db41c6833e0b9b024741eb0616a5f62d5599



Full URL: https://github.com/mbedmicro/mbed/commit/6d84db41c6833e0b9b024741eb0616a5f62d5599/



DISCO_F746NG - Improvements

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 610:813dcc80987e 1 /**
mbed_official 610:813dcc80987e 2 ******************************************************************************
mbed_official 610:813dcc80987e 3 * @file stm32l4xx_hal_dma.c
mbed_official 610:813dcc80987e 4 * @author MCD Application Team
mbed_official 610:813dcc80987e 5 * @version V1.0.0
mbed_official 610:813dcc80987e 6 * @date 26-June-2015
mbed_official 610:813dcc80987e 7 * @brief DMA HAL module driver.
mbed_official 610:813dcc80987e 8 * This file provides firmware functions to manage the following
mbed_official 610:813dcc80987e 9 * functionalities of the Direct Memory Access (DMA) peripheral:
mbed_official 610:813dcc80987e 10 * + Initialization/de-initialization functions
mbed_official 610:813dcc80987e 11 * + I/O operation functions
mbed_official 610:813dcc80987e 12 * + Peripheral State and errors functions
mbed_official 610:813dcc80987e 13 *
mbed_official 610:813dcc80987e 14 *
mbed_official 610:813dcc80987e 15 @verbatim
mbed_official 610:813dcc80987e 16 ==============================================================================
mbed_official 610:813dcc80987e 17 ##### How to use this driver #####
mbed_official 610:813dcc80987e 18 ==============================================================================
mbed_official 610:813dcc80987e 19 [..]
mbed_official 610:813dcc80987e 20 (#) Enable and configure the peripheral to be connected to the DMA Channel
mbed_official 610:813dcc80987e 21 (except for internal SRAM / FLASH memories: no initialization is
mbed_official 610:813dcc80987e 22 necessary). Please refer to the Reference manual for connection between peripherals
mbed_official 610:813dcc80987e 23 and DMA requests.
mbed_official 610:813dcc80987e 24
mbed_official 610:813dcc80987e 25 (#) For a given Channel, program the required configuration through the following parameters:
mbed_official 610:813dcc80987e 26 Channel request, Transfer Direction, Source and Destination data formats,
mbed_official 610:813dcc80987e 27 Circular or Normal mode, Channel Priority level, Source and Destination Increment mode
mbed_official 610:813dcc80987e 28 using HAL_DMA_Init() function.
mbed_official 610:813dcc80987e 29
mbed_official 610:813dcc80987e 30 *** Polling mode IO operation ***
mbed_official 610:813dcc80987e 31 =================================
mbed_official 610:813dcc80987e 32 [..]
mbed_official 610:813dcc80987e 33 (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source
mbed_official 610:813dcc80987e 34 address and destination address and the Length of data to be transferred
mbed_official 610:813dcc80987e 35 (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this
mbed_official 610:813dcc80987e 36 case a fixed Timeout can be configured by User depending from his application.
mbed_official 610:813dcc80987e 37
mbed_official 610:813dcc80987e 38 *** Interrupt mode IO operation ***
mbed_official 610:813dcc80987e 39 ===================================
mbed_official 610:813dcc80987e 40 [..]
mbed_official 610:813dcc80987e 41 (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
mbed_official 610:813dcc80987e 42 (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ()
mbed_official 610:813dcc80987e 43 (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of
mbed_official 610:813dcc80987e 44 Source address and destination address and the Length of data to be transferred.
mbed_official 610:813dcc80987e 45 In this case the DMA interrupt is configured
mbed_official 610:813dcc80987e 46 (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
mbed_official 610:813dcc80987e 47 (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can
mbed_official 610:813dcc80987e 48 add his own function by customization of function pointer XferCpltCallback and
mbed_official 610:813dcc80987e 49 XferErrorCallback (i.e. a member of DMA handle structure).
mbed_official 610:813dcc80987e 50
mbed_official 610:813dcc80987e 51 [..]
mbed_official 610:813dcc80987e 52 (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error
mbed_official 610:813dcc80987e 53 detection.
mbed_official 610:813dcc80987e 54
mbed_official 610:813dcc80987e 55 (#) Use HAL_DMA_Abort() function to abort the current transfer
mbed_official 610:813dcc80987e 56
mbed_official 610:813dcc80987e 57 -@- In Memory-to-Memory transfer mode, Circular mode is not allowed.
mbed_official 610:813dcc80987e 58
mbed_official 610:813dcc80987e 59 @endverbatim
mbed_official 610:813dcc80987e 60 ******************************************************************************
mbed_official 610:813dcc80987e 61 * @attention
mbed_official 610:813dcc80987e 62 *
mbed_official 610:813dcc80987e 63 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 610:813dcc80987e 64 *
mbed_official 610:813dcc80987e 65 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 610:813dcc80987e 66 * are permitted provided that the following conditions are met:
mbed_official 610:813dcc80987e 67 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 610:813dcc80987e 68 * this list of conditions and the following disclaimer.
mbed_official 610:813dcc80987e 69 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 610:813dcc80987e 70 * this list of conditions and the following disclaimer in the documentation
mbed_official 610:813dcc80987e 71 * and/or other materials provided with the distribution.
mbed_official 610:813dcc80987e 72 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 610:813dcc80987e 73 * may be used to endorse or promote products derived from this software
mbed_official 610:813dcc80987e 74 * without specific prior written permission.
mbed_official 610:813dcc80987e 75 *
mbed_official 610:813dcc80987e 76 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 610:813dcc80987e 77 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 610:813dcc80987e 78 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 610:813dcc80987e 79 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 610:813dcc80987e 80 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 610:813dcc80987e 81 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 610:813dcc80987e 82 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 610:813dcc80987e 83 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 610:813dcc80987e 84 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 610:813dcc80987e 85 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 610:813dcc80987e 86 *
mbed_official 610:813dcc80987e 87 ******************************************************************************
mbed_official 610:813dcc80987e 88 */
mbed_official 610:813dcc80987e 89
mbed_official 610:813dcc80987e 90 /* Includes ------------------------------------------------------------------*/
mbed_official 610:813dcc80987e 91 #include "stm32l4xx_hal.h"
mbed_official 610:813dcc80987e 92
mbed_official 610:813dcc80987e 93 /** @addtogroup STM32L4xx_HAL_Driver
mbed_official 610:813dcc80987e 94 * @{
mbed_official 610:813dcc80987e 95 */
mbed_official 610:813dcc80987e 96
mbed_official 610:813dcc80987e 97 /** @defgroup DMA DMA
mbed_official 610:813dcc80987e 98 * @brief DMA HAL module driver
mbed_official 610:813dcc80987e 99 * @{
mbed_official 610:813dcc80987e 100 */
mbed_official 610:813dcc80987e 101
mbed_official 610:813dcc80987e 102 #ifdef HAL_DMA_MODULE_ENABLED
mbed_official 610:813dcc80987e 103
mbed_official 610:813dcc80987e 104 /* Private typedef -----------------------------------------------------------*/
mbed_official 610:813dcc80987e 105 /* Private define ------------------------------------------------------------*/
mbed_official 610:813dcc80987e 106 /** @defgroup DMA_Private_Constants DMA Private Constants
mbed_official 610:813dcc80987e 107 * @{
mbed_official 610:813dcc80987e 108 */
mbed_official 610:813dcc80987e 109 #define HAL_TIMEOUT_DMA_ABORT ((uint32_t)1000) /* 1s */
mbed_official 610:813dcc80987e 110 /**
mbed_official 610:813dcc80987e 111 * @}
mbed_official 610:813dcc80987e 112 */
mbed_official 610:813dcc80987e 113
mbed_official 610:813dcc80987e 114 /* Private macros ------------------------------------------------------------*/
mbed_official 610:813dcc80987e 115 /* Private variables ---------------------------------------------------------*/
mbed_official 610:813dcc80987e 116 /* Private function prototypes -----------------------------------------------*/
mbed_official 610:813dcc80987e 117 /** @defgroup DMA_Private_Functions DMA Private Functions
mbed_official 610:813dcc80987e 118 * @{
mbed_official 610:813dcc80987e 119 */
mbed_official 610:813dcc80987e 120 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
mbed_official 610:813dcc80987e 121 /**
mbed_official 610:813dcc80987e 122 * @}
mbed_official 610:813dcc80987e 123 */
mbed_official 610:813dcc80987e 124
mbed_official 610:813dcc80987e 125 /* Exported functions -------------------------------------------------------*/
mbed_official 610:813dcc80987e 126
mbed_official 610:813dcc80987e 127 /** @defgroup DMA_Exported_Functions DMA Exported Functions
mbed_official 610:813dcc80987e 128 * @{
mbed_official 610:813dcc80987e 129 */
mbed_official 610:813dcc80987e 130
mbed_official 610:813dcc80987e 131 /** @defgroup DMA_Exported_Functions_Group1 Initialization/de-initialization functions
mbed_official 610:813dcc80987e 132 * @brief Initialization/de-initialization functions
mbed_official 610:813dcc80987e 133 *
mbed_official 610:813dcc80987e 134 @verbatim
mbed_official 610:813dcc80987e 135 ===============================================================================
mbed_official 610:813dcc80987e 136 ##### Initialization and de-initialization functions #####
mbed_official 610:813dcc80987e 137 ===============================================================================
mbed_official 610:813dcc80987e 138 [..] This section provides functions allowing to:
mbed_official 610:813dcc80987e 139 (+) Initialize and configure the DMA
mbed_official 610:813dcc80987e 140 (+) De-Initialize the DMA
mbed_official 610:813dcc80987e 141
mbed_official 610:813dcc80987e 142 @endverbatim
mbed_official 610:813dcc80987e 143 * @{
mbed_official 610:813dcc80987e 144 */
mbed_official 610:813dcc80987e 145
mbed_official 610:813dcc80987e 146 /**
mbed_official 610:813dcc80987e 147 * @brief Initializes the DMA according to the specified
mbed_official 610:813dcc80987e 148 * parameters in the DMA_InitTypeDef and initialize the associated handle.
mbed_official 610:813dcc80987e 149 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 150 * the configuration information for the specified DMA Channel.
mbed_official 610:813dcc80987e 151 * @retval HAL status
mbed_official 610:813dcc80987e 152 */
mbed_official 610:813dcc80987e 153 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
mbed_official 610:813dcc80987e 154 {
mbed_official 610:813dcc80987e 155 uint32_t tmp = 0;
mbed_official 610:813dcc80987e 156
mbed_official 610:813dcc80987e 157 /* Check the DMA handle allocation */
mbed_official 610:813dcc80987e 158 if(hdma == NULL)
mbed_official 610:813dcc80987e 159 {
mbed_official 610:813dcc80987e 160 return HAL_ERROR;
mbed_official 610:813dcc80987e 161 }
mbed_official 610:813dcc80987e 162
mbed_official 610:813dcc80987e 163 /* Check the parameters */
mbed_official 610:813dcc80987e 164 assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
mbed_official 610:813dcc80987e 165 assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
mbed_official 610:813dcc80987e 166 assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
mbed_official 610:813dcc80987e 167 assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
mbed_official 610:813dcc80987e 168 assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
mbed_official 610:813dcc80987e 169 assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
mbed_official 610:813dcc80987e 170 assert_param(IS_DMA_MODE(hdma->Init.Mode));
mbed_official 610:813dcc80987e 171 assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
mbed_official 610:813dcc80987e 172 if(hdma->Init.Direction != DMA_MEMORY_TO_MEMORY)
mbed_official 610:813dcc80987e 173 {
mbed_official 610:813dcc80987e 174 assert_param(IS_DMA_ALL_REQUEST(hdma->Init.Request));
mbed_official 610:813dcc80987e 175 }
mbed_official 610:813dcc80987e 176
mbed_official 610:813dcc80987e 177 if(hdma->State == HAL_DMA_STATE_RESET)
mbed_official 610:813dcc80987e 178 {
mbed_official 610:813dcc80987e 179 /* Allocate lock resource and initialize it */
mbed_official 610:813dcc80987e 180 hdma->Lock = HAL_UNLOCKED;
mbed_official 610:813dcc80987e 181 }
mbed_official 610:813dcc80987e 182
mbed_official 610:813dcc80987e 183 /* Change DMA peripheral state */
mbed_official 610:813dcc80987e 184 hdma->State = HAL_DMA_STATE_BUSY;
mbed_official 610:813dcc80987e 185
mbed_official 610:813dcc80987e 186 /* Get the CR register value */
mbed_official 610:813dcc80987e 187 tmp = hdma->Instance->CCR;
mbed_official 610:813dcc80987e 188
mbed_official 610:813dcc80987e 189 /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */
mbed_official 610:813dcc80987e 190 tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \
mbed_official 610:813dcc80987e 191 DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \
mbed_official 610:813dcc80987e 192 DMA_CCR_DIR));
mbed_official 610:813dcc80987e 193
mbed_official 610:813dcc80987e 194 /* Prepare the DMA Channel configuration */
mbed_official 610:813dcc80987e 195 tmp |= hdma->Init.Direction |
mbed_official 610:813dcc80987e 196 hdma->Init.PeriphInc | hdma->Init.MemInc |
mbed_official 610:813dcc80987e 197 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
mbed_official 610:813dcc80987e 198 hdma->Init.Mode | hdma->Init.Priority;
mbed_official 610:813dcc80987e 199
mbed_official 610:813dcc80987e 200 /* Write to DMA Channel CR register */
mbed_official 610:813dcc80987e 201 hdma->Instance->CCR = tmp;
mbed_official 610:813dcc80987e 202
mbed_official 610:813dcc80987e 203 /* Set request selection */
mbed_official 610:813dcc80987e 204 if(hdma->Init.Direction != DMA_MEMORY_TO_MEMORY)
mbed_official 610:813dcc80987e 205 {
mbed_official 610:813dcc80987e 206 /* Write to DMA channel selection register */
mbed_official 610:813dcc80987e 207 if (hdma->Instance == DMA1_Channel1)
mbed_official 610:813dcc80987e 208 {
mbed_official 610:813dcc80987e 209 /*Reset request selection for DMA1 Channel1*/
mbed_official 610:813dcc80987e 210 DMA1_CSELR->CSELR &= ~DMA_CSELR_C1S;
mbed_official 610:813dcc80987e 211
mbed_official 610:813dcc80987e 212 /* Configure request selection for DMA1 Channel1 */
mbed_official 610:813dcc80987e 213 DMA1_CSELR->CSELR |= hdma->Init.Request;
mbed_official 610:813dcc80987e 214 }
mbed_official 610:813dcc80987e 215 else if (hdma->Instance == DMA1_Channel2)
mbed_official 610:813dcc80987e 216 {
mbed_official 610:813dcc80987e 217 /*Reset request selection for DMA1 Channel2*/
mbed_official 610:813dcc80987e 218 DMA1_CSELR->CSELR &= ~DMA_CSELR_C2S;
mbed_official 610:813dcc80987e 219
mbed_official 610:813dcc80987e 220 /* Configure request selection for DMA1 Channel2 */
mbed_official 610:813dcc80987e 221 DMA1_CSELR->CSELR |= (uint32_t)(hdma->Init.Request << 4);
mbed_official 610:813dcc80987e 222 }
mbed_official 610:813dcc80987e 223 else if (hdma->Instance == DMA1_Channel3)
mbed_official 610:813dcc80987e 224 {
mbed_official 610:813dcc80987e 225 /*Reset request selection for DMA1 Channel3*/
mbed_official 610:813dcc80987e 226 DMA1_CSELR->CSELR &= ~DMA_CSELR_C3S;
mbed_official 610:813dcc80987e 227
mbed_official 610:813dcc80987e 228 /* Configure request selection for DMA1 Channel3 */
mbed_official 610:813dcc80987e 229 DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 8);
mbed_official 610:813dcc80987e 230 }
mbed_official 610:813dcc80987e 231 else if (hdma->Instance == DMA1_Channel4)
mbed_official 610:813dcc80987e 232 {
mbed_official 610:813dcc80987e 233 /*Reset request selection for DMA1 Channel4*/
mbed_official 610:813dcc80987e 234 DMA1_CSELR->CSELR &= ~DMA_CSELR_C4S;
mbed_official 610:813dcc80987e 235
mbed_official 610:813dcc80987e 236 /* Configure request selection for DMA1 Channel4 */
mbed_official 610:813dcc80987e 237 DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 12);
mbed_official 610:813dcc80987e 238 }
mbed_official 610:813dcc80987e 239 else if (hdma->Instance == DMA1_Channel5)
mbed_official 610:813dcc80987e 240 {
mbed_official 610:813dcc80987e 241 /*Reset request selection for DMA1 Channel5*/
mbed_official 610:813dcc80987e 242 DMA1_CSELR->CSELR &= ~DMA_CSELR_C5S;
mbed_official 610:813dcc80987e 243
mbed_official 610:813dcc80987e 244 /* Configure request selection for DMA1 Channel5 */
mbed_official 610:813dcc80987e 245 DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 16);
mbed_official 610:813dcc80987e 246 }
mbed_official 610:813dcc80987e 247 else if (hdma->Instance == DMA1_Channel6)
mbed_official 610:813dcc80987e 248 {
mbed_official 610:813dcc80987e 249 /*Reset request selection for DMA1 Channel6*/
mbed_official 610:813dcc80987e 250 DMA1_CSELR->CSELR &= ~DMA_CSELR_C6S;
mbed_official 610:813dcc80987e 251
mbed_official 610:813dcc80987e 252 /* Configure request selection for DMA1 Channel6 */
mbed_official 610:813dcc80987e 253 DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 20);
mbed_official 610:813dcc80987e 254 }
mbed_official 610:813dcc80987e 255 else if (hdma->Instance == DMA1_Channel7)
mbed_official 610:813dcc80987e 256 {
mbed_official 610:813dcc80987e 257 /*Reset request selection for DMA1 Channel7*/
mbed_official 610:813dcc80987e 258 DMA1_CSELR->CSELR &= ~DMA_CSELR_C7S;
mbed_official 610:813dcc80987e 259
mbed_official 610:813dcc80987e 260 /* Configure request selection for DMA1 Channel7 */
mbed_official 610:813dcc80987e 261 DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 24);
mbed_official 610:813dcc80987e 262 }
mbed_official 610:813dcc80987e 263 else if (hdma->Instance == DMA2_Channel1)
mbed_official 610:813dcc80987e 264 {
mbed_official 610:813dcc80987e 265 /*Reset request selection for DMA2 Channel1*/
mbed_official 610:813dcc80987e 266 DMA2_CSELR->CSELR &= ~DMA_CSELR_C1S;
mbed_official 610:813dcc80987e 267
mbed_official 610:813dcc80987e 268 /* Configure request selection for DMA2 Channel1 */
mbed_official 610:813dcc80987e 269 DMA2_CSELR->CSELR |= hdma->Init.Request;
mbed_official 610:813dcc80987e 270 }
mbed_official 610:813dcc80987e 271 else if (hdma->Instance == DMA2_Channel2)
mbed_official 610:813dcc80987e 272 {
mbed_official 610:813dcc80987e 273 /*Reset request selection for DMA2 Channel2*/
mbed_official 610:813dcc80987e 274 DMA2_CSELR->CSELR &= ~DMA_CSELR_C2S;
mbed_official 610:813dcc80987e 275
mbed_official 610:813dcc80987e 276 /* Configure request selection for DMA2 Channel2 */
mbed_official 610:813dcc80987e 277 DMA2_CSELR->CSELR |= (uint32_t)(hdma->Init.Request << 4);
mbed_official 610:813dcc80987e 278 }
mbed_official 610:813dcc80987e 279 else if (hdma->Instance == DMA2_Channel3)
mbed_official 610:813dcc80987e 280 {
mbed_official 610:813dcc80987e 281 /*Reset request selection for DMA2 Channel3*/
mbed_official 610:813dcc80987e 282 DMA2_CSELR->CSELR &= ~DMA_CSELR_C3S;
mbed_official 610:813dcc80987e 283
mbed_official 610:813dcc80987e 284 /* Configure request selection for DMA2 Channel3 */
mbed_official 610:813dcc80987e 285 DMA2_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 8);
mbed_official 610:813dcc80987e 286 }
mbed_official 610:813dcc80987e 287 else if (hdma->Instance == DMA2_Channel4)
mbed_official 610:813dcc80987e 288 {
mbed_official 610:813dcc80987e 289 /*Reset request selection for DMA2 Channel4*/
mbed_official 610:813dcc80987e 290 DMA2_CSELR->CSELR &= ~DMA_CSELR_C4S;
mbed_official 610:813dcc80987e 291
mbed_official 610:813dcc80987e 292 /* Configure request selection for DMA2 Channel4 */
mbed_official 610:813dcc80987e 293 DMA2_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 12);
mbed_official 610:813dcc80987e 294 }
mbed_official 610:813dcc80987e 295 else if (hdma->Instance == DMA2_Channel5)
mbed_official 610:813dcc80987e 296 {
mbed_official 610:813dcc80987e 297 /*Reset request selection for DMA2 Channel5*/
mbed_official 610:813dcc80987e 298 DMA2_CSELR->CSELR &= ~DMA_CSELR_C5S;
mbed_official 610:813dcc80987e 299
mbed_official 610:813dcc80987e 300 /* Configure request selection for DMA2 Channel5 */
mbed_official 610:813dcc80987e 301 DMA2_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 16);
mbed_official 610:813dcc80987e 302 }
mbed_official 610:813dcc80987e 303 else if (hdma->Instance == DMA2_Channel6)
mbed_official 610:813dcc80987e 304 {
mbed_official 610:813dcc80987e 305 /*Reset request selection for DMA2 Channel6*/
mbed_official 610:813dcc80987e 306 DMA2_CSELR->CSELR &= ~DMA_CSELR_C6S;
mbed_official 610:813dcc80987e 307
mbed_official 610:813dcc80987e 308 /* Configure request selection for DMA2 Channel6 */
mbed_official 610:813dcc80987e 309 DMA2_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 20);
mbed_official 610:813dcc80987e 310 }
mbed_official 610:813dcc80987e 311 else if (hdma->Instance == DMA2_Channel7)
mbed_official 610:813dcc80987e 312 {
mbed_official 610:813dcc80987e 313 /*Reset request selection for DMA2 Channel7*/
mbed_official 610:813dcc80987e 314 DMA2_CSELR->CSELR &= ~DMA_CSELR_C7S;
mbed_official 610:813dcc80987e 315
mbed_official 610:813dcc80987e 316 /* Configure request selection for DMA2 Channel7 */
mbed_official 610:813dcc80987e 317 DMA2_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 24);
mbed_official 610:813dcc80987e 318 }
mbed_official 610:813dcc80987e 319 }
mbed_official 610:813dcc80987e 320
mbed_official 610:813dcc80987e 321 /* Initialize the error code */
mbed_official 610:813dcc80987e 322 hdma->ErrorCode = HAL_DMA_ERROR_NONE;
mbed_official 610:813dcc80987e 323
mbed_official 610:813dcc80987e 324 /* Initialize the DMA state*/
mbed_official 610:813dcc80987e 325 hdma->State = HAL_DMA_STATE_READY;
mbed_official 610:813dcc80987e 326
mbed_official 610:813dcc80987e 327 return HAL_OK;
mbed_official 610:813dcc80987e 328 }
mbed_official 610:813dcc80987e 329
mbed_official 610:813dcc80987e 330 /**
mbed_official 610:813dcc80987e 331 * @brief DeInitialize the DMA peripheral
mbed_official 610:813dcc80987e 332 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 333 * the configuration information for the specified DMA Channel.
mbed_official 610:813dcc80987e 334 * @retval HAL status
mbed_official 610:813dcc80987e 335 */
mbed_official 610:813dcc80987e 336 HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
mbed_official 610:813dcc80987e 337 {
mbed_official 610:813dcc80987e 338 /* Check the DMA handle allocation */
mbed_official 610:813dcc80987e 339 if(hdma == NULL)
mbed_official 610:813dcc80987e 340 {
mbed_official 610:813dcc80987e 341 return HAL_ERROR;
mbed_official 610:813dcc80987e 342 }
mbed_official 610:813dcc80987e 343
mbed_official 610:813dcc80987e 344 /* Check the parameters */
mbed_official 610:813dcc80987e 345 assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
mbed_official 610:813dcc80987e 346
mbed_official 610:813dcc80987e 347 /* Check the DMA peripheral state */
mbed_official 610:813dcc80987e 348 if(hdma->State == HAL_DMA_STATE_BUSY)
mbed_official 610:813dcc80987e 349 {
mbed_official 610:813dcc80987e 350 return HAL_ERROR;
mbed_official 610:813dcc80987e 351 }
mbed_official 610:813dcc80987e 352
mbed_official 610:813dcc80987e 353 /* Disable the selected DMA Channelx */
mbed_official 610:813dcc80987e 354 __HAL_DMA_DISABLE(hdma);
mbed_official 610:813dcc80987e 355
mbed_official 610:813dcc80987e 356 /* Reset DMA Channel control register */
mbed_official 610:813dcc80987e 357 hdma->Instance->CCR = 0;
mbed_official 610:813dcc80987e 358
mbed_official 610:813dcc80987e 359 /* Reset DMA Channel Number of Data to Transfer register */
mbed_official 610:813dcc80987e 360 hdma->Instance->CNDTR = 0;
mbed_official 610:813dcc80987e 361
mbed_official 610:813dcc80987e 362 /* Reset DMA Channel peripheral address register */
mbed_official 610:813dcc80987e 363 hdma->Instance->CPAR = 0;
mbed_official 610:813dcc80987e 364
mbed_official 610:813dcc80987e 365 /* Reset DMA Channel memory address register */
mbed_official 610:813dcc80987e 366 hdma->Instance->CMAR = 0;
mbed_official 610:813dcc80987e 367
mbed_official 610:813dcc80987e 368 /* Clear all flags */
mbed_official 610:813dcc80987e 369 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
mbed_official 610:813dcc80987e 370 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
mbed_official 610:813dcc80987e 371 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
mbed_official 610:813dcc80987e 372 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 610:813dcc80987e 373
mbed_official 610:813dcc80987e 374 /* Reset DMA channel selection register */
mbed_official 610:813dcc80987e 375 if (hdma->Instance == DMA1_Channel1)
mbed_official 610:813dcc80987e 376 {
mbed_official 610:813dcc80987e 377 /*Reset DMA request*/
mbed_official 610:813dcc80987e 378 DMA1_CSELR->CSELR &= ~DMA_CSELR_C1S;
mbed_official 610:813dcc80987e 379 }
mbed_official 610:813dcc80987e 380 else if (hdma->Instance == DMA1_Channel2)
mbed_official 610:813dcc80987e 381 {
mbed_official 610:813dcc80987e 382 /*Reset DMA request*/
mbed_official 610:813dcc80987e 383 DMA1_CSELR->CSELR &= ~DMA_CSELR_C2S;
mbed_official 610:813dcc80987e 384 }
mbed_official 610:813dcc80987e 385 else if (hdma->Instance == DMA1_Channel3)
mbed_official 610:813dcc80987e 386 {
mbed_official 610:813dcc80987e 387 /*Reset DMA request*/
mbed_official 610:813dcc80987e 388 DMA1_CSELR->CSELR &= ~DMA_CSELR_C3S;
mbed_official 610:813dcc80987e 389 }
mbed_official 610:813dcc80987e 390 else if (hdma->Instance == DMA1_Channel4)
mbed_official 610:813dcc80987e 391 {
mbed_official 610:813dcc80987e 392 /*Reset DMA request*/
mbed_official 610:813dcc80987e 393 DMA1_CSELR->CSELR &= ~DMA_CSELR_C4S;
mbed_official 610:813dcc80987e 394 }
mbed_official 610:813dcc80987e 395 else if (hdma->Instance == DMA1_Channel5)
mbed_official 610:813dcc80987e 396 {
mbed_official 610:813dcc80987e 397 /*Reset DMA request*/
mbed_official 610:813dcc80987e 398 DMA1_CSELR->CSELR &= ~DMA_CSELR_C5S;
mbed_official 610:813dcc80987e 399 }
mbed_official 610:813dcc80987e 400 else if (hdma->Instance == DMA1_Channel6)
mbed_official 610:813dcc80987e 401 {
mbed_official 610:813dcc80987e 402 /*Reset DMA request*/
mbed_official 610:813dcc80987e 403 DMA1_CSELR->CSELR &= ~DMA_CSELR_C6S;
mbed_official 610:813dcc80987e 404 }
mbed_official 610:813dcc80987e 405 else if (hdma->Instance == DMA1_Channel7)
mbed_official 610:813dcc80987e 406 {
mbed_official 610:813dcc80987e 407 /*Reset DMA request*/
mbed_official 610:813dcc80987e 408 DMA1_CSELR->CSELR &= ~DMA_CSELR_C7S;
mbed_official 610:813dcc80987e 409 }
mbed_official 610:813dcc80987e 410 else if (hdma->Instance == DMA2_Channel1)
mbed_official 610:813dcc80987e 411 {
mbed_official 610:813dcc80987e 412 /*Reset DMA request*/
mbed_official 610:813dcc80987e 413 DMA2_CSELR->CSELR &= ~DMA_CSELR_C1S;
mbed_official 610:813dcc80987e 414 }
mbed_official 610:813dcc80987e 415 else if (hdma->Instance == DMA2_Channel2)
mbed_official 610:813dcc80987e 416 {
mbed_official 610:813dcc80987e 417 /*Reset DMA request*/
mbed_official 610:813dcc80987e 418 DMA2_CSELR->CSELR &= ~DMA_CSELR_C2S;
mbed_official 610:813dcc80987e 419 }
mbed_official 610:813dcc80987e 420 else if (hdma->Instance == DMA2_Channel3)
mbed_official 610:813dcc80987e 421 {
mbed_official 610:813dcc80987e 422 /*Reset DMA request*/
mbed_official 610:813dcc80987e 423 DMA2_CSELR->CSELR &= ~DMA_CSELR_C3S;
mbed_official 610:813dcc80987e 424 }
mbed_official 610:813dcc80987e 425 else if (hdma->Instance == DMA2_Channel4)
mbed_official 610:813dcc80987e 426 {
mbed_official 610:813dcc80987e 427 /*Reset DMA request*/
mbed_official 610:813dcc80987e 428 DMA2_CSELR->CSELR &= ~DMA_CSELR_C4S;
mbed_official 610:813dcc80987e 429 }
mbed_official 610:813dcc80987e 430 else if (hdma->Instance == DMA2_Channel5)
mbed_official 610:813dcc80987e 431 {
mbed_official 610:813dcc80987e 432 /*Reset DMA request*/
mbed_official 610:813dcc80987e 433 DMA2_CSELR->CSELR &= ~DMA_CSELR_C5S;
mbed_official 610:813dcc80987e 434 }
mbed_official 610:813dcc80987e 435 else if (hdma->Instance == DMA2_Channel6)
mbed_official 610:813dcc80987e 436 {
mbed_official 610:813dcc80987e 437 /*Reset DMA request*/
mbed_official 610:813dcc80987e 438 DMA2_CSELR->CSELR &= ~DMA_CSELR_C6S;
mbed_official 610:813dcc80987e 439 }
mbed_official 610:813dcc80987e 440 else if (hdma->Instance == DMA2_Channel7)
mbed_official 610:813dcc80987e 441 {
mbed_official 610:813dcc80987e 442 /*Reset DMA request*/
mbed_official 610:813dcc80987e 443 DMA2_CSELR->CSELR &= ~DMA_CSELR_C7S;
mbed_official 610:813dcc80987e 444 }
mbed_official 610:813dcc80987e 445
mbed_official 610:813dcc80987e 446 /* Initialize the error code */
mbed_official 610:813dcc80987e 447 hdma->ErrorCode = HAL_DMA_ERROR_NONE;
mbed_official 610:813dcc80987e 448
mbed_official 610:813dcc80987e 449 /* Initialize the DMA state */
mbed_official 610:813dcc80987e 450 hdma->State = HAL_DMA_STATE_RESET;
mbed_official 610:813dcc80987e 451
mbed_official 610:813dcc80987e 452 /* Release Lock */
mbed_official 610:813dcc80987e 453 __HAL_UNLOCK(hdma);
mbed_official 610:813dcc80987e 454
mbed_official 610:813dcc80987e 455 return HAL_OK;
mbed_official 610:813dcc80987e 456 }
mbed_official 610:813dcc80987e 457
mbed_official 610:813dcc80987e 458 /**
mbed_official 610:813dcc80987e 459 * @}
mbed_official 610:813dcc80987e 460 */
mbed_official 610:813dcc80987e 461
mbed_official 610:813dcc80987e 462 /** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions
mbed_official 610:813dcc80987e 463 * @brief Input and Output operation functions
mbed_official 610:813dcc80987e 464 *
mbed_official 610:813dcc80987e 465 @verbatim
mbed_official 610:813dcc80987e 466 ===============================================================================
mbed_official 610:813dcc80987e 467 ##### IO operation functions #####
mbed_official 610:813dcc80987e 468 ===============================================================================
mbed_official 610:813dcc80987e 469 [..] This section provides functions allowing to:
mbed_official 610:813dcc80987e 470 (+) Configure the source, destination address and data length and Start DMA transfer
mbed_official 610:813dcc80987e 471 (+) Configure the source, destination address and data length and
mbed_official 610:813dcc80987e 472 Start DMA transfer with interrupt
mbed_official 610:813dcc80987e 473 (+) Abort DMA transfer
mbed_official 610:813dcc80987e 474 (+) Poll for transfer complete
mbed_official 610:813dcc80987e 475 (+) Handle DMA interrupt request
mbed_official 610:813dcc80987e 476
mbed_official 610:813dcc80987e 477 @endverbatim
mbed_official 610:813dcc80987e 478 * @{
mbed_official 610:813dcc80987e 479 */
mbed_official 610:813dcc80987e 480
mbed_official 610:813dcc80987e 481 /**
mbed_official 610:813dcc80987e 482 * @brief Starts the DMA Transfer.
mbed_official 610:813dcc80987e 483 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 484 * the configuration information for the specified DMA Channel.
mbed_official 610:813dcc80987e 485 * @param SrcAddress: The source memory Buffer address
mbed_official 610:813dcc80987e 486 * @param DstAddress: The destination memory Buffer address
mbed_official 610:813dcc80987e 487 * @param DataLength: The length of data to be transferred from source to destination
mbed_official 610:813dcc80987e 488 * @retval HAL status
mbed_official 610:813dcc80987e 489 */
mbed_official 610:813dcc80987e 490 HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
mbed_official 610:813dcc80987e 491 {
mbed_official 610:813dcc80987e 492 /* Process locked */
mbed_official 610:813dcc80987e 493 __HAL_LOCK(hdma);
mbed_official 610:813dcc80987e 494
mbed_official 610:813dcc80987e 495 /* Change DMA peripheral state */
mbed_official 610:813dcc80987e 496 hdma->State = HAL_DMA_STATE_BUSY;
mbed_official 610:813dcc80987e 497
mbed_official 610:813dcc80987e 498 /* Check the parameters */
mbed_official 610:813dcc80987e 499 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
mbed_official 610:813dcc80987e 500
mbed_official 610:813dcc80987e 501 /* Disable the peripheral */
mbed_official 610:813dcc80987e 502 __HAL_DMA_DISABLE(hdma);
mbed_official 610:813dcc80987e 503
mbed_official 610:813dcc80987e 504 /* Configure the source, destination address and the data length */
mbed_official 610:813dcc80987e 505 DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
mbed_official 610:813dcc80987e 506
mbed_official 610:813dcc80987e 507 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 508 __HAL_DMA_ENABLE(hdma);
mbed_official 610:813dcc80987e 509
mbed_official 610:813dcc80987e 510 return HAL_OK;
mbed_official 610:813dcc80987e 511 }
mbed_official 610:813dcc80987e 512
mbed_official 610:813dcc80987e 513 /**
mbed_official 610:813dcc80987e 514 * @brief Start the DMA Transfer with interrupt enabled.
mbed_official 610:813dcc80987e 515 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 516 * the configuration information for the specified DMA Channel.
mbed_official 610:813dcc80987e 517 * @param SrcAddress: The source memory Buffer address
mbed_official 610:813dcc80987e 518 * @param DstAddress: The destination memory Buffer address
mbed_official 610:813dcc80987e 519 * @param DataLength: The length of data to be transferred from source to destination
mbed_official 610:813dcc80987e 520 * @retval HAL status
mbed_official 610:813dcc80987e 521 */
mbed_official 610:813dcc80987e 522 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
mbed_official 610:813dcc80987e 523 {
mbed_official 610:813dcc80987e 524 /* Process locked */
mbed_official 610:813dcc80987e 525 __HAL_LOCK(hdma);
mbed_official 610:813dcc80987e 526
mbed_official 610:813dcc80987e 527 /* Change DMA peripheral state */
mbed_official 610:813dcc80987e 528 hdma->State = HAL_DMA_STATE_BUSY;
mbed_official 610:813dcc80987e 529
mbed_official 610:813dcc80987e 530 /* Check the parameters */
mbed_official 610:813dcc80987e 531 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
mbed_official 610:813dcc80987e 532
mbed_official 610:813dcc80987e 533 /* Disable the peripheral */
mbed_official 610:813dcc80987e 534 __HAL_DMA_DISABLE(hdma);
mbed_official 610:813dcc80987e 535
mbed_official 610:813dcc80987e 536 /* Configure the source, destination address and the data length */
mbed_official 610:813dcc80987e 537 DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
mbed_official 610:813dcc80987e 538
mbed_official 610:813dcc80987e 539 /* Enable the transfer complete interrupt */
mbed_official 610:813dcc80987e 540 /* Enable the Half transfer complete interrupt */
mbed_official 610:813dcc80987e 541 /* Enable the transfer Error interrupt */
mbed_official 610:813dcc80987e 542 __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
mbed_official 610:813dcc80987e 543
mbed_official 610:813dcc80987e 544 /* Enable the Peripheral */
mbed_official 610:813dcc80987e 545 __HAL_DMA_ENABLE(hdma);
mbed_official 610:813dcc80987e 546
mbed_official 610:813dcc80987e 547 return HAL_OK;
mbed_official 610:813dcc80987e 548 }
mbed_official 610:813dcc80987e 549
mbed_official 610:813dcc80987e 550 /**
mbed_official 610:813dcc80987e 551 * @brief Aborts the DMA Transfer.
mbed_official 610:813dcc80987e 552 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 553 * the configuration information for the specified DMA Channel.
mbed_official 610:813dcc80987e 554 *
mbed_official 610:813dcc80987e 555 * @note After disabling a DMA Channel, a check for wait until the DMA Channel is
mbed_official 610:813dcc80987e 556 * effectively disabled is added. If a Channel is disabled
mbed_official 610:813dcc80987e 557 * while a data transfer is ongoing, the current data will be transferred
mbed_official 610:813dcc80987e 558 * and the Channel will be effectively disabled only after the transfer of
mbed_official 610:813dcc80987e 559 * this single data is finished.
mbed_official 610:813dcc80987e 560 * @retval HAL status
mbed_official 610:813dcc80987e 561 */
mbed_official 610:813dcc80987e 562 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
mbed_official 610:813dcc80987e 563 {
mbed_official 610:813dcc80987e 564 uint32_t tickstart = 0;
mbed_official 610:813dcc80987e 565
mbed_official 610:813dcc80987e 566 /* Disable the channel */
mbed_official 610:813dcc80987e 567 __HAL_DMA_DISABLE(hdma);
mbed_official 610:813dcc80987e 568
mbed_official 610:813dcc80987e 569 /* Get timeout */
mbed_official 610:813dcc80987e 570 tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 571
mbed_official 610:813dcc80987e 572 /* Check if the DMA Channel is effectively disabled */
mbed_official 610:813dcc80987e 573 while((hdma->Instance->CCR & DMA_CCR_EN) != 0)
mbed_official 610:813dcc80987e 574 {
mbed_official 610:813dcc80987e 575 /* Check for the Timeout */
mbed_official 610:813dcc80987e 576 if((HAL_GetTick() - tickstart) > HAL_TIMEOUT_DMA_ABORT)
mbed_official 610:813dcc80987e 577 {
mbed_official 610:813dcc80987e 578 /* Update error code */
mbed_official 610:813dcc80987e 579 hdma->ErrorCode |= HAL_DMA_ERROR_TIMEOUT;
mbed_official 610:813dcc80987e 580
mbed_official 610:813dcc80987e 581 /* Change the DMA state */
mbed_official 610:813dcc80987e 582 hdma->State = HAL_DMA_STATE_TIMEOUT;
mbed_official 610:813dcc80987e 583
mbed_official 610:813dcc80987e 584 /* Process Unlocked */
mbed_official 610:813dcc80987e 585 __HAL_UNLOCK(hdma);
mbed_official 610:813dcc80987e 586
mbed_official 610:813dcc80987e 587 return HAL_TIMEOUT;
mbed_official 610:813dcc80987e 588 }
mbed_official 610:813dcc80987e 589 }
mbed_official 610:813dcc80987e 590 /* Change the DMA state */
mbed_official 610:813dcc80987e 591 hdma->State = HAL_DMA_STATE_READY;
mbed_official 610:813dcc80987e 592
mbed_official 610:813dcc80987e 593 /* Process Unlocked */
mbed_official 610:813dcc80987e 594 __HAL_UNLOCK(hdma);
mbed_official 610:813dcc80987e 595
mbed_official 610:813dcc80987e 596 return HAL_OK;
mbed_official 610:813dcc80987e 597 }
mbed_official 610:813dcc80987e 598
mbed_official 610:813dcc80987e 599 /**
mbed_official 610:813dcc80987e 600 * @brief Polling for transfer complete.
mbed_official 610:813dcc80987e 601 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 602 * the configuration information for the specified DMA Channel.
mbed_official 610:813dcc80987e 603 * @param CompleteLevel: Specifies the DMA level complete.
mbed_official 610:813dcc80987e 604 * @param Timeout: Timeout duration.
mbed_official 610:813dcc80987e 605 * @retval HAL status
mbed_official 610:813dcc80987e 606 */
mbed_official 610:813dcc80987e 607 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout)
mbed_official 610:813dcc80987e 608 {
mbed_official 610:813dcc80987e 609 uint32_t temp;
mbed_official 610:813dcc80987e 610 uint32_t tickstart = 0;
mbed_official 610:813dcc80987e 611
mbed_official 610:813dcc80987e 612 /* Get the level transfer complete flag */
mbed_official 610:813dcc80987e 613 if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
mbed_official 610:813dcc80987e 614 {
mbed_official 610:813dcc80987e 615 /* Transfer Complete flag */
mbed_official 610:813dcc80987e 616 temp = __HAL_DMA_GET_TC_FLAG_INDEX(hdma);
mbed_official 610:813dcc80987e 617 }
mbed_official 610:813dcc80987e 618 else
mbed_official 610:813dcc80987e 619 {
mbed_official 610:813dcc80987e 620 /* Half Transfer Complete flag */
mbed_official 610:813dcc80987e 621 temp = __HAL_DMA_GET_HT_FLAG_INDEX(hdma);
mbed_official 610:813dcc80987e 622 }
mbed_official 610:813dcc80987e 623
mbed_official 610:813dcc80987e 624 /* Get timeout */
mbed_official 610:813dcc80987e 625 tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 626
mbed_official 610:813dcc80987e 627 while(__HAL_DMA_GET_FLAG(hdma, temp) == RESET)
mbed_official 610:813dcc80987e 628 {
mbed_official 610:813dcc80987e 629 if((__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET))
mbed_official 610:813dcc80987e 630 {
mbed_official 610:813dcc80987e 631 /* Clear the transfer error flags */
mbed_official 610:813dcc80987e 632 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
mbed_official 610:813dcc80987e 633
mbed_official 610:813dcc80987e 634 /* Change the DMA state */
mbed_official 610:813dcc80987e 635 hdma->State= HAL_DMA_STATE_ERROR;
mbed_official 610:813dcc80987e 636
mbed_official 610:813dcc80987e 637 /* Process Unlocked */
mbed_official 610:813dcc80987e 638 __HAL_UNLOCK(hdma);
mbed_official 610:813dcc80987e 639
mbed_official 610:813dcc80987e 640 return HAL_ERROR;
mbed_official 610:813dcc80987e 641 }
mbed_official 610:813dcc80987e 642 /* Check for the Timeout */
mbed_official 610:813dcc80987e 643 if(Timeout != HAL_MAX_DELAY)
mbed_official 610:813dcc80987e 644 {
mbed_official 610:813dcc80987e 645 if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
mbed_official 610:813dcc80987e 646 {
mbed_official 610:813dcc80987e 647 /* Update error code */
mbed_official 610:813dcc80987e 648 hdma->ErrorCode |= HAL_DMA_ERROR_TIMEOUT;
mbed_official 610:813dcc80987e 649
mbed_official 610:813dcc80987e 650 /* Change the DMA state */
mbed_official 610:813dcc80987e 651 hdma->State = HAL_DMA_STATE_TIMEOUT;
mbed_official 610:813dcc80987e 652
mbed_official 610:813dcc80987e 653 /* Process Unlocked */
mbed_official 610:813dcc80987e 654 __HAL_UNLOCK(hdma);
mbed_official 610:813dcc80987e 655
mbed_official 610:813dcc80987e 656 return HAL_TIMEOUT;
mbed_official 610:813dcc80987e 657 }
mbed_official 610:813dcc80987e 658 }
mbed_official 610:813dcc80987e 659 }
mbed_official 610:813dcc80987e 660
mbed_official 610:813dcc80987e 661 if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
mbed_official 610:813dcc80987e 662 {
mbed_official 610:813dcc80987e 663 /* Clear the transfer complete flag */
mbed_official 610:813dcc80987e 664 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
mbed_official 610:813dcc80987e 665
mbed_official 610:813dcc80987e 666 /* The selected Channelx EN bit is cleared (DMA is disabled and
mbed_official 610:813dcc80987e 667 all transfers are complete) */
mbed_official 610:813dcc80987e 668 hdma->State = HAL_DMA_STATE_READY;
mbed_official 610:813dcc80987e 669
mbed_official 610:813dcc80987e 670 }
mbed_official 610:813dcc80987e 671 else
mbed_official 610:813dcc80987e 672 {
mbed_official 610:813dcc80987e 673 /* Clear the half transfer complete flag */
mbed_official 610:813dcc80987e 674 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 610:813dcc80987e 675
mbed_official 610:813dcc80987e 676 hdma->State = HAL_DMA_STATE_READY_HALF;
mbed_official 610:813dcc80987e 677 }
mbed_official 610:813dcc80987e 678
mbed_official 610:813dcc80987e 679 /* Process unlocked */
mbed_official 610:813dcc80987e 680 __HAL_UNLOCK(hdma);
mbed_official 610:813dcc80987e 681
mbed_official 610:813dcc80987e 682 return HAL_OK;
mbed_official 610:813dcc80987e 683 }
mbed_official 610:813dcc80987e 684
mbed_official 610:813dcc80987e 685 /**
mbed_official 610:813dcc80987e 686 * @brief Handles DMA interrupt request.
mbed_official 610:813dcc80987e 687 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 688 * the configuration information for the specified DMA Channel.
mbed_official 610:813dcc80987e 689 * @retval None
mbed_official 610:813dcc80987e 690 */
mbed_official 610:813dcc80987e 691 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
mbed_official 610:813dcc80987e 692 {
mbed_official 610:813dcc80987e 693 /* Transfer Error Interrupt management ***************************************/
mbed_official 610:813dcc80987e 694 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET)
mbed_official 610:813dcc80987e 695 {
mbed_official 610:813dcc80987e 696 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != RESET)
mbed_official 610:813dcc80987e 697 {
mbed_official 610:813dcc80987e 698 /* Disable the transfer error interrupt */
mbed_official 610:813dcc80987e 699 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE);
mbed_official 610:813dcc80987e 700
mbed_official 610:813dcc80987e 701 /* Clear the transfer error flag */
mbed_official 610:813dcc80987e 702 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
mbed_official 610:813dcc80987e 703
mbed_official 610:813dcc80987e 704 /* Update error code */
mbed_official 610:813dcc80987e 705 hdma->ErrorCode |= HAL_DMA_ERROR_TE;
mbed_official 610:813dcc80987e 706
mbed_official 610:813dcc80987e 707 /* Change the DMA state */
mbed_official 610:813dcc80987e 708 hdma->State = HAL_DMA_STATE_ERROR;
mbed_official 610:813dcc80987e 709
mbed_official 610:813dcc80987e 710 /* Process Unlocked */
mbed_official 610:813dcc80987e 711 __HAL_UNLOCK(hdma);
mbed_official 610:813dcc80987e 712
mbed_official 610:813dcc80987e 713 if (hdma->XferErrorCallback != NULL)
mbed_official 610:813dcc80987e 714 {
mbed_official 610:813dcc80987e 715 /* Transfer error callback */
mbed_official 610:813dcc80987e 716 hdma->XferErrorCallback(hdma);
mbed_official 610:813dcc80987e 717 }
mbed_official 610:813dcc80987e 718 }
mbed_official 610:813dcc80987e 719 }
mbed_official 610:813dcc80987e 720
mbed_official 610:813dcc80987e 721 /* Half Transfer Complete Interrupt management ******************************/
mbed_official 610:813dcc80987e 722 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)) != RESET)
mbed_official 610:813dcc80987e 723 {
mbed_official 610:813dcc80987e 724 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != RESET)
mbed_official 610:813dcc80987e 725 {
mbed_official 610:813dcc80987e 726 /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
mbed_official 610:813dcc80987e 727 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
mbed_official 610:813dcc80987e 728 {
mbed_official 610:813dcc80987e 729 /* Disable the half transfer interrupt */
mbed_official 610:813dcc80987e 730 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
mbed_official 610:813dcc80987e 731 }
mbed_official 610:813dcc80987e 732 /* Clear the half transfer complete flag */
mbed_official 610:813dcc80987e 733 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 610:813dcc80987e 734
mbed_official 610:813dcc80987e 735 /* Change DMA peripheral state */
mbed_official 610:813dcc80987e 736 hdma->State = HAL_DMA_STATE_READY_HALF;
mbed_official 610:813dcc80987e 737
mbed_official 610:813dcc80987e 738 if(hdma->XferHalfCpltCallback != NULL)
mbed_official 610:813dcc80987e 739 {
mbed_official 610:813dcc80987e 740 /* Half transfer callback */
mbed_official 610:813dcc80987e 741 hdma->XferHalfCpltCallback(hdma);
mbed_official 610:813dcc80987e 742 }
mbed_official 610:813dcc80987e 743 }
mbed_official 610:813dcc80987e 744 }
mbed_official 610:813dcc80987e 745
mbed_official 610:813dcc80987e 746 /* Transfer Complete Interrupt management ***********************************/
mbed_official 610:813dcc80987e 747 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)) != RESET)
mbed_official 610:813dcc80987e 748 {
mbed_official 610:813dcc80987e 749 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != RESET)
mbed_official 610:813dcc80987e 750 {
mbed_official 610:813dcc80987e 751 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
mbed_official 610:813dcc80987e 752 {
mbed_official 610:813dcc80987e 753 /* Disable the transfer complete interrupt */
mbed_official 610:813dcc80987e 754 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TC);
mbed_official 610:813dcc80987e 755 }
mbed_official 610:813dcc80987e 756 /* Clear the transfer complete flag */
mbed_official 610:813dcc80987e 757 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
mbed_official 610:813dcc80987e 758
mbed_official 610:813dcc80987e 759 /* Update error code */
mbed_official 610:813dcc80987e 760 hdma->ErrorCode |= HAL_DMA_ERROR_NONE;
mbed_official 610:813dcc80987e 761
mbed_official 610:813dcc80987e 762 /* Change the DMA state */
mbed_official 610:813dcc80987e 763 hdma->State = HAL_DMA_STATE_READY;
mbed_official 610:813dcc80987e 764
mbed_official 610:813dcc80987e 765 /* Process Unlocked */
mbed_official 610:813dcc80987e 766 __HAL_UNLOCK(hdma);
mbed_official 610:813dcc80987e 767
mbed_official 610:813dcc80987e 768 if(hdma->XferCpltCallback != NULL)
mbed_official 610:813dcc80987e 769 {
mbed_official 610:813dcc80987e 770 /* Transfer complete callback */
mbed_official 610:813dcc80987e 771 hdma->XferCpltCallback(hdma);
mbed_official 610:813dcc80987e 772 }
mbed_official 610:813dcc80987e 773 }
mbed_official 610:813dcc80987e 774 }
mbed_official 610:813dcc80987e 775 }
mbed_official 610:813dcc80987e 776
mbed_official 610:813dcc80987e 777 /**
mbed_official 610:813dcc80987e 778 * @}
mbed_official 610:813dcc80987e 779 */
mbed_official 610:813dcc80987e 780
mbed_official 610:813dcc80987e 781 /** @defgroup DMA_Exported_Functions_Group3 Peripheral State and Errors functions
mbed_official 610:813dcc80987e 782 * @brief Peripheral State and Errors functions
mbed_official 610:813dcc80987e 783 *
mbed_official 610:813dcc80987e 784 @verbatim
mbed_official 610:813dcc80987e 785 ===============================================================================
mbed_official 610:813dcc80987e 786 ##### Peripheral State and Errors functions #####
mbed_official 610:813dcc80987e 787 ===============================================================================
mbed_official 610:813dcc80987e 788 [..]
mbed_official 610:813dcc80987e 789 This subsection provides functions allowing to
mbed_official 610:813dcc80987e 790 (+) Check the DMA state
mbed_official 610:813dcc80987e 791 (+) Get error code
mbed_official 610:813dcc80987e 792
mbed_official 610:813dcc80987e 793 @endverbatim
mbed_official 610:813dcc80987e 794 * @{
mbed_official 610:813dcc80987e 795 */
mbed_official 610:813dcc80987e 796
mbed_official 610:813dcc80987e 797 /**
mbed_official 610:813dcc80987e 798 * @brief Returns the DMA hande state.
mbed_official 610:813dcc80987e 799 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 800 * the configuration information for the specified DMA Channel.
mbed_official 610:813dcc80987e 801 * @retval HAL state
mbed_official 610:813dcc80987e 802 */
mbed_official 610:813dcc80987e 803 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
mbed_official 610:813dcc80987e 804 {
mbed_official 610:813dcc80987e 805 /* Return DMA handle state */
mbed_official 610:813dcc80987e 806 return hdma->State;
mbed_official 610:813dcc80987e 807 }
mbed_official 610:813dcc80987e 808
mbed_official 610:813dcc80987e 809 /**
mbed_official 610:813dcc80987e 810 * @brief Return the DMA error code
mbed_official 610:813dcc80987e 811 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 812 * the configuration information for the specified DMA Channel.
mbed_official 610:813dcc80987e 813 * @retval DMA Error Code
mbed_official 610:813dcc80987e 814 */
mbed_official 610:813dcc80987e 815 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
mbed_official 610:813dcc80987e 816 {
mbed_official 610:813dcc80987e 817 return hdma->ErrorCode;
mbed_official 610:813dcc80987e 818 }
mbed_official 610:813dcc80987e 819
mbed_official 610:813dcc80987e 820 /**
mbed_official 610:813dcc80987e 821 * @}
mbed_official 610:813dcc80987e 822 */
mbed_official 610:813dcc80987e 823
mbed_official 610:813dcc80987e 824 /**
mbed_official 610:813dcc80987e 825 * @}
mbed_official 610:813dcc80987e 826 */
mbed_official 610:813dcc80987e 827
mbed_official 610:813dcc80987e 828 /** @addtogroup DMA_Private_Functions
mbed_official 610:813dcc80987e 829 * @{
mbed_official 610:813dcc80987e 830 */
mbed_official 610:813dcc80987e 831
mbed_official 610:813dcc80987e 832 /**
mbed_official 610:813dcc80987e 833 * @brief Sets the DMA Transfer parameter.
mbed_official 610:813dcc80987e 834 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 835 * the configuration information for the specified DMA Channel.
mbed_official 610:813dcc80987e 836 * @param SrcAddress: The source memory Buffer address
mbed_official 610:813dcc80987e 837 * @param DstAddress: The destination memory Buffer address
mbed_official 610:813dcc80987e 838 * @param DataLength: The length of data to be transferred from source to destination
mbed_official 610:813dcc80987e 839 * @retval HAL status
mbed_official 610:813dcc80987e 840 */
mbed_official 610:813dcc80987e 841 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
mbed_official 610:813dcc80987e 842 {
mbed_official 610:813dcc80987e 843 /* Configure DMA Channel data length */
mbed_official 610:813dcc80987e 844 hdma->Instance->CNDTR = DataLength;
mbed_official 610:813dcc80987e 845
mbed_official 610:813dcc80987e 846 /* Peripheral to Memory */
mbed_official 610:813dcc80987e 847 if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
mbed_official 610:813dcc80987e 848 {
mbed_official 610:813dcc80987e 849 /* Configure DMA Channel destination address */
mbed_official 610:813dcc80987e 850 hdma->Instance->CPAR = DstAddress;
mbed_official 610:813dcc80987e 851
mbed_official 610:813dcc80987e 852 /* Configure DMA Channel source address */
mbed_official 610:813dcc80987e 853 hdma->Instance->CMAR = SrcAddress;
mbed_official 610:813dcc80987e 854 }
mbed_official 610:813dcc80987e 855 /* Memory to Peripheral */
mbed_official 610:813dcc80987e 856 else
mbed_official 610:813dcc80987e 857 {
mbed_official 610:813dcc80987e 858 /* Configure DMA Channel source address */
mbed_official 610:813dcc80987e 859 hdma->Instance->CPAR = SrcAddress;
mbed_official 610:813dcc80987e 860
mbed_official 610:813dcc80987e 861 /* Configure DMA Channel destination address */
mbed_official 610:813dcc80987e 862 hdma->Instance->CMAR = DstAddress;
mbed_official 610:813dcc80987e 863 }
mbed_official 610:813dcc80987e 864 }
mbed_official 610:813dcc80987e 865
mbed_official 610:813dcc80987e 866 /**
mbed_official 610:813dcc80987e 867 * @}
mbed_official 610:813dcc80987e 868 */
mbed_official 610:813dcc80987e 869
mbed_official 610:813dcc80987e 870 #endif /* HAL_DMA_MODULE_ENABLED */
mbed_official 610:813dcc80987e 871 /**
mbed_official 610:813dcc80987e 872 * @}
mbed_official 610:813dcc80987e 873 */
mbed_official 610:813dcc80987e 874
mbed_official 610:813dcc80987e 875 /**
mbed_official 610:813dcc80987e 876 * @}
mbed_official 610:813dcc80987e 877 */
mbed_official 610:813dcc80987e 878
mbed_official 610:813dcc80987e 879 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/