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This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_Maxim/TARGET_MAX32610/system_max32610.c@600:7d17ca308cd1, 2015-07-31 (annotated)

Committer:
mbed_official
Date:
Fri Jul 31 14:15:09 2015 +0100
Revision:
600:7d17ca308cd1
Parent:
572:c6226b743616 
Synchronized with git revision e4cd8bbd3e05b68e5a7f466c74035a85743d45e0



Full URL: https://github.com/mbedmicro/mbed/commit/e4cd8bbd3e05b68e5a7f466c74035a85743d45e0/



Enable LPC8xx usart when configuring it

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 507:d4fc7603a669 1 /*******************************************************************************
mbed_official 507:d4fc7603a669 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
mbed_official 507:d4fc7603a669 3 *
mbed_official 507:d4fc7603a669 4 * Permission is hereby granted, free of charge, to any person obtaining a
mbed_official 507:d4fc7603a669 5 * copy of this software and associated documentation files (the "Software"),
mbed_official 507:d4fc7603a669 6 * to deal in the Software without restriction, including without limitation
mbed_official 507:d4fc7603a669 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
mbed_official 507:d4fc7603a669 8 * and/or sell copies of the Software, and to permit persons to whom the
mbed_official 507:d4fc7603a669 9 * Software is furnished to do so, subject to the following conditions:
mbed_official 507:d4fc7603a669 10 *
mbed_official 507:d4fc7603a669 11 * The above copyright notice and this permission notice shall be included
mbed_official 507:d4fc7603a669 12 * in all copies or substantial portions of the Software.
mbed_official 507:d4fc7603a669 13 *
mbed_official 507:d4fc7603a669 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
mbed_official 507:d4fc7603a669 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
mbed_official 507:d4fc7603a669 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
mbed_official 507:d4fc7603a669 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
mbed_official 507:d4fc7603a669 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
mbed_official 507:d4fc7603a669 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
mbed_official 507:d4fc7603a669 20 * OTHER DEALINGS IN THE SOFTWARE.
mbed_official 507:d4fc7603a669 21 *
mbed_official 507:d4fc7603a669 22 * Except as contained in this notice, the name of Maxim Integrated
mbed_official 507:d4fc7603a669 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
mbed_official 507:d4fc7603a669 24 * Products, Inc. Branding Policy.
mbed_official 507:d4fc7603a669 25 *
mbed_official 507:d4fc7603a669 26 * The mere transfer of this software does not imply any licenses
mbed_official 507:d4fc7603a669 27 * of trade secrets, proprietary technology, copyrights, patents,
mbed_official 507:d4fc7603a669 28 * trademarks, maskwork rights, or any other form of intellectual
mbed_official 507:d4fc7603a669 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
mbed_official 507:d4fc7603a669 30 * ownership rights.
mbed_official 507:d4fc7603a669 31 *******************************************************************************
mbed_official 507:d4fc7603a669 32 */
mbed_official 507:d4fc7603a669 33
mbed_official 507:d4fc7603a669 34 #include "max32610.h"
mbed_official 507:d4fc7603a669 35 #include "clkman_regs.h"
mbed_official 507:d4fc7603a669 36 #include "pwrman_regs.h"
mbed_official 507:d4fc7603a669 37 #include "ioman_regs.h"
mbed_official 507:d4fc7603a669 38 #include "trim_regs.h"
mbed_official 507:d4fc7603a669 39 #include "flc_regs.h"
mbed_official 507:d4fc7603a669 40 #include "pwrseq_regs.h"
mbed_official 507:d4fc7603a669 41 #include "dac_regs.h"
mbed_official 507:d4fc7603a669 42 #include "icc_regs.h"
mbed_official 572:c6226b743616 43 #include "adc_regs.h"
mbed_official 507:d4fc7603a669 44
mbed_official 507:d4fc7603a669 45 /* Application developer should override where necessary with different external HFX source */
mbed_official 507:d4fc7603a669 46 #ifndef __SYSTEM_HFX
mbed_official 507:d4fc7603a669 47 #define __SYSTEM_HFX 24000000
mbed_official 507:d4fc7603a669 48 #endif
mbed_official 507:d4fc7603a669 49
mbed_official 507:d4fc7603a669 50 uint32_t SystemCoreClock = 24000000;
mbed_official 507:d4fc7603a669 51
mbed_official 507:d4fc7603a669 52 void SystemCoreClockUpdate(void)
mbed_official 507:d4fc7603a669 53 {
mbed_official 507:d4fc7603a669 54 switch ((MXC_CLKMAN->clk_ctrl & MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT) >> MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT_POS) {
mbed_official 507:d4fc7603a669 55 case MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_24MHZ_RO_DIV_8:
mbed_official 507:d4fc7603a669 56 SystemCoreClock = 3000000;
mbed_official 507:d4fc7603a669 57 break;
mbed_official 507:d4fc7603a669 58 case MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_24MHZ_RO:
mbed_official 507:d4fc7603a669 59 case MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_PLL_48MHZ_DIV_2:
mbed_official 507:d4fc7603a669 60 SystemCoreClock = 24000000;
mbed_official 507:d4fc7603a669 61 break;
mbed_official 507:d4fc7603a669 62 case MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_HFX:
mbed_official 507:d4fc7603a669 63 SystemCoreClock = __SYSTEM_HFX;
mbed_official 507:d4fc7603a669 64 break;
mbed_official 507:d4fc7603a669 65 }
mbed_official 507:d4fc7603a669 66
mbed_official 507:d4fc7603a669 67 uint32_t shift = MXC_CLKMAN->clk_ctrl_0_system;
mbed_official 507:d4fc7603a669 68 if (shift) {
mbed_official 507:d4fc7603a669 69 SystemCoreClock = SystemCoreClock >> (shift - 1);
mbed_official 507:d4fc7603a669 70 }
mbed_official 507:d4fc7603a669 71 }
mbed_official 507:d4fc7603a669 72
mbed_official 507:d4fc7603a669 73 /* power seq registers */
mbed_official 507:d4fc7603a669 74 static void set_pwr_regs(void)
mbed_official 507:d4fc7603a669 75 {
mbed_official 507:d4fc7603a669 76 uint32_t dac2trim = MXC_DAC2->reg & 0xff00ffff;
mbed_official 507:d4fc7603a669 77 uint32_t dac3trim = MXC_DAC3->reg & 0xff00ffff;
mbed_official 507:d4fc7603a669 78 dac2trim = dac2trim + MXC_TRIM->trim_reg_36;
mbed_official 507:d4fc7603a669 79 dac3trim = dac3trim + MXC_TRIM->trim_reg_37;
mbed_official 572:c6226b743616 80 if ((MXC_TRIM->trim_reg_13 != 0) && (MXC_TRIM->trim_reg_13 != 0xFFFFFFFF)) {
mbed_official 572:c6226b743616 81 MXC_PWRSEQ->reg5 = MXC_TRIM->trim_reg_13;
mbed_official 572:c6226b743616 82 }
mbed_official 572:c6226b743616 83 if ((MXC_TRIM->trim_reg_14 != 0) && (MXC_TRIM->trim_reg_14 != 0xFFFFFFFF)) {
mbed_official 572:c6226b743616 84 MXC_PWRSEQ->reg6 = MXC_TRIM->trim_reg_14;
mbed_official 572:c6226b743616 85 }
mbed_official 507:d4fc7603a669 86 MXC_DAC0->trm = MXC_TRIM->trim_reg_34;
mbed_official 507:d4fc7603a669 87 MXC_DAC1->trm = MXC_TRIM->trim_reg_35;
mbed_official 507:d4fc7603a669 88 MXC_DAC2->reg = dac2trim;
mbed_official 507:d4fc7603a669 89 MXC_DAC3->reg = dac3trim;
mbed_official 507:d4fc7603a669 90 }
mbed_official 507:d4fc7603a669 91
mbed_official 507:d4fc7603a669 92 void ICC_Enable(void)
mbed_official 507:d4fc7603a669 93 {
mbed_official 507:d4fc7603a669 94 /* clock gater must be 'on' not 'dynamic' for cache control */
mbed_official 507:d4fc7603a669 95 uint32_t temp = MXC_CLKMAN->clk_gate_ctrl0;
mbed_official 507:d4fc7603a669 96 temp &= ~MXC_F_CLKMAN_CLK_GATE_CTRL0_ICACHE_CLK_GATER;
mbed_official 507:d4fc7603a669 97 temp |= (MXC_E_CLKMAN_CLK_GATE_ON << MXC_F_CLKMAN_CLK_GATE_CTRL0_ICACHE_CLK_GATER_POS);
mbed_official 507:d4fc7603a669 98 MXC_CLKMAN->clk_gate_ctrl0 = temp;
mbed_official 507:d4fc7603a669 99
mbed_official 507:d4fc7603a669 100
mbed_official 507:d4fc7603a669 101 /* invalidate, wait, enable */
mbed_official 507:d4fc7603a669 102 MXC_ICC->invdt_all = 0xFFFF;
mbed_official 507:d4fc7603a669 103 while(!(MXC_ICC->ctrl_stat & MXC_F_ICC_CTRL_STAT_READY));
mbed_official 507:d4fc7603a669 104 MXC_ICC->ctrl_stat |= MXC_F_ICC_CTRL_STAT_ENABLE;
mbed_official 507:d4fc7603a669 105
mbed_official 507:d4fc7603a669 106 /* must invalidate a second time for proper use */
mbed_official 507:d4fc7603a669 107 MXC_ICC->invdt_all = 1;
mbed_official 507:d4fc7603a669 108
mbed_official 507:d4fc7603a669 109 /* clock gater 'dynamic' safe again */
mbed_official 507:d4fc7603a669 110 temp = MXC_CLKMAN->clk_gate_ctrl0;
mbed_official 507:d4fc7603a669 111 temp &= ~MXC_F_CLKMAN_CLK_GATE_CTRL0_ICACHE_CLK_GATER;
mbed_official 507:d4fc7603a669 112 temp |= (MXC_E_CLKMAN_CLK_GATE_DYNAMIC << MXC_F_CLKMAN_CLK_GATE_CTRL0_ICACHE_CLK_GATER_POS);
mbed_official 507:d4fc7603a669 113 MXC_CLKMAN->clk_gate_ctrl0 = temp;
mbed_official 507:d4fc7603a669 114 }
mbed_official 507:d4fc7603a669 115
mbed_official 572:c6226b743616 116 void Trim_RO(void)
mbed_official 572:c6226b743616 117 {
mbed_official 572:c6226b743616 118 uint32_t reg0;
mbed_official 572:c6226b743616 119 uint32_t trim;
mbed_official 572:c6226b743616 120
mbed_official 572:c6226b743616 121 // Save the RTCEN_RUN state and set it
mbed_official 572:c6226b743616 122 reg0 = MXC_PWRSEQ->reg0;
mbed_official 572:c6226b743616 123 MXC_PWRSEQ->reg0 |= MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN;
mbed_official 572:c6226b743616 124
mbed_official 572:c6226b743616 125 /* needed if parts are untrimmed */
mbed_official 572:c6226b743616 126 if ((MXC_TRIM->trim_reg_13 == 0) || (MXC_TRIM->trim_reg_13 == 0xFFFFFFFF)) {
mbed_official 572:c6226b743616 127 MXC_PWRSEQ->reg5 = (MXC_PWRSEQ->reg5 & ~MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF) | (16 << MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF_POS);
mbed_official 572:c6226b743616 128 }
mbed_official 572:c6226b743616 129 trim = (MXC_PWRSEQ->reg5 & MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF) >> (MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF_POS - 2);
mbed_official 572:c6226b743616 130 MXC_ADCCFG->ro_cal1 = (MXC_ADCCFG->ro_cal1 & ~MXC_F_ADC_RO_CAL1_TRM_INIT) |
mbed_official 572:c6226b743616 131 ((trim << MXC_F_ADC_RO_CAL1_TRM_INIT_POS) & MXC_F_ADC_RO_CAL1_TRM_INIT);
mbed_official 572:c6226b743616 132 MXC_ADCCFG->ro_cal0 = (MXC_ADCCFG->ro_cal0 & ~MXC_F_ADC_RO_CAL0_TRM_MU) | (0x04 << MXC_F_ADC_RO_CAL0_TRM_MU_POS);
mbed_official 572:c6226b743616 133 BITBAND_SetBit(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_LOAD_POS);
mbed_official 572:c6226b743616 134 BITBAND_SetBit(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS);
mbed_official 572:c6226b743616 135 BITBAND_SetBit(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_RUN_POS);
mbed_official 572:c6226b743616 136
mbed_official 572:c6226b743616 137 SysTick->LOAD = 1635; /* about 50ms, based on a 32KHz systick clock */
mbed_official 572:c6226b743616 138 SysTick->VAL = 0;
mbed_official 572:c6226b743616 139 SysTick->CTRL = SysTick_CTRL_ENABLE_Msk; /* Enable SysTick Timer */
mbed_official 572:c6226b743616 140 while(SysTick->VAL == 0);
mbed_official 572:c6226b743616 141 while(!(SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk));
mbed_official 572:c6226b743616 142 SysTick->CTRL = 0;
mbed_official 572:c6226b743616 143
mbed_official 572:c6226b743616 144 trim = (MXC_ADCCFG->ro_cal0 & MXC_F_ADC_RO_CAL0_RO_TRM) >> (MXC_F_ADC_RO_CAL0_RO_TRM_POS + 2);
mbed_official 572:c6226b743616 145 BITBAND_ClrBit(&MXC_ADCCFG->ro_cal0, MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS);
mbed_official 572:c6226b743616 146 MXC_PWRSEQ->reg5 = (MXC_PWRSEQ->reg5 & ~MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF) |
mbed_official 572:c6226b743616 147 ((trim << MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF_POS) & MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF);
mbed_official 572:c6226b743616 148
mbed_official 572:c6226b743616 149 // Restore the RTCEN_RUN state
mbed_official 572:c6226b743616 150 if (!(reg0 & MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN)) {
mbed_official 572:c6226b743616 151 MXC_PWRSEQ->reg0 &= ~MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN;
mbed_official 572:c6226b743616 152 }
mbed_official 572:c6226b743616 153 }
mbed_official 572:c6226b743616 154
mbed_official 507:d4fc7603a669 155 // This function to be implemented by the hal
mbed_official 515:7467ef1f4ad8 156 extern void low_level_init(void);
mbed_official 507:d4fc7603a669 157
mbed_official 507:d4fc7603a669 158 void SystemInit(void)
mbed_official 507:d4fc7603a669 159 {
mbed_official 507:d4fc7603a669 160 set_pwr_regs();
mbed_official 507:d4fc7603a669 161
mbed_official 507:d4fc7603a669 162 // Turn off PADX
mbed_official 507:d4fc7603a669 163 MXC_IOMAN->padx_control = 0x00000441;
mbed_official 507:d4fc7603a669 164
mbed_official 538:3c6246291cdb 165 // Enable instruction cache
mbed_official 507:d4fc7603a669 166 ICC_Enable();
mbed_official 507:d4fc7603a669 167
mbed_official 507:d4fc7603a669 168 low_level_init();
mbed_official 507:d4fc7603a669 169
mbed_official 507:d4fc7603a669 170 // Clear IO Active
mbed_official 507:d4fc7603a669 171 MXC_PWRMAN->pwr_rst_ctrl = (MXC_F_PWRMAN_PWR_RST_CTRL_FLASH_ACTIVE |
mbed_official 507:d4fc7603a669 172 MXC_F_PWRMAN_PWR_RST_CTRL_SRAM_ACTIVE);
mbed_official 507:d4fc7603a669 173
mbed_official 507:d4fc7603a669 174 // Set WUD Clear
mbed_official 507:d4fc7603a669 175 MXC_PWRMAN->pwr_rst_ctrl = (MXC_F_PWRMAN_PWR_RST_CTRL_FLASH_ACTIVE |
mbed_official 507:d4fc7603a669 176 MXC_F_PWRMAN_PWR_RST_CTRL_SRAM_ACTIVE |
mbed_official 507:d4fc7603a669 177 MXC_F_PWRMAN_PWR_RST_CTRL_WUD_CLEAR);
mbed_official 507:d4fc7603a669 178
mbed_official 507:d4fc7603a669 179 // Set IO Active
mbed_official 507:d4fc7603a669 180 MXC_PWRMAN->pwr_rst_ctrl = (MXC_F_PWRMAN_PWR_RST_CTRL_FLASH_ACTIVE |
mbed_official 507:d4fc7603a669 181 MXC_F_PWRMAN_PWR_RST_CTRL_SRAM_ACTIVE |
mbed_official 507:d4fc7603a669 182 MXC_F_PWRMAN_PWR_RST_CTRL_IO_ACTIVE |
mbed_official 507:d4fc7603a669 183 MXC_F_PWRMAN_PWR_RST_CTRL_PULLUPS_ENABLED);
mbed_official 507:d4fc7603a669 184
mbed_official 538:3c6246291cdb 185 // Clear the first boot flag. Use low_level_init() if special handling is required.
mbed_official 538:3c6246291cdb 186 MXC_PWRSEQ->reg0 &= ~MXC_F_PWRSEQ_REG0_PWR_FIRST_BOOT;
mbed_official 538:3c6246291cdb 187
mbed_official 538:3c6246291cdb 188 // Enable the regulator
mbed_official 507:d4fc7603a669 189 MXC_PWRSEQ->reg0 |= MXC_F_PWRSEQ_REG0_PWR_CHZYEN_RUN;
mbed_official 507:d4fc7603a669 190
mbed_official 538:3c6246291cdb 191 // Mask all wakeups
mbed_official 538:3c6246291cdb 192 MXC_PWRSEQ->msk_flags = 0xFFFFFFFF;
mbed_official 538:3c6246291cdb 193
mbed_official 538:3c6246291cdb 194 // Set systick to the RTC input 32.768kHz clock, not system clock; this is needed to keep JTAG alive during sleep
mbed_official 507:d4fc7603a669 195 MXC_CLKMAN->clk_ctrl |= MXC_F_CLKMAN_CLK_CTRL_RTOS_MODE;
mbed_official 507:d4fc7603a669 196
mbed_official 507:d4fc7603a669 197 SystemCoreClockUpdate();
mbed_official 572:c6226b743616 198
mbed_official 572:c6226b743616 199 Trim_RO();
mbed_official 507:d4fc7603a669 200 }