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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_Maxim/TARGET_MAX32610/spi_regs.h@600:7d17ca308cd1, 2015-07-31 (annotated)

Committer:
mbed_official
Date:
Fri Jul 31 14:15:09 2015 +0100
Revision:
600:7d17ca308cd1
Parent:
507:d4fc7603a669 
Synchronized with git revision e4cd8bbd3e05b68e5a7f466c74035a85743d45e0



Full URL: https://github.com/mbedmicro/mbed/commit/e4cd8bbd3e05b68e5a7f466c74035a85743d45e0/



Enable LPC8xx usart when configuring it

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 507:d4fc7603a669 1 /*******************************************************************************
mbed_official 507:d4fc7603a669 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
mbed_official 507:d4fc7603a669 3 *
mbed_official 507:d4fc7603a669 4 * Permission is hereby granted, free of charge, to any person obtaining a
mbed_official 507:d4fc7603a669 5 * copy of this software and associated documentation files (the "Software"),
mbed_official 507:d4fc7603a669 6 * to deal in the Software without restriction, including without limitation
mbed_official 507:d4fc7603a669 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
mbed_official 507:d4fc7603a669 8 * and/or sell copies of the Software, and to permit persons to whom the
mbed_official 507:d4fc7603a669 9 * Software is furnished to do so, subject to the following conditions:
mbed_official 507:d4fc7603a669 10 *
mbed_official 507:d4fc7603a669 11 * The above copyright notice and this permission notice shall be included
mbed_official 507:d4fc7603a669 12 * in all copies or substantial portions of the Software.
mbed_official 507:d4fc7603a669 13 *
mbed_official 507:d4fc7603a669 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
mbed_official 507:d4fc7603a669 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
mbed_official 507:d4fc7603a669 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
mbed_official 507:d4fc7603a669 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
mbed_official 507:d4fc7603a669 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
mbed_official 507:d4fc7603a669 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
mbed_official 507:d4fc7603a669 20 * OTHER DEALINGS IN THE SOFTWARE.
mbed_official 507:d4fc7603a669 21 *
mbed_official 507:d4fc7603a669 22 * Except as contained in this notice, the name of Maxim Integrated
mbed_official 507:d4fc7603a669 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
mbed_official 507:d4fc7603a669 24 * Products, Inc. Branding Policy.
mbed_official 507:d4fc7603a669 25 *
mbed_official 507:d4fc7603a669 26 * The mere transfer of this software does not imply any licenses
mbed_official 507:d4fc7603a669 27 * of trade secrets, proprietary technology, copyrights, patents,
mbed_official 507:d4fc7603a669 28 * trademarks, maskwork rights, or any other form of intellectual
mbed_official 507:d4fc7603a669 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
mbed_official 507:d4fc7603a669 30 * ownership rights.
mbed_official 507:d4fc7603a669 31 *******************************************************************************
mbed_official 507:d4fc7603a669 32 */
mbed_official 507:d4fc7603a669 33
mbed_official 507:d4fc7603a669 34 #ifndef _MXC_SPI_REGS_H
mbed_official 507:d4fc7603a669 35 #define _MXC_SPI_REGS_H
mbed_official 507:d4fc7603a669 36
mbed_official 507:d4fc7603a669 37 #ifdef __cplusplus
mbed_official 507:d4fc7603a669 38 extern "C" {
mbed_official 507:d4fc7603a669 39 #endif
mbed_official 507:d4fc7603a669 40
mbed_official 507:d4fc7603a669 41 #include <stdint.h>
mbed_official 507:d4fc7603a669 42
mbed_official 507:d4fc7603a669 43 /**
mbed_official 507:d4fc7603a669 44 * @file spi_regs.h
mbed_official 507:d4fc7603a669 45 * @addtogroup spi SPI
mbed_official 507:d4fc7603a669 46 * @{
mbed_official 507:d4fc7603a669 47 */
mbed_official 507:d4fc7603a669 48
mbed_official 507:d4fc7603a669 49 /* Offset Register Description
mbed_official 507:d4fc7603a669 50 ====== ============================================ */
mbed_official 507:d4fc7603a669 51 typedef struct {
mbed_official 507:d4fc7603a669 52 __IO uint32_t mstr_cfg; /* 0x0000 SPI Master Configuration Register */
mbed_official 507:d4fc7603a669 53 __IO uint32_t ss_sr_polarity; /* 0x0004 Polarity Control for SS and SR Signals */
mbed_official 507:d4fc7603a669 54 __IO uint32_t gen_ctrl; /* 0x0008 SPI Master General Control Register */
mbed_official 507:d4fc7603a669 55 __IO uint32_t fifo_ctrl; /* 0x000C SPI Master FIFO Control Register */
mbed_official 507:d4fc7603a669 56 __IO uint32_t spcl_ctrl; /* 0x0010 SPI Master Special Mode Controls */
mbed_official 507:d4fc7603a669 57 __IO uint32_t intfl; /* 0x0014 SPI Master Interrupt Flags */
mbed_official 507:d4fc7603a669 58 __IO uint32_t inten; /* 0x0018 SPI Master Interrupt Enable/Disable Settings */
mbed_official 507:d4fc7603a669 59 __I uint32_t rsv001C; /* 0x001C Deprecated - was SPI_AHB_RETRY */
mbed_official 507:d4fc7603a669 60 } mxc_spi_regs_t;
mbed_official 507:d4fc7603a669 61
mbed_official 507:d4fc7603a669 62 /**
mbed_official 507:d4fc7603a669 63 * @brief TX FIFO register. Can do 8, 16, or 32 bit access.
mbed_official 507:d4fc7603a669 64 */
mbed_official 507:d4fc7603a669 65 typedef struct {
mbed_official 507:d4fc7603a669 66 union {
mbed_official 507:d4fc7603a669 67 __O uint8_t txfifo_8;
mbed_official 507:d4fc7603a669 68 __O uint16_t txfifo_16;
mbed_official 507:d4fc7603a669 69 __O uint32_t txfifo_32;
mbed_official 507:d4fc7603a669 70 };
mbed_official 507:d4fc7603a669 71 } mxc_spi_txfifo_regs_t;
mbed_official 507:d4fc7603a669 72
mbed_official 507:d4fc7603a669 73 /**
mbed_official 507:d4fc7603a669 74 * @brief RX FIFO register. Can do 8, 16, or 32 bit access.
mbed_official 507:d4fc7603a669 75 */
mbed_official 507:d4fc7603a669 76 typedef struct {
mbed_official 507:d4fc7603a669 77 union {
mbed_official 507:d4fc7603a669 78 __I uint8_t rxfifo_8;
mbed_official 507:d4fc7603a669 79 __I uint16_t rxfifo_16;
mbed_official 507:d4fc7603a669 80 __I uint32_t rxfifo_32;
mbed_official 507:d4fc7603a669 81 };
mbed_official 507:d4fc7603a669 82 } mxc_spi_rxfifo_regs_t;
mbed_official 507:d4fc7603a669 83
mbed_official 507:d4fc7603a669 84 /*
mbed_official 507:d4fc7603a669 85 Register offsets for module SPI.
mbed_official 507:d4fc7603a669 86 */
mbed_official 507:d4fc7603a669 87 #define MXC_R_SPI_OFFS_MSTR_CFG ((uint32_t)0x00000000UL)
mbed_official 507:d4fc7603a669 88 #define MXC_R_SPI_OFFS_SS_SR_POLARITY ((uint32_t)0x00000004UL)
mbed_official 507:d4fc7603a669 89 #define MXC_R_SPI_OFFS_GEN_CTRL ((uint32_t)0x00000008UL)
mbed_official 507:d4fc7603a669 90 #define MXC_R_SPI_OFFS_FIFO_CTRL ((uint32_t)0x0000000CUL)
mbed_official 507:d4fc7603a669 91 #define MXC_R_SPI_OFFS_SPCL_CTRL ((uint32_t)0x00000010UL)
mbed_official 507:d4fc7603a669 92 #define MXC_R_SPI_OFFS_INTFL ((uint32_t)0x00000014UL)
mbed_official 507:d4fc7603a669 93 #define MXC_R_SPI_OFFS_INTEN ((uint32_t)0x00000018UL)
mbed_official 507:d4fc7603a669 94
mbed_official 507:d4fc7603a669 95 #define MXC_R_SPI_FIFO_OFFS_TRANS ((uint32_t)0x00000000UL)
mbed_official 507:d4fc7603a669 96 #define MXC_R_SPI_FIFO_OFFS_RSLTS ((uint32_t)0x00000800UL)
mbed_official 507:d4fc7603a669 97
mbed_official 507:d4fc7603a669 98 /*
mbed_official 507:d4fc7603a669 99 Field positions and masks for module SPI.
mbed_official 507:d4fc7603a669 100 */
mbed_official 507:d4fc7603a669 101 #define MXC_F_SPI_MSTR_CFG_SLAVE_SEL_POS 0
mbed_official 507:d4fc7603a669 102 #define MXC_F_SPI_MSTR_CFG_SLAVE_SEL ((uint32_t)(0x00000007UL << MXC_F_SPI_MSTR_CFG_SLAVE_SEL_POS))
mbed_official 507:d4fc7603a669 103 #define MXC_F_SPI_MSTR_CFG_THREE_WIRE_MODE_POS 3
mbed_official 507:d4fc7603a669 104 #define MXC_F_SPI_MSTR_CFG_THREE_WIRE_MODE ((uint32_t)(0x00000001UL << MXC_F_SPI_MSTR_CFG_THREE_WIRE_MODE_POS))
mbed_official 507:d4fc7603a669 105 #define MXC_F_SPI_MSTR_CFG_SPI_MODE_POS 4
mbed_official 507:d4fc7603a669 106 #define MXC_F_SPI_MSTR_CFG_SPI_MODE ((uint32_t)(0x00000003UL << MXC_F_SPI_MSTR_CFG_SPI_MODE_POS))
mbed_official 507:d4fc7603a669 107 #define MXC_F_SPI_MSTR_CFG_PAGE_SIZE_POS 6
mbed_official 507:d4fc7603a669 108 #define MXC_F_SPI_MSTR_CFG_PAGE_SIZE ((uint32_t)(0x00000003UL << MXC_F_SPI_MSTR_CFG_PAGE_SIZE_POS))
mbed_official 507:d4fc7603a669 109 #define MXC_F_SPI_MSTR_CFG_SCK_HI_CLK_POS 8
mbed_official 507:d4fc7603a669 110 #define MXC_F_SPI_MSTR_CFG_SCK_HI_CLK ((uint32_t)(0x0000000FUL << MXC_F_SPI_MSTR_CFG_SCK_HI_CLK_POS))
mbed_official 507:d4fc7603a669 111 #define MXC_F_SPI_MSTR_CFG_SCK_LO_CLK_POS 12
mbed_official 507:d4fc7603a669 112 #define MXC_F_SPI_MSTR_CFG_SCK_LO_CLK ((uint32_t)(0x0000000FUL << MXC_F_SPI_MSTR_CFG_SCK_LO_CLK_POS))
mbed_official 507:d4fc7603a669 113 #define MXC_F_SPI_MSTR_CFG_ACT_DELAY_POS 16
mbed_official 507:d4fc7603a669 114 #define MXC_F_SPI_MSTR_CFG_ACT_DELAY ((uint32_t)(0x00000003UL << MXC_F_SPI_MSTR_CFG_ACT_DELAY_POS))
mbed_official 507:d4fc7603a669 115 #define MXC_F_SPI_MSTR_CFG_INACT_DELAY_POS 18
mbed_official 507:d4fc7603a669 116 #define MXC_F_SPI_MSTR_CFG_INACT_DELAY ((uint32_t)(0x00000003UL << MXC_F_SPI_MSTR_CFG_INACT_DELAY_POS))
mbed_official 507:d4fc7603a669 117 #define MXC_F_SPI_MSTR_CFG_ALT_SCK_HI_CLK_POS 20
mbed_official 507:d4fc7603a669 118 #define MXC_F_SPI_MSTR_CFG_ALT_SCK_HI_CLK ((uint32_t)(0x0000000FUL << MXC_F_SPI_MSTR_CFG_ALT_SCK_HI_CLK_POS))
mbed_official 507:d4fc7603a669 119 #define MXC_F_SPI_MSTR_CFG_ALT_SCK_LO_CLK_POS 24
mbed_official 507:d4fc7603a669 120 #define MXC_F_SPI_MSTR_CFG_ALT_SCK_LO_CLK ((uint32_t)(0x0000000FUL << MXC_F_SPI_MSTR_CFG_ALT_SCK_LO_CLK_POS))
mbed_official 507:d4fc7603a669 121
mbed_official 507:d4fc7603a669 122 #define MXC_F_SPI_SS_SR_POLARITY_SS_POLARITY_POS 0
mbed_official 507:d4fc7603a669 123 #define MXC_F_SPI_SS_SR_POLARITY_SS_POLARITY ((uint32_t)(0x000000FFUL << MXC_F_SPI_SS_SR_POLARITY_SS_POLARITY_POS))
mbed_official 507:d4fc7603a669 124 #define MXC_F_SPI_SS_SR_POLARITY_FC_POLARITY_POS 8
mbed_official 507:d4fc7603a669 125 #define MXC_F_SPI_SS_SR_POLARITY_FC_POLARITY ((uint32_t)(0x000000FFUL << MXC_F_SPI_SS_SR_POLARITY_FC_POLARITY_POS))
mbed_official 507:d4fc7603a669 126
mbed_official 507:d4fc7603a669 127 #define MXC_F_SPI_GEN_CTRL_SPI_MSTR_EN_POS 0
mbed_official 507:d4fc7603a669 128 #define MXC_F_SPI_GEN_CTRL_SPI_MSTR_EN ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_SPI_MSTR_EN_POS))
mbed_official 507:d4fc7603a669 129 #define MXC_F_SPI_GEN_CTRL_TX_FIFO_EN_POS 1
mbed_official 507:d4fc7603a669 130 #define MXC_F_SPI_GEN_CTRL_TX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_TX_FIFO_EN_POS))
mbed_official 507:d4fc7603a669 131 #define MXC_F_SPI_GEN_CTRL_RX_FIFO_EN_POS 2
mbed_official 507:d4fc7603a669 132 #define MXC_F_SPI_GEN_CTRL_RX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_RX_FIFO_EN_POS))
mbed_official 507:d4fc7603a669 133 #define MXC_F_SPI_GEN_CTRL_BIT_BANG_MODE_POS 3
mbed_official 507:d4fc7603a669 134 #define MXC_F_SPI_GEN_CTRL_BIT_BANG_MODE ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_BIT_BANG_MODE_POS))
mbed_official 507:d4fc7603a669 135 #define MXC_F_SPI_GEN_CTRL_BB_SS_IN_OUT_POS 4
mbed_official 507:d4fc7603a669 136 #define MXC_F_SPI_GEN_CTRL_BB_SS_IN_OUT ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_BB_SS_IN_OUT_POS))
mbed_official 507:d4fc7603a669 137 #define MXC_F_SPI_GEN_CTRL_BB_SR_IN_POS 5
mbed_official 507:d4fc7603a669 138 #define MXC_F_SPI_GEN_CTRL_BB_SR_IN ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_BB_SR_IN_POS))
mbed_official 507:d4fc7603a669 139 #define MXC_F_SPI_GEN_CTRL_BB_SCK_IN_OUT_POS 6
mbed_official 507:d4fc7603a669 140 #define MXC_F_SPI_GEN_CTRL_BB_SCK_IN_OUT ((uint32_t)(0x00000001UL << MXC_F_SPI_GEN_CTRL_BB_SCK_IN_OUT_POS))
mbed_official 507:d4fc7603a669 141 #define MXC_F_SPI_GEN_CTRL_BB_SDIO_IN_POS 8
mbed_official 507:d4fc7603a669 142 #define MXC_F_SPI_GEN_CTRL_BB_SDIO_IN ((uint32_t)(0x0000000FUL << MXC_F_SPI_GEN_CTRL_BB_SDIO_IN_POS))
mbed_official 507:d4fc7603a669 143 #define MXC_F_SPI_GEN_CTRL_BB_SDIO_OUT_POS 12
mbed_official 507:d4fc7603a669 144 #define MXC_F_SPI_GEN_CTRL_BB_SDIO_OUT ((uint32_t)(0x0000000FUL << MXC_F_SPI_GEN_CTRL_BB_SDIO_OUT_POS))
mbed_official 507:d4fc7603a669 145 #define MXC_F_SPI_GEN_CTRL_BB_SDIO_DR_EN_POS 16
mbed_official 507:d4fc7603a669 146 #define MXC_F_SPI_GEN_CTRL_BB_SDIO_DR_EN ((uint32_t)(0x0000000FUL << MXC_F_SPI_GEN_CTRL_BB_SDIO_DR_EN_POS))
mbed_official 507:d4fc7603a669 147
mbed_official 507:d4fc7603a669 148 #define MXC_F_SPI_FIFO_CTRL_TX_FIFO_AE_LVL_POS 0
mbed_official 507:d4fc7603a669 149 #define MXC_F_SPI_FIFO_CTRL_TX_FIFO_AE_LVL ((uint32_t)(0x0000000FUL << MXC_F_SPI_FIFO_CTRL_TX_FIFO_AE_LVL_POS))
mbed_official 507:d4fc7603a669 150 #define MXC_F_SPI_FIFO_CTRL_TX_FIFO_USED_POS 8
mbed_official 507:d4fc7603a669 151 #define MXC_F_SPI_FIFO_CTRL_TX_FIFO_USED ((uint32_t)(0x0000001FUL << MXC_F_SPI_FIFO_CTRL_TX_FIFO_USED_POS))
mbed_official 507:d4fc7603a669 152 #define MXC_F_SPI_FIFO_CTRL_RX_FIFO_AF_LVL_POS 16
mbed_official 507:d4fc7603a669 153 #define MXC_F_SPI_FIFO_CTRL_RX_FIFO_AF_LVL ((uint32_t)(0x0000001FUL << MXC_F_SPI_FIFO_CTRL_RX_FIFO_AF_LVL_POS))
mbed_official 507:d4fc7603a669 154 #define MXC_F_SPI_FIFO_CTRL_RX_FIFO_USED_POS 24
mbed_official 507:d4fc7603a669 155 #define MXC_F_SPI_FIFO_CTRL_RX_FIFO_USED ((uint32_t)(0x0000003FUL << MXC_F_SPI_FIFO_CTRL_RX_FIFO_USED_POS))
mbed_official 507:d4fc7603a669 156
mbed_official 507:d4fc7603a669 157 #define MXC_F_SPI_SPCL_CTRL_SS_SAMPLE_MODE_POS 0
mbed_official 507:d4fc7603a669 158 #define MXC_F_SPI_SPCL_CTRL_SS_SAMPLE_MODE ((uint32_t)(0x00000001UL << MXC_F_SPI_SPCL_CTRL_SS_SAMPLE_MODE_POS))
mbed_official 507:d4fc7603a669 159 #define MXC_F_SPI_SPCL_CTRL_MISO_FC_EN_POS 1
mbed_official 507:d4fc7603a669 160 #define MXC_F_SPI_SPCL_CTRL_MISO_FC_EN ((uint32_t)(0x00000001UL << MXC_F_SPI_SPCL_CTRL_MISO_FC_EN_POS))
mbed_official 507:d4fc7603a669 161 #define MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_OUT_POS 4
mbed_official 507:d4fc7603a669 162 #define MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_OUT ((uint32_t)(0x0000000FUL << MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_OUT_POS))
mbed_official 507:d4fc7603a669 163 #define MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_DR_EN_POS 8
mbed_official 507:d4fc7603a669 164 #define MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_DR_EN ((uint32_t)(0x0000000FUL << MXC_F_SPI_SPCL_CTRL_SS_SA_SDIO_DR_EN_POS))
mbed_official 507:d4fc7603a669 165
mbed_official 507:d4fc7603a669 166 #define MXC_F_SPI_INTFL_TX_STALLED_POS 0
mbed_official 507:d4fc7603a669 167 #define MXC_F_SPI_INTFL_TX_STALLED ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_TX_STALLED_POS))
mbed_official 507:d4fc7603a669 168 #define MXC_F_SPI_INTFL_RX_STALLED_POS 1
mbed_official 507:d4fc7603a669 169 #define MXC_F_SPI_INTFL_RX_STALLED ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_RX_STALLED_POS))
mbed_official 507:d4fc7603a669 170 #define MXC_F_SPI_INTFL_TX_READY_POS 2
mbed_official 507:d4fc7603a669 171 #define MXC_F_SPI_INTFL_TX_READY ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_TX_READY_POS))
mbed_official 507:d4fc7603a669 172 #define MXC_F_SPI_INTFL_RX_DONE_POS 3
mbed_official 507:d4fc7603a669 173 #define MXC_F_SPI_INTFL_RX_DONE ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_RX_DONE_POS))
mbed_official 507:d4fc7603a669 174 #define MXC_F_SPI_INTFL_TX_FIFO_AE_POS 4
mbed_official 507:d4fc7603a669 175 #define MXC_F_SPI_INTFL_TX_FIFO_AE ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_TX_FIFO_AE_POS))
mbed_official 507:d4fc7603a669 176 #define MXC_F_SPI_INTFL_RX_FIFO_AF_POS 5
mbed_official 507:d4fc7603a669 177 #define MXC_F_SPI_INTFL_RX_FIFO_AF ((uint32_t)(0x00000001UL << MXC_F_SPI_INTFL_RX_FIFO_AF_POS))
mbed_official 507:d4fc7603a669 178
mbed_official 507:d4fc7603a669 179 #define MXC_F_SPI_INTEN_TX_STALLED_POS 0
mbed_official 507:d4fc7603a669 180 #define MXC_F_SPI_INTEN_TX_STALLED ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_TX_STALLED_POS))
mbed_official 507:d4fc7603a669 181 #define MXC_F_SPI_INTEN_RX_STALLED_POS 1
mbed_official 507:d4fc7603a669 182 #define MXC_F_SPI_INTEN_RX_STALLED ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_RX_STALLED_POS))
mbed_official 507:d4fc7603a669 183 #define MXC_F_SPI_INTEN_TX_READY_POS 2
mbed_official 507:d4fc7603a669 184 #define MXC_F_SPI_INTEN_TX_READY ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_TX_READY_POS))
mbed_official 507:d4fc7603a669 185 #define MXC_F_SPI_INTEN_RX_DONE_POS 3
mbed_official 507:d4fc7603a669 186 #define MXC_F_SPI_INTEN_RX_DONE ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_RX_DONE_POS))
mbed_official 507:d4fc7603a669 187 #define MXC_F_SPI_INTEN_TX_FIFO_AE_POS 4
mbed_official 507:d4fc7603a669 188 #define MXC_F_SPI_INTEN_TX_FIFO_AE ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_TX_FIFO_AE_POS))
mbed_official 507:d4fc7603a669 189 #define MXC_F_SPI_INTEN_RX_FIFO_AF_POS 5
mbed_official 507:d4fc7603a669 190 #define MXC_F_SPI_INTEN_RX_FIFO_AF ((uint32_t)(0x00000001UL << MXC_F_SPI_INTEN_RX_FIFO_AF_POS))
mbed_official 507:d4fc7603a669 191
mbed_official 507:d4fc7603a669 192 #define MXC_F_SPI_FIFO_DIR_POS 0
mbed_official 507:d4fc7603a669 193 #define MXC_F_SPI_FIFO_DIR ((uint32_t)(0x00000003UL << MXC_F_SPI_FIFO_DIR_POS))
mbed_official 507:d4fc7603a669 194 #define MXC_F_SPI_FIFO_UNIT_POS 2
mbed_official 507:d4fc7603a669 195 #define MXC_F_SPI_FIFO_UNIT ((uint32_t)(0x00000003UL << MXC_F_SPI_FIFO_UNIT_POS))
mbed_official 507:d4fc7603a669 196 #define MXC_F_SPI_FIFO_SIZE_POS 4
mbed_official 507:d4fc7603a669 197 #define MXC_F_SPI_FIFO_SIZE ((uint32_t)(0x0000000FUL << MXC_F_SPI_FIFO_SIZE_POS))
mbed_official 507:d4fc7603a669 198 #define MXC_F_SPI_FIFO_WIDTH_POS 9
mbed_official 507:d4fc7603a669 199 #define MXC_F_SPI_FIFO_WIDTH ((uint32_t)(0x00000001UL << MXC_F_SPI_FIFO_WIDTH_POS))
mbed_official 507:d4fc7603a669 200 #define MXC_F_SPI_FIFO_ALT_POS 11
mbed_official 507:d4fc7603a669 201 #define MXC_F_SPI_FIFO_ALT ((uint32_t)(0x00000001UL << MXC_F_SPI_FIFO_ALT_POS))
mbed_official 507:d4fc7603a669 202 #define MXC_F_SPI_FIFO_FLOW_POS 12
mbed_official 507:d4fc7603a669 203 #define MXC_F_SPI_FIFO_FLOW ((uint32_t)(0x00000001UL << MXC_F_SPI_FIFO_FLOW_POS))
mbed_official 507:d4fc7603a669 204 #define MXC_F_SPI_FIFO_DASS_POS 13
mbed_official 507:d4fc7603a669 205 #define MXC_F_SPI_FIFO_DASS ((uint32_t)(0x00000001UL << MXC_F_SPI_FIFO_DASS_POS))
mbed_official 507:d4fc7603a669 206
mbed_official 507:d4fc7603a669 207 #ifdef __cplusplus
mbed_official 507:d4fc7603a669 208 }
mbed_official 507:d4fc7603a669 209 #endif
mbed_official 507:d4fc7603a669 210
mbed_official 507:d4fc7603a669 211 /**
mbed_official 507:d4fc7603a669 212 * @}
mbed_official 507:d4fc7603a669 213 */
mbed_official 507:d4fc7603a669 214
mbed_official 507:d4fc7603a669 215 #endif /* _MXC_SPI_REGS_H */