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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_Maxim/TARGET_MAX32610/pwrseq_regs.h@600:7d17ca308cd1, 2015-07-31 (annotated)

Committer:
mbed_official
Date:
Fri Jul 31 14:15:09 2015 +0100
Revision:
600:7d17ca308cd1
Parent:
507:d4fc7603a669 
Synchronized with git revision e4cd8bbd3e05b68e5a7f466c74035a85743d45e0



Full URL: https://github.com/mbedmicro/mbed/commit/e4cd8bbd3e05b68e5a7f466c74035a85743d45e0/



Enable LPC8xx usart when configuring it

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 507:d4fc7603a669 1 /*******************************************************************************
mbed_official 507:d4fc7603a669 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
mbed_official 507:d4fc7603a669 3 *
mbed_official 507:d4fc7603a669 4 * Permission is hereby granted, free of charge, to any person obtaining a
mbed_official 507:d4fc7603a669 5 * copy of this software and associated documentation files (the "Software"),
mbed_official 507:d4fc7603a669 6 * to deal in the Software without restriction, including without limitation
mbed_official 507:d4fc7603a669 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
mbed_official 507:d4fc7603a669 8 * and/or sell copies of the Software, and to permit persons to whom the
mbed_official 507:d4fc7603a669 9 * Software is furnished to do so, subject to the following conditions:
mbed_official 507:d4fc7603a669 10 *
mbed_official 507:d4fc7603a669 11 * The above copyright notice and this permission notice shall be included
mbed_official 507:d4fc7603a669 12 * in all copies or substantial portions of the Software.
mbed_official 507:d4fc7603a669 13 *
mbed_official 507:d4fc7603a669 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
mbed_official 507:d4fc7603a669 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
mbed_official 507:d4fc7603a669 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
mbed_official 507:d4fc7603a669 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
mbed_official 507:d4fc7603a669 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
mbed_official 507:d4fc7603a669 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
mbed_official 507:d4fc7603a669 20 * OTHER DEALINGS IN THE SOFTWARE.
mbed_official 507:d4fc7603a669 21 *
mbed_official 507:d4fc7603a669 22 * Except as contained in this notice, the name of Maxim Integrated
mbed_official 507:d4fc7603a669 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
mbed_official 507:d4fc7603a669 24 * Products, Inc. Branding Policy.
mbed_official 507:d4fc7603a669 25 *
mbed_official 507:d4fc7603a669 26 * The mere transfer of this software does not imply any licenses
mbed_official 507:d4fc7603a669 27 * of trade secrets, proprietary technology, copyrights, patents,
mbed_official 507:d4fc7603a669 28 * trademarks, maskwork rights, or any other form of intellectual
mbed_official 507:d4fc7603a669 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
mbed_official 507:d4fc7603a669 30 * ownership rights.
mbed_official 507:d4fc7603a669 31 *******************************************************************************
mbed_official 507:d4fc7603a669 32 */
mbed_official 507:d4fc7603a669 33
mbed_official 507:d4fc7603a669 34 #ifndef _MXC_PWRSEQ_REGS_H
mbed_official 507:d4fc7603a669 35 #define _MXC_PWRSEQ_REGS_H
mbed_official 507:d4fc7603a669 36
mbed_official 507:d4fc7603a669 37 #ifdef __cplusplus
mbed_official 507:d4fc7603a669 38 extern "C" {
mbed_official 507:d4fc7603a669 39 #endif
mbed_official 507:d4fc7603a669 40
mbed_official 507:d4fc7603a669 41 #include <stdint.h>
mbed_official 507:d4fc7603a669 42
mbed_official 507:d4fc7603a669 43 /**
mbed_official 507:d4fc7603a669 44 * @file pwrseq_regs.h
mbed_official 507:d4fc7603a669 45 * @addtogroup pwrseq PWRSEQ
mbed_official 507:d4fc7603a669 46 * @{
mbed_official 507:d4fc7603a669 47 */
mbed_official 507:d4fc7603a669 48
mbed_official 507:d4fc7603a669 49 /* Offset Register Description
mbed_official 507:d4fc7603a669 50 ====== ================================================= */
mbed_official 507:d4fc7603a669 51 typedef struct {
mbed_official 507:d4fc7603a669 52 __IO uint32_t reg0; /* 0x0000 Power Sequencer Control Register 0 */
mbed_official 507:d4fc7603a669 53 __IO uint32_t reg1; /* 0x0004 Power Sequencer Control Register 1 */
mbed_official 507:d4fc7603a669 54 __IO uint32_t reg2; /* 0x0008 Power Sequencer Control Register 2 */
mbed_official 507:d4fc7603a669 55 __IO uint32_t reg3; /* 0x000C Power Sequencer Control Register 3 */
mbed_official 507:d4fc7603a669 56 __IO uint32_t reg4; /* 0x0010 Power Sequencer Control Register 4 */
mbed_official 507:d4fc7603a669 57 __IO uint32_t reg5; /* 0x0014 Power Sequencer Control Register 5 (Trim 0) */
mbed_official 507:d4fc7603a669 58 __IO uint32_t reg6; /* 0x0018 Power Sequencer Control Register 6 (Trim 1) */
mbed_official 507:d4fc7603a669 59 __I uint32_t rsv001C; /* 0x001C */
mbed_official 507:d4fc7603a669 60 __IO uint32_t flags; /* 0x0020 Power Sequencer Flags */
mbed_official 507:d4fc7603a669 61 __IO uint32_t msk_flags; /* 0x0024 Power Sequencer Flags Mask Register */
mbed_official 507:d4fc7603a669 62 } mxc_pwrseq_regs_t;
mbed_official 507:d4fc7603a669 63
mbed_official 507:d4fc7603a669 64
mbed_official 507:d4fc7603a669 65 /*
mbed_official 507:d4fc7603a669 66 Register offsets for module PWRSEQ.
mbed_official 507:d4fc7603a669 67 */
mbed_official 507:d4fc7603a669 68 #define MXC_R_PWRSEQ_OFFS_REG0 ((uint32_t)0x00000000UL)
mbed_official 507:d4fc7603a669 69 #define MXC_R_PWRSEQ_OFFS_REG1 ((uint32_t)0x00000004UL)
mbed_official 507:d4fc7603a669 70 #define MXC_R_PWRSEQ_OFFS_REG2 ((uint32_t)0x00000008UL)
mbed_official 507:d4fc7603a669 71 #define MXC_R_PWRSEQ_OFFS_REG3 ((uint32_t)0x0000000CUL)
mbed_official 507:d4fc7603a669 72 #define MXC_R_PWRSEQ_OFFS_REG4 ((uint32_t)0x00000010UL)
mbed_official 507:d4fc7603a669 73 #define MXC_R_PWRSEQ_OFFS_REG5 ((uint32_t)0x00000014UL)
mbed_official 507:d4fc7603a669 74 #define MXC_R_PWRSEQ_OFFS_REG6 ((uint32_t)0x00000018UL)
mbed_official 507:d4fc7603a669 75 #define MXC_R_PWRSEQ_OFFS_FLAGS ((uint32_t)0x00000020UL)
mbed_official 507:d4fc7603a669 76 #define MXC_R_PWRSEQ_OFFS_MSK_FLAGS ((uint32_t)0x00000024UL)
mbed_official 507:d4fc7603a669 77
mbed_official 507:d4fc7603a669 78
mbed_official 507:d4fc7603a669 79 /*
mbed_official 507:d4fc7603a669 80 Field positions and masks for module PWRSEQ.
mbed_official 507:d4fc7603a669 81 */
mbed_official 507:d4fc7603a669 82 #define MXC_F_PWRSEQ_REG0_PWR_LP1_POS 0
mbed_official 507:d4fc7603a669 83 #define MXC_F_PWRSEQ_REG0_PWR_LP1 ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_LP1_POS))
mbed_official 507:d4fc7603a669 84 #define MXC_F_PWRSEQ_REG0_PWR_FIRST_BOOT_POS 1
mbed_official 507:d4fc7603a669 85 #define MXC_F_PWRSEQ_REG0_PWR_FIRST_BOOT ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_FIRST_BOOT_POS))
mbed_official 507:d4fc7603a669 86 #define MXC_F_PWRSEQ_REG0_PWR_SYS_REBOOT_POS 2
mbed_official 507:d4fc7603a669 87 #define MXC_F_PWRSEQ_REG0_PWR_SYS_REBOOT ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_SYS_REBOOT_POS))
mbed_official 507:d4fc7603a669 88 #define MXC_F_PWRSEQ_REG0_PWR_LDOEN_RUN_POS 3
mbed_official 507:d4fc7603a669 89 #define MXC_F_PWRSEQ_REG0_PWR_LDOEN_RUN ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_LDOEN_RUN_POS))
mbed_official 507:d4fc7603a669 90 #define MXC_F_PWRSEQ_REG0_PWR_LDOEN_SLP_POS 4
mbed_official 507:d4fc7603a669 91 #define MXC_F_PWRSEQ_REG0_PWR_LDOEN_SLP ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_LDOEN_SLP_POS))
mbed_official 507:d4fc7603a669 92 #define MXC_F_PWRSEQ_REG0_PWR_CHZYEN_RUN_POS 5
mbed_official 507:d4fc7603a669 93 #define MXC_F_PWRSEQ_REG0_PWR_CHZYEN_RUN ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_CHZYEN_RUN_POS))
mbed_official 507:d4fc7603a669 94 #define MXC_F_PWRSEQ_REG0_PWR_CHZYEN_SLP_POS 6
mbed_official 507:d4fc7603a669 95 #define MXC_F_PWRSEQ_REG0_PWR_CHZYEN_SLP ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_CHZYEN_SLP_POS))
mbed_official 507:d4fc7603a669 96 #define MXC_F_PWRSEQ_REG0_PWR_ROEN_RUN_POS 7
mbed_official 507:d4fc7603a669 97 #define MXC_F_PWRSEQ_REG0_PWR_ROEN_RUN ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_ROEN_RUN_POS))
mbed_official 507:d4fc7603a669 98 #define MXC_F_PWRSEQ_REG0_PWR_ROEN_SLP_POS 8
mbed_official 507:d4fc7603a669 99 #define MXC_F_PWRSEQ_REG0_PWR_ROEN_SLP ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_ROEN_SLP_POS))
mbed_official 507:d4fc7603a669 100 #define MXC_F_PWRSEQ_REG0_PWR_NREN_RUN_POS 9
mbed_official 507:d4fc7603a669 101 #define MXC_F_PWRSEQ_REG0_PWR_NREN_RUN ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_NREN_RUN_POS))
mbed_official 507:d4fc7603a669 102 #define MXC_F_PWRSEQ_REG0_PWR_NREN_SLP_POS 10
mbed_official 507:d4fc7603a669 103 #define MXC_F_PWRSEQ_REG0_PWR_NREN_SLP ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_NREN_SLP_POS))
mbed_official 507:d4fc7603a669 104 #define MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN_POS 11
mbed_official 507:d4fc7603a669 105 #define MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_RTCEN_RUN_POS))
mbed_official 507:d4fc7603a669 106 #define MXC_F_PWRSEQ_REG0_PWR_RTCEN_SLP_POS 12
mbed_official 507:d4fc7603a669 107 #define MXC_F_PWRSEQ_REG0_PWR_RTCEN_SLP ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_RTCEN_SLP_POS))
mbed_official 507:d4fc7603a669 108 #define MXC_F_PWRSEQ_REG0_PWR_SVM3EN_RUN_POS 13
mbed_official 507:d4fc7603a669 109 #define MXC_F_PWRSEQ_REG0_PWR_SVM3EN_RUN ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_SVM3EN_RUN_POS))
mbed_official 507:d4fc7603a669 110 #define MXC_F_PWRSEQ_REG0_PWR_SVM3EN_SLP_POS 14
mbed_official 507:d4fc7603a669 111 #define MXC_F_PWRSEQ_REG0_PWR_SVM3EN_SLP ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_SVM3EN_SLP_POS))
mbed_official 507:d4fc7603a669 112 #define MXC_F_PWRSEQ_REG0_PWR_SVM1EN_RUN_POS 15
mbed_official 507:d4fc7603a669 113 #define MXC_F_PWRSEQ_REG0_PWR_SVM1EN_RUN ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_SVM1EN_RUN_POS))
mbed_official 507:d4fc7603a669 114 #define MXC_F_PWRSEQ_REG0_PWR_SVM1EN_SLP_POS 16
mbed_official 507:d4fc7603a669 115 #define MXC_F_PWRSEQ_REG0_PWR_SVM1EN_SLP ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_SVM1EN_SLP_POS))
mbed_official 507:d4fc7603a669 116 #define MXC_F_PWRSEQ_REG0_PWR_SVMRTCEN_RUN_POS 17
mbed_official 507:d4fc7603a669 117 #define MXC_F_PWRSEQ_REG0_PWR_SVMRTCEN_RUN ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_SVMRTCEN_RUN_POS))
mbed_official 507:d4fc7603a669 118 #define MXC_F_PWRSEQ_REG0_PWR_SVMRTCEN_SLP_POS 18
mbed_official 507:d4fc7603a669 119 #define MXC_F_PWRSEQ_REG0_PWR_SVMRTCEN_SLP ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_SVMRTCEN_SLP_POS))
mbed_official 507:d4fc7603a669 120 #define MXC_F_PWRSEQ_REG0_PWR_SVMVDDA3EN_POS 19
mbed_official 507:d4fc7603a669 121 #define MXC_F_PWRSEQ_REG0_PWR_SVMVDDA3EN ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG0_PWR_SVMVDDA3EN_POS))
mbed_official 507:d4fc7603a669 122
mbed_official 507:d4fc7603a669 123 #define MXC_F_PWRSEQ_REG1_PWR_TRIKL_CHRG_POS 0
mbed_official 507:d4fc7603a669 124 #define MXC_F_PWRSEQ_REG1_PWR_TRIKL_CHRG ((uint32_t)(0x000000FFUL << MXC_F_PWRSEQ_REG1_PWR_TRIKL_CHRG_POS))
mbed_official 507:d4fc7603a669 125 #define MXC_F_PWRSEQ_REG1_PWR_PD_VDDA3_POS 8
mbed_official 507:d4fc7603a669 126 #define MXC_F_PWRSEQ_REG1_PWR_PD_VDDA3 ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG1_PWR_PD_VDDA3_POS))
mbed_official 507:d4fc7603a669 127 #define MXC_F_PWRSEQ_REG1_PWR_TEMP_SENSOR_PD_POS 9
mbed_official 507:d4fc7603a669 128 #define MXC_F_PWRSEQ_REG1_PWR_TEMP_SENSOR_PD ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG1_PWR_TEMP_SENSOR_PD_POS))
mbed_official 507:d4fc7603a669 129 #define MXC_F_PWRSEQ_REG1_PWR_PD_VDDIO_POS 10
mbed_official 507:d4fc7603a669 130 #define MXC_F_PWRSEQ_REG1_PWR_PD_VDDIO ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG1_PWR_PD_VDDIO_POS))
mbed_official 507:d4fc7603a669 131 #define MXC_F_PWRSEQ_REG1_PWR_MAN_VDDIO_SW_POS 11
mbed_official 507:d4fc7603a669 132 #define MXC_F_PWRSEQ_REG1_PWR_MAN_VDDIO_SW ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG1_PWR_MAN_VDDIO_SW_POS))
mbed_official 507:d4fc7603a669 133 #define MXC_F_PWRSEQ_REG1_PWR_MAN_VDDIO_SW2_POS 12
mbed_official 507:d4fc7603a669 134 #define MXC_F_PWRSEQ_REG1_PWR_MAN_VDDIO_SW2 ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG1_PWR_MAN_VDDIO_SW2_POS))
mbed_official 507:d4fc7603a669 135 #define MXC_F_PWRSEQ_REG1_PWR_MAN_VDDIO_SW1_POS 13
mbed_official 507:d4fc7603a669 136 #define MXC_F_PWRSEQ_REG1_PWR_MAN_VDDIO_SW1 ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG1_PWR_MAN_VDDIO_SW1_POS))
mbed_official 507:d4fc7603a669 137 #define MXC_F_PWRSEQ_REG1_PWR_GPIO_FREEZE_POS 14
mbed_official 507:d4fc7603a669 138 #define MXC_F_PWRSEQ_REG1_PWR_GPIO_FREEZE ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG1_PWR_GPIO_FREEZE_POS))
mbed_official 507:d4fc7603a669 139
mbed_official 507:d4fc7603a669 140 #define MXC_F_PWRSEQ_REG2_PWR_RST3_POS 0
mbed_official 507:d4fc7603a669 141 #define MXC_F_PWRSEQ_REG2_PWR_RST3 ((uint32_t)(0x0000001FUL << MXC_F_PWRSEQ_REG2_PWR_RST3_POS))
mbed_official 507:d4fc7603a669 142 #define MXC_F_PWRSEQ_REG2_PWR_W3_POS 5
mbed_official 507:d4fc7603a669 143 #define MXC_F_PWRSEQ_REG2_PWR_W3 ((uint32_t)(0x0000001FUL << MXC_F_PWRSEQ_REG2_PWR_W3_POS))
mbed_official 507:d4fc7603a669 144 #define MXC_F_PWRSEQ_REG2_PWR_W1_POS 10
mbed_official 507:d4fc7603a669 145 #define MXC_F_PWRSEQ_REG2_PWR_W1 ((uint32_t)(0x0000001FUL << MXC_F_PWRSEQ_REG2_PWR_W1_POS))
mbed_official 507:d4fc7603a669 146 #define MXC_F_PWRSEQ_REG2_PWR_W1_LOW_POS 15
mbed_official 507:d4fc7603a669 147 #define MXC_F_PWRSEQ_REG2_PWR_W1_LOW ((uint32_t)(0x0000001FUL << MXC_F_PWRSEQ_REG2_PWR_W1_LOW_POS))
mbed_official 507:d4fc7603a669 148 #define MXC_F_PWRSEQ_REG2_PWR_WRTC_POS 20
mbed_official 507:d4fc7603a669 149 #define MXC_F_PWRSEQ_REG2_PWR_WRTC ((uint32_t)(0x0000001FUL << MXC_F_PWRSEQ_REG2_PWR_WRTC_POS))
mbed_official 507:d4fc7603a669 150 #define MXC_F_PWRSEQ_REG2_PWR_WVDDA3_POS 25
mbed_official 507:d4fc7603a669 151 #define MXC_F_PWRSEQ_REG2_PWR_WVDDA3 ((uint32_t)(0x0000003FUL << MXC_F_PWRSEQ_REG2_PWR_WVDDA3_POS))
mbed_official 507:d4fc7603a669 152
mbed_official 507:d4fc7603a669 153 #define MXC_F_PWRSEQ_REG3_PWR_ROSEL_POS 0
mbed_official 507:d4fc7603a669 154 #define MXC_F_PWRSEQ_REG3_PWR_ROSEL ((uint32_t)(0x00000007UL << MXC_F_PWRSEQ_REG3_PWR_ROSEL_POS))
mbed_official 507:d4fc7603a669 155 #define MXC_F_PWRSEQ_REG3_PWR_ROSEL_QUICK_POS 3
mbed_official 507:d4fc7603a669 156 #define MXC_F_PWRSEQ_REG3_PWR_ROSEL_QUICK ((uint32_t)(0x00000003UL << MXC_F_PWRSEQ_REG3_PWR_ROSEL_QUICK_POS))
mbed_official 507:d4fc7603a669 157 #define MXC_F_PWRSEQ_REG3_PWR_SVMSEL_POS 5
mbed_official 507:d4fc7603a669 158 #define MXC_F_PWRSEQ_REG3_PWR_SVMSEL ((uint32_t)(0x00000007UL << MXC_F_PWRSEQ_REG3_PWR_SVMSEL_POS))
mbed_official 507:d4fc7603a669 159 #define MXC_F_PWRSEQ_REG3_PWR_PWRFLTRSVMSELO_POS 8
mbed_official 507:d4fc7603a669 160 #define MXC_F_PWRSEQ_REG3_PWR_PWRFLTRSVMSELO ((uint32_t)(0x00000003UL << MXC_F_PWRSEQ_REG3_PWR_PWRFLTRSVMSELO_POS))
mbed_official 507:d4fc7603a669 161 #define MXC_F_PWRSEQ_REG3_PWR_PWRFLTRROSEL_POS 10
mbed_official 507:d4fc7603a669 162 #define MXC_F_PWRSEQ_REG3_PWR_PWRFLTRROSEL ((uint32_t)(0x00000007UL << MXC_F_PWRSEQ_REG3_PWR_PWRFLTRROSEL_POS))
mbed_official 507:d4fc7603a669 163 #define MXC_F_PWRSEQ_REG3_PWR_SVM_CLK_MUX_POS 13
mbed_official 507:d4fc7603a669 164 #define MXC_F_PWRSEQ_REG3_PWR_SVM_CLK_MUX ((uint32_t)(0x00000003UL << MXC_F_PWRSEQ_REG3_PWR_SVM_CLK_MUX_POS))
mbed_official 507:d4fc7603a669 165 #define MXC_F_PWRSEQ_REG3_PWR_RO_CLK_MUX_POS 15
mbed_official 507:d4fc7603a669 166 #define MXC_F_PWRSEQ_REG3_PWR_RO_CLK_MUX ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG3_PWR_RO_CLK_MUX_POS))
mbed_official 507:d4fc7603a669 167 #define MXC_F_PWRSEQ_REG3_PWR_QUICK_CNT_POS 16
mbed_official 507:d4fc7603a669 168 #define MXC_F_PWRSEQ_REG3_PWR_QUICK_CNT ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG3_PWR_QUICK_CNT_POS))
mbed_official 507:d4fc7603a669 169 #define MXC_F_PWRSEQ_REG3_PWR_BO_TC_POS 17
mbed_official 507:d4fc7603a669 170 #define MXC_F_PWRSEQ_REG3_PWR_BO_TC ((uint32_t)(0x00000003UL << MXC_F_PWRSEQ_REG3_PWR_BO_TC_POS))
mbed_official 507:d4fc7603a669 171
mbed_official 507:d4fc7603a669 172 #define MXC_F_PWRSEQ_REG4_PWR_TM_PS_2_GPIO_POS 0
mbed_official 507:d4fc7603a669 173 #define MXC_F_PWRSEQ_REG4_PWR_TM_PS_2_GPIO ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG4_PWR_TM_PS_2_GPIO_POS))
mbed_official 507:d4fc7603a669 174 #define MXC_F_PWRSEQ_REG4_PWR_TM_FAST_TIMERS_POS 1
mbed_official 507:d4fc7603a669 175 #define MXC_F_PWRSEQ_REG4_PWR_TM_FAST_TIMERS ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG4_PWR_TM_FAST_TIMERS_POS))
mbed_official 507:d4fc7603a669 176 #define MXC_F_PWRSEQ_REG4_PWR_USB_PROT_TRIM_POS 2
mbed_official 507:d4fc7603a669 177 #define MXC_F_PWRSEQ_REG4_PWR_USB_PROT_TRIM ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG4_PWR_USB_PROT_TRIM_POS))
mbed_official 507:d4fc7603a669 178 #define MXC_F_PWRSEQ_REG4_PWR_USB_DIS_COMP_POS 3
mbed_official 507:d4fc7603a669 179 #define MXC_F_PWRSEQ_REG4_PWR_USB_DIS_COMP ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG4_PWR_USB_DIS_COMP_POS))
mbed_official 507:d4fc7603a669 180 #define MXC_F_PWRSEQ_REG4_PWR_USB_TO_VDD_FAST_POS 4
mbed_official 507:d4fc7603a669 181 #define MXC_F_PWRSEQ_REG4_PWR_USB_TO_VDD_FAST ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG4_PWR_USB_TO_VDD_FAST_POS))
mbed_official 507:d4fc7603a669 182 #define MXC_F_PWRSEQ_REG4_PWR_USB_LDO_OFF_POS 5
mbed_official 507:d4fc7603a669 183 #define MXC_F_PWRSEQ_REG4_PWR_USB_LDO_OFF ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG4_PWR_USB_LDO_OFF_POS))
mbed_official 507:d4fc7603a669 184 #define MXC_F_PWRSEQ_REG4_PWR_USB_FRC_VDD_POS 6
mbed_official 507:d4fc7603a669 185 #define MXC_F_PWRSEQ_REG4_PWR_USB_FRC_VDD ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_REG4_PWR_USB_FRC_VDD_POS))
mbed_official 507:d4fc7603a669 186
mbed_official 507:d4fc7603a669 187 #define MXC_F_PWRSEQ_REG5_PWR_TRIM_SVM_BG_POS 0
mbed_official 507:d4fc7603a669 188 #define MXC_F_PWRSEQ_REG5_PWR_TRIM_SVM_BG ((uint32_t)(0x0000003FUL << MXC_F_PWRSEQ_REG5_PWR_TRIM_SVM_BG_POS))
mbed_official 507:d4fc7603a669 189 #define MXC_F_PWRSEQ_REG5_PWR_TRIM_REG1P8_POS 6
mbed_official 507:d4fc7603a669 190 #define MXC_F_PWRSEQ_REG5_PWR_TRIM_REG1P8 ((uint32_t)(0x0000000FUL << MXC_F_PWRSEQ_REG5_PWR_TRIM_REG1P8_POS))
mbed_official 507:d4fc7603a669 191 #define MXC_F_PWRSEQ_REG5_PWR_TRIM_REG3P3_POS 10
mbed_official 507:d4fc7603a669 192 #define MXC_F_PWRSEQ_REG5_PWR_TRIM_REG3P3 ((uint32_t)(0x0000001FUL << MXC_F_PWRSEQ_REG5_PWR_TRIM_REG3P3_POS))
mbed_official 507:d4fc7603a669 193 #define MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF_POS 15
mbed_official 507:d4fc7603a669 194 #define MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF ((uint32_t)(0x0000007FUL << MXC_F_PWRSEQ_REG5_PWR_TRIM_OSC_VREF_POS))
mbed_official 507:d4fc7603a669 195
mbed_official 507:d4fc7603a669 196 #define MXC_F_PWRSEQ_REG6_PWR_TRIM_USB_BIAS_POS 0
mbed_official 507:d4fc7603a669 197 #define MXC_F_PWRSEQ_REG6_PWR_TRIM_USB_BIAS ((uint32_t)(0x00000007UL << MXC_F_PWRSEQ_REG6_PWR_TRIM_USB_BIAS_POS))
mbed_official 507:d4fc7603a669 198 #define MXC_F_PWRSEQ_REG6_PWR_TRIM_USB_PM_RES_POS 3
mbed_official 507:d4fc7603a669 199 #define MXC_F_PWRSEQ_REG6_PWR_TRIM_USB_PM_RES ((uint32_t)(0x0000000FUL << MXC_F_PWRSEQ_REG6_PWR_TRIM_USB_PM_RES_POS))
mbed_official 507:d4fc7603a669 200 #define MXC_F_PWRSEQ_REG6_PWR_TRIM_USB_DM_RES_POS 7
mbed_official 507:d4fc7603a669 201 #define MXC_F_PWRSEQ_REG6_PWR_TRIM_USB_DM_RES ((uint32_t)(0x0000000FUL << MXC_F_PWRSEQ_REG6_PWR_TRIM_USB_DM_RES_POS))
mbed_official 507:d4fc7603a669 202
mbed_official 507:d4fc7603a669 203 #define MXC_F_PWRSEQ_FLAGS_PWR_FIRST_BOOT_POS 0
mbed_official 507:d4fc7603a669 204 #define MXC_F_PWRSEQ_FLAGS_PWR_FIRST_BOOT ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_FIRST_BOOT_POS))
mbed_official 507:d4fc7603a669 205 #define MXC_F_PWRSEQ_FLAGS_PWR_SYS_REBOOT_POS 1
mbed_official 507:d4fc7603a669 206 #define MXC_F_PWRSEQ_FLAGS_PWR_SYS_REBOOT ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_SYS_REBOOT_POS))
mbed_official 507:d4fc7603a669 207 #define MXC_F_PWRSEQ_FLAGS_PWR_PRV_PWR_FAIL_POS 2
mbed_official 507:d4fc7603a669 208 #define MXC_F_PWRSEQ_FLAGS_PWR_PRV_PWR_FAIL ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_PRV_PWR_FAIL_POS))
mbed_official 507:d4fc7603a669 209 #define MXC_F_PWRSEQ_FLAGS_PWR_PRV_BOOT_FAIL_POS 3
mbed_official 507:d4fc7603a669 210 #define MXC_F_PWRSEQ_FLAGS_PWR_PRV_BOOT_FAIL ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_PRV_BOOT_FAIL_POS))
mbed_official 507:d4fc7603a669 211 #define MXC_F_PWRSEQ_FLAGS_PWR_COMP_WAKEUP_POS 4
mbed_official 507:d4fc7603a669 212 #define MXC_F_PWRSEQ_FLAGS_PWR_COMP_WAKEUP ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_COMP_WAKEUP_POS))
mbed_official 507:d4fc7603a669 213 #define MXC_F_PWRSEQ_FLAGS_PWR_IO_WAKEUP_POS 5
mbed_official 507:d4fc7603a669 214 #define MXC_F_PWRSEQ_FLAGS_PWR_IO_WAKEUP ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_IO_WAKEUP_POS))
mbed_official 507:d4fc7603a669 215 #define MXC_F_PWRSEQ_FLAGS_PWR_VDD3_RST_POS 6
mbed_official 507:d4fc7603a669 216 #define MXC_F_PWRSEQ_FLAGS_PWR_VDD3_RST ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_VDD3_RST_POS))
mbed_official 507:d4fc7603a669 217 #define MXC_F_PWRSEQ_FLAGS_PWR_VDD3_WARN_POS 7
mbed_official 507:d4fc7603a669 218 #define MXC_F_PWRSEQ_FLAGS_PWR_VDD3_WARN ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_VDD3_WARN_POS))
mbed_official 507:d4fc7603a669 219 #define MXC_F_PWRSEQ_FLAGS_PWR_VDD1_RST_POS 8
mbed_official 507:d4fc7603a669 220 #define MXC_F_PWRSEQ_FLAGS_PWR_VDD1_RST ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_VDD1_RST_POS))
mbed_official 507:d4fc7603a669 221 #define MXC_F_PWRSEQ_FLAGS_PWR_VDD1_LOW_RST_POS 9
mbed_official 507:d4fc7603a669 222 #define MXC_F_PWRSEQ_FLAGS_PWR_VDD1_LOW_RST ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_VDD1_LOW_RST_POS))
mbed_official 507:d4fc7603a669 223 #define MXC_F_PWRSEQ_FLAGS_PWR_VDD1_WARN_POS 10
mbed_official 507:d4fc7603a669 224 #define MXC_F_PWRSEQ_FLAGS_PWR_VDD1_WARN ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_VDD1_WARN_POS))
mbed_official 507:d4fc7603a669 225 #define MXC_F_PWRSEQ_FLAGS_PWR_VRTC_WARN_POS 11
mbed_official 507:d4fc7603a669 226 #define MXC_F_PWRSEQ_FLAGS_PWR_VRTC_WARN ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_VRTC_WARN_POS))
mbed_official 507:d4fc7603a669 227 #define MXC_F_PWRSEQ_FLAGS_PWR_POR3Z_FAIL_POS 12
mbed_official 507:d4fc7603a669 228 #define MXC_F_PWRSEQ_FLAGS_PWR_POR3Z_FAIL ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_POR3Z_FAIL_POS))
mbed_official 507:d4fc7603a669 229 #define MXC_F_PWRSEQ_FLAGS_RTC_CMPR0_POS 13
mbed_official 507:d4fc7603a669 230 #define MXC_F_PWRSEQ_FLAGS_RTC_CMPR0 ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_RTC_CMPR0_POS))
mbed_official 507:d4fc7603a669 231 #define MXC_F_PWRSEQ_FLAGS_RTC_CMPR1_POS 14
mbed_official 507:d4fc7603a669 232 #define MXC_F_PWRSEQ_FLAGS_RTC_CMPR1 ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_RTC_CMPR1_POS))
mbed_official 507:d4fc7603a669 233 #define MXC_F_PWRSEQ_FLAGS_RTC_PRESCALE_CMP_POS 15
mbed_official 507:d4fc7603a669 234 #define MXC_F_PWRSEQ_FLAGS_RTC_PRESCALE_CMP ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_RTC_PRESCALE_CMP_POS))
mbed_official 507:d4fc7603a669 235 #define MXC_F_PWRSEQ_FLAGS_RTC_ROLLOVER_POS 16
mbed_official 507:d4fc7603a669 236 #define MXC_F_PWRSEQ_FLAGS_RTC_ROLLOVER ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_RTC_ROLLOVER_POS))
mbed_official 507:d4fc7603a669 237 #define MXC_F_PWRSEQ_FLAGS_PWR_BROWNOUT_DET_POS 17
mbed_official 507:d4fc7603a669 238 #define MXC_F_PWRSEQ_FLAGS_PWR_BROWNOUT_DET ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_BROWNOUT_DET_POS))
mbed_official 507:d4fc7603a669 239 #define MXC_F_PWRSEQ_FLAGS_PWR_USB_PLUG_WAKEUP_POS 18
mbed_official 507:d4fc7603a669 240 #define MXC_F_PWRSEQ_FLAGS_PWR_USB_PLUG_WAKEUP ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_USB_PLUG_WAKEUP_POS))
mbed_official 507:d4fc7603a669 241 #define MXC_F_PWRSEQ_FLAGS_PWR_USB_REMOVE_WAKEUP_POS 19
mbed_official 507:d4fc7603a669 242 #define MXC_F_PWRSEQ_FLAGS_PWR_USB_REMOVE_WAKEUP ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_USB_REMOVE_WAKEUP_POS))
mbed_official 507:d4fc7603a669 243 #define MXC_F_PWRSEQ_FLAGS_PWR_VDD22_RST_POS 20
mbed_official 507:d4fc7603a669 244 #define MXC_F_PWRSEQ_FLAGS_PWR_VDD22_RST ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_VDD22_RST_POS))
mbed_official 507:d4fc7603a669 245 #define MXC_F_PWRSEQ_FLAGS_PWR_VDD195_RST_POS 21
mbed_official 507:d4fc7603a669 246 #define MXC_F_PWRSEQ_FLAGS_PWR_VDD195_RST ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_FLAGS_PWR_VDD195_RST_POS))
mbed_official 507:d4fc7603a669 247
mbed_official 507:d4fc7603a669 248 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_SYS_REBOOT_POS 1
mbed_official 507:d4fc7603a669 249 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_SYS_REBOOT ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_SYS_REBOOT_POS))
mbed_official 507:d4fc7603a669 250 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_PRV_PWR_FAIL_POS 2
mbed_official 507:d4fc7603a669 251 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_PRV_PWR_FAIL ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_PRV_PWR_FAIL_POS))
mbed_official 507:d4fc7603a669 252 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_PRV_BOOT_FAIL_POS 3
mbed_official 507:d4fc7603a669 253 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_PRV_BOOT_FAIL ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_PRV_BOOT_FAIL_POS))
mbed_official 507:d4fc7603a669 254 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_COMP_WAKEUP_POS 4
mbed_official 507:d4fc7603a669 255 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_COMP_WAKEUP ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_COMP_WAKEUP_POS))
mbed_official 507:d4fc7603a669 256 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_IO_WAKEUP_POS 5
mbed_official 507:d4fc7603a669 257 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_IO_WAKEUP ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_IO_WAKEUP_POS))
mbed_official 507:d4fc7603a669 258 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD3_RST_POS 6
mbed_official 507:d4fc7603a669 259 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD3_RST ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD3_RST_POS))
mbed_official 507:d4fc7603a669 260 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD3_WARN_POS 7
mbed_official 507:d4fc7603a669 261 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD3_WARN ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD3_WARN_POS))
mbed_official 507:d4fc7603a669 262 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD1_RST_POS 8
mbed_official 507:d4fc7603a669 263 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD1_RST ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD1_RST_POS))
mbed_official 507:d4fc7603a669 264 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD1_LOW_RST_POS 9
mbed_official 507:d4fc7603a669 265 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD1_LOW_RST ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD1_LOW_RST_POS))
mbed_official 507:d4fc7603a669 266 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD1_WARN_POS 10
mbed_official 507:d4fc7603a669 267 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD1_WARN ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD1_WARN_POS))
mbed_official 507:d4fc7603a669 268 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VRTC_WARN_POS 11
mbed_official 507:d4fc7603a669 269 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VRTC_WARN ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_VRTC_WARN_POS))
mbed_official 507:d4fc7603a669 270 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_POR3Z_FAIL_POS 12
mbed_official 507:d4fc7603a669 271 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_POR3Z_FAIL ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_POR3Z_FAIL_POS))
mbed_official 507:d4fc7603a669 272 #define MXC_F_PWRSEQ_MSK_FLAGS_RTC_CMPR0_POS 13
mbed_official 507:d4fc7603a669 273 #define MXC_F_PWRSEQ_MSK_FLAGS_RTC_CMPR0 ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_RTC_CMPR0_POS))
mbed_official 507:d4fc7603a669 274 #define MXC_F_PWRSEQ_MSK_FLAGS_RTC_CMPR1_POS 14
mbed_official 507:d4fc7603a669 275 #define MXC_F_PWRSEQ_MSK_FLAGS_RTC_CMPR1 ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_RTC_CMPR1_POS))
mbed_official 507:d4fc7603a669 276 #define MXC_F_PWRSEQ_MSK_FLAGS_RTC_PRESCALE_CMP_POS 15
mbed_official 507:d4fc7603a669 277 #define MXC_F_PWRSEQ_MSK_FLAGS_RTC_PRESCALE_CMP ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_RTC_PRESCALE_CMP_POS))
mbed_official 507:d4fc7603a669 278 #define MXC_F_PWRSEQ_MSK_FLAGS_RTC_ROLLOVER_POS 16
mbed_official 507:d4fc7603a669 279 #define MXC_F_PWRSEQ_MSK_FLAGS_RTC_ROLLOVER ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_RTC_ROLLOVER_POS))
mbed_official 507:d4fc7603a669 280 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_BROWNOUT_DET_POS 17
mbed_official 507:d4fc7603a669 281 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_BROWNOUT_DET ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_BROWNOUT_DET_POS))
mbed_official 507:d4fc7603a669 282 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_USB_PLUG_WAKEUP_POS 18
mbed_official 507:d4fc7603a669 283 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_USB_PLUG_WAKEUP ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_USB_PLUG_WAKEUP_POS))
mbed_official 507:d4fc7603a669 284 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_USB_REMOVE_WAKEUP_POS 19
mbed_official 507:d4fc7603a669 285 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_USB_REMOVE_WAKEUP ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_USB_REMOVE_WAKEUP_POS))
mbed_official 507:d4fc7603a669 286 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD22_RST_POS 20
mbed_official 507:d4fc7603a669 287 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD22_RST ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD22_RST_POS))
mbed_official 507:d4fc7603a669 288 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD195_RST_POS 21
mbed_official 507:d4fc7603a669 289 #define MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD195_RST ((uint32_t)(0x00000001UL << MXC_F_PWRSEQ_MSK_FLAGS_PWR_VDD195_RST_POS))
mbed_official 507:d4fc7603a669 290
mbed_official 507:d4fc7603a669 291 #ifdef __cplusplus
mbed_official 507:d4fc7603a669 292 }
mbed_official 507:d4fc7603a669 293 #endif
mbed_official 507:d4fc7603a669 294
mbed_official 507:d4fc7603a669 295 /**
mbed_official 507:d4fc7603a669 296 * @}
mbed_official 507:d4fc7603a669 297 */
mbed_official 507:d4fc7603a669 298
mbed_official 507:d4fc7603a669 299 #endif /* _MXC_PWRSEQ_REGS_H */