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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_Maxim/TARGET_MAX32610/pwrman_regs.h@600:7d17ca308cd1, 2015-07-31 (annotated)

Committer:
mbed_official
Date:
Fri Jul 31 14:15:09 2015 +0100
Revision:
600:7d17ca308cd1
Parent:
507:d4fc7603a669 
Synchronized with git revision e4cd8bbd3e05b68e5a7f466c74035a85743d45e0



Full URL: https://github.com/mbedmicro/mbed/commit/e4cd8bbd3e05b68e5a7f466c74035a85743d45e0/



Enable LPC8xx usart when configuring it

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 507:d4fc7603a669 1 /*******************************************************************************
mbed_official 507:d4fc7603a669 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
mbed_official 507:d4fc7603a669 3 *
mbed_official 507:d4fc7603a669 4 * Permission is hereby granted, free of charge, to any person obtaining a
mbed_official 507:d4fc7603a669 5 * copy of this software and associated documentation files (the "Software"),
mbed_official 507:d4fc7603a669 6 * to deal in the Software without restriction, including without limitation
mbed_official 507:d4fc7603a669 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
mbed_official 507:d4fc7603a669 8 * and/or sell copies of the Software, and to permit persons to whom the
mbed_official 507:d4fc7603a669 9 * Software is furnished to do so, subject to the following conditions:
mbed_official 507:d4fc7603a669 10 *
mbed_official 507:d4fc7603a669 11 * The above copyright notice and this permission notice shall be included
mbed_official 507:d4fc7603a669 12 * in all copies or substantial portions of the Software.
mbed_official 507:d4fc7603a669 13 *
mbed_official 507:d4fc7603a669 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
mbed_official 507:d4fc7603a669 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
mbed_official 507:d4fc7603a669 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
mbed_official 507:d4fc7603a669 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
mbed_official 507:d4fc7603a669 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
mbed_official 507:d4fc7603a669 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
mbed_official 507:d4fc7603a669 20 * OTHER DEALINGS IN THE SOFTWARE.
mbed_official 507:d4fc7603a669 21 *
mbed_official 507:d4fc7603a669 22 * Except as contained in this notice, the name of Maxim Integrated
mbed_official 507:d4fc7603a669 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
mbed_official 507:d4fc7603a669 24 * Products, Inc. Branding Policy.
mbed_official 507:d4fc7603a669 25 *
mbed_official 507:d4fc7603a669 26 * The mere transfer of this software does not imply any licenses
mbed_official 507:d4fc7603a669 27 * of trade secrets, proprietary technology, copyrights, patents,
mbed_official 507:d4fc7603a669 28 * trademarks, maskwork rights, or any other form of intellectual
mbed_official 507:d4fc7603a669 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
mbed_official 507:d4fc7603a669 30 * ownership rights.
mbed_official 507:d4fc7603a669 31 *******************************************************************************
mbed_official 507:d4fc7603a669 32 */
mbed_official 507:d4fc7603a669 33
mbed_official 507:d4fc7603a669 34 #ifndef _MXC_PWRMAN_REGS_H_
mbed_official 507:d4fc7603a669 35 #define _MXC_PWRMAN_REGS_H_
mbed_official 507:d4fc7603a669 36
mbed_official 507:d4fc7603a669 37 #ifdef __cplusplus
mbed_official 507:d4fc7603a669 38 extern "C" {
mbed_official 507:d4fc7603a669 39 #endif
mbed_official 507:d4fc7603a669 40
mbed_official 507:d4fc7603a669 41 #include <stdint.h>
mbed_official 507:d4fc7603a669 42
mbed_official 507:d4fc7603a669 43 /**
mbed_official 507:d4fc7603a669 44 * @file pwrman_regs.h
mbed_official 507:d4fc7603a669 45 * @addtogroup pwrman PWRMAN
mbed_official 507:d4fc7603a669 46 * @{
mbed_official 507:d4fc7603a669 47 */
mbed_official 507:d4fc7603a669 48
mbed_official 507:d4fc7603a669 49 /**
mbed_official 507:d4fc7603a669 50 * @brief Defines PAD Modes for Wake Up Detection.
mbed_official 507:d4fc7603a669 51 */
mbed_official 507:d4fc7603a669 52 typedef enum {
mbed_official 507:d4fc7603a669 53 /** WUD Mode for Selected PAD = Clear/Activate */
mbed_official 507:d4fc7603a669 54 MXC_E_PWRMAN_PAD_MODE_CLEAR_SET,
mbed_official 507:d4fc7603a669 55 /** WUD Mode for Selected PAD = Set WUD Act Hi/Set WUD Act Lo */
mbed_official 507:d4fc7603a669 56 MXC_E_PWRMAN_PAD_MODE_ACT_HI_LO,
mbed_official 507:d4fc7603a669 57 /** WUD Mode for Selected PAD = Set Weak Hi/ Set Weak Lo */
mbed_official 507:d4fc7603a669 58 MXC_E_PWRMAN_PAD_MODE_WEAK_HI_LO,
mbed_official 507:d4fc7603a669 59 /** WUD Mode for Selected PAD = No pad state change */
mbed_official 507:d4fc7603a669 60 MXC_E_PWRMAN_PAD_MODE_NONE
mbed_official 507:d4fc7603a669 61 } mxc_pwrman_pad_mode_t;
mbed_official 507:d4fc7603a669 62
mbed_official 507:d4fc7603a669 63 /* Offset Register Description
mbed_official 507:d4fc7603a669 64 ====== =========================================== */
mbed_official 507:d4fc7603a669 65 typedef struct {
mbed_official 507:d4fc7603a669 66 __IO uint32_t pwr_rst_ctrl; /* 0x0000 Power Reset Control and Status */
mbed_official 507:d4fc7603a669 67 __IO uint32_t intfl; /* 0x0004 Interrupt Flags */
mbed_official 507:d4fc7603a669 68 __IO uint32_t inten; /* 0x0008 Interrupt Enable/Disable Controls */
mbed_official 507:d4fc7603a669 69 __IO uint32_t svm_events; /* 0x000C SVM Event Status Flags (read-only) */
mbed_official 507:d4fc7603a669 70 __IO uint32_t wud_ctrl; /* 0x0010 Wake-Up Detect Control */
mbed_official 507:d4fc7603a669 71 __IO uint32_t wud_pulse0; /* 0x0014 WUD Pulse To Mode Bit 0 */
mbed_official 507:d4fc7603a669 72 __IO uint32_t wud_pulse1; /* 0x0018 WUD Pulse To Mode Bit 1 */
mbed_official 507:d4fc7603a669 73 __I uint32_t rsv001C[5]; /* 0x001C */
mbed_official 507:d4fc7603a669 74
mbed_official 507:d4fc7603a669 75 __IO uint32_t wud_seen0; /* 0x0030 Wake-up Detect Status for P0/P1/P2/P3 */
mbed_official 507:d4fc7603a669 76 __IO uint32_t wud_seen1; /* 0x0034 Wake-up Detect Status for P4/P5/P6/P7 */
mbed_official 507:d4fc7603a669 77 __IO uint32_t die_type; /* 0x0038 Die ID Register (Device Type) */
mbed_official 507:d4fc7603a669 78 __IO uint32_t base_part_num; /* 0x003C Base Part Number */
mbed_official 507:d4fc7603a669 79 __IO uint32_t mask_id0; /* 0x0040 Mask ID Register 0 */
mbed_official 507:d4fc7603a669 80 __IO uint32_t mask_id1; /* 0x0044 Mask ID Register 1 */
mbed_official 507:d4fc7603a669 81 __IO uint32_t peripheral_reset; /* 0x0048 Peripheral Reset Control Register */
mbed_official 507:d4fc7603a669 82 } mxc_pwrman_regs_t;
mbed_official 507:d4fc7603a669 83
mbed_official 507:d4fc7603a669 84 /*
mbed_official 507:d4fc7603a669 85 Register offsets for module PWRMAN.
mbed_official 507:d4fc7603a669 86 */
mbed_official 507:d4fc7603a669 87 #define MXC_R_PWRMAN_OFFS_PWR_RST_CTRL ((uint32_t)0x00000000UL)
mbed_official 507:d4fc7603a669 88 #define MXC_R_PWRMAN_OFFS_INTFL ((uint32_t)0x00000004UL)
mbed_official 507:d4fc7603a669 89 #define MXC_R_PWRMAN_OFFS_INTEN ((uint32_t)0x00000008UL)
mbed_official 507:d4fc7603a669 90 #define MXC_R_PWRMAN_OFFS_SVM_EVENTS ((uint32_t)0x0000000CUL)
mbed_official 507:d4fc7603a669 91 #define MXC_R_PWRMAN_OFFS_WUD_CTRL ((uint32_t)0x00000010UL)
mbed_official 507:d4fc7603a669 92 #define MXC_R_PWRMAN_OFFS_WUD_PULSE0 ((uint32_t)0x00000014UL)
mbed_official 507:d4fc7603a669 93 #define MXC_R_PWRMAN_OFFS_WUD_PULSE1 ((uint32_t)0x00000018UL)
mbed_official 507:d4fc7603a669 94 #define MXC_R_PWRMAN_OFFS_WUD_SEEN0 ((uint32_t)0x00000030UL)
mbed_official 507:d4fc7603a669 95 #define MXC_R_PWRMAN_OFFS_WUD_SEEN1 ((uint32_t)0x00000034UL)
mbed_official 507:d4fc7603a669 96 #define MXC_R_PWRMAN_OFFS_DIE_TYPE ((uint32_t)0x00000038UL)
mbed_official 507:d4fc7603a669 97 #define MXC_R_PWRMAN_OFFS_BASE_PART_NUM ((uint32_t)0x0000003CUL)
mbed_official 507:d4fc7603a669 98 #define MXC_R_PWRMAN_OFFS_MASK_ID0 ((uint32_t)0x00000040UL)
mbed_official 507:d4fc7603a669 99 #define MXC_R_PWRMAN_OFFS_MASK_ID1 ((uint32_t)0x00000044UL)
mbed_official 507:d4fc7603a669 100 #define MXC_R_PWRMAN_OFFS_PERIPHERAL_RESET ((uint32_t)0x00000048UL)
mbed_official 507:d4fc7603a669 101
mbed_official 507:d4fc7603a669 102 /*
mbed_official 507:d4fc7603a669 103 Field positions and masks for module PWRMAN.
mbed_official 507:d4fc7603a669 104 */
mbed_official 507:d4fc7603a669 105 #define MXC_F_PWRMAN_PWR_RST_CTRL_FLASH_ACTIVE_POS 0
mbed_official 507:d4fc7603a669 106 #define MXC_F_PWRMAN_PWR_RST_CTRL_FLASH_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_FLASH_ACTIVE_POS))
mbed_official 507:d4fc7603a669 107 #define MXC_F_PWRMAN_PWR_RST_CTRL_SRAM_ACTIVE_POS 1
mbed_official 507:d4fc7603a669 108 #define MXC_F_PWRMAN_PWR_RST_CTRL_SRAM_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_SRAM_ACTIVE_POS))
mbed_official 507:d4fc7603a669 109 #define MXC_F_PWRMAN_PWR_RST_CTRL_AFE_POWERED_POS 2
mbed_official 507:d4fc7603a669 110 #define MXC_F_PWRMAN_PWR_RST_CTRL_AFE_POWERED ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_AFE_POWERED_POS))
mbed_official 507:d4fc7603a669 111 #define MXC_F_PWRMAN_PWR_RST_CTRL_IO_ACTIVE_POS 3
mbed_official 507:d4fc7603a669 112 #define MXC_F_PWRMAN_PWR_RST_CTRL_IO_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_IO_ACTIVE_POS))
mbed_official 507:d4fc7603a669 113 #define MXC_F_PWRMAN_PWR_RST_CTRL_USB_POWERED_POS 4
mbed_official 507:d4fc7603a669 114 #define MXC_F_PWRMAN_PWR_RST_CTRL_USB_POWERED ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_USB_POWERED_POS))
mbed_official 507:d4fc7603a669 115 #define MXC_F_PWRMAN_PWR_RST_CTRL_PULLUPS_ENABLED_POS 5
mbed_official 507:d4fc7603a669 116 #define MXC_F_PWRMAN_PWR_RST_CTRL_PULLUPS_ENABLED ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_PULLUPS_ENABLED_POS))
mbed_official 507:d4fc7603a669 117 #define MXC_F_PWRMAN_PWR_RST_CTRL_FIRMWARE_RESET_POS 8
mbed_official 507:d4fc7603a669 118 #define MXC_F_PWRMAN_PWR_RST_CTRL_FIRMWARE_RESET ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_FIRMWARE_RESET_POS))
mbed_official 507:d4fc7603a669 119 #define MXC_F_PWRMAN_PWR_RST_CTRL_ARM_LOCKUP_RESET_POS 9
mbed_official 507:d4fc7603a669 120 #define MXC_F_PWRMAN_PWR_RST_CTRL_ARM_LOCKUP_RESET ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_ARM_LOCKUP_RESET_POS))
mbed_official 507:d4fc7603a669 121 #define MXC_F_PWRMAN_PWR_RST_CTRL_WUD_CLEAR_POS 12
mbed_official 507:d4fc7603a669 122 #define MXC_F_PWRMAN_PWR_RST_CTRL_WUD_CLEAR ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_WUD_CLEAR_POS))
mbed_official 507:d4fc7603a669 123 #define MXC_F_PWRMAN_PWR_RST_CTRL_TAMPER_DETECT_POS 16
mbed_official 507:d4fc7603a669 124 #define MXC_F_PWRMAN_PWR_RST_CTRL_TAMPER_DETECT ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_TAMPER_DETECT_POS))
mbed_official 507:d4fc7603a669 125 #define MXC_F_PWRMAN_PWR_RST_CTRL_FW_COMMAND_SYSMAN_POS 17
mbed_official 507:d4fc7603a669 126 #define MXC_F_PWRMAN_PWR_RST_CTRL_FW_COMMAND_SYSMAN ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_FW_COMMAND_SYSMAN_POS))
mbed_official 507:d4fc7603a669 127 #define MXC_F_PWRMAN_PWR_RST_CTRL_WATCHDOG_TIMEOUT_POS 18
mbed_official 507:d4fc7603a669 128 #define MXC_F_PWRMAN_PWR_RST_CTRL_WATCHDOG_TIMEOUT ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_WATCHDOG_TIMEOUT_POS))
mbed_official 507:d4fc7603a669 129 #define MXC_F_PWRMAN_PWR_RST_CTRL_FW_COMMAND_ARM_POS 19
mbed_official 507:d4fc7603a669 130 #define MXC_F_PWRMAN_PWR_RST_CTRL_FW_COMMAND_ARM ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_FW_COMMAND_ARM_POS))
mbed_official 507:d4fc7603a669 131 #define MXC_F_PWRMAN_PWR_RST_CTRL_ARM_LOCKUP_POS 20
mbed_official 507:d4fc7603a669 132 #define MXC_F_PWRMAN_PWR_RST_CTRL_ARM_LOCKUP ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_ARM_LOCKUP_POS))
mbed_official 507:d4fc7603a669 133 #define MXC_F_PWRMAN_PWR_RST_CTRL_SRSTN_ASSERTION_POS 21
mbed_official 507:d4fc7603a669 134 #define MXC_F_PWRMAN_PWR_RST_CTRL_SRSTN_ASSERTION ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_SRSTN_ASSERTION_POS))
mbed_official 507:d4fc7603a669 135 #define MXC_F_PWRMAN_PWR_RST_CTRL_POR_POS 22
mbed_official 507:d4fc7603a669 136 #define MXC_F_PWRMAN_PWR_RST_CTRL_POR ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_POR_POS))
mbed_official 507:d4fc7603a669 137 #define MXC_F_PWRMAN_PWR_RST_CTRL_LOW_POWER_MODE_POS 31
mbed_official 507:d4fc7603a669 138 #define MXC_F_PWRMAN_PWR_RST_CTRL_LOW_POWER_MODE ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PWR_RST_CTRL_LOW_POWER_MODE_POS))
mbed_official 507:d4fc7603a669 139
mbed_official 507:d4fc7603a669 140 #define MXC_F_PWRMAN_INTFL_V1_8_WARNING_POS 0
mbed_official 507:d4fc7603a669 141 #define MXC_F_PWRMAN_INTFL_V1_8_WARNING ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_INTFL_V1_8_WARNING_POS))
mbed_official 507:d4fc7603a669 142 #define MXC_F_PWRMAN_INTFL_V3_3_WARNING_POS 1
mbed_official 507:d4fc7603a669 143 #define MXC_F_PWRMAN_INTFL_V3_3_WARNING ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_INTFL_V3_3_WARNING_POS))
mbed_official 507:d4fc7603a669 144 #define MXC_F_PWRMAN_INTFL_RTC_WARNING_POS 2
mbed_official 507:d4fc7603a669 145 #define MXC_F_PWRMAN_INTFL_RTC_WARNING ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_INTFL_RTC_WARNING_POS))
mbed_official 507:d4fc7603a669 146 #define MXC_F_PWRMAN_INTFL_V3_3_RESET_POS 3
mbed_official 507:d4fc7603a669 147 #define MXC_F_PWRMAN_INTFL_V3_3_RESET ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_INTFL_V3_3_RESET_POS))
mbed_official 507:d4fc7603a669 148 #define MXC_F_PWRMAN_INTFL_VDDA_WARNING_POS 4
mbed_official 507:d4fc7603a669 149 #define MXC_F_PWRMAN_INTFL_VDDA_WARNING ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_INTFL_VDDA_WARNING_POS))
mbed_official 507:d4fc7603a669 150
mbed_official 507:d4fc7603a669 151 #define MXC_F_PWRMAN_INTEN_V1_8_WARNING_POS 0
mbed_official 507:d4fc7603a669 152 #define MXC_F_PWRMAN_INTEN_V1_8_WARNING ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_INTEN_V1_8_WARNING_POS))
mbed_official 507:d4fc7603a669 153 #define MXC_F_PWRMAN_INTEN_V3_3_WARNING_POS 1
mbed_official 507:d4fc7603a669 154 #define MXC_F_PWRMAN_INTEN_V3_3_WARNING ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_INTEN_V3_3_WARNING_POS))
mbed_official 507:d4fc7603a669 155 #define MXC_F_PWRMAN_INTEN_RTC_WARNING_POS 2
mbed_official 507:d4fc7603a669 156 #define MXC_F_PWRMAN_INTEN_RTC_WARNING ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_INTEN_RTC_WARNING_POS))
mbed_official 507:d4fc7603a669 157 #define MXC_F_PWRMAN_INTEN_V3_3_RESET_POS 3
mbed_official 507:d4fc7603a669 158 #define MXC_F_PWRMAN_INTEN_V3_3_RESET ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_INTEN_V3_3_RESET_POS))
mbed_official 507:d4fc7603a669 159 #define MXC_F_PWRMAN_INTEN_VDDA_WARNING_POS 4
mbed_official 507:d4fc7603a669 160 #define MXC_F_PWRMAN_INTEN_VDDA_WARNING ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_INTEN_VDDA_WARNING_POS))
mbed_official 507:d4fc7603a669 161
mbed_official 507:d4fc7603a669 162 #define MXC_F_PWRMAN_SVM_EVENTS_V1_8_WARNING_POS 0
mbed_official 507:d4fc7603a669 163 #define MXC_F_PWRMAN_SVM_EVENTS_V1_8_WARNING ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_SVM_EVENTS_V1_8_WARNING_POS))
mbed_official 507:d4fc7603a669 164 #define MXC_F_PWRMAN_SVM_EVENTS_V3_3_WARNING_POS 1
mbed_official 507:d4fc7603a669 165 #define MXC_F_PWRMAN_SVM_EVENTS_V3_3_WARNING ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_SVM_EVENTS_V3_3_WARNING_POS))
mbed_official 507:d4fc7603a669 166 #define MXC_F_PWRMAN_SVM_EVENTS_RTC_WARNING_POS 2
mbed_official 507:d4fc7603a669 167 #define MXC_F_PWRMAN_SVM_EVENTS_RTC_WARNING ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_SVM_EVENTS_RTC_WARNING_POS))
mbed_official 507:d4fc7603a669 168 #define MXC_F_PWRMAN_SVM_EVENTS_V3_3_RESET_POS 3
mbed_official 507:d4fc7603a669 169 #define MXC_F_PWRMAN_SVM_EVENTS_V3_3_RESET ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_SVM_EVENTS_V3_3_RESET_POS))
mbed_official 507:d4fc7603a669 170 #define MXC_F_PWRMAN_SVM_EVENTS_VDDA_WARNING_POS 4
mbed_official 507:d4fc7603a669 171 #define MXC_F_PWRMAN_SVM_EVENTS_VDDA_WARNING ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_SVM_EVENTS_VDDA_WARNING_POS))
mbed_official 507:d4fc7603a669 172
mbed_official 507:d4fc7603a669 173 #define MXC_F_PWRMAN_WUD_CTRL_PAD_SELECT_POS 0
mbed_official 507:d4fc7603a669 174 #define MXC_F_PWRMAN_WUD_CTRL_PAD_SELECT ((uint32_t)(0x0000003FUL << MXC_F_PWRMAN_WUD_CTRL_PAD_SELECT_POS))
mbed_official 507:d4fc7603a669 175 #define MXC_F_PWRMAN_WUD_CTRL_PAD_MODE_POS 8
mbed_official 507:d4fc7603a669 176 #define MXC_F_PWRMAN_WUD_CTRL_PAD_MODE ((uint32_t)(0x00000003UL << MXC_F_PWRMAN_WUD_CTRL_PAD_MODE_POS))
mbed_official 507:d4fc7603a669 177 #define MXC_F_PWRMAN_WUD_CTRL_CLEAR_ALL_POS 12
mbed_official 507:d4fc7603a669 178 #define MXC_F_PWRMAN_WUD_CTRL_CLEAR_ALL ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_CTRL_CLEAR_ALL_POS))
mbed_official 507:d4fc7603a669 179
mbed_official 507:d4fc7603a669 180 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO0_POS 0
mbed_official 507:d4fc7603a669 181 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO0 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO0_POS))
mbed_official 507:d4fc7603a669 182 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO1_POS 1
mbed_official 507:d4fc7603a669 183 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO1 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO1_POS))
mbed_official 507:d4fc7603a669 184 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO2_POS 2
mbed_official 507:d4fc7603a669 185 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO2 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO2_POS))
mbed_official 507:d4fc7603a669 186 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO3_POS 3
mbed_official 507:d4fc7603a669 187 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO3 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO3_POS))
mbed_official 507:d4fc7603a669 188 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO4_POS 4
mbed_official 507:d4fc7603a669 189 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO4 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO4_POS))
mbed_official 507:d4fc7603a669 190 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO5_POS 5
mbed_official 507:d4fc7603a669 191 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO5 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO5_POS))
mbed_official 507:d4fc7603a669 192 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO6_POS 6
mbed_official 507:d4fc7603a669 193 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO6 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO6_POS))
mbed_official 507:d4fc7603a669 194 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO7_POS 7
mbed_official 507:d4fc7603a669 195 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO7 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO7_POS))
mbed_official 507:d4fc7603a669 196 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO8_POS 8
mbed_official 507:d4fc7603a669 197 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO8 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO8_POS))
mbed_official 507:d4fc7603a669 198 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO9_POS 9
mbed_official 507:d4fc7603a669 199 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO9 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO9_POS))
mbed_official 507:d4fc7603a669 200 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO10_POS 10
mbed_official 507:d4fc7603a669 201 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO10 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO10_POS))
mbed_official 507:d4fc7603a669 202 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO11_POS 11
mbed_official 507:d4fc7603a669 203 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO11 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO11_POS))
mbed_official 507:d4fc7603a669 204 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO12_POS 12
mbed_official 507:d4fc7603a669 205 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO12 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO12_POS))
mbed_official 507:d4fc7603a669 206 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO13_POS 13
mbed_official 507:d4fc7603a669 207 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO13 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO13_POS))
mbed_official 507:d4fc7603a669 208 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO14_POS 14
mbed_official 507:d4fc7603a669 209 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO14 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO14_POS))
mbed_official 507:d4fc7603a669 210 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO15_POS 15
mbed_official 507:d4fc7603a669 211 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO15 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO15_POS))
mbed_official 507:d4fc7603a669 212 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO16_POS 16
mbed_official 507:d4fc7603a669 213 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO16 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO16_POS))
mbed_official 507:d4fc7603a669 214 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO17_POS 17
mbed_official 507:d4fc7603a669 215 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO17 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO17_POS))
mbed_official 507:d4fc7603a669 216 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO18_POS 18
mbed_official 507:d4fc7603a669 217 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO18 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO18_POS))
mbed_official 507:d4fc7603a669 218 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO19_POS 19
mbed_official 507:d4fc7603a669 219 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO19 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO19_POS))
mbed_official 507:d4fc7603a669 220 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO20_POS 20
mbed_official 507:d4fc7603a669 221 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO20 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO20_POS))
mbed_official 507:d4fc7603a669 222 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO21_POS 21
mbed_official 507:d4fc7603a669 223 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO21 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO21_POS))
mbed_official 507:d4fc7603a669 224 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO22_POS 22
mbed_official 507:d4fc7603a669 225 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO22 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO22_POS))
mbed_official 507:d4fc7603a669 226 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO23_POS 23
mbed_official 507:d4fc7603a669 227 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO23 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO23_POS))
mbed_official 507:d4fc7603a669 228 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO24_POS 24
mbed_official 507:d4fc7603a669 229 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO24 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO24_POS))
mbed_official 507:d4fc7603a669 230 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO25_POS 25
mbed_official 507:d4fc7603a669 231 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO25 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO25_POS))
mbed_official 507:d4fc7603a669 232 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO26_POS 26
mbed_official 507:d4fc7603a669 233 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO26 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO26_POS))
mbed_official 507:d4fc7603a669 234 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO27_POS 27
mbed_official 507:d4fc7603a669 235 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO27 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO27_POS))
mbed_official 507:d4fc7603a669 236 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO28_POS 28
mbed_official 507:d4fc7603a669 237 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO28 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO28_POS))
mbed_official 507:d4fc7603a669 238 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO29_POS 29
mbed_official 507:d4fc7603a669 239 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO29 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO29_POS))
mbed_official 507:d4fc7603a669 240 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO30_POS 30
mbed_official 507:d4fc7603a669 241 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO30 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO30_POS))
mbed_official 507:d4fc7603a669 242 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO31_POS 31
mbed_official 507:d4fc7603a669 243 #define MXC_F_PWRMAN_WUD_SEEN0_GPIO31 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN0_GPIO31_POS))
mbed_official 507:d4fc7603a669 244
mbed_official 507:d4fc7603a669 245 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO32_POS 0
mbed_official 507:d4fc7603a669 246 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO32 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO32_POS))
mbed_official 507:d4fc7603a669 247 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO33_POS 1
mbed_official 507:d4fc7603a669 248 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO33 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO33_POS))
mbed_official 507:d4fc7603a669 249 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO34_POS 2
mbed_official 507:d4fc7603a669 250 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO34 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO34_POS))
mbed_official 507:d4fc7603a669 251 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO35_POS 3
mbed_official 507:d4fc7603a669 252 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO35 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO35_POS))
mbed_official 507:d4fc7603a669 253 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO36_POS 4
mbed_official 507:d4fc7603a669 254 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO36 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO36_POS))
mbed_official 507:d4fc7603a669 255 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO37_POS 5
mbed_official 507:d4fc7603a669 256 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO37 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO37_POS))
mbed_official 507:d4fc7603a669 257 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO38_POS 6
mbed_official 507:d4fc7603a669 258 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO38 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO38_POS))
mbed_official 507:d4fc7603a669 259 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO39_POS 7
mbed_official 507:d4fc7603a669 260 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO39 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO39_POS))
mbed_official 507:d4fc7603a669 261 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO40_POS 8
mbed_official 507:d4fc7603a669 262 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO40 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO40_POS))
mbed_official 507:d4fc7603a669 263 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO41_POS 9
mbed_official 507:d4fc7603a669 264 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO41 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO41_POS))
mbed_official 507:d4fc7603a669 265 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO42_POS 10
mbed_official 507:d4fc7603a669 266 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO42 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO42_POS))
mbed_official 507:d4fc7603a669 267 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO43_POS 11
mbed_official 507:d4fc7603a669 268 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO43 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO43_POS))
mbed_official 507:d4fc7603a669 269 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO44_POS 12
mbed_official 507:d4fc7603a669 270 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO44 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO44_POS))
mbed_official 507:d4fc7603a669 271 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO45_POS 13
mbed_official 507:d4fc7603a669 272 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO45 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO45_POS))
mbed_official 507:d4fc7603a669 273 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO46_POS 14
mbed_official 507:d4fc7603a669 274 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO46 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO46_POS))
mbed_official 507:d4fc7603a669 275 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO47_POS 15
mbed_official 507:d4fc7603a669 276 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO47 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO47_POS))
mbed_official 507:d4fc7603a669 277 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO48_POS 16
mbed_official 507:d4fc7603a669 278 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO48 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO48_POS))
mbed_official 507:d4fc7603a669 279 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO49_POS 17
mbed_official 507:d4fc7603a669 280 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO49 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO49_POS))
mbed_official 507:d4fc7603a669 281 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO50_POS 18
mbed_official 507:d4fc7603a669 282 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO50 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO50_POS))
mbed_official 507:d4fc7603a669 283 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO51_POS 19
mbed_official 507:d4fc7603a669 284 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO51 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO51_POS))
mbed_official 507:d4fc7603a669 285 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO52_POS 20
mbed_official 507:d4fc7603a669 286 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO52 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO52_POS))
mbed_official 507:d4fc7603a669 287 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO53_POS 21
mbed_official 507:d4fc7603a669 288 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO53 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO53_POS))
mbed_official 507:d4fc7603a669 289 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO54_POS 22
mbed_official 507:d4fc7603a669 290 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO54 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO54_POS))
mbed_official 507:d4fc7603a669 291 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO55_POS 23
mbed_official 507:d4fc7603a669 292 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO55 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO55_POS))
mbed_official 507:d4fc7603a669 293 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO56_POS 24
mbed_official 507:d4fc7603a669 294 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO56 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO56_POS))
mbed_official 507:d4fc7603a669 295 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO57_POS 25
mbed_official 507:d4fc7603a669 296 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO57 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO57_POS))
mbed_official 507:d4fc7603a669 297 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO58_POS 26
mbed_official 507:d4fc7603a669 298 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO58 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO58_POS))
mbed_official 507:d4fc7603a669 299 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO59_POS 27
mbed_official 507:d4fc7603a669 300 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO59 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO59_POS))
mbed_official 507:d4fc7603a669 301 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO60_POS 28
mbed_official 507:d4fc7603a669 302 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO60 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO60_POS))
mbed_official 507:d4fc7603a669 303 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO61_POS 29
mbed_official 507:d4fc7603a669 304 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO61 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO61_POS))
mbed_official 507:d4fc7603a669 305 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO62_POS 30
mbed_official 507:d4fc7603a669 306 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO62 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO62_POS))
mbed_official 507:d4fc7603a669 307 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO63_POS 31
mbed_official 507:d4fc7603a669 308 #define MXC_F_PWRMAN_WUD_SEEN1_GPIO63 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_WUD_SEEN1_GPIO63_POS))
mbed_official 507:d4fc7603a669 309
mbed_official 507:d4fc7603a669 310 #define MXC_F_PWRMAN_BASE_PART_NUM_BASE_PART_NUMBER_POS 0
mbed_official 507:d4fc7603a669 311 #define MXC_F_PWRMAN_BASE_PART_NUM_BASE_PART_NUMBER ((uint32_t)(0x0000FFFFUL << MXC_F_PWRMAN_BASE_PART_NUM_BASE_PART_NUMBER_POS))
mbed_official 507:d4fc7603a669 312 #define MXC_F_PWRMAN_BASE_PART_NUM_PACKAGE_SELECT_POS 28
mbed_official 507:d4fc7603a669 313 #define MXC_F_PWRMAN_BASE_PART_NUM_PACKAGE_SELECT ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_BASE_PART_NUM_PACKAGE_SELECT_POS))
mbed_official 507:d4fc7603a669 314
mbed_official 507:d4fc7603a669 315 #define MXC_F_PWRMAN_MASK_ID0_REVISION_ID_POS 0
mbed_official 507:d4fc7603a669 316 #define MXC_F_PWRMAN_MASK_ID0_REVISION_ID ((uint32_t)(0x0000000FUL << MXC_F_PWRMAN_MASK_ID0_REVISION_ID_POS))
mbed_official 507:d4fc7603a669 317 #define MXC_F_PWRMAN_MASK_ID0_MASK_ID_POS 4
mbed_official 507:d4fc7603a669 318 #define MXC_F_PWRMAN_MASK_ID0_MASK_ID ((uint32_t)(0x0FFFFFFFUL << MXC_F_PWRMAN_MASK_ID0_MASK_ID_POS))
mbed_official 507:d4fc7603a669 319
mbed_official 507:d4fc7603a669 320 #define MXC_F_PWRMAN_MASK_ID1_MASK_ID_POS 0
mbed_official 507:d4fc7603a669 321 #define MXC_F_PWRMAN_MASK_ID1_MASK_ID ((uint32_t)(0x7FFFFFFFUL << MXC_F_PWRMAN_MASK_ID1_MASK_ID_POS))
mbed_official 507:d4fc7603a669 322 #define MXC_F_PWRMAN_MASK_ID1_MASK_ID_ENABLE_POS 31
mbed_official 507:d4fc7603a669 323 #define MXC_F_PWRMAN_MASK_ID1_MASK_ID_ENABLE ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_MASK_ID1_MASK_ID_ENABLE_POS))
mbed_official 507:d4fc7603a669 324
mbed_official 507:d4fc7603a669 325 #define MXC_F_PWRMAN_PERIPHERAL_RESET_UART0_POS 0
mbed_official 507:d4fc7603a669 326 #define MXC_F_PWRMAN_PERIPHERAL_RESET_UART0 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_UART0_POS))
mbed_official 507:d4fc7603a669 327 #define MXC_F_PWRMAN_PERIPHERAL_RESET_UART1_POS 1
mbed_official 507:d4fc7603a669 328 #define MXC_F_PWRMAN_PERIPHERAL_RESET_UART1 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_UART1_POS))
mbed_official 507:d4fc7603a669 329 #define MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER0_POS 2
mbed_official 507:d4fc7603a669 330 #define MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER0 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER0_POS))
mbed_official 507:d4fc7603a669 331 #define MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER1_POS 3
mbed_official 507:d4fc7603a669 332 #define MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER1 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER1_POS))
mbed_official 507:d4fc7603a669 333 #define MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER2_POS 4
mbed_official 507:d4fc7603a669 334 #define MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER2 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER2_POS))
mbed_official 507:d4fc7603a669 335 #define MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER3_POS 5
mbed_official 507:d4fc7603a669 336 #define MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER3 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_TIMER3_POS))
mbed_official 507:d4fc7603a669 337 #define MXC_F_PWRMAN_PERIPHERAL_RESET_WATCHDOG0_POS 6
mbed_official 507:d4fc7603a669 338 #define MXC_F_PWRMAN_PERIPHERAL_RESET_WATCHDOG0 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_WATCHDOG0_POS))
mbed_official 507:d4fc7603a669 339 #define MXC_F_PWRMAN_PERIPHERAL_RESET_USB_POS 7
mbed_official 507:d4fc7603a669 340 #define MXC_F_PWRMAN_PERIPHERAL_RESET_USB ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_USB_POS))
mbed_official 507:d4fc7603a669 341 #define MXC_F_PWRMAN_PERIPHERAL_RESET_ADC_POS 8
mbed_official 507:d4fc7603a669 342 #define MXC_F_PWRMAN_PERIPHERAL_RESET_ADC ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_ADC_POS))
mbed_official 507:d4fc7603a669 343 #define MXC_F_PWRMAN_PERIPHERAL_RESET_DAC0_POS 9
mbed_official 507:d4fc7603a669 344 #define MXC_F_PWRMAN_PERIPHERAL_RESET_DAC0 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_DAC0_POS))
mbed_official 507:d4fc7603a669 345 #define MXC_F_PWRMAN_PERIPHERAL_RESET_DAC1_POS 10
mbed_official 507:d4fc7603a669 346 #define MXC_F_PWRMAN_PERIPHERAL_RESET_DAC1 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_DAC1_POS))
mbed_official 507:d4fc7603a669 347 #define MXC_F_PWRMAN_PERIPHERAL_RESET_DAC2_POS 11
mbed_official 507:d4fc7603a669 348 #define MXC_F_PWRMAN_PERIPHERAL_RESET_DAC2 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_DAC2_POS))
mbed_official 507:d4fc7603a669 349 #define MXC_F_PWRMAN_PERIPHERAL_RESET_DAC3_POS 12
mbed_official 507:d4fc7603a669 350 #define MXC_F_PWRMAN_PERIPHERAL_RESET_DAC3 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_DAC3_POS))
mbed_official 507:d4fc7603a669 351 #define MXC_F_PWRMAN_PERIPHERAL_RESET_DMA_POS 13
mbed_official 507:d4fc7603a669 352 #define MXC_F_PWRMAN_PERIPHERAL_RESET_DMA ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_DMA_POS))
mbed_official 507:d4fc7603a669 353 #define MXC_F_PWRMAN_PERIPHERAL_RESET_LCD_POS 14
mbed_official 507:d4fc7603a669 354 #define MXC_F_PWRMAN_PERIPHERAL_RESET_LCD ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_LCD_POS))
mbed_official 507:d4fc7603a669 355 #define MXC_F_PWRMAN_PERIPHERAL_RESET_GPIO_POS 15
mbed_official 507:d4fc7603a669 356 #define MXC_F_PWRMAN_PERIPHERAL_RESET_GPIO ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_GPIO_POS))
mbed_official 507:d4fc7603a669 357 #define MXC_F_PWRMAN_PERIPHERAL_RESET_PULSE_TRAIN_POS 16
mbed_official 507:d4fc7603a669 358 #define MXC_F_PWRMAN_PERIPHERAL_RESET_PULSE_TRAIN ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_PULSE_TRAIN_POS))
mbed_official 507:d4fc7603a669 359 #define MXC_F_PWRMAN_PERIPHERAL_RESET_SPI0_POS 17
mbed_official 507:d4fc7603a669 360 #define MXC_F_PWRMAN_PERIPHERAL_RESET_SPI0 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_SPI0_POS))
mbed_official 507:d4fc7603a669 361 #define MXC_F_PWRMAN_PERIPHERAL_RESET_SPI1_POS 18
mbed_official 507:d4fc7603a669 362 #define MXC_F_PWRMAN_PERIPHERAL_RESET_SPI1 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_SPI1_POS))
mbed_official 507:d4fc7603a669 363 #define MXC_F_PWRMAN_PERIPHERAL_RESET_SPI2_POS 19
mbed_official 507:d4fc7603a669 364 #define MXC_F_PWRMAN_PERIPHERAL_RESET_SPI2 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_SPI2_POS))
mbed_official 507:d4fc7603a669 365 #define MXC_F_PWRMAN_PERIPHERAL_RESET_I2CM0_POS 20
mbed_official 507:d4fc7603a669 366 #define MXC_F_PWRMAN_PERIPHERAL_RESET_I2CM0 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_I2CM0_POS))
mbed_official 507:d4fc7603a669 367 #define MXC_F_PWRMAN_PERIPHERAL_RESET_I2CM1_POS 21
mbed_official 507:d4fc7603a669 368 #define MXC_F_PWRMAN_PERIPHERAL_RESET_I2CM1 ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_I2CM1_POS))
mbed_official 507:d4fc7603a669 369 #define MXC_F_PWRMAN_PERIPHERAL_RESET_I2CS_POS 22
mbed_official 507:d4fc7603a669 370 #define MXC_F_PWRMAN_PERIPHERAL_RESET_I2CS ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_I2CS_POS))
mbed_official 507:d4fc7603a669 371 #define MXC_F_PWRMAN_PERIPHERAL_RESET_CRC_POS 23
mbed_official 507:d4fc7603a669 372 #define MXC_F_PWRMAN_PERIPHERAL_RESET_CRC ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_CRC_POS))
mbed_official 507:d4fc7603a669 373 #define MXC_F_PWRMAN_PERIPHERAL_RESET_TPU_POS 24
mbed_official 507:d4fc7603a669 374 #define MXC_F_PWRMAN_PERIPHERAL_RESET_TPU ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_TPU_POS))
mbed_official 507:d4fc7603a669 375 #define MXC_F_PWRMAN_PERIPHERAL_RESET_SSB_POS 25
mbed_official 507:d4fc7603a669 376 #define MXC_F_PWRMAN_PERIPHERAL_RESET_SSB ((uint32_t)(0x00000001UL << MXC_F_PWRMAN_PERIPHERAL_RESET_SSB_POS))
mbed_official 507:d4fc7603a669 377
mbed_official 507:d4fc7603a669 378 #ifdef __cplusplus
mbed_official 507:d4fc7603a669 379 }
mbed_official 507:d4fc7603a669 380 #endif
mbed_official 507:d4fc7603a669 381
mbed_official 507:d4fc7603a669 382 /**
mbed_official 507:d4fc7603a669 383 * @}
mbed_official 507:d4fc7603a669 384 */
mbed_official 507:d4fc7603a669 385
mbed_official 507:d4fc7603a669 386 #endif /* _MXC_PWRMAN_REGS_H_ */