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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_Maxim/TARGET_MAX32610/clkman_regs.h@600:7d17ca308cd1, 2015-07-31 (annotated)

Committer:
mbed_official
Date:
Fri Jul 31 14:15:09 2015 +0100
Revision:
600:7d17ca308cd1
Parent:
507:d4fc7603a669 
Synchronized with git revision e4cd8bbd3e05b68e5a7f466c74035a85743d45e0



Full URL: https://github.com/mbedmicro/mbed/commit/e4cd8bbd3e05b68e5a7f466c74035a85743d45e0/



Enable LPC8xx usart when configuring it

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 507:d4fc7603a669 1 /*******************************************************************************
mbed_official 507:d4fc7603a669 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
mbed_official 507:d4fc7603a669 3 *
mbed_official 507:d4fc7603a669 4 * Permission is hereby granted, free of charge, to any person obtaining a
mbed_official 507:d4fc7603a669 5 * copy of this software and associated documentation files (the "Software"),
mbed_official 507:d4fc7603a669 6 * to deal in the Software without restriction, including without limitation
mbed_official 507:d4fc7603a669 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
mbed_official 507:d4fc7603a669 8 * and/or sell copies of the Software, and to permit persons to whom the
mbed_official 507:d4fc7603a669 9 * Software is furnished to do so, subject to the following conditions:
mbed_official 507:d4fc7603a669 10 *
mbed_official 507:d4fc7603a669 11 * The above copyright notice and this permission notice shall be included
mbed_official 507:d4fc7603a669 12 * in all copies or substantial portions of the Software.
mbed_official 507:d4fc7603a669 13 *
mbed_official 507:d4fc7603a669 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
mbed_official 507:d4fc7603a669 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
mbed_official 507:d4fc7603a669 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
mbed_official 507:d4fc7603a669 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
mbed_official 507:d4fc7603a669 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
mbed_official 507:d4fc7603a669 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
mbed_official 507:d4fc7603a669 20 * OTHER DEALINGS IN THE SOFTWARE.
mbed_official 507:d4fc7603a669 21 *
mbed_official 507:d4fc7603a669 22 * Except as contained in this notice, the name of Maxim Integrated
mbed_official 507:d4fc7603a669 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
mbed_official 507:d4fc7603a669 24 * Products, Inc. Branding Policy.
mbed_official 507:d4fc7603a669 25 *
mbed_official 507:d4fc7603a669 26 * The mere transfer of this software does not imply any licenses
mbed_official 507:d4fc7603a669 27 * of trade secrets, proprietary technology, copyrights, patents,
mbed_official 507:d4fc7603a669 28 * trademarks, maskwork rights, or any other form of intellectual
mbed_official 507:d4fc7603a669 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
mbed_official 507:d4fc7603a669 30 * ownership rights.
mbed_official 507:d4fc7603a669 31 *******************************************************************************
mbed_official 507:d4fc7603a669 32 */
mbed_official 507:d4fc7603a669 33
mbed_official 507:d4fc7603a669 34 #ifndef _MXC_CLKMAN_REGS_H_
mbed_official 507:d4fc7603a669 35 #define _MXC_CLKMAN_REGS_H_
mbed_official 507:d4fc7603a669 36
mbed_official 507:d4fc7603a669 37 #ifdef __cplusplus
mbed_official 507:d4fc7603a669 38 extern "C" {
mbed_official 507:d4fc7603a669 39 #endif
mbed_official 507:d4fc7603a669 40
mbed_official 507:d4fc7603a669 41 #include <stdint.h>
mbed_official 507:d4fc7603a669 42
mbed_official 507:d4fc7603a669 43 /**
mbed_official 507:d4fc7603a669 44 * @file clkman_regs.h
mbed_official 507:d4fc7603a669 45 * @addtogroup clkman CLKMAN
mbed_official 507:d4fc7603a669 46 * @{
mbed_official 507:d4fc7603a669 47 */
mbed_official 507:d4fc7603a669 48
mbed_official 507:d4fc7603a669 49 /**
mbed_official 507:d4fc7603a669 50 * @brief Defines clock input selections for the phase locked loop.
mbed_official 507:d4fc7603a669 51 */
mbed_official 507:d4fc7603a669 52 typedef enum {
mbed_official 507:d4fc7603a669 53 /** Input select for high frequency crystal oscillator */
mbed_official 507:d4fc7603a669 54 MXC_E_CLKMAN_PLL_INPUT_SELECT_HFX = 0,
mbed_official 507:d4fc7603a669 55 /** Input select for 24MHz ring oscillator */
mbed_official 507:d4fc7603a669 56 MXC_E_CLKMAN_PLL_INPUT_SELECT_24MHZ_RO,
mbed_official 507:d4fc7603a669 57 } mxc_clkman_pll_input_select_t;
mbed_official 507:d4fc7603a669 58
mbed_official 507:d4fc7603a669 59 /**
mbed_official 507:d4fc7603a669 60 * @brief Defines clock input frequency for the phase locked loop.
mbed_official 507:d4fc7603a669 61 */
mbed_official 507:d4fc7603a669 62 typedef enum {
mbed_official 507:d4fc7603a669 63 /** Input frequency of 24MHz */
mbed_official 507:d4fc7603a669 64 MXC_E_CLKMAN_PLL_DIVISOR_SELECT_24MHZ = 0,
mbed_official 507:d4fc7603a669 65 /** Input frequency of 12MHz */
mbed_official 507:d4fc7603a669 66 MXC_E_CLKMAN_PLL_DIVISOR_SELECT_12MHZ,
mbed_official 507:d4fc7603a669 67 /** Input frequency of 8MHz */
mbed_official 507:d4fc7603a669 68 MXC_E_CLKMAN_PLL_DIVISOR_SELECT_8MHZ,
mbed_official 507:d4fc7603a669 69 } mxc_clkman_pll_divisor_select_t;
mbed_official 507:d4fc7603a669 70
mbed_official 507:d4fc7603a669 71 /**
mbed_official 507:d4fc7603a669 72 * @brief Defines terminal count for PLL stable.
mbed_official 507:d4fc7603a669 73 */
mbed_official 507:d4fc7603a669 74 typedef enum {
mbed_official 507:d4fc7603a669 75 /** Clock stable after 2^8 = 256 clock cycles */
mbed_official 507:d4fc7603a669 76 MXC_E_CLKMAN_STABILITY_COUNT_2_8_CLKS = 0,
mbed_official 507:d4fc7603a669 77 /** Clock stable after 2^9 = 512 clock cycles */
mbed_official 507:d4fc7603a669 78 MXC_E_CLKMAN_STABILITY_COUNT_2_9_CLKS,
mbed_official 507:d4fc7603a669 79 /** Clock stable after 2^10 = 1024 clock cycles */
mbed_official 507:d4fc7603a669 80 MXC_E_CLKMAN_STABILITY_COUNT_2_10_CLKS,
mbed_official 507:d4fc7603a669 81 /** Clock stable after 2^11 = 2048 clock cycles */
mbed_official 507:d4fc7603a669 82 MXC_E_CLKMAN_STABILITY_COUNT_2_11_CLKS,
mbed_official 507:d4fc7603a669 83 /** Clock stable after 2^12 = 4096 clock cycles */
mbed_official 507:d4fc7603a669 84 MXC_E_CLKMAN_STABILITY_COUNT_2_12_CLKS,
mbed_official 507:d4fc7603a669 85 /** Clock stable after 2^13 = 8192 clock cycles */
mbed_official 507:d4fc7603a669 86 MXC_E_CLKMAN_STABILITY_COUNT_2_13_CLKS,
mbed_official 507:d4fc7603a669 87 /** Clock stable after 2^14 = 16384 clock cycles */
mbed_official 507:d4fc7603a669 88 MXC_E_CLKMAN_STABILITY_COUNT_2_14_CLKS,
mbed_official 507:d4fc7603a669 89 /** Clock stable after 2^15 = 32768 clock cycles */
mbed_official 507:d4fc7603a669 90 MXC_E_CLKMAN_STABILITY_COUNT_2_15_CLKS,
mbed_official 507:d4fc7603a669 91 /** Clock stable after 2^16 = 65536 clock cycles */
mbed_official 507:d4fc7603a669 92 MXC_E_CLKMAN_STABILITY_COUNT_2_16_CLKS,
mbed_official 507:d4fc7603a669 93 /** Clock stable after 2^17 = 131072 clock cycles */
mbed_official 507:d4fc7603a669 94 MXC_E_CLKMAN_STABILITY_COUNT_2_17_CLKS,
mbed_official 507:d4fc7603a669 95 /** Clock stable after 2^18 = 262144 clock cycles */
mbed_official 507:d4fc7603a669 96 MXC_E_CLKMAN_STABILITY_COUNT_2_18_CLKS,
mbed_official 507:d4fc7603a669 97 /** Clock stable after 2^19 = 524288 clock cycles */
mbed_official 507:d4fc7603a669 98 MXC_E_CLKMAN_STABILITY_COUNT_2_19_CLKS,
mbed_official 507:d4fc7603a669 99 /** Clock stable after 2^20 = 1048576 clock cycles */
mbed_official 507:d4fc7603a669 100 MXC_E_CLKMAN_STABILITY_COUNT_2_20_CLKS,
mbed_official 507:d4fc7603a669 101 /** Clock stable after 2^21 = 2097152 clock cycles */
mbed_official 507:d4fc7603a669 102 MXC_E_CLKMAN_STABILITY_COUNT_2_21_CLKS,
mbed_official 507:d4fc7603a669 103 /** Clock stable after 2^22 = 4194304 clock cycles */
mbed_official 507:d4fc7603a669 104 MXC_E_CLKMAN_STABILITY_COUNT_2_22_CLKS,
mbed_official 507:d4fc7603a669 105 /** Clock stable after 2^23 = 8388608 clock cycles */
mbed_official 507:d4fc7603a669 106 MXC_E_CLKMAN_STABILITY_COUNT_2_23_CLKS
mbed_official 507:d4fc7603a669 107 } mxc_clkman_stability_count_t;
mbed_official 507:d4fc7603a669 108
mbed_official 507:d4fc7603a669 109 /**
mbed_official 507:d4fc7603a669 110 * @brief Defines clock source selections for system clock.
mbed_official 507:d4fc7603a669 111 */
mbed_official 507:d4fc7603a669 112 typedef enum {
mbed_official 507:d4fc7603a669 113 /** Clock select for 24MHz ring oscillator divided by 8 (3MHz) */
mbed_official 507:d4fc7603a669 114 MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_24MHZ_RO_DIV_8 = 0,
mbed_official 507:d4fc7603a669 115 /** Clock select for 24MHz ring oscillator */
mbed_official 507:d4fc7603a669 116 MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_24MHZ_RO,
mbed_official 507:d4fc7603a669 117 /** Clock select for high frequency crystal oscillator */
mbed_official 507:d4fc7603a669 118 MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_HFX,
mbed_official 507:d4fc7603a669 119 /** Clock select for 48MHz phase locked loop output divided by 2 (24MHz) */
mbed_official 507:d4fc7603a669 120 MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_PLL_48MHZ_DIV_2
mbed_official 507:d4fc7603a669 121 } mxc_clkman_system_source_select_t;
mbed_official 507:d4fc7603a669 122
mbed_official 507:d4fc7603a669 123 /**
mbed_official 507:d4fc7603a669 124 * @brief Defines clock source selections for analog to digital converter clock.
mbed_official 507:d4fc7603a669 125 */
mbed_official 507:d4fc7603a669 126 typedef enum {
mbed_official 507:d4fc7603a669 127 /** Clock select for system clock frequency */
mbed_official 507:d4fc7603a669 128 MXC_E_CLKMAN_ADC_SOURCE_SELECT_SYSTEM = 0,
mbed_official 507:d4fc7603a669 129 /** Clock select for 8MHz phase locked loop output */
mbed_official 507:d4fc7603a669 130 MXC_E_CLKMAN_ADC_SOURCE_SELECT_PLL_8MHZ,
mbed_official 507:d4fc7603a669 131 /** Clock select for high frequency crystal oscillator */
mbed_official 507:d4fc7603a669 132 MXC_E_CLKMAN_ADC_SOURCE_SELECT_HFX,
mbed_official 507:d4fc7603a669 133 /** Clock select for 24MHz ring oscillator */
mbed_official 507:d4fc7603a669 134 MXC_E_CLKMAN_ADC_SOURCE_SELECT_24MHZ_RO,
mbed_official 507:d4fc7603a669 135 } mxc_clkman_adc_source_select_t;
mbed_official 507:d4fc7603a669 136
mbed_official 507:d4fc7603a669 137 /**
mbed_official 507:d4fc7603a669 138 * @brief Defines clock source selections for watchdog timer clock.
mbed_official 507:d4fc7603a669 139 */
mbed_official 507:d4fc7603a669 140 typedef enum {
mbed_official 507:d4fc7603a669 141 /** Clock select for system clock frequency */
mbed_official 507:d4fc7603a669 142 MXC_E_CLKMAN_WDT_SOURCE_SELECT_SYSTEM = 0,
mbed_official 507:d4fc7603a669 143 /** Clock select for 8MHz phase locked loop output */
mbed_official 507:d4fc7603a669 144 MXC_E_CLKMAN_WDT_SOURCE_SELECT_RTC,
mbed_official 507:d4fc7603a669 145 /** Clock select for high frequency crystal oscillator */
mbed_official 507:d4fc7603a669 146 MXC_E_CLKMAN_WDT_SOURCE_SELECT_24MHZ_RO,
mbed_official 507:d4fc7603a669 147 /** Clock select for 24MHz ring oscillator */
mbed_official 507:d4fc7603a669 148 MXC_E_CLKMAN_WDT_SOURCE_SELECT_NANO,
mbed_official 507:d4fc7603a669 149 } mxc_clkman_wdt_source_select_t;
mbed_official 507:d4fc7603a669 150
mbed_official 507:d4fc7603a669 151 /**
mbed_official 507:d4fc7603a669 152 * @brief Defines clock scales for various clocks.
mbed_official 507:d4fc7603a669 153 */
mbed_official 507:d4fc7603a669 154 typedef enum {
mbed_official 507:d4fc7603a669 155 /** Clock disabled */
mbed_official 507:d4fc7603a669 156 MXC_E_CLKMAN_CLK_SCALE_DISABLED = 0,
mbed_official 507:d4fc7603a669 157 /** Clock enabled */
mbed_official 507:d4fc7603a669 158 MXC_E_CLKMAN_CLK_SCALE_ENABLED,
mbed_official 507:d4fc7603a669 159 /** Clock scale for dividing by 2 */
mbed_official 507:d4fc7603a669 160 MXC_E_CLKMAN_CLK_SCALE_DIV_2,
mbed_official 507:d4fc7603a669 161 /** Clock scale for dividing by 4 */
mbed_official 507:d4fc7603a669 162 MXC_E_CLKMAN_CLK_SCALE_DIV_4,
mbed_official 507:d4fc7603a669 163 /** Clock scale for dividing by 8 */
mbed_official 507:d4fc7603a669 164 MXC_E_CLKMAN_CLK_SCALE_DIV_8,
mbed_official 507:d4fc7603a669 165 /** Clock scale for dividing by 16 */
mbed_official 507:d4fc7603a669 166 MXC_E_CLKMAN_CLK_SCALE_DIV_16,
mbed_official 507:d4fc7603a669 167 /** Clock scale for dividing by 32 */
mbed_official 507:d4fc7603a669 168 MXC_E_CLKMAN_CLK_SCALE_DIV_32,
mbed_official 507:d4fc7603a669 169 /** Clock scale for dividing by 64 */
mbed_official 507:d4fc7603a669 170 MXC_E_CLKMAN_CLK_SCALE_DIV_64,
mbed_official 507:d4fc7603a669 171 /** Clock scale for dividing by 128 */
mbed_official 507:d4fc7603a669 172 MXC_E_CLKMAN_CLK_SCALE_DIV_128,
mbed_official 507:d4fc7603a669 173 /** Clock scale for dividing by 256 */
mbed_official 507:d4fc7603a669 174 MXC_E_CLKMAN_CLK_SCALE_DIV_256
mbed_official 507:d4fc7603a669 175 } mxc_clkman_clk_scale_t;
mbed_official 507:d4fc7603a669 176
mbed_official 507:d4fc7603a669 177 /**
mbed_official 507:d4fc7603a669 178 * @brief Defines Setting of the Clock Gates .
mbed_official 507:d4fc7603a669 179 */
mbed_official 507:d4fc7603a669 180 typedef enum {
mbed_official 507:d4fc7603a669 181 /** Clock Gater is Off */
mbed_official 507:d4fc7603a669 182 MXC_E_CLKMAN_CLK_GATE_OFF = 0,
mbed_official 507:d4fc7603a669 183 /** Clock Gater is Dynamic */
mbed_official 507:d4fc7603a669 184 MXC_E_CLKMAN_CLK_GATE_DYNAMIC,
mbed_official 507:d4fc7603a669 185 /** Clock Gater is On */
mbed_official 507:d4fc7603a669 186 MXC_E_CLKMAN_CLK_GATE_ON
mbed_official 507:d4fc7603a669 187 } mxc_clkman_clk_gate_t;
mbed_official 507:d4fc7603a669 188
mbed_official 507:d4fc7603a669 189 /* Offset Register Description
mbed_official 507:d4fc7603a669 190 ====== ===================================================================== */
mbed_official 507:d4fc7603a669 191 typedef struct {
mbed_official 507:d4fc7603a669 192 __IO uint32_t clk_config; /* 0x0000 System Clock Configuration */
mbed_official 507:d4fc7603a669 193 __IO uint32_t clk_ctrl; /* 0x0004 System Clock Controls */
mbed_official 507:d4fc7603a669 194 __IO uint32_t intfl; /* 0x0008 Interrupt Flags */
mbed_official 507:d4fc7603a669 195 __IO uint32_t inten; /* 0x000C Interrupt Enable/Disable Controls */
mbed_official 507:d4fc7603a669 196 __IO uint32_t trim_calc; /* 0x0010 Trim Calculation Controls */
mbed_official 507:d4fc7603a669 197 __I uint32_t rsv0014[4]; /* 0x0014 */
mbed_official 507:d4fc7603a669 198 __IO uint32_t i2c_timer_ctrl; /* 0x0024 I2C Timer Control */
mbed_official 507:d4fc7603a669 199 __I uint32_t rsv0028[6]; /* 0x0028 */
mbed_official 507:d4fc7603a669 200 __IO uint32_t clk_ctrl_0_system; /* 0x0040 Control Settings for CLK0 - System Clock */
mbed_official 507:d4fc7603a669 201 __IO uint32_t clk_ctrl_1_gpio; /* 0x0044 Control Settings for CLK1 - GPIO Module Clock */
mbed_official 507:d4fc7603a669 202 __IO uint32_t clk_ctrl_2_pt; /* 0x0048 Control Settings for CLK2 - Pulse Train Module Clock */
mbed_official 507:d4fc7603a669 203 __IO uint32_t clk_ctrl_3_spi0; /* 0x004C Control Settings for CLK3 - SPI0 Master Clock */
mbed_official 507:d4fc7603a669 204 __IO uint32_t clk_ctrl_4_spi1; /* 0x0050 Control Settings for CLK4 - SPI1 Master Clock */
mbed_official 507:d4fc7603a669 205 __IO uint32_t clk_ctrl_5_spi2; /* 0x0054 Control Settings for CLK5 - SPI2 Master Clock */
mbed_official 507:d4fc7603a669 206 __IO uint32_t clk_ctrl_6_i2cm; /* 0x0058 Control Settings for CLK6 - Clock for all I2C Masters */
mbed_official 507:d4fc7603a669 207 __IO uint32_t clk_ctrl_7_i2cs; /* 0x005C Control Settings for CLK7 - I2C Slave Clock */
mbed_official 507:d4fc7603a669 208 __IO uint32_t clk_ctrl_8_lcd_chpump; /* 0x0060 Control Settings for CLK8 - LCD Charge Pump Clock */
mbed_official 507:d4fc7603a669 209 __IO uint32_t clk_ctrl_9_puf; /* 0x0064 Control Settings for CLK9 - PUF Clock */
mbed_official 507:d4fc7603a669 210 __IO uint32_t clk_ctrl_10_prng; /* 0x0068 Control Settings for CLK10 - PRNG Clock */
mbed_official 507:d4fc7603a669 211 __IO uint32_t clk_ctrl_11_wdt0; /* 0x006C Control Settings for CLK11 - Watchdog Timer 0 ScaledSysClk */
mbed_official 507:d4fc7603a669 212 __IO uint32_t clk_ctrl_12_wdt1; /* 0x0070 Control Settings for CLK12 - Watchdog Timer 1 ScaledSysClk */
mbed_official 507:d4fc7603a669 213 __IO uint32_t clk_ctrl_13_rtc_int_sync; /* 0x0074 Control Settings for CLK13 - RTC Interrupt Sync Clock */
mbed_official 507:d4fc7603a669 214 __IO uint32_t clk_ctrl_14_dac0; /* 0x0078 Control Settings for CLK14 - 12-bit DAC 0 Clock */
mbed_official 507:d4fc7603a669 215 __IO uint32_t clk_ctrl_15_dac1; /* 0x007C Control Settings for CLK15 - 12-bit DAC 1 Clock */
mbed_official 507:d4fc7603a669 216 __IO uint32_t clk_ctrl_16_dac2; /* 0x0080 Control Settings for CLK16 - 8-bit DAC 0 Clock */
mbed_official 507:d4fc7603a669 217 __IO uint32_t clk_ctrl_17_dac3; /* 0x0084 Control Settings for CLK17 - 8-bit DAC 1 Clock */
mbed_official 507:d4fc7603a669 218 __I uint32_t rsv0088[30]; /* 0x0088 */
mbed_official 507:d4fc7603a669 219 __IO uint32_t crypt_clk_ctrl_0_aes; /* 0x0100 Control Settings for Crypto Clock 0 - AES */
mbed_official 507:d4fc7603a669 220 __IO uint32_t crypt_clk_ctrl_1_maa; /* 0x0104 Control Settings for Crypto Clock 1 - MAA */
mbed_official 507:d4fc7603a669 221 __IO uint32_t crypt_clk_ctrl_2_prng; /* 0x0108 Control Settings for Crypto Clock 2 - PRNG */
mbed_official 507:d4fc7603a669 222 __I uint32_t rsv010C[13]; /* 0x010C */
mbed_official 507:d4fc7603a669 223 __IO uint32_t clk_gate_ctrl0; /* 0x0140 Dynamic Clock Gating Control Register 0 */
mbed_official 507:d4fc7603a669 224 __IO uint32_t clk_gate_ctrl1; /* 0x0144 Dynamic Clock Gating Control Register 1 */
mbed_official 507:d4fc7603a669 225 __IO uint32_t clk_gate_ctrl2; /* 0x0148 Dynamic Clock Gating Control Register 2 */
mbed_official 507:d4fc7603a669 226 } mxc_clkman_regs_t;
mbed_official 507:d4fc7603a669 227
mbed_official 507:d4fc7603a669 228 /*
mbed_official 507:d4fc7603a669 229 Register offsets for module CLKMAN.
mbed_official 507:d4fc7603a669 230 */
mbed_official 507:d4fc7603a669 231 #define MXC_R_CLKMAN_OFFS_CLK_CONFIG ((uint32_t)0x00000000UL)
mbed_official 507:d4fc7603a669 232 #define MXC_R_CLKMAN_OFFS_CLK_CTRL ((uint32_t)0x00000004UL)
mbed_official 507:d4fc7603a669 233 #define MXC_R_CLKMAN_OFFS_INTFL ((uint32_t)0x00000008UL)
mbed_official 507:d4fc7603a669 234 #define MXC_R_CLKMAN_OFFS_INTEN ((uint32_t)0x0000000CUL)
mbed_official 507:d4fc7603a669 235 #define MXC_R_CLKMAN_OFFS_TRIM_CALC ((uint32_t)0x00000010UL)
mbed_official 507:d4fc7603a669 236 #define MXC_R_CLKMAN_OFFS_I2C_TIMER_CTRL ((uint32_t)0x00000024UL)
mbed_official 507:d4fc7603a669 237 #define MXC_R_CLKMAN_OFFS_CLK_CTRL_0_SYSTEM ((uint32_t)0x00000040UL)
mbed_official 507:d4fc7603a669 238 #define MXC_R_CLKMAN_OFFS_CLK_CTRL_1_GPIO ((uint32_t)0x00000044UL)
mbed_official 507:d4fc7603a669 239 #define MXC_R_CLKMAN_OFFS_CLK_CTRL_2_PT ((uint32_t)0x00000048UL)
mbed_official 507:d4fc7603a669 240 #define MXC_R_CLKMAN_OFFS_CLK_CTRL_3_SPI0 ((uint32_t)0x0000004CUL)
mbed_official 507:d4fc7603a669 241 #define MXC_R_CLKMAN_OFFS_CLK_CTRL_4_SPI1 ((uint32_t)0x00000050UL)
mbed_official 507:d4fc7603a669 242 #define MXC_R_CLKMAN_OFFS_CLK_CTRL_5_SPI2 ((uint32_t)0x00000054UL)
mbed_official 507:d4fc7603a669 243 #define MXC_R_CLKMAN_OFFS_CLK_CTRL_6_I2CM ((uint32_t)0x00000058UL)
mbed_official 507:d4fc7603a669 244 #define MXC_R_CLKMAN_OFFS_CLK_CTRL_7_I2CS ((uint32_t)0x0000005CUL)
mbed_official 507:d4fc7603a669 245 #define MXC_R_CLKMAN_OFFS_CLK_CTRL_8_LCD_CHPUMP ((uint32_t)0x00000060UL)
mbed_official 507:d4fc7603a669 246 #define MXC_R_CLKMAN_OFFS_CLK_CTRL_9_PUF ((uint32_t)0x00000064UL)
mbed_official 507:d4fc7603a669 247 #define MXC_R_CLKMAN_OFFS_CLK_CTRL_10_PRNG ((uint32_t)0x00000068UL)
mbed_official 507:d4fc7603a669 248 #define MXC_R_CLKMAN_OFFS_CLK_CTRL_11_WDT0 ((uint32_t)0x0000006CUL)
mbed_official 507:d4fc7603a669 249 #define MXC_R_CLKMAN_OFFS_CLK_CTRL_12_WDT1 ((uint32_t)0x00000070UL)
mbed_official 507:d4fc7603a669 250 #define MXC_R_CLKMAN_OFFS_CLK_CTRL_13_RTC_INT_SYNC ((uint32_t)0x00000074UL)
mbed_official 507:d4fc7603a669 251 #define MXC_R_CLKMAN_OFFS_CLK_CTRL_14_DAC0 ((uint32_t)0x00000078UL)
mbed_official 507:d4fc7603a669 252 #define MXC_R_CLKMAN_OFFS_CLK_CTRL_15_DAC1 ((uint32_t)0x0000007CUL)
mbed_official 507:d4fc7603a669 253 #define MXC_R_CLKMAN_OFFS_CLK_CTRL_16_DAC2 ((uint32_t)0x00000080UL)
mbed_official 507:d4fc7603a669 254 #define MXC_R_CLKMAN_OFFS_CLK_CTRL_17_DAC3 ((uint32_t)0x00000084UL)
mbed_official 507:d4fc7603a669 255 #define MXC_R_CLKMAN_OFFS_CRYPT_CLK_CTRL_0_AES ((uint32_t)0x00000100UL)
mbed_official 507:d4fc7603a669 256 #define MXC_R_CLKMAN_OFFS_CRYPT_CLK_CTRL_1_MAA ((uint32_t)0x00000104UL)
mbed_official 507:d4fc7603a669 257 #define MXC_R_CLKMAN_OFFS_CRYPT_CLK_CTRL_2_PRNG ((uint32_t)0x00000108UL)
mbed_official 507:d4fc7603a669 258 #define MXC_R_CLKMAN_OFFS_CLK_GATE_CTRL0 ((uint32_t)0x00000140UL)
mbed_official 507:d4fc7603a669 259 #define MXC_R_CLKMAN_OFFS_CLK_GATE_CTRL1 ((uint32_t)0x00000144UL)
mbed_official 507:d4fc7603a669 260 #define MXC_R_CLKMAN_OFFS_CLK_GATE_CTRL2 ((uint32_t)0x00000148UL)
mbed_official 507:d4fc7603a669 261
mbed_official 507:d4fc7603a669 262 /*
mbed_official 507:d4fc7603a669 263 Field positions and masks for module CLKMAN.
mbed_official 507:d4fc7603a669 264 */
mbed_official 507:d4fc7603a669 265 #define MXC_F_CLKMAN_CLK_CONFIG_HFX_ENABLE_POS 0
mbed_official 507:d4fc7603a669 266 #define MXC_F_CLKMAN_CLK_CONFIG_HFX_ENABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_HFX_ENABLE_POS))
mbed_official 507:d4fc7603a669 267 #define MXC_F_CLKMAN_CLK_CONFIG_HFX_BYPASS_POS 1
mbed_official 507:d4fc7603a669 268 #define MXC_F_CLKMAN_CLK_CONFIG_HFX_BYPASS ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_HFX_BYPASS_POS))
mbed_official 507:d4fc7603a669 269 #define MXC_F_CLKMAN_CLK_CONFIG_HFX_TEST_ENABLE_POS 2
mbed_official 507:d4fc7603a669 270 #define MXC_F_CLKMAN_CLK_CONFIG_HFX_TEST_ENABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_HFX_TEST_ENABLE_POS))
mbed_official 507:d4fc7603a669 271 #define MXC_F_CLKMAN_CLK_CONFIG_HFX_GM_ADJUST_POS 4
mbed_official 507:d4fc7603a669 272 #define MXC_F_CLKMAN_CLK_CONFIG_HFX_GM_ADJUST ((uint32_t)(0x0000001FUL << MXC_F_CLKMAN_CLK_CONFIG_HFX_GM_ADJUST_POS))
mbed_official 507:d4fc7603a669 273 #define MXC_F_CLKMAN_CLK_CONFIG_HFX_DC_CONTROL_POS 9
mbed_official 507:d4fc7603a669 274 #define MXC_F_CLKMAN_CLK_CONFIG_HFX_DC_CONTROL ((uint32_t)(0x00000007UL << MXC_F_CLKMAN_CLK_CONFIG_HFX_DC_CONTROL_POS))
mbed_official 507:d4fc7603a669 275 #define MXC_F_CLKMAN_CLK_CONFIG_PLL_ENABLE_POS 12
mbed_official 507:d4fc7603a669 276 #define MXC_F_CLKMAN_CLK_CONFIG_PLL_ENABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_ENABLE_POS))
mbed_official 507:d4fc7603a669 277 #define MXC_F_CLKMAN_CLK_CONFIG_PLL_RESET_N_POS 13
mbed_official 507:d4fc7603a669 278 #define MXC_F_CLKMAN_CLK_CONFIG_PLL_RESET_N ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_RESET_N_POS))
mbed_official 507:d4fc7603a669 279 #define MXC_F_CLKMAN_CLK_CONFIG_PLL_INPUT_SELECT_POS 14
mbed_official 507:d4fc7603a669 280 #define MXC_F_CLKMAN_CLK_CONFIG_PLL_INPUT_SELECT ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_INPUT_SELECT_POS))
mbed_official 507:d4fc7603a669 281 #define MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT_POS 16
mbed_official 507:d4fc7603a669 282 #define MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT_POS))
mbed_official 507:d4fc7603a669 283 #define MXC_F_CLKMAN_CLK_CONFIG_PLL_8MHZ_ENABLE_POS 18
mbed_official 507:d4fc7603a669 284 #define MXC_F_CLKMAN_CLK_CONFIG_PLL_8MHZ_ENABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_8MHZ_ENABLE_POS))
mbed_official 507:d4fc7603a669 285 #define MXC_F_CLKMAN_CLK_CONFIG_PLL_BYPASS_POS 19
mbed_official 507:d4fc7603a669 286 #define MXC_F_CLKMAN_CLK_CONFIG_PLL_BYPASS ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_BYPASS_POS))
mbed_official 507:d4fc7603a669 287 #define MXC_F_CLKMAN_CLK_CONFIG_PLL_STABILITY_COUNT_POS 20
mbed_official 507:d4fc7603a669 288 #define MXC_F_CLKMAN_CLK_CONFIG_PLL_STABILITY_COUNT ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CONFIG_PLL_STABILITY_COUNT_POS))
mbed_official 507:d4fc7603a669 289 #define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_ENABLE_POS 24
mbed_official 507:d4fc7603a669 290 #define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_ENABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_ENABLE_POS))
mbed_official 507:d4fc7603a669 291 #define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_RESET_N_POS 25
mbed_official 507:d4fc7603a669 292 #define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_RESET_N ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_RESET_N_POS))
mbed_official 507:d4fc7603a669 293 #define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_STABILITY_COUNT_POS 28
mbed_official 507:d4fc7603a669 294 #define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_STABILITY_COUNT ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_STABILITY_COUNT_POS))
mbed_official 507:d4fc7603a669 295
mbed_official 507:d4fc7603a669 296 #define MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT_POS 1
mbed_official 507:d4fc7603a669 297 #define MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT_POS))
mbed_official 507:d4fc7603a669 298 #define MXC_F_CLKMAN_CLK_CTRL_AUTO_CLK_DISABLE_POS 3
mbed_official 507:d4fc7603a669 299 #define MXC_F_CLKMAN_CLK_CTRL_AUTO_CLK_DISABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_AUTO_CLK_DISABLE_POS))
mbed_official 507:d4fc7603a669 300 #define MXC_F_CLKMAN_CLK_CTRL_USB_GATE_N_POS 4
mbed_official 507:d4fc7603a669 301 #define MXC_F_CLKMAN_CLK_CTRL_USB_GATE_N ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_USB_GATE_N_POS))
mbed_official 507:d4fc7603a669 302 #define MXC_F_CLKMAN_CLK_CTRL_ADC_GATE_N_POS 8
mbed_official 507:d4fc7603a669 303 #define MXC_F_CLKMAN_CLK_CTRL_ADC_GATE_N ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_ADC_GATE_N_POS))
mbed_official 507:d4fc7603a669 304 #define MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT_POS 9
mbed_official 507:d4fc7603a669 305 #define MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT_POS))
mbed_official 507:d4fc7603a669 306 #define MXC_F_CLKMAN_CLK_CTRL_CRYPTO_GATE_N_POS 12
mbed_official 507:d4fc7603a669 307 #define MXC_F_CLKMAN_CLK_CTRL_CRYPTO_GATE_N ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_CRYPTO_GATE_N_POS))
mbed_official 507:d4fc7603a669 308 #define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_GATE_N_POS 16
mbed_official 507:d4fc7603a669 309 #define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_GATE_N ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_GATE_N_POS))
mbed_official 507:d4fc7603a669 310 #define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_SOURCE_SELECT_POS 17
mbed_official 507:d4fc7603a669 311 #define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_SOURCE_SELECT ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_SOURCE_SELECT_POS))
mbed_official 507:d4fc7603a669 312 #define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_GATE_N_POS 20
mbed_official 507:d4fc7603a669 313 #define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_GATE_N ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_GATE_N_POS))
mbed_official 507:d4fc7603a669 314 #define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_SOURCE_SELECT_POS 21
mbed_official 507:d4fc7603a669 315 #define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_SOURCE_SELECT ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_SOURCE_SELECT_POS))
mbed_official 507:d4fc7603a669 316 #define MXC_F_CLKMAN_CLK_CTRL_RTOS_MODE_POS 24
mbed_official 507:d4fc7603a669 317 #define MXC_F_CLKMAN_CLK_CTRL_RTOS_MODE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_RTOS_MODE_POS))
mbed_official 507:d4fc7603a669 318
mbed_official 507:d4fc7603a669 319 #define MXC_F_CLKMAN_INTFL_RING_STABLE_POS 0
mbed_official 507:d4fc7603a669 320 #define MXC_F_CLKMAN_INTFL_RING_STABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTFL_RING_STABLE_POS))
mbed_official 507:d4fc7603a669 321 #define MXC_F_CLKMAN_INTFL_PLL_STABLE_POS 1
mbed_official 507:d4fc7603a669 322 #define MXC_F_CLKMAN_INTFL_PLL_STABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTFL_PLL_STABLE_POS))
mbed_official 507:d4fc7603a669 323 #define MXC_F_CLKMAN_INTFL_CRYPTO_STABLE_POS 2
mbed_official 507:d4fc7603a669 324 #define MXC_F_CLKMAN_INTFL_CRYPTO_STABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTFL_CRYPTO_STABLE_POS))
mbed_official 507:d4fc7603a669 325
mbed_official 507:d4fc7603a669 326 #define MXC_F_CLKMAN_INTEN_RING_STABLE_POS 0
mbed_official 507:d4fc7603a669 327 #define MXC_F_CLKMAN_INTEN_RING_STABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTEN_RING_STABLE_POS))
mbed_official 507:d4fc7603a669 328 #define MXC_F_CLKMAN_INTEN_PLL_STABLE_POS 1
mbed_official 507:d4fc7603a669 329 #define MXC_F_CLKMAN_INTEN_PLL_STABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTEN_PLL_STABLE_POS))
mbed_official 507:d4fc7603a669 330 #define MXC_F_CLKMAN_INTEN_CRYPTO_STABLE_POS 2
mbed_official 507:d4fc7603a669 331 #define MXC_F_CLKMAN_INTEN_CRYPTO_STABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTEN_CRYPTO_STABLE_POS))
mbed_official 507:d4fc7603a669 332
mbed_official 507:d4fc7603a669 333 #define MXC_F_CLKMAN_TRIM_CALC_TRIM_CLK_SEL_POS 0
mbed_official 507:d4fc7603a669 334 #define MXC_F_CLKMAN_TRIM_CALC_TRIM_CLK_SEL ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_TRIM_CALC_TRIM_CLK_SEL_POS))
mbed_official 507:d4fc7603a669 335 #define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_START_POS 1
mbed_official 507:d4fc7603a669 336 #define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_START ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_START_POS))
mbed_official 507:d4fc7603a669 337 #define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_COMPLETED_POS 2
mbed_official 507:d4fc7603a669 338 #define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_COMPLETED ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_COMPLETED_POS))
mbed_official 507:d4fc7603a669 339 #define MXC_F_CLKMAN_TRIM_CALC_TRIM_ENABLE_POS 3
mbed_official 507:d4fc7603a669 340 #define MXC_F_CLKMAN_TRIM_CALC_TRIM_ENABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_TRIM_CALC_TRIM_ENABLE_POS))
mbed_official 507:d4fc7603a669 341 #define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_RESULTS_POS 16
mbed_official 507:d4fc7603a669 342 #define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_RESULTS ((uint32_t)(0x000003FFUL << MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_RESULTS_POS))
mbed_official 507:d4fc7603a669 343
mbed_official 507:d4fc7603a669 344 #define MXC_F_CLKMAN_I2C_TIMER_CTRL_I2C_1MS_TIMER_EN_POS 0
mbed_official 507:d4fc7603a669 345 #define MXC_F_CLKMAN_I2C_TIMER_CTRL_I2C_1MS_TIMER_EN ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_I2C_TIMER_CTRL_I2C_1MS_TIMER_EN_POS))
mbed_official 507:d4fc7603a669 346
mbed_official 507:d4fc7603a669 347 #define MXC_F_CLKMAN_CLK_CTRL_0_SYSTEM_SYS_CLK_SCALE_POS 0
mbed_official 507:d4fc7603a669 348 #define MXC_F_CLKMAN_CLK_CTRL_0_SYSTEM_SYS_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_0_SYSTEM_SYS_CLK_SCALE_POS))
mbed_official 507:d4fc7603a669 349
mbed_official 507:d4fc7603a669 350 #define MXC_F_CLKMAN_CLK_CTRL_1_GPIO_GPIO_CLK_SCALE_POS 0
mbed_official 507:d4fc7603a669 351 #define MXC_F_CLKMAN_CLK_CTRL_1_GPIO_GPIO_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_1_GPIO_GPIO_CLK_SCALE_POS))
mbed_official 507:d4fc7603a669 352
mbed_official 507:d4fc7603a669 353 #define MXC_F_CLKMAN_CLK_CTRL_2_PT_PULSE_TRAIN_CLK_SCALE_POS 0
mbed_official 507:d4fc7603a669 354 #define MXC_F_CLKMAN_CLK_CTRL_2_PT_PULSE_TRAIN_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_2_PT_PULSE_TRAIN_CLK_SCALE_POS))
mbed_official 507:d4fc7603a669 355
mbed_official 507:d4fc7603a669 356 #define MXC_F_CLKMAN_CLK_CTRL_3_SPI0_SPI0_CLK_SCALE_POS 0
mbed_official 507:d4fc7603a669 357 #define MXC_F_CLKMAN_CLK_CTRL_3_SPI0_SPI0_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_3_SPI0_SPI0_CLK_SCALE_POS))
mbed_official 507:d4fc7603a669 358
mbed_official 507:d4fc7603a669 359 #define MXC_F_CLKMAN_CLK_CTRL_4_SPI1_SPI1_CLK_SCALE_POS 0
mbed_official 507:d4fc7603a669 360 #define MXC_F_CLKMAN_CLK_CTRL_4_SPI1_SPI1_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_4_SPI1_SPI1_CLK_SCALE_POS))
mbed_official 507:d4fc7603a669 361
mbed_official 507:d4fc7603a669 362 #define MXC_F_CLKMAN_CLK_CTRL_5_SPI2_SPI2_CLK_SCALE_POS 0
mbed_official 507:d4fc7603a669 363 #define MXC_F_CLKMAN_CLK_CTRL_5_SPI2_SPI2_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_5_SPI2_SPI2_CLK_SCALE_POS))
mbed_official 507:d4fc7603a669 364
mbed_official 507:d4fc7603a669 365 #define MXC_F_CLKMAN_CLK_CTRL_6_I2CM_I2CM_CLK_SCALE_POS 0
mbed_official 507:d4fc7603a669 366 #define MXC_F_CLKMAN_CLK_CTRL_6_I2CM_I2CM_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_6_I2CM_I2CM_CLK_SCALE_POS))
mbed_official 507:d4fc7603a669 367
mbed_official 507:d4fc7603a669 368 #define MXC_F_CLKMAN_CLK_CTRL_7_I2CS_I2CS_CLK_SCALE_POS 0
mbed_official 507:d4fc7603a669 369 #define MXC_F_CLKMAN_CLK_CTRL_7_I2CS_I2CS_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_7_I2CS_I2CS_CLK_SCALE_POS))
mbed_official 507:d4fc7603a669 370
mbed_official 507:d4fc7603a669 371 #define MXC_F_CLKMAN_CLK_CTRL_8_LCD_CHPUMP_LCD_CLK_SCALE_POS 0
mbed_official 507:d4fc7603a669 372 #define MXC_F_CLKMAN_CLK_CTRL_8_LCD_CHPUMP_LCD_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_8_LCD_CHPUMP_LCD_CLK_SCALE_POS))
mbed_official 507:d4fc7603a669 373
mbed_official 507:d4fc7603a669 374 #define MXC_F_CLKMAN_CLK_CTRL_9_PUF_PUF_CLK_SCALE_POS 0
mbed_official 507:d4fc7603a669 375 #define MXC_F_CLKMAN_CLK_CTRL_9_PUF_PUF_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_9_PUF_PUF_CLK_SCALE_POS))
mbed_official 507:d4fc7603a669 376
mbed_official 507:d4fc7603a669 377 #define MXC_F_CLKMAN_CLK_CTRL_10_PRNG_PRNG_CLK_SCALE_POS 0
mbed_official 507:d4fc7603a669 378 #define MXC_F_CLKMAN_CLK_CTRL_10_PRNG_PRNG_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_10_PRNG_PRNG_CLK_SCALE_POS))
mbed_official 507:d4fc7603a669 379
mbed_official 507:d4fc7603a669 380 #define MXC_F_CLKMAN_CLK_CTRL_11_WDT0_WATCHDOG0_CLK_SCALE_POS 0
mbed_official 507:d4fc7603a669 381 #define MXC_F_CLKMAN_CLK_CTRL_11_WDT0_WATCHDOG0_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_11_WDT0_WATCHDOG0_CLK_SCALE_POS))
mbed_official 507:d4fc7603a669 382
mbed_official 507:d4fc7603a669 383 #define MXC_F_CLKMAN_CLK_CTRL_12_WDT1_WATCHDOG1_CLK_SCALE_POS 0
mbed_official 507:d4fc7603a669 384 #define MXC_F_CLKMAN_CLK_CTRL_12_WDT1_WATCHDOG1_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_12_WDT1_WATCHDOG1_CLK_SCALE_POS))
mbed_official 507:d4fc7603a669 385
mbed_official 507:d4fc7603a669 386 #define MXC_F_CLKMAN_CLK_CTRL_13_RTC_INT_SYNC_RTC_CLK_SCALE_POS 0
mbed_official 507:d4fc7603a669 387 #define MXC_F_CLKMAN_CLK_CTRL_13_RTC_INT_SYNC_RTC_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_13_RTC_INT_SYNC_RTC_CLK_SCALE_POS))
mbed_official 507:d4fc7603a669 388
mbed_official 507:d4fc7603a669 389 #define MXC_F_CLKMAN_CLK_CTRL_14_DAC0_DAC0_CLK_SCALE_POS 0
mbed_official 507:d4fc7603a669 390 #define MXC_F_CLKMAN_CLK_CTRL_14_DAC0_DAC0_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_14_DAC0_DAC0_CLK_SCALE_POS))
mbed_official 507:d4fc7603a669 391
mbed_official 507:d4fc7603a669 392 #define MXC_F_CLKMAN_CLK_CTRL_15_DAC1_DAC1_CLK_SCALE_POS 0
mbed_official 507:d4fc7603a669 393 #define MXC_F_CLKMAN_CLK_CTRL_15_DAC1_DAC1_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_15_DAC1_DAC1_CLK_SCALE_POS))
mbed_official 507:d4fc7603a669 394
mbed_official 507:d4fc7603a669 395 #define MXC_F_CLKMAN_CLK_CTRL_16_DAC2_DAC2_CLK_SCALE_POS 0
mbed_official 507:d4fc7603a669 396 #define MXC_F_CLKMAN_CLK_CTRL_16_DAC2_DAC2_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_16_DAC2_DAC2_CLK_SCALE_POS))
mbed_official 507:d4fc7603a669 397
mbed_official 507:d4fc7603a669 398 #define MXC_F_CLKMAN_CLK_CTRL_17_DAC3_DAC3_CLK_SCALE_POS 0
mbed_official 507:d4fc7603a669 399 #define MXC_F_CLKMAN_CLK_CTRL_17_DAC3_DAC3_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_17_DAC3_DAC3_CLK_SCALE_POS))
mbed_official 507:d4fc7603a669 400
mbed_official 507:d4fc7603a669 401 #define MXC_F_CLKMAN_CRYPT_CLK_CTRL_0_AES_AES_CLK_SCALE_POS 0
mbed_official 507:d4fc7603a669 402 #define MXC_F_CLKMAN_CRYPT_CLK_CTRL_0_AES_AES_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CRYPT_CLK_CTRL_0_AES_AES_CLK_SCALE_POS))
mbed_official 507:d4fc7603a669 403
mbed_official 507:d4fc7603a669 404 #define MXC_F_CLKMAN_CRYPT_CLK_CTRL_1_MAA_UMAA_CLK_SCALE_POS 0
mbed_official 507:d4fc7603a669 405 #define MXC_F_CLKMAN_CRYPT_CLK_CTRL_1_MAA_UMAA_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CRYPT_CLK_CTRL_1_MAA_UMAA_CLK_SCALE_POS))
mbed_official 507:d4fc7603a669 406
mbed_official 507:d4fc7603a669 407 #define MXC_F_CLKMAN_CRYPT_CLK_CTRL_2_PRNG_PRNG_CLK_SCALE_POS 0
mbed_official 507:d4fc7603a669 408 #define MXC_F_CLKMAN_CRYPT_CLK_CTRL_2_PRNG_PRNG_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CRYPT_CLK_CTRL_2_PRNG_PRNG_CLK_SCALE_POS))
mbed_official 507:d4fc7603a669 409
mbed_official 507:d4fc7603a669 410 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_CM3_CLK_GATER_POS 0
mbed_official 507:d4fc7603a669 411 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_CM3_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_CM3_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 412 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSBUS_CLK_GATER_POS 2
mbed_official 507:d4fc7603a669 413 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSBUS_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSBUS_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 414 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_ICACHE_CLK_GATER_POS 4
mbed_official 507:d4fc7603a669 415 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_ICACHE_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_ICACHE_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 416 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_FLASH_CLK_GATER_POS 6
mbed_official 507:d4fc7603a669 417 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_FLASH_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_FLASH_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 418 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_SRAM_CLK_GATER_POS 8
mbed_official 507:d4fc7603a669 419 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_SRAM_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_SRAM_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 420 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_APB_BRIDGE_CLK_GATER_POS 10
mbed_official 507:d4fc7603a669 421 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_APB_BRIDGE_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_APB_BRIDGE_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 422 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSMAN_CLK_GATER_POS 12
mbed_official 507:d4fc7603a669 423 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSMAN_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSMAN_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 424 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_UART0_CLK_GATER_POS 14
mbed_official 507:d4fc7603a669 425 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_UART0_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_UART0_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 426 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_UART1_CLK_GATER_POS 16
mbed_official 507:d4fc7603a669 427 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_UART1_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_UART1_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 428 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER0_CLK_GATER_POS 18
mbed_official 507:d4fc7603a669 429 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER0_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER0_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 430 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER1_CLK_GATER_POS 20
mbed_official 507:d4fc7603a669 431 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER1_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER1_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 432 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER2_CLK_GATER_POS 22
mbed_official 507:d4fc7603a669 433 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER2_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER2_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 434 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER3_CLK_GATER_POS 24
mbed_official 507:d4fc7603a669 435 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER3_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER3_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 436 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG0_CLK_GATER_POS 26
mbed_official 507:d4fc7603a669 437 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG0_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG0_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 438 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG1_CLK_GATER_POS 28
mbed_official 507:d4fc7603a669 439 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG1_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG1_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 440 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_USB_CLK_GATER_POS 30
mbed_official 507:d4fc7603a669 441 #define MXC_F_CLKMAN_CLK_GATE_CTRL0_USB_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_USB_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 442
mbed_official 507:d4fc7603a669 443 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_TESTACC_CLK_GATER_POS 0
mbed_official 507:d4fc7603a669 444 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_TESTACC_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_TESTACC_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 445 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_ADC_CLK_GATER_POS 2
mbed_official 507:d4fc7603a669 446 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_ADC_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_ADC_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 447 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_0_CLK_GATER_POS 4
mbed_official 507:d4fc7603a669 448 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_0_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_0_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 449 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_1_CLK_GATER_POS 6
mbed_official 507:d4fc7603a669 450 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_1_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_1_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 451 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_0_CLK_GATER_POS 8
mbed_official 507:d4fc7603a669 452 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_0_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_0_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 453 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_1_CLK_GATER_POS 10
mbed_official 507:d4fc7603a669 454 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_1_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_1_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 455 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_PMU_CLK_GATER_POS 12
mbed_official 507:d4fc7603a669 456 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_PMU_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_PMU_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 457 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_LCD_CLK_GATER_POS 14
mbed_official 507:d4fc7603a669 458 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_LCD_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_LCD_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 459 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_GPIO_CLK_GATER_POS 16
mbed_official 507:d4fc7603a669 460 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_GPIO_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_GPIO_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 461 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_PULSETRAIN_CLK_GATER_POS 18
mbed_official 507:d4fc7603a669 462 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_PULSETRAIN_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_PULSETRAIN_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 463 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI0_CLK_GATER_POS 20
mbed_official 507:d4fc7603a669 464 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI0_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI0_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 465 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI1_CLK_GATER_POS 22
mbed_official 507:d4fc7603a669 466 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI1_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI1_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 467 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI2_CLK_GATER_POS 24
mbed_official 507:d4fc7603a669 468 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI2_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI2_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 469 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM0_CLK_GATER_POS 26
mbed_official 507:d4fc7603a669 470 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM0_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM0_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 471 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM1_CLK_GATER_POS 28
mbed_official 507:d4fc7603a669 472 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM1_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM1_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 473 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CS_CLK_GATER_POS 30
mbed_official 507:d4fc7603a669 474 #define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CS_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CS_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 475
mbed_official 507:d4fc7603a669 476 #define MXC_F_CLKMAN_CLK_GATE_CTRL2_CRC_CLK_GATER_POS 0
mbed_official 507:d4fc7603a669 477 #define MXC_F_CLKMAN_CLK_GATE_CTRL2_CRC_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL2_CRC_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 478 #define MXC_F_CLKMAN_CLK_GATE_CTRL2_TPU_CLK_GATER_POS 2
mbed_official 507:d4fc7603a669 479 #define MXC_F_CLKMAN_CLK_GATE_CTRL2_TPU_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL2_TPU_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 480 #define MXC_F_CLKMAN_CLK_GATE_CTRL2_SSBMUX_CLK_GATER_POS 4
mbed_official 507:d4fc7603a669 481 #define MXC_F_CLKMAN_CLK_GATE_CTRL2_SSBMUX_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL2_SSBMUX_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 482 #define MXC_F_CLKMAN_CLK_GATE_CTRL2_PAD_CLK_GATER_POS 6
mbed_official 507:d4fc7603a669 483 #define MXC_F_CLKMAN_CLK_GATE_CTRL2_PAD_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL2_PAD_CLK_GATER_POS))
mbed_official 507:d4fc7603a669 484
mbed_official 507:d4fc7603a669 485 #ifdef __cplusplus
mbed_official 507:d4fc7603a669 486 }
mbed_official 507:d4fc7603a669 487 #endif
mbed_official 507:d4fc7603a669 488
mbed_official 507:d4fc7603a669 489 /**
mbed_official 507:d4fc7603a669 490 * @}
mbed_official 507:d4fc7603a669 491 */
mbed_official 507:d4fc7603a669 492
mbed_official 507:d4fc7603a669 493 #endif /* _MXC_CLKMAN_REGS_H_ */