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targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_spi.c@387:643a59b3dbac, 2014-11-05 (annotated)

Committer:: mbed_official
Date:: Wed Nov 05 14:30:08 2014 +0000
Revision:: 387:643a59b3dbac
Parent:: 382:ee426a420dbb
Child:: 489:119543c9f674

Synchronized with git revision cfeccf154f8f92c3ea9c0c881c577c154537aecc

Full URL: https://github.com/mbedmicro/mbed/commit/cfeccf154f8f92c3ea9c0c881c577c154537aecc/

Exporters: STM32L053R8 - IAR exporter

Who changed what in which revision?

User	Revision	Line number	New contents of line
mbed_official	376:cb4d9db17537	1	/**
mbed_official	376:cb4d9db17537	2	******************************************************************************
mbed_official	376:cb4d9db17537	3	* @file stm32l0xx_hal_spi.c
mbed_official	376:cb4d9db17537	4	* @author MCD Application Team
mbed_official	376:cb4d9db17537	5	* @version V1.1.0
mbed_official	376:cb4d9db17537	6	* @date 18-June-2014
mbed_official	376:cb4d9db17537	7	* @brief SPI HAL module driver.
mbed_official	376:cb4d9db17537	8	*
mbed_official	376:cb4d9db17537	9	* This file provides firmware functions to manage the following
mbed_official	376:cb4d9db17537	10	* functionalities of the Serial Peripheral Interface (SPI) peripheral:
mbed_official	376:cb4d9db17537	11	* + Initialization and de-initialization functions
mbed_official	376:cb4d9db17537	12	* + IO operation functions
mbed_official	376:cb4d9db17537	13	* + Peripheral Control functions
mbed_official	376:cb4d9db17537	14	* + Peripheral State functions
mbed_official	376:cb4d9db17537	15	@verbatim
mbed_official	376:cb4d9db17537	16	==============================================================================
mbed_official	376:cb4d9db17537	17	##### How to use this driver #####
mbed_official	376:cb4d9db17537	18	==============================================================================
mbed_official	376:cb4d9db17537	19	[..]
mbed_official	376:cb4d9db17537	20	The SPI HAL driver can be used as follows:
mbed_official	376:cb4d9db17537	21
mbed_official	376:cb4d9db17537	22	(#) Declare a SPI_HandleTypeDef handle structure, for example:
mbed_official	376:cb4d9db17537	23	SPI_HandleTypeDef hspi;
mbed_official	376:cb4d9db17537	24
mbed_official	376:cb4d9db17537	25	(#)Initialize the SPI low level resources by implement the HAL_SPI_MspInit ()API:
mbed_official	376:cb4d9db17537	26	(##) Enable the SPIx interface clock
mbed_official	376:cb4d9db17537	27	(##) SPI pins configuration
mbed_official	376:cb4d9db17537	28	(+++) Enable the clock for the SPI GPIOs
mbed_official	376:cb4d9db17537	29	(+++) Configure these SPI pins as alternate function push-pull
mbed_official	376:cb4d9db17537	30	(##) NVIC configuration if you need to use interrupt process
mbed_official	376:cb4d9db17537	31	(+++) Configure the SPIx interrupt priority
mbed_official	376:cb4d9db17537	32	(+++) Enable the NVIC SPI IRQ handle
mbed_official	376:cb4d9db17537	33	(##) DMA Configuration if you need to use DMA process
mbed_official	376:cb4d9db17537	34	(+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream
mbed_official	376:cb4d9db17537	35	(+++) Enable the DMAx interface clock using
mbed_official	376:cb4d9db17537	36	(+++) Configure the DMA handle parameters
mbed_official	376:cb4d9db17537	37	(+++) Configure the DMA Tx or Rx Stream
mbed_official	376:cb4d9db17537	38	(+++) Associate the initilalized hdma_tx handle to the hspi DMA Tx or Rx handle
mbed_official	376:cb4d9db17537	39	(+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Stream
mbed_official	376:cb4d9db17537	40
mbed_official	376:cb4d9db17537	41	(#) Program the Mode, Direction , Data size, Baudrate Prescaler, NSS
mbed_official	376:cb4d9db17537	42	management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
mbed_official	376:cb4d9db17537	43
mbed_official	376:cb4d9db17537	44	(#) Initialize the SPI registers by calling the HAL_SPI_Init() API:
mbed_official	376:cb4d9db17537	45	(++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
mbed_official	376:cb4d9db17537	46	by calling the customed HAL_SPI_MspInit(&hspi) API.
mbed_official	376:cb4d9db17537	47	[..]
mbed_official	376:cb4d9db17537	48	Circular mode restriction:
mbed_official	376:cb4d9db17537	49	(#) The DMA circular mode cannot be used when the SPI is configured in these modes:
mbed_official	376:cb4d9db17537	50	(##) Master 2Lines RxOnly
mbed_official	376:cb4d9db17537	51	(##) Master 1Line Rx
mbed_official	376:cb4d9db17537	52	(#) The CRC feature is not managed when the DMA circular mode is enabled
mbed_official	376:cb4d9db17537	53	(#) When the SPI DMA Pause/Stop features are used, we must use the following APIs
mbed_official	376:cb4d9db17537	54	the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks
mbed_official	376:cb4d9db17537	55
mbed_official	376:cb4d9db17537	56	[..]
mbed_official	376:cb4d9db17537	57	Using the HAL it is not possible to reach all supported SPI frequency with the differents SPI Modes,
mbed_official	376:cb4d9db17537	58	the following table resume the max SPI frequency reached with data size 8bits/16bits:
mbed_official	376:cb4d9db17537	59	+-----------------------------------------------------------------------------------------+
mbed_official	376:cb4d9db17537	60	\| \| \| 2Lines Fullduplex \| 2Lines RxOnly \| 1Line \|
mbed_official	376:cb4d9db17537	61	\| Process \| Tranfert mode \|--------------------\|--------------------\|--------------------\|
mbed_official	376:cb4d9db17537	62	\| \| \| Master \| Slave \| Master \| Slave \| Master \| Slave \|
mbed_official	376:cb4d9db17537	63	\|=========================================================================================\|
mbed_official	376:cb4d9db17537	64	\| T \| Polling \| Fcpu/2 \| Fcpu/2 \| NA \| NA \| NA \| NA \|
mbed_official	376:cb4d9db17537	65	\| X \|----------------\|----------\|---------\|----------\|---------\|----------\|---------\|
mbed_official	376:cb4d9db17537	66	\| / \| Interrupt \| Fcpu/4 \| Fcpu/16 \| NA \| NA \| NA \| NA \|
mbed_official	376:cb4d9db17537	67	\| R \|----------------\|----------\|---------\|----------\|---------\|----------\|---------\|
mbed_official	376:cb4d9db17537	68	\| X \| DMA \| Fcpu/2 \| Fcpu/2 \| NA \| NA \| NA \| NA \|
mbed_official	376:cb4d9db17537	69	\|=========\|================\|==========\|=========\|==========\|=========\|==========\|=========\|
mbed_official	376:cb4d9db17537	70	\| \| Polling \| Fcpu/2 \| Fcpu/4 \| Fcpu/16 \| Fcpu/8 \| Fcpu/8 \| Fcpu/8 \|
mbed_official	376:cb4d9db17537	71	\| \|----------------\|----------\|---------\|----------\|---------\|----------\|---------\|
mbed_official	376:cb4d9db17537	72	\| R \| Interrupt \| Fcpu/8 \| Fcpu/16 \| Fcpu/8 \| Fcpu/8 \| Fcpu/8 \| Fcpu/4 \|
mbed_official	376:cb4d9db17537	73	\| X \|----------------\|----------\|---------\|----------\|---------\|----------\|---------\|
mbed_official	376:cb4d9db17537	74	\| \| DMA \| Fcpu/4 \| Fcpu/2 \| Fcpu/4 \| Fcpu/16 \| Fcpu/2 \| Fcpu/16 \|
mbed_official	376:cb4d9db17537	75	\|=========\|================\|==========\|=========\|==========\|=========\|==========\|=========\|
mbed_official	376:cb4d9db17537	76	\| \| Polling \| Fcpu/2 \| Fcpu/2 \| NA \| NA \| Fcpu/8 \| Fcpu/8 \|
mbed_official	376:cb4d9db17537	77	\| \|----------------\|----------\|---------\|----------\|---------\|----------\|---------\|
mbed_official	376:cb4d9db17537	78	\| T \| Interrupt \| Fcpu/2 \| Fcpu/4 \| NA \| NA \| Fcpu/16 \| Fcpu/8 \|
mbed_official	376:cb4d9db17537	79	\| X \|----------------\|----------\|---------\|----------\|---------\|----------\|---------\|
mbed_official	376:cb4d9db17537	80	\| \| DMA \| Fcpu/2 \| Fcpu/2 \| NA \| NA \| Fcpu/8 \| Fcpu/16 \|
mbed_official	376:cb4d9db17537	81	+-----------------------------------------------------------------------------------------+
mbed_official	376:cb4d9db17537	82	@note The max SPI frequency depend on SPI data size (4bits, 5bits,..., 8bits,...15bits, 16bits),
mbed_official	376:cb4d9db17537	83	SPI mode(2 Lines fullduplex, 2 lines RxOnly, 1 line TX/RX) and Process mode (Polling, IT, DMA).
mbed_official	376:cb4d9db17537	84	@note
mbed_official	376:cb4d9db17537	85	(#) TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and HAL_SPI_TransmitReceive_DMA()
mbed_official	376:cb4d9db17537	86	(#) RX processes are HAL_SPI_Receive(), HAL_SPI_Receive_IT() and HAL_SPI_Receive_DMA()
mbed_official	376:cb4d9db17537	87	(#) TX processes are HAL_SPI_Transmit(), HAL_SPI_Transmit_IT() and HAL_SPI_Transmit_DMA()
mbed_official	376:cb4d9db17537	88
mbed_official	376:cb4d9db17537	89	@endverbatim
mbed_official	376:cb4d9db17537	90	******************************************************************************
mbed_official	376:cb4d9db17537	91	* @attention
mbed_official	376:cb4d9db17537	92	*
mbed_official	376:cb4d9db17537	93	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official	376:cb4d9db17537	94	*
mbed_official	376:cb4d9db17537	95	* Redistribution and use in source and binary forms, with or without modification,
mbed_official	376:cb4d9db17537	96	* are permitted provided that the following conditions are met:
mbed_official	376:cb4d9db17537	97	* 1. Redistributions of source code must retain the above copyright notice,
mbed_official	376:cb4d9db17537	98	* this list of conditions and the following disclaimer.
mbed_official	376:cb4d9db17537	99	* 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official	376:cb4d9db17537	100	* this list of conditions and the following disclaimer in the documentation
mbed_official	376:cb4d9db17537	101	* and/or other materials provided with the distribution.
mbed_official	376:cb4d9db17537	102	* 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official	376:cb4d9db17537	103	* may be used to endorse or promote products derived from this software
mbed_official	376:cb4d9db17537	104	* without specific prior written permission.
mbed_official	376:cb4d9db17537	105	*
mbed_official	376:cb4d9db17537	106	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official	376:cb4d9db17537	107	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official	376:cb4d9db17537	108	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official	376:cb4d9db17537	109	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official	376:cb4d9db17537	110	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official	376:cb4d9db17537	111	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official	376:cb4d9db17537	112	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official	376:cb4d9db17537	113	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official	376:cb4d9db17537	114	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official	376:cb4d9db17537	115	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official	376:cb4d9db17537	116	*
mbed_official	376:cb4d9db17537	117	******************************************************************************
mbed_official	376:cb4d9db17537	118	*/
mbed_official	376:cb4d9db17537	119
mbed_official	376:cb4d9db17537	120	/* Includes ------------------------------------------------------------------*/
mbed_official	376:cb4d9db17537	121	#include "stm32l0xx_hal.h"
mbed_official	376:cb4d9db17537	122
mbed_official	376:cb4d9db17537	123	/** @addtogroup STM32L0xx_HAL_Driver
mbed_official	376:cb4d9db17537	124	* @{
mbed_official	376:cb4d9db17537	125	*/
mbed_official	376:cb4d9db17537	126
mbed_official	376:cb4d9db17537	127	/** @defgroup SPI
mbed_official	376:cb4d9db17537	128	* @brief SPI HAL module driver
mbed_official	376:cb4d9db17537	129	* @{
mbed_official	376:cb4d9db17537	130	*/
mbed_official	376:cb4d9db17537	131
mbed_official	376:cb4d9db17537	132	#ifdef HAL_SPI_MODULE_ENABLED
mbed_official	376:cb4d9db17537	133
mbed_official	376:cb4d9db17537	134	/* Private typedef -----------------------------------------------------------*/
mbed_official	376:cb4d9db17537	135	/* Private define ------------------------------------------------------------*/
mbed_official	376:cb4d9db17537	136	#define SPI_TIMEOUT_VALUE 100
mbed_official	376:cb4d9db17537	137	/* Private macro -------------------------------------------------------------*/
mbed_official	376:cb4d9db17537	138	/* Private variables ---------------------------------------------------------*/
mbed_official	376:cb4d9db17537	139	/* Private function prototypes -----------------------------------------------*/
mbed_official	376:cb4d9db17537	140	static void SPI_TxCloseIRQHandler(SPI_HandleTypeDef *hspi);
mbed_official	376:cb4d9db17537	141	static void SPI_TxISR(SPI_HandleTypeDef *hspi);
mbed_official	376:cb4d9db17537	142	static void SPI_RxCloseIRQHandler(SPI_HandleTypeDef *hspi);
mbed_official	376:cb4d9db17537	143	static void SPI_2LinesRxISR(SPI_HandleTypeDef *hspi);
mbed_official	376:cb4d9db17537	144	static void SPI_RxISR(SPI_HandleTypeDef *hspi);
mbed_official	376:cb4d9db17537	145	static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma);
mbed_official	376:cb4d9db17537	146	static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
mbed_official	376:cb4d9db17537	147	static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma);
mbed_official	376:cb4d9db17537	148	static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma);
mbed_official	376:cb4d9db17537	149	static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma);
mbed_official	376:cb4d9db17537	150	static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma);
mbed_official	376:cb4d9db17537	151	static void SPI_DMAError(DMA_HandleTypeDef *hdma);
mbed_official	376:cb4d9db17537	152	static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
mbed_official	376:cb4d9db17537	153
mbed_official	376:cb4d9db17537	154	/* Private functions ---------------------------------------------------------*/
mbed_official	376:cb4d9db17537	155
mbed_official	376:cb4d9db17537	156	/** @defgroup SPI_Private_Functions
mbed_official	376:cb4d9db17537	157	* @{
mbed_official	376:cb4d9db17537	158	*/
mbed_official	376:cb4d9db17537	159
mbed_official	376:cb4d9db17537	160	/** @defgroup SPI_Group1 Initialization and de-initialization functions
mbed_official	376:cb4d9db17537	161	* @brief Initialization and Configuration functions
mbed_official	376:cb4d9db17537	162	*
mbed_official	376:cb4d9db17537	163	@verbatim
mbed_official	376:cb4d9db17537	164	===============================================================================
mbed_official	376:cb4d9db17537	165	##### Initialization and de-initialization functions #####
mbed_official	376:cb4d9db17537	166	===============================================================================
mbed_official	376:cb4d9db17537	167	[..] This subsection provides a set of functions allowing to initialize and
mbed_official	376:cb4d9db17537	168	de-initialiaze the SPIx peripheral:
mbed_official	376:cb4d9db17537	169
mbed_official	376:cb4d9db17537	170	(+) User must Implement HAL_SPI_MspInit() function in which he configures
mbed_official	376:cb4d9db17537	171	all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
mbed_official	376:cb4d9db17537	172
mbed_official	376:cb4d9db17537	173	(+) Call the function HAL_SPI_Init() to configure the selected device with
mbed_official	376:cb4d9db17537	174	the selected configuration:
mbed_official	376:cb4d9db17537	175	(++) Mode
mbed_official	376:cb4d9db17537	176	(++) Direction
mbed_official	376:cb4d9db17537	177	(++) Data Size
mbed_official	376:cb4d9db17537	178	(++) Clock Polarity and Phase
mbed_official	376:cb4d9db17537	179	(++) NSS Management
mbed_official	376:cb4d9db17537	180	(++) BaudRate Prescaler
mbed_official	376:cb4d9db17537	181	(++) FirstBit
mbed_official	376:cb4d9db17537	182	(++) TIMode
mbed_official	376:cb4d9db17537	183	(++) CRC Calculation
mbed_official	376:cb4d9db17537	184	(++) CRC Polynomial if CRC enabled
mbed_official	376:cb4d9db17537	185
mbed_official	376:cb4d9db17537	186	(+) Call the function HAL_SPI_DeInit() to restore the default configuration
mbed_official	376:cb4d9db17537	187	of the selected SPIx periperal.
mbed_official	376:cb4d9db17537	188
mbed_official	376:cb4d9db17537	189	@endverbatim
mbed_official	376:cb4d9db17537	190	* @{
mbed_official	376:cb4d9db17537	191	*/
mbed_official	376:cb4d9db17537	192
mbed_official	376:cb4d9db17537	193	/**
mbed_official	376:cb4d9db17537	194	* @brief Initializes the SPI according to the specified parameters
mbed_official	376:cb4d9db17537	195	* in the SPI_InitTypeDef and create the associated handle.
mbed_official	376:cb4d9db17537	196	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	197	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	198	* @retval HAL status
mbed_official	376:cb4d9db17537	199	*/
mbed_official	376:cb4d9db17537	200	HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
mbed_official	376:cb4d9db17537	201	{
mbed_official	376:cb4d9db17537	202	/* Check the SPI handle allocation */
mbed_official	387:643a59b3dbac	203	if(hspi == HAL_NULL)
mbed_official	376:cb4d9db17537	204	{
mbed_official	376:cb4d9db17537	205	return HAL_ERROR;
mbed_official	376:cb4d9db17537	206	}
mbed_official	376:cb4d9db17537	207
mbed_official	376:cb4d9db17537	208	/* Check the parameters */
mbed_official	376:cb4d9db17537	209	assert_param(IS_SPI_MODE(hspi->Init.Mode));
mbed_official	376:cb4d9db17537	210	assert_param(IS_SPI_DIRECTION_MODE(hspi->Init.Direction));
mbed_official	376:cb4d9db17537	211	assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
mbed_official	376:cb4d9db17537	212	assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
mbed_official	376:cb4d9db17537	213	assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
mbed_official	376:cb4d9db17537	214	assert_param(IS_SPI_NSS(hspi->Init.NSS));
mbed_official	376:cb4d9db17537	215	assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
mbed_official	376:cb4d9db17537	216	assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
mbed_official	376:cb4d9db17537	217	assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
mbed_official	376:cb4d9db17537	218	assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation));
mbed_official	376:cb4d9db17537	219	assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
mbed_official	376:cb4d9db17537	220
mbed_official	376:cb4d9db17537	221	if(hspi->State == HAL_SPI_STATE_RESET)
mbed_official	376:cb4d9db17537	222	{
mbed_official	376:cb4d9db17537	223	/* Init the low level hardware : GPIO, CLOCK, NVIC... */
mbed_official	376:cb4d9db17537	224	HAL_SPI_MspInit(hspi);
mbed_official	376:cb4d9db17537	225	}
mbed_official	376:cb4d9db17537	226
mbed_official	376:cb4d9db17537	227	hspi->State = HAL_SPI_STATE_BUSY;
mbed_official	376:cb4d9db17537	228
mbed_official	376:cb4d9db17537	229	/* Disble the selected SPI peripheral */
mbed_official	376:cb4d9db17537	230	__HAL_SPI_DISABLE(hspi);
mbed_official	376:cb4d9db17537	231
mbed_official	376:cb4d9db17537	232	/----------------------- SPIx CR1 & CR2 Configuration ---------------------/
mbed_official	376:cb4d9db17537	233	/* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
mbed_official	376:cb4d9db17537	234	Communication speed, First bit and CRC calculation state */
mbed_official	376:cb4d9db17537	235	hspi->Instance->CR1 = (hspi->Init.Mode \| hspi->Init.Direction \| hspi->Init.DataSize \|
mbed_official	376:cb4d9db17537	236	hspi->Init.CLKPolarity \| hspi->Init.CLKPhase \| (hspi->Init.NSS & SPI_CR1_SSM) \|
mbed_official	376:cb4d9db17537	237	hspi->Init.BaudRatePrescaler \| hspi->Init.FirstBit \| hspi->Init.CRCCalculation);
mbed_official	376:cb4d9db17537	238
mbed_official	376:cb4d9db17537	239	/* Configure : NSS management */
mbed_official	376:cb4d9db17537	240	hspi->Instance->CR2 = (((hspi->Init.NSS >> 16) & SPI_CR2_SSOE) \| hspi->Init.TIMode);
mbed_official	376:cb4d9db17537	241
mbed_official	376:cb4d9db17537	242	/---------------------------- SPIx CRCPOLY Configuration ------------------/
mbed_official	376:cb4d9db17537	243	/* Configure : CRC Polynomial */
mbed_official	376:cb4d9db17537	244	hspi->Instance->CRCPR = hspi->Init.CRCPolynomial;
mbed_official	376:cb4d9db17537	245
mbed_official	376:cb4d9db17537	246	/* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
mbed_official	376:cb4d9db17537	247	hspi->Instance->I2SCFGR &= (uint32_t)~((uint32_t)SPI_I2SCFGR_I2SMOD);
mbed_official	376:cb4d9db17537	248
mbed_official	376:cb4d9db17537	249	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official	376:cb4d9db17537	250	hspi->State = HAL_SPI_STATE_READY;
mbed_official	376:cb4d9db17537	251
mbed_official	376:cb4d9db17537	252	return HAL_OK;
mbed_official	376:cb4d9db17537	253	}
mbed_official	376:cb4d9db17537	254
mbed_official	376:cb4d9db17537	255	/**
mbed_official	376:cb4d9db17537	256	* @brief DeInitializes the SPI peripheral
mbed_official	376:cb4d9db17537	257	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	258	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	259	* @retval HAL status
mbed_official	376:cb4d9db17537	260	*/
mbed_official	376:cb4d9db17537	261	HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
mbed_official	376:cb4d9db17537	262	{
mbed_official	376:cb4d9db17537	263	/* Check the SPI handle allocation */
mbed_official	387:643a59b3dbac	264	if(hspi == HAL_NULL)
mbed_official	376:cb4d9db17537	265	{
mbed_official	376:cb4d9db17537	266	return HAL_ERROR;
mbed_official	376:cb4d9db17537	267	}
mbed_official	376:cb4d9db17537	268
mbed_official	376:cb4d9db17537	269	hspi->State = HAL_SPI_STATE_BUSY;
mbed_official	376:cb4d9db17537	270
mbed_official	376:cb4d9db17537	271	/* Disable the SPI Peripheral Clock */
mbed_official	376:cb4d9db17537	272	__HAL_SPI_DISABLE(hspi);
mbed_official	376:cb4d9db17537	273
mbed_official	376:cb4d9db17537	274	/* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
mbed_official	376:cb4d9db17537	275	HAL_SPI_MspDeInit(hspi);
mbed_official	376:cb4d9db17537	276
mbed_official	376:cb4d9db17537	277	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official	376:cb4d9db17537	278	hspi->State = HAL_SPI_STATE_RESET;
mbed_official	376:cb4d9db17537	279
mbed_official	376:cb4d9db17537	280	/* Release Lock */
mbed_official	376:cb4d9db17537	281	__HAL_UNLOCK(hspi);
mbed_official	376:cb4d9db17537	282
mbed_official	376:cb4d9db17537	283	return HAL_OK;
mbed_official	376:cb4d9db17537	284	}
mbed_official	376:cb4d9db17537	285
mbed_official	376:cb4d9db17537	286	/**
mbed_official	376:cb4d9db17537	287	* @brief SPI MSP Init
mbed_official	376:cb4d9db17537	288	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	289	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	290	* @retval None
mbed_official	376:cb4d9db17537	291	*/
mbed_official	376:cb4d9db17537	292	__weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
mbed_official	376:cb4d9db17537	293	{
mbed_official	376:cb4d9db17537	294	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	295	the HAL_SPI_MspInit could be implenetd in the user file
mbed_official	376:cb4d9db17537	296	*/
mbed_official	376:cb4d9db17537	297	}
mbed_official	376:cb4d9db17537	298
mbed_official	376:cb4d9db17537	299	/**
mbed_official	376:cb4d9db17537	300	* @brief SPI MSP DeInit
mbed_official	376:cb4d9db17537	301	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	302	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	303	* @retval None
mbed_official	376:cb4d9db17537	304	*/
mbed_official	376:cb4d9db17537	305	__weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
mbed_official	376:cb4d9db17537	306	{
mbed_official	376:cb4d9db17537	307	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	308	the HAL_SPI_MspDeInit could be implenetd in the user file
mbed_official	376:cb4d9db17537	309	*/
mbed_official	376:cb4d9db17537	310	}
mbed_official	376:cb4d9db17537	311
mbed_official	376:cb4d9db17537	312	/**
mbed_official	376:cb4d9db17537	313	* @}
mbed_official	376:cb4d9db17537	314	*/
mbed_official	376:cb4d9db17537	315
mbed_official	376:cb4d9db17537	316	/** @defgroup SPI_Group2 IO operation functions
mbed_official	376:cb4d9db17537	317	* @brief Data transfers functions
mbed_official	376:cb4d9db17537	318	*
mbed_official	376:cb4d9db17537	319	@verbatim
mbed_official	376:cb4d9db17537	320	==============================================================================
mbed_official	376:cb4d9db17537	321	##### IO operation functions #####
mbed_official	376:cb4d9db17537	322	===============================================================================
mbed_official	376:cb4d9db17537	323	This subsection provides a set of functions allowing to manage the SPI
mbed_official	376:cb4d9db17537	324	data transfers.
mbed_official	376:cb4d9db17537	325
mbed_official	376:cb4d9db17537	326	[..] The SPI supports master and slave mode :
mbed_official	376:cb4d9db17537	327
mbed_official	376:cb4d9db17537	328	(#) There are two mode of transfer:
mbed_official	376:cb4d9db17537	329	(++) Blocking mode: The communication is performed in polling mode.
mbed_official	376:cb4d9db17537	330	The HAL status of all data processing is returned by the same function
mbed_official	376:cb4d9db17537	331	after finishing transfer.
mbed_official	376:cb4d9db17537	332	(++) No-Blocking mode: The communication is performed using Interrupts
mbed_official	376:cb4d9db17537	333	or DMA, These API's return the HAL status.
mbed_official	376:cb4d9db17537	334	The end of the data processing will be indicated through the
mbed_official	376:cb4d9db17537	335	dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
mbed_official	376:cb4d9db17537	336	using DMA mode.
mbed_official	376:cb4d9db17537	337	The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks
mbed_official	376:cb4d9db17537	338	will be executed respectivelly at the end of the transmit or Receive process
mbed_official	376:cb4d9db17537	339	The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
mbed_official	376:cb4d9db17537	340
mbed_official	376:cb4d9db17537	341	(#) Blocking mode API's are :
mbed_official	376:cb4d9db17537	342	(++) HAL_SPI_Transmit()in 1Line (simplex) and 2Lines (full duplex) mode
mbed_official	376:cb4d9db17537	343	(++) HAL_SPI_Receive() in 1Line (simplex) and 2Lines (full duplex) mode
mbed_official	376:cb4d9db17537	344	(++) HAL_SPI_TransmitReceive() in full duplex mode
mbed_official	376:cb4d9db17537	345
mbed_official	376:cb4d9db17537	346	(#) Non-Blocking mode API's with Interrupt are :
mbed_official	376:cb4d9db17537	347	(++) HAL_SPI_Transmit_IT()in 1Line (simplex) and 2Lines (full duplex) mode
mbed_official	376:cb4d9db17537	348	(++) HAL_SPI_Receive_IT() in 1Line (simplex) and 2Lines (full duplex) mode
mbed_official	376:cb4d9db17537	349	(++) HAL_SPI_TransmitReceive_IT()in full duplex mode
mbed_official	376:cb4d9db17537	350	(++) HAL_SPI_IRQHandler()
mbed_official	376:cb4d9db17537	351
mbed_official	376:cb4d9db17537	352	(#) No-Blocking mode functions with DMA are :
mbed_official	376:cb4d9db17537	353	(++) HAL_SPI_Transmit_DMA()in 1Line (simplex) and 2Lines (full duplex) mode
mbed_official	376:cb4d9db17537	354	(++) HAL_SPI_Receive_DMA() in 1Line (simplex) and 2Lines (full duplex) mode
mbed_official	376:cb4d9db17537	355	(++) HAL_SPI_TransmitReceie_DMA() in full duplex mode
mbed_official	376:cb4d9db17537	356
mbed_official	376:cb4d9db17537	357	(#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
mbed_official	376:cb4d9db17537	358	(++) HAL_SPI_TxCpltCallback()
mbed_official	376:cb4d9db17537	359	(++) HAL_SPI_RxCpltCallback()
mbed_official	376:cb4d9db17537	360	(++) HAL_SPI_ErrorCallback()
mbed_official	376:cb4d9db17537	361	(++) HAL_SPI_TxRxCpltCallback()
mbed_official	376:cb4d9db17537	362
mbed_official	376:cb4d9db17537	363	@endverbatim
mbed_official	376:cb4d9db17537	364	* @{
mbed_official	376:cb4d9db17537	365	*/
mbed_official	376:cb4d9db17537	366
mbed_official	376:cb4d9db17537	367	/**
mbed_official	376:cb4d9db17537	368	* @brief Transmit an amount of data in blocking mode
mbed_official	376:cb4d9db17537	369	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	370	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	371	* @param pData: pointer to data buffer
mbed_official	376:cb4d9db17537	372	* @param Size: amount of data to be sent
mbed_official	376:cb4d9db17537	373	* @param Timeout: Timeout duration
mbed_official	376:cb4d9db17537	374	* @retval HAL status
mbed_official	376:cb4d9db17537	375	*/
mbed_official	376:cb4d9db17537	376	HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size, uint32_t Timeout)
mbed_official	376:cb4d9db17537	377	{
mbed_official	376:cb4d9db17537	378
mbed_official	376:cb4d9db17537	379	if(hspi->State == HAL_SPI_STATE_READY)
mbed_official	376:cb4d9db17537	380	{
mbed_official	387:643a59b3dbac	381	if((pData == HAL_NULL ) \|\| (Size == 0))
mbed_official	376:cb4d9db17537	382	{
mbed_official	376:cb4d9db17537	383	return HAL_ERROR;
mbed_official	376:cb4d9db17537	384	}
mbed_official	376:cb4d9db17537	385
mbed_official	376:cb4d9db17537	386	/* Check the parameters */
mbed_official	376:cb4d9db17537	387	assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
mbed_official	376:cb4d9db17537	388
mbed_official	376:cb4d9db17537	389	/* Process Locked */
mbed_official	376:cb4d9db17537	390	__HAL_LOCK(hspi);
mbed_official	376:cb4d9db17537	391
mbed_official	376:cb4d9db17537	392	/* Configure communication */
mbed_official	376:cb4d9db17537	393	hspi->State = HAL_SPI_STATE_BUSY_TX;
mbed_official	376:cb4d9db17537	394	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official	376:cb4d9db17537	395
mbed_official	376:cb4d9db17537	396	hspi->pTxBuffPtr = pData;
mbed_official	376:cb4d9db17537	397	hspi->TxXferSize = Size;
mbed_official	376:cb4d9db17537	398	hspi->TxXferCount = Size;
mbed_official	376:cb4d9db17537	399
mbed_official	376:cb4d9db17537	400	/Init field not used in handle to zero /
mbed_official	376:cb4d9db17537	401	hspi->TxISR = 0;
mbed_official	376:cb4d9db17537	402	hspi->RxISR = 0;
mbed_official	376:cb4d9db17537	403	hspi->RxXferSize = 0;
mbed_official	376:cb4d9db17537	404	hspi->RxXferCount = 0;
mbed_official	376:cb4d9db17537	405
mbed_official	376:cb4d9db17537	406	/* Reset CRC Calculation */
mbed_official	376:cb4d9db17537	407	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	408	{
mbed_official	376:cb4d9db17537	409	__HAL_SPI_RESET_CRC(hspi);
mbed_official	376:cb4d9db17537	410	}
mbed_official	376:cb4d9db17537	411
mbed_official	376:cb4d9db17537	412	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
mbed_official	376:cb4d9db17537	413	{
mbed_official	376:cb4d9db17537	414	/* Configure communication direction : 1Line */
mbed_official	376:cb4d9db17537	415	__HAL_SPI_1LINE_TX(hspi);
mbed_official	376:cb4d9db17537	416	}
mbed_official	376:cb4d9db17537	417
mbed_official	376:cb4d9db17537	418	/* Check if the SPI is already enabled */
mbed_official	376:cb4d9db17537	419	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official	376:cb4d9db17537	420	{
mbed_official	376:cb4d9db17537	421	/* Enable SPI peripheral */
mbed_official	376:cb4d9db17537	422	__HAL_SPI_ENABLE(hspi);
mbed_official	376:cb4d9db17537	423	}
mbed_official	376:cb4d9db17537	424
mbed_official	376:cb4d9db17537	425	/* Transmit data in 8 Bit mode */
mbed_official	376:cb4d9db17537	426	if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
mbed_official	376:cb4d9db17537	427	{
mbed_official	376:cb4d9db17537	428
mbed_official	376:cb4d9db17537	429	if((hspi->Init.Mode == SPI_MODE_SLAVE)\|\| (hspi->TxXferCount == 0x01))
mbed_official	376:cb4d9db17537	430	{
mbed_official	376:cb4d9db17537	431	hspi->Instance->DR = (*hspi->pTxBuffPtr++);
mbed_official	376:cb4d9db17537	432	hspi->TxXferCount--;
mbed_official	376:cb4d9db17537	433	}
mbed_official	376:cb4d9db17537	434
mbed_official	376:cb4d9db17537	435	while(hspi->TxXferCount > 0)
mbed_official	376:cb4d9db17537	436	{
mbed_official	376:cb4d9db17537	437	/* Wait until TXE flag is set to send data */
mbed_official	376:cb4d9db17537	438	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
mbed_official	376:cb4d9db17537	439	{
mbed_official	376:cb4d9db17537	440	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	441	}
mbed_official	376:cb4d9db17537	442	hspi->Instance->DR = (*hspi->pTxBuffPtr++);
mbed_official	376:cb4d9db17537	443	hspi->TxXferCount--;
mbed_official	376:cb4d9db17537	444	}
mbed_official	376:cb4d9db17537	445	/* Enable CRC Transmission */
mbed_official	376:cb4d9db17537	446	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	447	{
mbed_official	376:cb4d9db17537	448	hspi->Instance->CR1 \|= SPI_CR1_CRCNEXT;
mbed_official	376:cb4d9db17537	449	}
mbed_official	376:cb4d9db17537	450	}
mbed_official	376:cb4d9db17537	451	/* Transmit data in 16 Bit mode */
mbed_official	376:cb4d9db17537	452	else
mbed_official	376:cb4d9db17537	453	{
mbed_official	376:cb4d9db17537	454	if((hspi->Init.Mode == SPI_MODE_SLAVE) \|\| (hspi->TxXferCount == 0x01))
mbed_official	376:cb4d9db17537	455	{
mbed_official	376:cb4d9db17537	456	hspi->Instance->DR = ((uint16_t)hspi->pTxBuffPtr);
mbed_official	376:cb4d9db17537	457	hspi->pTxBuffPtr+=2;
mbed_official	376:cb4d9db17537	458	hspi->TxXferCount--;
mbed_official	376:cb4d9db17537	459	}
mbed_official	376:cb4d9db17537	460
mbed_official	376:cb4d9db17537	461	while(hspi->TxXferCount > 0)
mbed_official	376:cb4d9db17537	462	{
mbed_official	376:cb4d9db17537	463	/* Wait until TXE flag is set to send data */
mbed_official	376:cb4d9db17537	464	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
mbed_official	376:cb4d9db17537	465	{
mbed_official	376:cb4d9db17537	466	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	467	}
mbed_official	376:cb4d9db17537	468	hspi->Instance->DR = ((uint16_t)hspi->pTxBuffPtr);
mbed_official	376:cb4d9db17537	469	hspi->pTxBuffPtr+=2;
mbed_official	376:cb4d9db17537	470	hspi->TxXferCount--;
mbed_official	376:cb4d9db17537	471	}
mbed_official	376:cb4d9db17537	472	/* Enable CRC Transmission */
mbed_official	376:cb4d9db17537	473	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	474	{
mbed_official	376:cb4d9db17537	475	hspi->Instance->CR1 \|= SPI_CR1_CRCNEXT;
mbed_official	376:cb4d9db17537	476	}
mbed_official	376:cb4d9db17537	477	}
mbed_official	376:cb4d9db17537	478
mbed_official	376:cb4d9db17537	479	/* Wait until TXE flag is set to send data */
mbed_official	376:cb4d9db17537	480	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
mbed_official	376:cb4d9db17537	481	{
mbed_official	376:cb4d9db17537	482	hspi->ErrorCode \|= HAL_SPI_ERROR_FLAG;
mbed_official	376:cb4d9db17537	483	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	484	}
mbed_official	376:cb4d9db17537	485
mbed_official	376:cb4d9db17537	486	/* Wait until Busy flag is reset before disabling SPI */
mbed_official	376:cb4d9db17537	487	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
mbed_official	376:cb4d9db17537	488	{
mbed_official	376:cb4d9db17537	489	hspi->ErrorCode \|= HAL_SPI_ERROR_FLAG;
mbed_official	376:cb4d9db17537	490	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	491	}
mbed_official	376:cb4d9db17537	492
mbed_official	376:cb4d9db17537	493	/* Clear OVERUN flag in 2 Lines communication mode because received is not read */
mbed_official	376:cb4d9db17537	494	if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
mbed_official	376:cb4d9db17537	495	{
mbed_official	376:cb4d9db17537	496	__HAL_SPI_CLEAR_OVRFLAG(hspi);
mbed_official	376:cb4d9db17537	497	}
mbed_official	376:cb4d9db17537	498
mbed_official	376:cb4d9db17537	499	hspi->State = HAL_SPI_STATE_READY;
mbed_official	376:cb4d9db17537	500
mbed_official	376:cb4d9db17537	501	/* Process Unlocked */
mbed_official	376:cb4d9db17537	502	__HAL_UNLOCK(hspi);
mbed_official	376:cb4d9db17537	503
mbed_official	376:cb4d9db17537	504	return HAL_OK;
mbed_official	376:cb4d9db17537	505	}
mbed_official	376:cb4d9db17537	506	else
mbed_official	376:cb4d9db17537	507	{
mbed_official	376:cb4d9db17537	508	return HAL_BUSY;
mbed_official	376:cb4d9db17537	509	}
mbed_official	376:cb4d9db17537	510	}
mbed_official	376:cb4d9db17537	511
mbed_official	376:cb4d9db17537	512	/**
mbed_official	376:cb4d9db17537	513	* @brief Receive an amount of data in blocking mode
mbed_official	376:cb4d9db17537	514	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	515	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	516	* @param pData: pointer to data buffer
mbed_official	376:cb4d9db17537	517	* @param Size: amount of data to be sent
mbed_official	376:cb4d9db17537	518	* @param Timeout: Timeout duration
mbed_official	376:cb4d9db17537	519	* @retval HAL status
mbed_official	376:cb4d9db17537	520	*/
mbed_official	376:cb4d9db17537	521	HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size, uint32_t Timeout)
mbed_official	376:cb4d9db17537	522	{
mbed_official	376:cb4d9db17537	523	__IO uint16_t tmpreg;
mbed_official	376:cb4d9db17537	524	uint32_t tmp = 0;
mbed_official	376:cb4d9db17537	525
mbed_official	376:cb4d9db17537	526	if(hspi->State == HAL_SPI_STATE_READY)
mbed_official	376:cb4d9db17537	527	{
mbed_official	387:643a59b3dbac	528	if((pData == HAL_NULL ) \|\| (Size == 0))
mbed_official	376:cb4d9db17537	529	{
mbed_official	376:cb4d9db17537	530	return HAL_ERROR;
mbed_official	376:cb4d9db17537	531	}
mbed_official	376:cb4d9db17537	532
mbed_official	376:cb4d9db17537	533	/* Process Locked */
mbed_official	376:cb4d9db17537	534	__HAL_LOCK(hspi);
mbed_official	376:cb4d9db17537	535
mbed_official	376:cb4d9db17537	536	/* Configure communication */
mbed_official	376:cb4d9db17537	537	hspi->State = HAL_SPI_STATE_BUSY_RX;
mbed_official	376:cb4d9db17537	538	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official	376:cb4d9db17537	539
mbed_official	376:cb4d9db17537	540	hspi->pRxBuffPtr = pData;
mbed_official	376:cb4d9db17537	541	hspi->RxXferSize = Size;
mbed_official	376:cb4d9db17537	542	hspi->RxXferCount = Size;
mbed_official	376:cb4d9db17537	543
mbed_official	376:cb4d9db17537	544	/Init field not used in handle to zero /
mbed_official	376:cb4d9db17537	545	hspi->RxISR = 0;
mbed_official	376:cb4d9db17537	546	hspi->TxISR = 0;
mbed_official	376:cb4d9db17537	547	hspi->TxXferSize = 0;
mbed_official	376:cb4d9db17537	548	hspi->TxXferCount = 0;
mbed_official	376:cb4d9db17537	549
mbed_official	376:cb4d9db17537	550	/* Configure communication direction : 1Line */
mbed_official	376:cb4d9db17537	551	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
mbed_official	376:cb4d9db17537	552	{
mbed_official	376:cb4d9db17537	553	__HAL_SPI_1LINE_RX(hspi);
mbed_official	376:cb4d9db17537	554	}
mbed_official	376:cb4d9db17537	555
mbed_official	376:cb4d9db17537	556	/* Reset CRC Calculation */
mbed_official	376:cb4d9db17537	557	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	558	{
mbed_official	376:cb4d9db17537	559	__HAL_SPI_RESET_CRC(hspi);
mbed_official	376:cb4d9db17537	560	}
mbed_official	376:cb4d9db17537	561
mbed_official	376:cb4d9db17537	562	if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
mbed_official	376:cb4d9db17537	563	{
mbed_official	376:cb4d9db17537	564	/* Process Unlocked */
mbed_official	376:cb4d9db17537	565	__HAL_UNLOCK(hspi);
mbed_official	376:cb4d9db17537	566
mbed_official	376:cb4d9db17537	567	/* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
mbed_official	376:cb4d9db17537	568	return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout);
mbed_official	376:cb4d9db17537	569	}
mbed_official	376:cb4d9db17537	570
mbed_official	376:cb4d9db17537	571	/* Check if the SPI is already enabled */
mbed_official	376:cb4d9db17537	572	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official	376:cb4d9db17537	573	{
mbed_official	376:cb4d9db17537	574	/* Enable SPI peripheral */
mbed_official	376:cb4d9db17537	575	__HAL_SPI_ENABLE(hspi);
mbed_official	376:cb4d9db17537	576	}
mbed_official	376:cb4d9db17537	577
mbed_official	376:cb4d9db17537	578	/* Receive data in 8 Bit mode */
mbed_official	376:cb4d9db17537	579	if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
mbed_official	376:cb4d9db17537	580	{
mbed_official	376:cb4d9db17537	581	while(hspi->RxXferCount > 1)
mbed_official	376:cb4d9db17537	582	{
mbed_official	376:cb4d9db17537	583	/* Wait until RXNE flag is set */
mbed_official	376:cb4d9db17537	584	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official	376:cb4d9db17537	585	{
mbed_official	376:cb4d9db17537	586	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	587	}
mbed_official	376:cb4d9db17537	588
mbed_official	376:cb4d9db17537	589	(*hspi->pRxBuffPtr++) = hspi->Instance->DR;
mbed_official	376:cb4d9db17537	590	hspi->RxXferCount--;
mbed_official	376:cb4d9db17537	591	}
mbed_official	376:cb4d9db17537	592	/* Enable CRC Transmission */
mbed_official	376:cb4d9db17537	593	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	594	{
mbed_official	376:cb4d9db17537	595	hspi->Instance->CR1 \|= SPI_CR1_CRCNEXT;
mbed_official	376:cb4d9db17537	596	}
mbed_official	376:cb4d9db17537	597	}
mbed_official	376:cb4d9db17537	598	/* Receive data in 16 Bit mode */
mbed_official	376:cb4d9db17537	599	else
mbed_official	376:cb4d9db17537	600	{
mbed_official	376:cb4d9db17537	601	while(hspi->RxXferCount > 1)
mbed_official	376:cb4d9db17537	602	{
mbed_official	376:cb4d9db17537	603	/* Wait until RXNE flag is set to read data */
mbed_official	376:cb4d9db17537	604	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official	376:cb4d9db17537	605	{
mbed_official	376:cb4d9db17537	606	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	607	}
mbed_official	376:cb4d9db17537	608
mbed_official	376:cb4d9db17537	609	((uint16_t)hspi->pRxBuffPtr) = hspi->Instance->DR;
mbed_official	376:cb4d9db17537	610	hspi->pRxBuffPtr+=2;
mbed_official	376:cb4d9db17537	611	hspi->RxXferCount--;
mbed_official	376:cb4d9db17537	612	}
mbed_official	376:cb4d9db17537	613	/* Enable CRC Transmission */
mbed_official	376:cb4d9db17537	614	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	615	{
mbed_official	376:cb4d9db17537	616	hspi->Instance->CR1 \|= SPI_CR1_CRCNEXT;
mbed_official	376:cb4d9db17537	617	}
mbed_official	376:cb4d9db17537	618	}
mbed_official	376:cb4d9db17537	619
mbed_official	376:cb4d9db17537	620	/* Wait until RXNE flag is set */
mbed_official	376:cb4d9db17537	621	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official	376:cb4d9db17537	622	{
mbed_official	376:cb4d9db17537	623	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	624	}
mbed_official	376:cb4d9db17537	625
mbed_official	376:cb4d9db17537	626	/* Receive last data in 8 Bit mode */
mbed_official	376:cb4d9db17537	627	if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
mbed_official	376:cb4d9db17537	628	{
mbed_official	376:cb4d9db17537	629	(*hspi->pRxBuffPtr++) = hspi->Instance->DR;
mbed_official	376:cb4d9db17537	630	}
mbed_official	376:cb4d9db17537	631	/* Receive last data in 16 Bit mode */
mbed_official	376:cb4d9db17537	632	else
mbed_official	376:cb4d9db17537	633	{
mbed_official	376:cb4d9db17537	634	((uint16_t)hspi->pRxBuffPtr) = hspi->Instance->DR;
mbed_official	376:cb4d9db17537	635	hspi->pRxBuffPtr+=2;
mbed_official	376:cb4d9db17537	636	}
mbed_official	376:cb4d9db17537	637	hspi->RxXferCount--;
mbed_official	376:cb4d9db17537	638
mbed_official	376:cb4d9db17537	639	/* Wait until RXNE flag is set: CRC Received */
mbed_official	376:cb4d9db17537	640	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	641	{
mbed_official	376:cb4d9db17537	642	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official	376:cb4d9db17537	643	{
mbed_official	376:cb4d9db17537	644	hspi->ErrorCode \|= HAL_SPI_ERROR_CRC;
mbed_official	376:cb4d9db17537	645	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	646	}
mbed_official	376:cb4d9db17537	647
mbed_official	376:cb4d9db17537	648	/* Read CRC to Flush RXNE flag */
mbed_official	376:cb4d9db17537	649	tmpreg = hspi->Instance->DR;
mbed_official	376:cb4d9db17537	650	}
mbed_official	376:cb4d9db17537	651
mbed_official	376:cb4d9db17537	652	if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)\|\|(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
mbed_official	376:cb4d9db17537	653	{
mbed_official	376:cb4d9db17537	654	/* Disable SPI peripheral */
mbed_official	376:cb4d9db17537	655	__HAL_SPI_DISABLE(hspi);
mbed_official	376:cb4d9db17537	656	}
mbed_official	376:cb4d9db17537	657
mbed_official	376:cb4d9db17537	658	hspi->State = HAL_SPI_STATE_READY;
mbed_official	376:cb4d9db17537	659
mbed_official	376:cb4d9db17537	660	tmp = __HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR);
mbed_official	376:cb4d9db17537	661	/* Check if CRC error occurred */
mbed_official	376:cb4d9db17537	662	if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) && (tmp != RESET))
mbed_official	376:cb4d9db17537	663	{
mbed_official	376:cb4d9db17537	664	hspi->ErrorCode \|= HAL_SPI_ERROR_CRC;
mbed_official	376:cb4d9db17537	665
mbed_official	376:cb4d9db17537	666	/* Reset CRC Calculation */
mbed_official	376:cb4d9db17537	667	__HAL_SPI_RESET_CRC(hspi);
mbed_official	376:cb4d9db17537	668
mbed_official	376:cb4d9db17537	669	/* Process Unlocked */
mbed_official	376:cb4d9db17537	670	__HAL_UNLOCK(hspi);
mbed_official	376:cb4d9db17537	671
mbed_official	376:cb4d9db17537	672	return HAL_ERROR;
mbed_official	376:cb4d9db17537	673	}
mbed_official	376:cb4d9db17537	674
mbed_official	376:cb4d9db17537	675	/* Process Unlocked */
mbed_official	376:cb4d9db17537	676	__HAL_UNLOCK(hspi);
mbed_official	376:cb4d9db17537	677
mbed_official	376:cb4d9db17537	678	return HAL_OK;
mbed_official	376:cb4d9db17537	679	}
mbed_official	376:cb4d9db17537	680	else
mbed_official	376:cb4d9db17537	681	{
mbed_official	376:cb4d9db17537	682	return HAL_BUSY;
mbed_official	376:cb4d9db17537	683	}
mbed_official	376:cb4d9db17537	684	}
mbed_official	376:cb4d9db17537	685
mbed_official	376:cb4d9db17537	686	/**
mbed_official	376:cb4d9db17537	687	* @brief Transmit and Receive an amount of data in blocking mode
mbed_official	376:cb4d9db17537	688	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	689	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	690	* @param pTxData: pointer to transmission data buffer
mbed_official	376:cb4d9db17537	691	* @param pRxData: pointer to reception data buffer to be
mbed_official	376:cb4d9db17537	692	* @param Size: amount of data to be sent
mbed_official	376:cb4d9db17537	693	* @param Timeout: Timeout duration
mbed_official	376:cb4d9db17537	694	* @retval HAL status
mbed_official	376:cb4d9db17537	695	*/
mbed_official	376:cb4d9db17537	696	HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef hspi, uint8_t pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
mbed_official	376:cb4d9db17537	697	{
mbed_official	376:cb4d9db17537	698	__IO uint16_t tmpreg;
mbed_official	376:cb4d9db17537	699	uint32_t tmpstate = 0, tmp = 0;
mbed_official	376:cb4d9db17537	700
mbed_official	376:cb4d9db17537	701	tmpstate = hspi->State;
mbed_official	376:cb4d9db17537	702	if((tmpstate == HAL_SPI_STATE_READY) \|\| (tmpstate == HAL_SPI_STATE_BUSY_RX))
mbed_official	376:cb4d9db17537	703	{
mbed_official	387:643a59b3dbac	704	if((pTxData == HAL_NULL ) \|\| (pRxData == HAL_NULL ) \|\| (Size == 0))
mbed_official	376:cb4d9db17537	705	{
mbed_official	376:cb4d9db17537	706	return HAL_ERROR;
mbed_official	376:cb4d9db17537	707	}
mbed_official	376:cb4d9db17537	708
mbed_official	376:cb4d9db17537	709	/* Check the parameters */
mbed_official	376:cb4d9db17537	710	assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
mbed_official	376:cb4d9db17537	711
mbed_official	376:cb4d9db17537	712	/* Process Locked */
mbed_official	376:cb4d9db17537	713	__HAL_LOCK(hspi);
mbed_official	376:cb4d9db17537	714
mbed_official	376:cb4d9db17537	715	/* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
mbed_official	376:cb4d9db17537	716	if(hspi->State == HAL_SPI_STATE_READY)
mbed_official	376:cb4d9db17537	717	{
mbed_official	376:cb4d9db17537	718	hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
mbed_official	376:cb4d9db17537	719	}
mbed_official	376:cb4d9db17537	720
mbed_official	376:cb4d9db17537	721	/* Configure communication */
mbed_official	376:cb4d9db17537	722	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official	376:cb4d9db17537	723
mbed_official	376:cb4d9db17537	724	hspi->pRxBuffPtr = pRxData;
mbed_official	376:cb4d9db17537	725	hspi->RxXferSize = Size;
mbed_official	376:cb4d9db17537	726	hspi->RxXferCount = Size;
mbed_official	376:cb4d9db17537	727
mbed_official	376:cb4d9db17537	728	hspi->pTxBuffPtr = pTxData;
mbed_official	376:cb4d9db17537	729	hspi->TxXferSize = Size;
mbed_official	376:cb4d9db17537	730	hspi->TxXferCount = Size;
mbed_official	376:cb4d9db17537	731
mbed_official	376:cb4d9db17537	732	/Init field not used in handle to zero /
mbed_official	376:cb4d9db17537	733	hspi->RxISR = 0;
mbed_official	376:cb4d9db17537	734	hspi->TxISR = 0;
mbed_official	376:cb4d9db17537	735
mbed_official	376:cb4d9db17537	736	/* Reset CRC Calculation */
mbed_official	376:cb4d9db17537	737	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	738	{
mbed_official	376:cb4d9db17537	739	__HAL_SPI_RESET_CRC(hspi);
mbed_official	376:cb4d9db17537	740	}
mbed_official	376:cb4d9db17537	741
mbed_official	376:cb4d9db17537	742	/* Check if the SPI is already enabled */
mbed_official	376:cb4d9db17537	743	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official	376:cb4d9db17537	744	{
mbed_official	376:cb4d9db17537	745	/* Enable SPI peripheral */
mbed_official	376:cb4d9db17537	746	__HAL_SPI_ENABLE(hspi);
mbed_official	376:cb4d9db17537	747	}
mbed_official	376:cb4d9db17537	748
mbed_official	376:cb4d9db17537	749	/* Transmit and Receive data in 16 Bit mode */
mbed_official	376:cb4d9db17537	750	if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
mbed_official	376:cb4d9db17537	751	{
mbed_official	376:cb4d9db17537	752	if((hspi->Init.Mode == SPI_MODE_SLAVE) \|\| ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01)))
mbed_official	376:cb4d9db17537	753	{
mbed_official	376:cb4d9db17537	754	hspi->Instance->DR = ((uint16_t)hspi->pTxBuffPtr);
mbed_official	376:cb4d9db17537	755	hspi->pTxBuffPtr+=2;
mbed_official	376:cb4d9db17537	756	hspi->TxXferCount--;
mbed_official	376:cb4d9db17537	757	}
mbed_official	376:cb4d9db17537	758	if(hspi->TxXferCount == 0)
mbed_official	376:cb4d9db17537	759	{
mbed_official	376:cb4d9db17537	760	/* Enable CRC Transmission */
mbed_official	376:cb4d9db17537	761	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	762	{
mbed_official	376:cb4d9db17537	763	hspi->Instance->CR1 \|= SPI_CR1_CRCNEXT;
mbed_official	376:cb4d9db17537	764	}
mbed_official	376:cb4d9db17537	765
mbed_official	376:cb4d9db17537	766	/* Wait until RXNE flag is set */
mbed_official	376:cb4d9db17537	767	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official	376:cb4d9db17537	768	{
mbed_official	376:cb4d9db17537	769	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	770	}
mbed_official	376:cb4d9db17537	771
mbed_official	376:cb4d9db17537	772	((uint16_t)hspi->pRxBuffPtr) = hspi->Instance->DR;
mbed_official	376:cb4d9db17537	773	hspi->pRxBuffPtr+=2;
mbed_official	376:cb4d9db17537	774	hspi->RxXferCount--;
mbed_official	376:cb4d9db17537	775	}
mbed_official	376:cb4d9db17537	776	else
mbed_official	376:cb4d9db17537	777	{
mbed_official	376:cb4d9db17537	778	while(hspi->TxXferCount > 0)
mbed_official	376:cb4d9db17537	779	{
mbed_official	376:cb4d9db17537	780	/* Wait until TXE flag is set to send data */
mbed_official	376:cb4d9db17537	781	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
mbed_official	376:cb4d9db17537	782	{
mbed_official	376:cb4d9db17537	783	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	784	}
mbed_official	376:cb4d9db17537	785
mbed_official	376:cb4d9db17537	786	hspi->Instance->DR = ((uint16_t)hspi->pTxBuffPtr);
mbed_official	376:cb4d9db17537	787	hspi->pTxBuffPtr+=2;
mbed_official	376:cb4d9db17537	788	hspi->TxXferCount--;
mbed_official	376:cb4d9db17537	789
mbed_official	376:cb4d9db17537	790	/* Enable CRC Transmission */
mbed_official	376:cb4d9db17537	791	if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED))
mbed_official	376:cb4d9db17537	792	{
mbed_official	376:cb4d9db17537	793	hspi->Instance->CR1 \|= SPI_CR1_CRCNEXT;
mbed_official	376:cb4d9db17537	794	}
mbed_official	376:cb4d9db17537	795
mbed_official	376:cb4d9db17537	796	/* Wait until RXNE flag is set */
mbed_official	376:cb4d9db17537	797	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official	376:cb4d9db17537	798	{
mbed_official	376:cb4d9db17537	799	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	800	}
mbed_official	376:cb4d9db17537	801
mbed_official	376:cb4d9db17537	802	((uint16_t)hspi->pRxBuffPtr) = hspi->Instance->DR;
mbed_official	376:cb4d9db17537	803	hspi->pRxBuffPtr+=2;
mbed_official	376:cb4d9db17537	804	hspi->RxXferCount--;
mbed_official	376:cb4d9db17537	805	}
mbed_official	376:cb4d9db17537	806	/* Receive the last byte */
mbed_official	376:cb4d9db17537	807	if(hspi->Init.Mode == SPI_MODE_SLAVE)
mbed_official	376:cb4d9db17537	808	{
mbed_official	376:cb4d9db17537	809	/* Wait until RXNE flag is set */
mbed_official	376:cb4d9db17537	810	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official	376:cb4d9db17537	811	{
mbed_official	376:cb4d9db17537	812	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	813	}
mbed_official	376:cb4d9db17537	814
mbed_official	376:cb4d9db17537	815	((uint16_t)hspi->pRxBuffPtr) = hspi->Instance->DR;
mbed_official	376:cb4d9db17537	816	hspi->pRxBuffPtr+=2;
mbed_official	376:cb4d9db17537	817	hspi->RxXferCount--;
mbed_official	376:cb4d9db17537	818	}
mbed_official	376:cb4d9db17537	819	}
mbed_official	376:cb4d9db17537	820	}
mbed_official	376:cb4d9db17537	821	/* Transmit and Receive data in 8 Bit mode */
mbed_official	376:cb4d9db17537	822	else
mbed_official	376:cb4d9db17537	823	{
mbed_official	376:cb4d9db17537	824	if((hspi->Init.Mode == SPI_MODE_SLAVE) \|\| ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01)))
mbed_official	376:cb4d9db17537	825	{
mbed_official	376:cb4d9db17537	826	hspi->Instance->DR = (*hspi->pTxBuffPtr++);
mbed_official	376:cb4d9db17537	827	hspi->TxXferCount--;
mbed_official	376:cb4d9db17537	828	}
mbed_official	376:cb4d9db17537	829	if(hspi->TxXferCount == 0)
mbed_official	376:cb4d9db17537	830	{
mbed_official	376:cb4d9db17537	831	/* Enable CRC Transmission */
mbed_official	376:cb4d9db17537	832	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	833	{
mbed_official	376:cb4d9db17537	834	hspi->Instance->CR1 \|= SPI_CR1_CRCNEXT;
mbed_official	376:cb4d9db17537	835	}
mbed_official	376:cb4d9db17537	836
mbed_official	376:cb4d9db17537	837	/* Wait until RXNE flag is set */
mbed_official	376:cb4d9db17537	838	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official	376:cb4d9db17537	839	{
mbed_official	376:cb4d9db17537	840	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	841	}
mbed_official	376:cb4d9db17537	842
mbed_official	376:cb4d9db17537	843	(*hspi->pRxBuffPtr) = hspi->Instance->DR;
mbed_official	376:cb4d9db17537	844	hspi->RxXferCount--;
mbed_official	376:cb4d9db17537	845	}
mbed_official	376:cb4d9db17537	846	else
mbed_official	376:cb4d9db17537	847	{
mbed_official	376:cb4d9db17537	848	while(hspi->TxXferCount > 0)
mbed_official	376:cb4d9db17537	849	{
mbed_official	376:cb4d9db17537	850	/* Wait until TXE flag is set to send data */
mbed_official	376:cb4d9db17537	851	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
mbed_official	376:cb4d9db17537	852	{
mbed_official	376:cb4d9db17537	853	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	854	}
mbed_official	376:cb4d9db17537	855
mbed_official	376:cb4d9db17537	856	hspi->Instance->DR = (*hspi->pTxBuffPtr++);
mbed_official	376:cb4d9db17537	857	hspi->TxXferCount--;
mbed_official	376:cb4d9db17537	858
mbed_official	376:cb4d9db17537	859	/* Enable CRC Transmission */
mbed_official	376:cb4d9db17537	860	if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED))
mbed_official	376:cb4d9db17537	861	{
mbed_official	376:cb4d9db17537	862	hspi->Instance->CR1 \|= SPI_CR1_CRCNEXT;
mbed_official	376:cb4d9db17537	863	}
mbed_official	376:cb4d9db17537	864
mbed_official	376:cb4d9db17537	865	/* Wait until RXNE flag is set */
mbed_official	376:cb4d9db17537	866	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official	376:cb4d9db17537	867	{
mbed_official	376:cb4d9db17537	868	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	869	}
mbed_official	376:cb4d9db17537	870
mbed_official	376:cb4d9db17537	871	(*hspi->pRxBuffPtr++) = hspi->Instance->DR;
mbed_official	376:cb4d9db17537	872	hspi->RxXferCount--;
mbed_official	376:cb4d9db17537	873	}
mbed_official	376:cb4d9db17537	874	if(hspi->Init.Mode == SPI_MODE_SLAVE)
mbed_official	376:cb4d9db17537	875	{
mbed_official	376:cb4d9db17537	876	/* Wait until RXNE flag is set */
mbed_official	376:cb4d9db17537	877	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official	376:cb4d9db17537	878	{
mbed_official	376:cb4d9db17537	879	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	880	}
mbed_official	376:cb4d9db17537	881
mbed_official	376:cb4d9db17537	882	(*hspi->pRxBuffPtr++) = hspi->Instance->DR;
mbed_official	376:cb4d9db17537	883	hspi->RxXferCount--;
mbed_official	376:cb4d9db17537	884	}
mbed_official	376:cb4d9db17537	885	}
mbed_official	376:cb4d9db17537	886	}
mbed_official	376:cb4d9db17537	887
mbed_official	376:cb4d9db17537	888	/* Read CRC from DR to close CRC calculation process */
mbed_official	376:cb4d9db17537	889	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	890	{
mbed_official	376:cb4d9db17537	891	/* Wait until RXNE flag is set */
mbed_official	376:cb4d9db17537	892	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official	376:cb4d9db17537	893	{
mbed_official	376:cb4d9db17537	894	hspi->ErrorCode \|= HAL_SPI_ERROR_CRC;
mbed_official	376:cb4d9db17537	895	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	896	}
mbed_official	376:cb4d9db17537	897	/* Read CRC */
mbed_official	376:cb4d9db17537	898	tmpreg = hspi->Instance->DR;
mbed_official	376:cb4d9db17537	899	}
mbed_official	376:cb4d9db17537	900
mbed_official	376:cb4d9db17537	901	/* Wait until Busy flag is reset before disabling SPI */
mbed_official	376:cb4d9db17537	902	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
mbed_official	376:cb4d9db17537	903	{
mbed_official	376:cb4d9db17537	904	hspi->ErrorCode \|= HAL_SPI_ERROR_FLAG;
mbed_official	376:cb4d9db17537	905	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	906	}
mbed_official	376:cb4d9db17537	907
mbed_official	376:cb4d9db17537	908	hspi->State = HAL_SPI_STATE_READY;
mbed_official	376:cb4d9db17537	909
mbed_official	376:cb4d9db17537	910	tmp = __HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR);
mbed_official	376:cb4d9db17537	911	/* Check if CRC error occurred */
mbed_official	376:cb4d9db17537	912	if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) && (tmp != RESET))
mbed_official	376:cb4d9db17537	913	{
mbed_official	376:cb4d9db17537	914	hspi->ErrorCode \|= HAL_SPI_ERROR_CRC;
mbed_official	376:cb4d9db17537	915
mbed_official	376:cb4d9db17537	916	/* Reset CRC Calculation */
mbed_official	376:cb4d9db17537	917	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	918	{
mbed_official	376:cb4d9db17537	919	__HAL_SPI_RESET_CRC(hspi);
mbed_official	376:cb4d9db17537	920	}
mbed_official	376:cb4d9db17537	921
mbed_official	376:cb4d9db17537	922	/* Process Unlocked */
mbed_official	376:cb4d9db17537	923	__HAL_UNLOCK(hspi);
mbed_official	376:cb4d9db17537	924
mbed_official	376:cb4d9db17537	925	return HAL_ERROR;
mbed_official	376:cb4d9db17537	926	}
mbed_official	376:cb4d9db17537	927
mbed_official	376:cb4d9db17537	928	/* Process Unlocked */
mbed_official	376:cb4d9db17537	929	__HAL_UNLOCK(hspi);
mbed_official	376:cb4d9db17537	930
mbed_official	376:cb4d9db17537	931	return HAL_OK;
mbed_official	376:cb4d9db17537	932	}
mbed_official	376:cb4d9db17537	933	else
mbed_official	376:cb4d9db17537	934	{
mbed_official	376:cb4d9db17537	935	return HAL_BUSY;
mbed_official	376:cb4d9db17537	936	}
mbed_official	376:cb4d9db17537	937	}
mbed_official	376:cb4d9db17537	938
mbed_official	376:cb4d9db17537	939	/**
mbed_official	376:cb4d9db17537	940	* @brief Transmit an amount of data in no-blocking mode with Interrupt
mbed_official	376:cb4d9db17537	941	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	942	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	943	* @param pData: pointer to data buffer
mbed_official	376:cb4d9db17537	944	* @param Size: amount of data to be sent
mbed_official	376:cb4d9db17537	945	* @retval HAL status
mbed_official	376:cb4d9db17537	946	*/
mbed_official	376:cb4d9db17537	947	HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size)
mbed_official	376:cb4d9db17537	948	{
mbed_official	376:cb4d9db17537	949	if(hspi->State == HAL_SPI_STATE_READY)
mbed_official	376:cb4d9db17537	950	{
mbed_official	387:643a59b3dbac	951	if((pData == HAL_NULL) \|\| (Size == 0))
mbed_official	376:cb4d9db17537	952	{
mbed_official	376:cb4d9db17537	953	return HAL_ERROR;
mbed_official	376:cb4d9db17537	954	}
mbed_official	376:cb4d9db17537	955
mbed_official	376:cb4d9db17537	956	/* Check the parameters */
mbed_official	376:cb4d9db17537	957	assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
mbed_official	376:cb4d9db17537	958
mbed_official	376:cb4d9db17537	959	/* Process Locked */
mbed_official	376:cb4d9db17537	960	__HAL_LOCK(hspi);
mbed_official	376:cb4d9db17537	961
mbed_official	376:cb4d9db17537	962	/* Configure communication */
mbed_official	376:cb4d9db17537	963	hspi->State = HAL_SPI_STATE_BUSY_TX;
mbed_official	376:cb4d9db17537	964	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official	376:cb4d9db17537	965
mbed_official	376:cb4d9db17537	966	hspi->TxISR = &SPI_TxISR;
mbed_official	376:cb4d9db17537	967	hspi->pTxBuffPtr = pData;
mbed_official	376:cb4d9db17537	968	hspi->TxXferSize = Size;
mbed_official	376:cb4d9db17537	969	hspi->TxXferCount = Size;
mbed_official	376:cb4d9db17537	970
mbed_official	376:cb4d9db17537	971	/Init field not used in handle to zero /
mbed_official	376:cb4d9db17537	972	hspi->RxISR = 0;
mbed_official	376:cb4d9db17537	973	hspi->RxXferSize = 0;
mbed_official	376:cb4d9db17537	974	hspi->RxXferCount = 0;
mbed_official	376:cb4d9db17537	975
mbed_official	376:cb4d9db17537	976	/* Configure communication direction : 1Line */
mbed_official	376:cb4d9db17537	977	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
mbed_official	376:cb4d9db17537	978	{
mbed_official	376:cb4d9db17537	979	__HAL_SPI_1LINE_TX(hspi);
mbed_official	376:cb4d9db17537	980	}
mbed_official	376:cb4d9db17537	981
mbed_official	376:cb4d9db17537	982	/* Reset CRC Calculation */
mbed_official	376:cb4d9db17537	983	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	984	{
mbed_official	376:cb4d9db17537	985	__HAL_SPI_RESET_CRC(hspi);
mbed_official	376:cb4d9db17537	986	}
mbed_official	376:cb4d9db17537	987
mbed_official	376:cb4d9db17537	988	if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
mbed_official	376:cb4d9db17537	989	{
mbed_official	376:cb4d9db17537	990	__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE));
mbed_official	376:cb4d9db17537	991	}else
mbed_official	376:cb4d9db17537	992	{
mbed_official	376:cb4d9db17537	993	/* Enable TXE and ERR interrupt */
mbed_official	376:cb4d9db17537	994	__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE \| SPI_IT_ERR));
mbed_official	376:cb4d9db17537	995	}
mbed_official	376:cb4d9db17537	996	/* Process Unlocked */
mbed_official	376:cb4d9db17537	997	__HAL_UNLOCK(hspi);
mbed_official	376:cb4d9db17537	998
mbed_official	376:cb4d9db17537	999	/* Check if the SPI is already enabled */
mbed_official	376:cb4d9db17537	1000	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official	376:cb4d9db17537	1001	{
mbed_official	376:cb4d9db17537	1002	/* Enable SPI peripheral */
mbed_official	376:cb4d9db17537	1003	__HAL_SPI_ENABLE(hspi);
mbed_official	376:cb4d9db17537	1004	}
mbed_official	376:cb4d9db17537	1005
mbed_official	376:cb4d9db17537	1006	return HAL_OK;
mbed_official	376:cb4d9db17537	1007	}
mbed_official	376:cb4d9db17537	1008	else
mbed_official	376:cb4d9db17537	1009	{
mbed_official	376:cb4d9db17537	1010	return HAL_BUSY;
mbed_official	376:cb4d9db17537	1011	}
mbed_official	376:cb4d9db17537	1012	}
mbed_official	376:cb4d9db17537	1013
mbed_official	376:cb4d9db17537	1014	/**
mbed_official	376:cb4d9db17537	1015	* @brief Receive an amount of data in no-blocking mode with Interrupt
mbed_official	376:cb4d9db17537	1016	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1017	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	1018	* @param pData: pointer to data buffer
mbed_official	376:cb4d9db17537	1019	* @param Size: amount of data to be sent
mbed_official	376:cb4d9db17537	1020	* @retval HAL status
mbed_official	376:cb4d9db17537	1021	*/
mbed_official	376:cb4d9db17537	1022	HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size)
mbed_official	376:cb4d9db17537	1023	{
mbed_official	376:cb4d9db17537	1024	if(hspi->State == HAL_SPI_STATE_READY)
mbed_official	376:cb4d9db17537	1025	{
mbed_official	387:643a59b3dbac	1026	if((pData == HAL_NULL) \|\| (Size == 0))
mbed_official	376:cb4d9db17537	1027	{
mbed_official	376:cb4d9db17537	1028	return HAL_ERROR;
mbed_official	376:cb4d9db17537	1029	}
mbed_official	376:cb4d9db17537	1030
mbed_official	376:cb4d9db17537	1031	/* Process Locked */
mbed_official	376:cb4d9db17537	1032	__HAL_LOCK(hspi);
mbed_official	376:cb4d9db17537	1033
mbed_official	376:cb4d9db17537	1034	/* Configure communication */
mbed_official	376:cb4d9db17537	1035	hspi->State = HAL_SPI_STATE_BUSY_RX;
mbed_official	376:cb4d9db17537	1036	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official	376:cb4d9db17537	1037
mbed_official	376:cb4d9db17537	1038	hspi->RxISR = &SPI_RxISR;
mbed_official	376:cb4d9db17537	1039	hspi->pRxBuffPtr = pData;
mbed_official	376:cb4d9db17537	1040	hspi->RxXferSize = Size;
mbed_official	376:cb4d9db17537	1041	hspi->RxXferCount = Size ;
mbed_official	376:cb4d9db17537	1042
mbed_official	376:cb4d9db17537	1043	/Init field not used in handle to zero /
mbed_official	376:cb4d9db17537	1044	hspi->TxISR = 0;
mbed_official	376:cb4d9db17537	1045	hspi->TxXferSize = 0;
mbed_official	376:cb4d9db17537	1046	hspi->TxXferCount = 0;
mbed_official	376:cb4d9db17537	1047
mbed_official	376:cb4d9db17537	1048	/* Configure communication direction : 1Line */
mbed_official	376:cb4d9db17537	1049	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
mbed_official	376:cb4d9db17537	1050	{
mbed_official	376:cb4d9db17537	1051	__HAL_SPI_1LINE_RX(hspi);
mbed_official	376:cb4d9db17537	1052	}
mbed_official	376:cb4d9db17537	1053	else if((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
mbed_official	376:cb4d9db17537	1054	{
mbed_official	376:cb4d9db17537	1055	/* Process Unlocked */
mbed_official	376:cb4d9db17537	1056	__HAL_UNLOCK(hspi);
mbed_official	376:cb4d9db17537	1057
mbed_official	376:cb4d9db17537	1058	/* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
mbed_official	376:cb4d9db17537	1059	return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size);
mbed_official	376:cb4d9db17537	1060	}
mbed_official	376:cb4d9db17537	1061
mbed_official	376:cb4d9db17537	1062	/* Reset CRC Calculation */
mbed_official	376:cb4d9db17537	1063	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	1064	{
mbed_official	376:cb4d9db17537	1065	__HAL_SPI_RESET_CRC(hspi);
mbed_official	376:cb4d9db17537	1066	}
mbed_official	376:cb4d9db17537	1067
mbed_official	376:cb4d9db17537	1068	/* Enable TXE and ERR interrupt */
mbed_official	376:cb4d9db17537	1069	__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE \| SPI_IT_ERR));
mbed_official	376:cb4d9db17537	1070
mbed_official	376:cb4d9db17537	1071	/* Process Unlocked */
mbed_official	376:cb4d9db17537	1072	__HAL_UNLOCK(hspi);
mbed_official	376:cb4d9db17537	1073
mbed_official	376:cb4d9db17537	1074	/* Note : The SPI must be enabled after unlocking current process
mbed_official	376:cb4d9db17537	1075	to avoid the risk of SPI interrupt handle execution before current
mbed_official	376:cb4d9db17537	1076	process unlock */
mbed_official	376:cb4d9db17537	1077
mbed_official	376:cb4d9db17537	1078	/* Check if the SPI is already enabled */
mbed_official	376:cb4d9db17537	1079	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official	376:cb4d9db17537	1080	{
mbed_official	376:cb4d9db17537	1081	/* Enable SPI peripheral */
mbed_official	376:cb4d9db17537	1082	__HAL_SPI_ENABLE(hspi);
mbed_official	376:cb4d9db17537	1083	}
mbed_official	376:cb4d9db17537	1084
mbed_official	376:cb4d9db17537	1085	return HAL_OK;
mbed_official	376:cb4d9db17537	1086	}
mbed_official	376:cb4d9db17537	1087	else
mbed_official	376:cb4d9db17537	1088	{
mbed_official	376:cb4d9db17537	1089	return HAL_BUSY;
mbed_official	376:cb4d9db17537	1090	}
mbed_official	376:cb4d9db17537	1091	}
mbed_official	376:cb4d9db17537	1092
mbed_official	376:cb4d9db17537	1093	/**
mbed_official	376:cb4d9db17537	1094	* @brief Transmit and Receive an amount of data in no-blocking mode with Interrupt
mbed_official	376:cb4d9db17537	1095	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1096	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	1097	* @param pTxData: pointer to transmission data buffer
mbed_official	376:cb4d9db17537	1098	* @param pRxData: pointer to reception data buffer to be
mbed_official	376:cb4d9db17537	1099	* @param Size: amount of data to be sent
mbed_official	376:cb4d9db17537	1100	* @retval HAL status
mbed_official	376:cb4d9db17537	1101	*/
mbed_official	376:cb4d9db17537	1102	HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef hspi, uint8_t pTxData, uint8_t *pRxData, uint16_t Size)
mbed_official	376:cb4d9db17537	1103	{
mbed_official	376:cb4d9db17537	1104	uint32_t tmpstate = 0;
mbed_official	376:cb4d9db17537	1105
mbed_official	376:cb4d9db17537	1106	tmpstate = hspi->State;
mbed_official	376:cb4d9db17537	1107	if((tmpstate == HAL_SPI_STATE_READY) \|\| \
mbed_official	376:cb4d9db17537	1108	((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmpstate == HAL_SPI_STATE_BUSY_RX)))
mbed_official	376:cb4d9db17537	1109	{
mbed_official	387:643a59b3dbac	1110	if((pTxData == HAL_NULL ) \|\| (pRxData == HAL_NULL ) \|\| (Size == 0))
mbed_official	376:cb4d9db17537	1111	{
mbed_official	376:cb4d9db17537	1112	return HAL_ERROR;
mbed_official	376:cb4d9db17537	1113	}
mbed_official	376:cb4d9db17537	1114
mbed_official	376:cb4d9db17537	1115	/* Check the parameters */
mbed_official	376:cb4d9db17537	1116	assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
mbed_official	376:cb4d9db17537	1117
mbed_official	376:cb4d9db17537	1118	/* Process locked */
mbed_official	376:cb4d9db17537	1119	__HAL_LOCK(hspi);
mbed_official	376:cb4d9db17537	1120
mbed_official	376:cb4d9db17537	1121	/* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
mbed_official	376:cb4d9db17537	1122	if(hspi->State != HAL_SPI_STATE_BUSY_RX)
mbed_official	376:cb4d9db17537	1123	{
mbed_official	376:cb4d9db17537	1124	hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
mbed_official	376:cb4d9db17537	1125	}
mbed_official	376:cb4d9db17537	1126
mbed_official	376:cb4d9db17537	1127	/* Configure communication */
mbed_official	376:cb4d9db17537	1128	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official	376:cb4d9db17537	1129
mbed_official	376:cb4d9db17537	1130	hspi->TxISR = &SPI_TxISR;
mbed_official	376:cb4d9db17537	1131	hspi->pTxBuffPtr = pTxData;
mbed_official	376:cb4d9db17537	1132	hspi->TxXferSize = Size;
mbed_official	376:cb4d9db17537	1133	hspi->TxXferCount = Size;
mbed_official	376:cb4d9db17537	1134
mbed_official	376:cb4d9db17537	1135	hspi->RxISR = &SPI_2LinesRxISR;
mbed_official	376:cb4d9db17537	1136	hspi->pRxBuffPtr = pRxData;
mbed_official	376:cb4d9db17537	1137	hspi->RxXferSize = Size;
mbed_official	376:cb4d9db17537	1138	hspi->RxXferCount = Size;
mbed_official	376:cb4d9db17537	1139
mbed_official	376:cb4d9db17537	1140	/* Reset CRC Calculation */
mbed_official	376:cb4d9db17537	1141	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	1142	{
mbed_official	376:cb4d9db17537	1143	__HAL_SPI_RESET_CRC(hspi);
mbed_official	376:cb4d9db17537	1144	}
mbed_official	376:cb4d9db17537	1145
mbed_official	376:cb4d9db17537	1146	/* Enable TXE, RXNE and ERR interrupt */
mbed_official	376:cb4d9db17537	1147	__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE \| SPI_IT_RXNE \| SPI_IT_ERR));
mbed_official	376:cb4d9db17537	1148
mbed_official	376:cb4d9db17537	1149	/* Process Unlocked */
mbed_official	376:cb4d9db17537	1150	__HAL_UNLOCK(hspi);
mbed_official	376:cb4d9db17537	1151
mbed_official	376:cb4d9db17537	1152	/* Check if the SPI is already enabled */
mbed_official	376:cb4d9db17537	1153	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official	376:cb4d9db17537	1154	{
mbed_official	376:cb4d9db17537	1155	/* Enable SPI peripheral */
mbed_official	376:cb4d9db17537	1156	__HAL_SPI_ENABLE(hspi);
mbed_official	376:cb4d9db17537	1157	}
mbed_official	376:cb4d9db17537	1158
mbed_official	376:cb4d9db17537	1159	return HAL_OK;
mbed_official	376:cb4d9db17537	1160	}
mbed_official	376:cb4d9db17537	1161	else
mbed_official	376:cb4d9db17537	1162	{
mbed_official	376:cb4d9db17537	1163	return HAL_BUSY;
mbed_official	376:cb4d9db17537	1164	}
mbed_official	376:cb4d9db17537	1165	}
mbed_official	376:cb4d9db17537	1166
mbed_official	376:cb4d9db17537	1167	/**
mbed_official	376:cb4d9db17537	1168	* @brief Transmit an amount of data in no-blocking mode with DMA
mbed_official	376:cb4d9db17537	1169	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1170	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	1171	* @param pData: pointer to data buffer
mbed_official	376:cb4d9db17537	1172	* @param Size: amount of data to be sent
mbed_official	376:cb4d9db17537	1173	* @retval HAL status
mbed_official	376:cb4d9db17537	1174	*/
mbed_official	376:cb4d9db17537	1175	HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size)
mbed_official	376:cb4d9db17537	1176	{
mbed_official	376:cb4d9db17537	1177	if(hspi->State == HAL_SPI_STATE_READY)
mbed_official	376:cb4d9db17537	1178	{
mbed_official	387:643a59b3dbac	1179	if((pData == HAL_NULL) \|\| (Size == 0))
mbed_official	376:cb4d9db17537	1180	{
mbed_official	376:cb4d9db17537	1181	return HAL_ERROR;
mbed_official	376:cb4d9db17537	1182	}
mbed_official	376:cb4d9db17537	1183
mbed_official	376:cb4d9db17537	1184	/* Check the parameters */
mbed_official	376:cb4d9db17537	1185	assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
mbed_official	376:cb4d9db17537	1186
mbed_official	376:cb4d9db17537	1187	/* Process Locked */
mbed_official	376:cb4d9db17537	1188	__HAL_LOCK(hspi);
mbed_official	376:cb4d9db17537	1189
mbed_official	376:cb4d9db17537	1190	/* Configure communication */
mbed_official	376:cb4d9db17537	1191	hspi->State = HAL_SPI_STATE_BUSY_TX;
mbed_official	376:cb4d9db17537	1192	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official	376:cb4d9db17537	1193
mbed_official	376:cb4d9db17537	1194	hspi->pTxBuffPtr = pData;
mbed_official	376:cb4d9db17537	1195	hspi->TxXferSize = Size;
mbed_official	376:cb4d9db17537	1196	hspi->TxXferCount = Size;
mbed_official	376:cb4d9db17537	1197
mbed_official	376:cb4d9db17537	1198	/Init field not used in handle to zero /
mbed_official	376:cb4d9db17537	1199	hspi->TxISR = 0;
mbed_official	376:cb4d9db17537	1200	hspi->RxISR = 0;
mbed_official	376:cb4d9db17537	1201	hspi->RxXferSize = 0;
mbed_official	376:cb4d9db17537	1202	hspi->RxXferCount = 0;
mbed_official	376:cb4d9db17537	1203
mbed_official	376:cb4d9db17537	1204	/* Configure communication direction : 1Line */
mbed_official	376:cb4d9db17537	1205	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
mbed_official	376:cb4d9db17537	1206	{
mbed_official	376:cb4d9db17537	1207	__HAL_SPI_1LINE_TX(hspi);
mbed_official	376:cb4d9db17537	1208	}
mbed_official	376:cb4d9db17537	1209
mbed_official	376:cb4d9db17537	1210	/* Reset CRC Calculation */
mbed_official	376:cb4d9db17537	1211	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	1212	{
mbed_official	376:cb4d9db17537	1213	__HAL_SPI_RESET_CRC(hspi);
mbed_official	376:cb4d9db17537	1214	}
mbed_official	376:cb4d9db17537	1215
mbed_official	376:cb4d9db17537	1216	/* Set the SPI TxDMA Half transfer complete callback */
mbed_official	376:cb4d9db17537	1217	hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt;
mbed_official	376:cb4d9db17537	1218
mbed_official	376:cb4d9db17537	1219	/* Set the SPI TxDMA transfer complete callback */
mbed_official	376:cb4d9db17537	1220	hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt;
mbed_official	376:cb4d9db17537	1221
mbed_official	376:cb4d9db17537	1222	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	1223	hspi->hdmatx->XferErrorCallback = SPI_DMAError;
mbed_official	376:cb4d9db17537	1224
mbed_official	376:cb4d9db17537	1225	/* Enable the Tx DMA Stream */
mbed_official	376:cb4d9db17537	1226	HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
mbed_official	376:cb4d9db17537	1227
mbed_official	376:cb4d9db17537	1228	/* Enable Tx DMA Request */
mbed_official	376:cb4d9db17537	1229	hspi->Instance->CR2 \|= SPI_CR2_TXDMAEN;
mbed_official	376:cb4d9db17537	1230
mbed_official	376:cb4d9db17537	1231	/* Process Unlocked */
mbed_official	376:cb4d9db17537	1232	__HAL_UNLOCK(hspi);
mbed_official	376:cb4d9db17537	1233
mbed_official	376:cb4d9db17537	1234	/* Check if the SPI is already enabled */
mbed_official	376:cb4d9db17537	1235	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official	376:cb4d9db17537	1236	{
mbed_official	376:cb4d9db17537	1237	/* Enable SPI peripheral */
mbed_official	376:cb4d9db17537	1238	__HAL_SPI_ENABLE(hspi);
mbed_official	376:cb4d9db17537	1239	}
mbed_official	376:cb4d9db17537	1240
mbed_official	376:cb4d9db17537	1241	return HAL_OK;
mbed_official	376:cb4d9db17537	1242	}
mbed_official	376:cb4d9db17537	1243	else
mbed_official	376:cb4d9db17537	1244	{
mbed_official	376:cb4d9db17537	1245	return HAL_BUSY;
mbed_official	376:cb4d9db17537	1246	}
mbed_official	376:cb4d9db17537	1247	}
mbed_official	376:cb4d9db17537	1248
mbed_official	376:cb4d9db17537	1249	/**
mbed_official	376:cb4d9db17537	1250	* @brief Receive an amount of data in no-blocking mode with DMA
mbed_official	376:cb4d9db17537	1251	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1252	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	1253	* @param pData: pointer to data buffer
mbed_official	376:cb4d9db17537	1254	* @note When the CRC feature is enabled the pData Length must be Size + 1.
mbed_official	376:cb4d9db17537	1255	* @param Size: amount of data to be sent
mbed_official	376:cb4d9db17537	1256	* @retval HAL status
mbed_official	376:cb4d9db17537	1257	*/
mbed_official	376:cb4d9db17537	1258	HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size)
mbed_official	376:cb4d9db17537	1259	{
mbed_official	376:cb4d9db17537	1260	if(hspi->State == HAL_SPI_STATE_READY)
mbed_official	376:cb4d9db17537	1261	{
mbed_official	387:643a59b3dbac	1262	if((pData == HAL_NULL) \|\| (Size == 0))
mbed_official	376:cb4d9db17537	1263	{
mbed_official	376:cb4d9db17537	1264	return HAL_ERROR;
mbed_official	376:cb4d9db17537	1265	}
mbed_official	376:cb4d9db17537	1266
mbed_official	376:cb4d9db17537	1267	/* Process Locked */
mbed_official	376:cb4d9db17537	1268	__HAL_LOCK(hspi);
mbed_official	376:cb4d9db17537	1269
mbed_official	376:cb4d9db17537	1270	/* Configure communication */
mbed_official	376:cb4d9db17537	1271	hspi->State = HAL_SPI_STATE_BUSY_RX;
mbed_official	376:cb4d9db17537	1272	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official	376:cb4d9db17537	1273
mbed_official	376:cb4d9db17537	1274	hspi->pRxBuffPtr = pData;
mbed_official	376:cb4d9db17537	1275	hspi->RxXferSize = Size;
mbed_official	376:cb4d9db17537	1276	hspi->RxXferCount = Size;
mbed_official	376:cb4d9db17537	1277
mbed_official	376:cb4d9db17537	1278	/Init field not used in handle to zero /
mbed_official	376:cb4d9db17537	1279	hspi->RxISR = 0;
mbed_official	376:cb4d9db17537	1280	hspi->TxISR = 0;
mbed_official	376:cb4d9db17537	1281	hspi->TxXferSize = 0;
mbed_official	376:cb4d9db17537	1282	hspi->TxXferCount = 0;
mbed_official	376:cb4d9db17537	1283
mbed_official	376:cb4d9db17537	1284	/* Configure communication direction : 1Line */
mbed_official	376:cb4d9db17537	1285	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
mbed_official	376:cb4d9db17537	1286	{
mbed_official	376:cb4d9db17537	1287	__HAL_SPI_1LINE_RX(hspi);
mbed_official	376:cb4d9db17537	1288	}
mbed_official	376:cb4d9db17537	1289	else if((hspi->Init.Direction == SPI_DIRECTION_2LINES)&&(hspi->Init.Mode == SPI_MODE_MASTER))
mbed_official	376:cb4d9db17537	1290	{
mbed_official	376:cb4d9db17537	1291	/* Process Unlocked */
mbed_official	376:cb4d9db17537	1292	__HAL_UNLOCK(hspi);
mbed_official	376:cb4d9db17537	1293
mbed_official	376:cb4d9db17537	1294	/* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
mbed_official	376:cb4d9db17537	1295	return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size);
mbed_official	376:cb4d9db17537	1296	}
mbed_official	376:cb4d9db17537	1297
mbed_official	376:cb4d9db17537	1298	/* Reset CRC Calculation */
mbed_official	376:cb4d9db17537	1299	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	1300	{
mbed_official	376:cb4d9db17537	1301	__HAL_SPI_RESET_CRC(hspi);
mbed_official	376:cb4d9db17537	1302	}
mbed_official	376:cb4d9db17537	1303
mbed_official	376:cb4d9db17537	1304	/* Set the SPI RxDMA Half transfer complete callback */
mbed_official	376:cb4d9db17537	1305	hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
mbed_official	376:cb4d9db17537	1306
mbed_official	376:cb4d9db17537	1307	/* Set the SPI Rx DMA transfer complete callback */
mbed_official	376:cb4d9db17537	1308	hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
mbed_official	376:cb4d9db17537	1309
mbed_official	376:cb4d9db17537	1310	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	1311	hspi->hdmarx->XferErrorCallback = SPI_DMAError;
mbed_official	376:cb4d9db17537	1312
mbed_official	376:cb4d9db17537	1313	/* Enable the Rx DMA Stream */
mbed_official	376:cb4d9db17537	1314	HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
mbed_official	376:cb4d9db17537	1315
mbed_official	376:cb4d9db17537	1316	/* Enable Rx DMA Request */
mbed_official	376:cb4d9db17537	1317	hspi->Instance->CR2 \|= SPI_CR2_RXDMAEN;
mbed_official	376:cb4d9db17537	1318
mbed_official	376:cb4d9db17537	1319	/* Process Unlocked */
mbed_official	376:cb4d9db17537	1320	__HAL_UNLOCK(hspi);
mbed_official	376:cb4d9db17537	1321
mbed_official	376:cb4d9db17537	1322	/* Check if the SPI is already enabled */
mbed_official	376:cb4d9db17537	1323	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official	376:cb4d9db17537	1324	{
mbed_official	376:cb4d9db17537	1325	/* Enable SPI peripheral */
mbed_official	376:cb4d9db17537	1326	__HAL_SPI_ENABLE(hspi);
mbed_official	376:cb4d9db17537	1327	}
mbed_official	376:cb4d9db17537	1328
mbed_official	376:cb4d9db17537	1329	return HAL_OK;
mbed_official	376:cb4d9db17537	1330	}
mbed_official	376:cb4d9db17537	1331	else
mbed_official	376:cb4d9db17537	1332	{
mbed_official	376:cb4d9db17537	1333	return HAL_BUSY;
mbed_official	376:cb4d9db17537	1334	}
mbed_official	376:cb4d9db17537	1335	}
mbed_official	376:cb4d9db17537	1336
mbed_official	376:cb4d9db17537	1337	/**
mbed_official	376:cb4d9db17537	1338	* @brief Transmit and Receive an amount of data in no-blocking mode with DMA
mbed_official	376:cb4d9db17537	1339	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1340	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	1341	* @param pTxData: pointer to transmission data buffer
mbed_official	376:cb4d9db17537	1342	* @param pRxData: pointer to reception data buffer
mbed_official	376:cb4d9db17537	1343	* @note When the CRC feature is enabled the pRxData Length must be Size + 1
mbed_official	376:cb4d9db17537	1344	* @param Size: amount of data to be sent
mbed_official	376:cb4d9db17537	1345	* @retval HAL status
mbed_official	376:cb4d9db17537	1346	*/
mbed_official	376:cb4d9db17537	1347	HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef hspi, uint8_t pTxData, uint8_t *pRxData, uint16_t Size)
mbed_official	376:cb4d9db17537	1348	{
mbed_official	376:cb4d9db17537	1349	uint32_t tmpstate = 0;
mbed_official	376:cb4d9db17537	1350	tmpstate = hspi->State;
mbed_official	376:cb4d9db17537	1351	if((tmpstate == HAL_SPI_STATE_READY) \|\| ((hspi->Init.Mode == SPI_MODE_MASTER) && \
mbed_official	376:cb4d9db17537	1352	(hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmpstate == HAL_SPI_STATE_BUSY_RX)))
mbed_official	376:cb4d9db17537	1353	{
mbed_official	387:643a59b3dbac	1354	if((pTxData == HAL_NULL ) \|\| (pRxData == HAL_NULL ) \|\| (Size == 0))
mbed_official	376:cb4d9db17537	1355	{
mbed_official	376:cb4d9db17537	1356	return HAL_ERROR;
mbed_official	376:cb4d9db17537	1357	}
mbed_official	376:cb4d9db17537	1358
mbed_official	376:cb4d9db17537	1359	/* Check the parameters */
mbed_official	376:cb4d9db17537	1360	assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
mbed_official	376:cb4d9db17537	1361
mbed_official	376:cb4d9db17537	1362	/* Process locked */
mbed_official	376:cb4d9db17537	1363	__HAL_LOCK(hspi);
mbed_official	376:cb4d9db17537	1364
mbed_official	376:cb4d9db17537	1365	/* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
mbed_official	376:cb4d9db17537	1366	if(hspi->State != HAL_SPI_STATE_BUSY_RX)
mbed_official	376:cb4d9db17537	1367	{
mbed_official	376:cb4d9db17537	1368	hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
mbed_official	376:cb4d9db17537	1369	}
mbed_official	376:cb4d9db17537	1370
mbed_official	376:cb4d9db17537	1371	/* Configure communication */
mbed_official	376:cb4d9db17537	1372	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official	376:cb4d9db17537	1373
mbed_official	376:cb4d9db17537	1374	hspi->pTxBuffPtr = (uint8_t*)pTxData;
mbed_official	376:cb4d9db17537	1375	hspi->TxXferSize = Size;
mbed_official	376:cb4d9db17537	1376	hspi->TxXferCount = Size;
mbed_official	376:cb4d9db17537	1377
mbed_official	376:cb4d9db17537	1378	hspi->pRxBuffPtr = (uint8_t*)pRxData;
mbed_official	376:cb4d9db17537	1379	hspi->RxXferSize = Size;
mbed_official	376:cb4d9db17537	1380	hspi->RxXferCount = Size;
mbed_official	376:cb4d9db17537	1381
mbed_official	376:cb4d9db17537	1382	/Init field not used in handle to zero /
mbed_official	376:cb4d9db17537	1383	hspi->RxISR = 0;
mbed_official	376:cb4d9db17537	1384	hspi->TxISR = 0;
mbed_official	376:cb4d9db17537	1385
mbed_official	376:cb4d9db17537	1386	/* Reset CRC Calculation */
mbed_official	376:cb4d9db17537	1387	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	1388	{
mbed_official	376:cb4d9db17537	1389	__HAL_SPI_RESET_CRC(hspi);
mbed_official	376:cb4d9db17537	1390	}
mbed_official	376:cb4d9db17537	1391
mbed_official	376:cb4d9db17537	1392	/* Check if we are in Rx only or in Rx/Tx Mode and configure the DMA transfer complete callback */
mbed_official	376:cb4d9db17537	1393	if(hspi->State == HAL_SPI_STATE_BUSY_RX)
mbed_official	376:cb4d9db17537	1394	{
mbed_official	376:cb4d9db17537	1395	/* Set the SPI Rx DMA Half transfer complete callback */
mbed_official	376:cb4d9db17537	1396	hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
mbed_official	376:cb4d9db17537	1397
mbed_official	376:cb4d9db17537	1398	hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
mbed_official	376:cb4d9db17537	1399	}
mbed_official	376:cb4d9db17537	1400	else
mbed_official	376:cb4d9db17537	1401	{
mbed_official	376:cb4d9db17537	1402	/* Set the SPI Tx/Rx DMA Half transfer complete callback */
mbed_official	376:cb4d9db17537	1403	hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt;
mbed_official	376:cb4d9db17537	1404
mbed_official	376:cb4d9db17537	1405	hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt;
mbed_official	376:cb4d9db17537	1406	}
mbed_official	376:cb4d9db17537	1407
mbed_official	376:cb4d9db17537	1408	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	1409	hspi->hdmarx->XferErrorCallback = SPI_DMAError;
mbed_official	376:cb4d9db17537	1410
mbed_official	376:cb4d9db17537	1411	/* Enable the Rx DMA Stream */
mbed_official	376:cb4d9db17537	1412	HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
mbed_official	376:cb4d9db17537	1413
mbed_official	376:cb4d9db17537	1414	/* Enable Rx DMA Request */
mbed_official	376:cb4d9db17537	1415	hspi->Instance->CR2 \|= SPI_CR2_RXDMAEN;
mbed_official	376:cb4d9db17537	1416
mbed_official	387:643a59b3dbac	1417	/* Set the SPI Tx DMA transfer complete callback as HAL_NULL because the communication closing
mbed_official	376:cb4d9db17537	1418	is performed in DMA reception complete callback */
mbed_official	387:643a59b3dbac	1419	hspi->hdmatx->XferCpltCallback = HAL_NULL;
mbed_official	376:cb4d9db17537	1420
mbed_official	376:cb4d9db17537	1421	/* Set the DMA error callback */
mbed_official	376:cb4d9db17537	1422	hspi->hdmatx->XferErrorCallback = SPI_DMAError;
mbed_official	376:cb4d9db17537	1423
mbed_official	376:cb4d9db17537	1424	/* Enable the Tx DMA Stream */
mbed_official	376:cb4d9db17537	1425	HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
mbed_official	376:cb4d9db17537	1426
mbed_official	376:cb4d9db17537	1427	/* Check if the SPI is already enabled */
mbed_official	376:cb4d9db17537	1428	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official	376:cb4d9db17537	1429	{
mbed_official	376:cb4d9db17537	1430	/* Enable SPI peripheral */
mbed_official	376:cb4d9db17537	1431	__HAL_SPI_ENABLE(hspi);
mbed_official	376:cb4d9db17537	1432	}
mbed_official	376:cb4d9db17537	1433
mbed_official	376:cb4d9db17537	1434	/* Enable Tx DMA Request */
mbed_official	376:cb4d9db17537	1435	hspi->Instance->CR2 \|= SPI_CR2_TXDMAEN;
mbed_official	376:cb4d9db17537	1436
mbed_official	376:cb4d9db17537	1437	/* Process Unlocked */
mbed_official	376:cb4d9db17537	1438	__HAL_UNLOCK(hspi);
mbed_official	376:cb4d9db17537	1439
mbed_official	376:cb4d9db17537	1440	return HAL_OK;
mbed_official	376:cb4d9db17537	1441	}
mbed_official	376:cb4d9db17537	1442	else
mbed_official	376:cb4d9db17537	1443	{
mbed_official	376:cb4d9db17537	1444	return HAL_BUSY;
mbed_official	376:cb4d9db17537	1445	}
mbed_official	376:cb4d9db17537	1446	}
mbed_official	376:cb4d9db17537	1447
mbed_official	376:cb4d9db17537	1448	/**
mbed_official	376:cb4d9db17537	1449	* @brief Pauses the DMA Transfer.
mbed_official	376:cb4d9db17537	1450	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1451	* the configuration information for the specified SPI module.
mbed_official	376:cb4d9db17537	1452	* @retval HAL status
mbed_official	376:cb4d9db17537	1453	*/
mbed_official	376:cb4d9db17537	1454	HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi)
mbed_official	376:cb4d9db17537	1455	{
mbed_official	376:cb4d9db17537	1456	/* Process Locked */
mbed_official	376:cb4d9db17537	1457	__HAL_LOCK(hspi);
mbed_official	376:cb4d9db17537	1458
mbed_official	376:cb4d9db17537	1459	/* Disable the SPI DMA Tx & Rx requests */
mbed_official	376:cb4d9db17537	1460	hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
mbed_official	376:cb4d9db17537	1461	hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
mbed_official	376:cb4d9db17537	1462
mbed_official	376:cb4d9db17537	1463	/* Process Unlocked */
mbed_official	376:cb4d9db17537	1464	__HAL_UNLOCK(hspi);
mbed_official	376:cb4d9db17537	1465
mbed_official	376:cb4d9db17537	1466	return HAL_OK;
mbed_official	376:cb4d9db17537	1467	}
mbed_official	376:cb4d9db17537	1468
mbed_official	376:cb4d9db17537	1469	/**
mbed_official	376:cb4d9db17537	1470	* @brief Resumes the DMA Transfer.
mbed_official	376:cb4d9db17537	1471	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1472	* the configuration information for the specified SPI module.
mbed_official	376:cb4d9db17537	1473	* @retval HAL status
mbed_official	376:cb4d9db17537	1474	*/
mbed_official	376:cb4d9db17537	1475	HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi)
mbed_official	376:cb4d9db17537	1476	{
mbed_official	376:cb4d9db17537	1477	/* Process Locked */
mbed_official	376:cb4d9db17537	1478	__HAL_LOCK(hspi);
mbed_official	376:cb4d9db17537	1479
mbed_official	376:cb4d9db17537	1480	/* Enable the SPI DMA Tx & Rx requests */
mbed_official	376:cb4d9db17537	1481	hspi->Instance->CR2 \|= SPI_CR2_TXDMAEN;
mbed_official	376:cb4d9db17537	1482	hspi->Instance->CR2 \|= SPI_CR2_RXDMAEN;
mbed_official	376:cb4d9db17537	1483
mbed_official	376:cb4d9db17537	1484	/* Process Unlocked */
mbed_official	376:cb4d9db17537	1485	__HAL_UNLOCK(hspi);
mbed_official	376:cb4d9db17537	1486
mbed_official	376:cb4d9db17537	1487	return HAL_OK;
mbed_official	376:cb4d9db17537	1488	}
mbed_official	376:cb4d9db17537	1489
mbed_official	376:cb4d9db17537	1490	/**
mbed_official	376:cb4d9db17537	1491	* @brief Stops the DMA Transfer.
mbed_official	376:cb4d9db17537	1492	* @param huart: pointer to a UART_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1493	* the configuration information for the specified UART module.
mbed_official	376:cb4d9db17537	1494	* @retval HAL status
mbed_official	376:cb4d9db17537	1495	*/
mbed_official	376:cb4d9db17537	1496	HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
mbed_official	376:cb4d9db17537	1497	{
mbed_official	376:cb4d9db17537	1498	/* The Lock is not implemented on this API to allow the user application
mbed_official	376:cb4d9db17537	1499	to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
mbed_official	376:cb4d9db17537	1500	when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
mbed_official	376:cb4d9db17537	1501	and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
mbed_official	376:cb4d9db17537	1502	*/
mbed_official	376:cb4d9db17537	1503
mbed_official	376:cb4d9db17537	1504	/* Abort the SPI DMA tx Stream */
mbed_official	387:643a59b3dbac	1505	if(hspi->hdmatx != HAL_NULL)
mbed_official	376:cb4d9db17537	1506	{
mbed_official	376:cb4d9db17537	1507	HAL_DMA_Abort(hspi->hdmatx);
mbed_official	376:cb4d9db17537	1508	}
mbed_official	376:cb4d9db17537	1509	/* Abort the SPI DMA rx Stream */
mbed_official	387:643a59b3dbac	1510	if(hspi->hdmarx != HAL_NULL)
mbed_official	376:cb4d9db17537	1511	{
mbed_official	376:cb4d9db17537	1512	HAL_DMA_Abort(hspi->hdmarx);
mbed_official	376:cb4d9db17537	1513	}
mbed_official	376:cb4d9db17537	1514
mbed_official	376:cb4d9db17537	1515	/* Disable the SPI DMA Tx & Rx requests */
mbed_official	376:cb4d9db17537	1516	hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
mbed_official	376:cb4d9db17537	1517	hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
mbed_official	376:cb4d9db17537	1518
mbed_official	376:cb4d9db17537	1519	hspi->State = HAL_SPI_STATE_READY;
mbed_official	376:cb4d9db17537	1520
mbed_official	376:cb4d9db17537	1521	return HAL_OK;
mbed_official	376:cb4d9db17537	1522	}
mbed_official	376:cb4d9db17537	1523
mbed_official	376:cb4d9db17537	1524	/**
mbed_official	376:cb4d9db17537	1525	* @brief This function handles SPI interrupt request.
mbed_official	376:cb4d9db17537	1526	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1527	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	1528	* @retval HAL status
mbed_official	376:cb4d9db17537	1529	*/
mbed_official	376:cb4d9db17537	1530	void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
mbed_official	376:cb4d9db17537	1531	{
mbed_official	376:cb4d9db17537	1532	uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0;
mbed_official	376:cb4d9db17537	1533
mbed_official	376:cb4d9db17537	1534	tmp1 = __HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE);
mbed_official	376:cb4d9db17537	1535	tmp2 = __HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE);
mbed_official	376:cb4d9db17537	1536	tmp3 = __HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR);
mbed_official	376:cb4d9db17537	1537	/* SPI in mode Receiver and Overrun not occurred ---------------------------*/
mbed_official	376:cb4d9db17537	1538	if((tmp1 != RESET) && (tmp2 != RESET) && (tmp3 == RESET))
mbed_official	376:cb4d9db17537	1539	{
mbed_official	376:cb4d9db17537	1540	hspi->RxISR(hspi);
mbed_official	376:cb4d9db17537	1541	return;
mbed_official	376:cb4d9db17537	1542	}
mbed_official	376:cb4d9db17537	1543
mbed_official	376:cb4d9db17537	1544	tmp1 = __HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE);
mbed_official	376:cb4d9db17537	1545	tmp2 = __HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE);
mbed_official	376:cb4d9db17537	1546	/* SPI in mode Tramitter ---------------------------------------------------*/
mbed_official	376:cb4d9db17537	1547	if((tmp1 != RESET) && (tmp2 != RESET))
mbed_official	376:cb4d9db17537	1548	{
mbed_official	376:cb4d9db17537	1549	hspi->TxISR(hspi);
mbed_official	376:cb4d9db17537	1550	return;
mbed_official	376:cb4d9db17537	1551	}
mbed_official	376:cb4d9db17537	1552
mbed_official	376:cb4d9db17537	1553	if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_ERR) != RESET)
mbed_official	376:cb4d9db17537	1554	{
mbed_official	376:cb4d9db17537	1555	/* SPI CRC error interrupt occured ---------------------------------------*/
mbed_official	376:cb4d9db17537	1556	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
mbed_official	376:cb4d9db17537	1557	{
mbed_official	376:cb4d9db17537	1558	hspi->ErrorCode \|= HAL_SPI_ERROR_CRC;
mbed_official	376:cb4d9db17537	1559	__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
mbed_official	376:cb4d9db17537	1560	}
mbed_official	376:cb4d9db17537	1561	/* SPI Mode Fault error interrupt occured --------------------------------*/
mbed_official	376:cb4d9db17537	1562	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_MODF) != RESET)
mbed_official	376:cb4d9db17537	1563	{
mbed_official	376:cb4d9db17537	1564	hspi->ErrorCode \|= HAL_SPI_ERROR_MODF;
mbed_official	376:cb4d9db17537	1565	__HAL_SPI_CLEAR_MODFFLAG(hspi);
mbed_official	376:cb4d9db17537	1566	}
mbed_official	376:cb4d9db17537	1567
mbed_official	376:cb4d9db17537	1568	/* SPI Overrun error interrupt occured -----------------------------------*/
mbed_official	376:cb4d9db17537	1569	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) != RESET)
mbed_official	376:cb4d9db17537	1570	{
mbed_official	376:cb4d9db17537	1571	if(hspi->State != HAL_SPI_STATE_BUSY_TX)
mbed_official	376:cb4d9db17537	1572	{
mbed_official	376:cb4d9db17537	1573	hspi->ErrorCode \|= HAL_SPI_ERROR_OVR;
mbed_official	376:cb4d9db17537	1574	__HAL_SPI_CLEAR_OVRFLAG(hspi);
mbed_official	376:cb4d9db17537	1575	}
mbed_official	376:cb4d9db17537	1576	}
mbed_official	376:cb4d9db17537	1577
mbed_official	376:cb4d9db17537	1578	/* SPI Frame error interrupt occured -------------------------------------*/
mbed_official	376:cb4d9db17537	1579	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_FRE) != RESET)
mbed_official	376:cb4d9db17537	1580	{
mbed_official	376:cb4d9db17537	1581	hspi->ErrorCode \|= HAL_SPI_ERROR_FRE;
mbed_official	376:cb4d9db17537	1582	__HAL_SPI_CLEAR_FREFLAG(hspi);
mbed_official	376:cb4d9db17537	1583	}
mbed_official	376:cb4d9db17537	1584
mbed_official	376:cb4d9db17537	1585	/* Call the Error call Back in case of Errors */
mbed_official	376:cb4d9db17537	1586	if(hspi->ErrorCode!=HAL_SPI_ERROR_NONE)
mbed_official	376:cb4d9db17537	1587	{
mbed_official	376:cb4d9db17537	1588	hspi->State = HAL_SPI_STATE_READY;
mbed_official	376:cb4d9db17537	1589	HAL_SPI_ErrorCallback(hspi);
mbed_official	376:cb4d9db17537	1590	}
mbed_official	376:cb4d9db17537	1591	}
mbed_official	376:cb4d9db17537	1592	}
mbed_official	376:cb4d9db17537	1593
mbed_official	376:cb4d9db17537	1594	/**
mbed_official	376:cb4d9db17537	1595	* @brief Tx Transfer completed callbacks
mbed_official	376:cb4d9db17537	1596	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1597	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	1598	* @retval None
mbed_official	376:cb4d9db17537	1599	*/
mbed_official	376:cb4d9db17537	1600	__weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
mbed_official	376:cb4d9db17537	1601	{
mbed_official	376:cb4d9db17537	1602	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	1603	the HAL_SPI_TxCpltCallback could be implenetd in the user file
mbed_official	376:cb4d9db17537	1604	*/
mbed_official	376:cb4d9db17537	1605	}
mbed_official	376:cb4d9db17537	1606
mbed_official	376:cb4d9db17537	1607	/**
mbed_official	376:cb4d9db17537	1608	* @brief Rx Transfer completed callbacks
mbed_official	376:cb4d9db17537	1609	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1610	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	1611	* @retval None
mbed_official	376:cb4d9db17537	1612	*/
mbed_official	376:cb4d9db17537	1613	__weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
mbed_official	376:cb4d9db17537	1614	{
mbed_official	376:cb4d9db17537	1615	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	1616	the HAL_SPI_RxCpltCallback() could be implenetd in the user file
mbed_official	376:cb4d9db17537	1617	*/
mbed_official	376:cb4d9db17537	1618	}
mbed_official	376:cb4d9db17537	1619
mbed_official	376:cb4d9db17537	1620	/**
mbed_official	376:cb4d9db17537	1621	* @brief Tx and Rx Transfer completed callbacks
mbed_official	376:cb4d9db17537	1622	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1623	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	1624	* @retval None
mbed_official	376:cb4d9db17537	1625	*/
mbed_official	376:cb4d9db17537	1626	__weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
mbed_official	376:cb4d9db17537	1627	{
mbed_official	376:cb4d9db17537	1628	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	1629	the HAL_SPI_TxRxCpltCallback() could be implenetd in the user file
mbed_official	376:cb4d9db17537	1630	*/
mbed_official	376:cb4d9db17537	1631	}
mbed_official	376:cb4d9db17537	1632
mbed_official	376:cb4d9db17537	1633	/**
mbed_official	376:cb4d9db17537	1634	* @brief Tx Half Transfer completed callbacks
mbed_official	376:cb4d9db17537	1635	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1636	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	1637	* @retval None
mbed_official	376:cb4d9db17537	1638	*/
mbed_official	376:cb4d9db17537	1639	__weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi)
mbed_official	376:cb4d9db17537	1640	{
mbed_official	376:cb4d9db17537	1641	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	1642	the HAL_SPI_TxHalfCpltCallback could be implenetd in the user file
mbed_official	376:cb4d9db17537	1643	*/
mbed_official	376:cb4d9db17537	1644	}
mbed_official	376:cb4d9db17537	1645
mbed_official	376:cb4d9db17537	1646	/**
mbed_official	376:cb4d9db17537	1647	* @brief Rx Half Transfer completed callbacks
mbed_official	376:cb4d9db17537	1648	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1649	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	1650	* @retval None
mbed_official	376:cb4d9db17537	1651	*/
mbed_official	376:cb4d9db17537	1652	__weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi)
mbed_official	376:cb4d9db17537	1653	{
mbed_official	376:cb4d9db17537	1654	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	1655	the HAL_SPI_RxHalfCpltCallback() could be implenetd in the user file
mbed_official	376:cb4d9db17537	1656	*/
mbed_official	376:cb4d9db17537	1657	}
mbed_official	376:cb4d9db17537	1658
mbed_official	376:cb4d9db17537	1659	/**
mbed_official	376:cb4d9db17537	1660	* @brief Tx and Rx Transfer completed callbacks
mbed_official	376:cb4d9db17537	1661	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1662	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	1663	* @retval None
mbed_official	376:cb4d9db17537	1664	*/
mbed_official	376:cb4d9db17537	1665	__weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi)
mbed_official	376:cb4d9db17537	1666	{
mbed_official	376:cb4d9db17537	1667	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	1668	the HAL_SPI_TxRxHalfCpltCallback() could be implenetd in the user file
mbed_official	376:cb4d9db17537	1669	*/
mbed_official	376:cb4d9db17537	1670	}
mbed_official	376:cb4d9db17537	1671
mbed_official	376:cb4d9db17537	1672	/**
mbed_official	376:cb4d9db17537	1673	* @brief SPI error callbacks
mbed_official	376:cb4d9db17537	1674	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1675	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	1676	* @retval None
mbed_official	376:cb4d9db17537	1677	*/
mbed_official	376:cb4d9db17537	1678	__weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
mbed_official	376:cb4d9db17537	1679	{
mbed_official	376:cb4d9db17537	1680	/* NOTE : - This function Should not be modified, when the callback is needed,
mbed_official	376:cb4d9db17537	1681	the HAL_SPI_ErrorCallback() could be implenetd in the user file.
mbed_official	376:cb4d9db17537	1682	- The ErrorCode parameter in the hspi handle is updated by the SPI processes
mbed_official	376:cb4d9db17537	1683	and user can use HAL_SPI_GetError() API to check the latest error occured.
mbed_official	376:cb4d9db17537	1684	*/
mbed_official	376:cb4d9db17537	1685	}
mbed_official	376:cb4d9db17537	1686
mbed_official	376:cb4d9db17537	1687	/**
mbed_official	376:cb4d9db17537	1688	* @}
mbed_official	376:cb4d9db17537	1689	*/
mbed_official	376:cb4d9db17537	1690
mbed_official	376:cb4d9db17537	1691	/** @defgroup SPI_Group3 Peripheral State and Errors functions
mbed_official	376:cb4d9db17537	1692	* @brief SPI control functions
mbed_official	376:cb4d9db17537	1693	*
mbed_official	376:cb4d9db17537	1694	@verbatim
mbed_official	376:cb4d9db17537	1695	===============================================================================
mbed_official	376:cb4d9db17537	1696	##### Peripheral State and Errors functions #####
mbed_official	376:cb4d9db17537	1697	===============================================================================
mbed_official	376:cb4d9db17537	1698	[..]
mbed_official	376:cb4d9db17537	1699	This subsection provides a set of functions allowing to control the SPI.
mbed_official	376:cb4d9db17537	1700	(+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral
mbed_official	376:cb4d9db17537	1701	(+) HAL_SPI_GetError() check in run-time Errors occurring during communication
mbed_official	376:cb4d9db17537	1702	@endverbatim
mbed_official	376:cb4d9db17537	1703	* @{
mbed_official	376:cb4d9db17537	1704	*/
mbed_official	376:cb4d9db17537	1705
mbed_official	376:cb4d9db17537	1706	/**
mbed_official	376:cb4d9db17537	1707	* @brief Return the SPI state
mbed_official	376:cb4d9db17537	1708	* @param hspi : SPI handle
mbed_official	376:cb4d9db17537	1709	* @retval SPI state
mbed_official	376:cb4d9db17537	1710	*/
mbed_official	376:cb4d9db17537	1711	HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
mbed_official	376:cb4d9db17537	1712	{
mbed_official	376:cb4d9db17537	1713	return hspi->State;
mbed_official	376:cb4d9db17537	1714	}
mbed_official	376:cb4d9db17537	1715
mbed_official	376:cb4d9db17537	1716	/**
mbed_official	376:cb4d9db17537	1717	* @brief Return the SPI error code
mbed_official	376:cb4d9db17537	1718	* @param hspi : SPI handle
mbed_official	376:cb4d9db17537	1719	* @retval SPI Error Code
mbed_official	376:cb4d9db17537	1720	*/
mbed_official	376:cb4d9db17537	1721	HAL_SPI_ErrorTypeDef HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
mbed_official	376:cb4d9db17537	1722	{
mbed_official	376:cb4d9db17537	1723	return hspi->ErrorCode;
mbed_official	376:cb4d9db17537	1724	}
mbed_official	376:cb4d9db17537	1725
mbed_official	376:cb4d9db17537	1726	/**
mbed_official	376:cb4d9db17537	1727	* @}
mbed_official	376:cb4d9db17537	1728	*/
mbed_official	376:cb4d9db17537	1729
mbed_official	376:cb4d9db17537	1730	/**
mbed_official	376:cb4d9db17537	1731	* @brief Interrupt Handler to close Tx transfer
mbed_official	376:cb4d9db17537	1732	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1733	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	1734	* @retval void
mbed_official	376:cb4d9db17537	1735	*/
mbed_official	376:cb4d9db17537	1736	static void SPI_TxCloseIRQHandler(SPI_HandleTypeDef *hspi)
mbed_official	376:cb4d9db17537	1737	{
mbed_official	376:cb4d9db17537	1738	/* Wait until TXE flag is set to send data */
mbed_official	376:cb4d9db17537	1739	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
mbed_official	376:cb4d9db17537	1740	{
mbed_official	376:cb4d9db17537	1741	hspi->ErrorCode \|= HAL_SPI_ERROR_FLAG;
mbed_official	376:cb4d9db17537	1742	}
mbed_official	376:cb4d9db17537	1743
mbed_official	376:cb4d9db17537	1744	/* Disable TXE interrupt */
mbed_official	376:cb4d9db17537	1745	__HAL_SPI_DISABLE_IT(hspi, (uint32_t)SPI_IT_TXE);
mbed_official	376:cb4d9db17537	1746
mbed_official	376:cb4d9db17537	1747	/* Disable ERR interrupt if Receive process is finished */
mbed_official	376:cb4d9db17537	1748	if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) == RESET)
mbed_official	376:cb4d9db17537	1749	{
mbed_official	376:cb4d9db17537	1750	__HAL_SPI_DISABLE_IT(hspi, (uint32_t)SPI_IT_ERR);
mbed_official	376:cb4d9db17537	1751
mbed_official	376:cb4d9db17537	1752	/* Wait until Busy flag is reset before disabling SPI */
mbed_official	376:cb4d9db17537	1753	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
mbed_official	376:cb4d9db17537	1754	{
mbed_official	376:cb4d9db17537	1755	hspi->ErrorCode \|= HAL_SPI_ERROR_FLAG;
mbed_official	376:cb4d9db17537	1756	}
mbed_official	376:cb4d9db17537	1757
mbed_official	376:cb4d9db17537	1758	/* Clear OVERUN flag in 2 Lines communication mode because received is not read */
mbed_official	376:cb4d9db17537	1759	if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
mbed_official	376:cb4d9db17537	1760	{
mbed_official	376:cb4d9db17537	1761	__HAL_SPI_CLEAR_OVRFLAG(hspi);
mbed_official	376:cb4d9db17537	1762	}
mbed_official	376:cb4d9db17537	1763
mbed_official	376:cb4d9db17537	1764	/* Check if Errors has been detected during transfer */
mbed_official	376:cb4d9db17537	1765	if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
mbed_official	376:cb4d9db17537	1766	{
mbed_official	376:cb4d9db17537	1767	/* Check if we are in Tx or in Rx/Tx Mode */
mbed_official	376:cb4d9db17537	1768	if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
mbed_official	376:cb4d9db17537	1769	{
mbed_official	376:cb4d9db17537	1770	/* Set state to READY before run the Callback Complete */
mbed_official	376:cb4d9db17537	1771	hspi->State = HAL_SPI_STATE_READY;
mbed_official	376:cb4d9db17537	1772	HAL_SPI_TxRxCpltCallback(hspi);
mbed_official	376:cb4d9db17537	1773	}
mbed_official	376:cb4d9db17537	1774	else
mbed_official	376:cb4d9db17537	1775	{
mbed_official	376:cb4d9db17537	1776	/* Set state to READY before run the Callback Complete */
mbed_official	376:cb4d9db17537	1777	hspi->State = HAL_SPI_STATE_READY;
mbed_official	376:cb4d9db17537	1778	HAL_SPI_TxCpltCallback(hspi);
mbed_official	376:cb4d9db17537	1779	}
mbed_official	376:cb4d9db17537	1780	}
mbed_official	376:cb4d9db17537	1781	else
mbed_official	376:cb4d9db17537	1782	{
mbed_official	376:cb4d9db17537	1783	/* Set state to READY before run the Callback Complete */
mbed_official	376:cb4d9db17537	1784	hspi->State = HAL_SPI_STATE_READY;
mbed_official	376:cb4d9db17537	1785	/* Call Error call back in case of Error */
mbed_official	376:cb4d9db17537	1786	HAL_SPI_ErrorCallback(hspi);
mbed_official	376:cb4d9db17537	1787	}
mbed_official	376:cb4d9db17537	1788	}
mbed_official	376:cb4d9db17537	1789	}
mbed_official	376:cb4d9db17537	1790
mbed_official	376:cb4d9db17537	1791	/**
mbed_official	376:cb4d9db17537	1792	* @brief Interrupt Handler to transmit amount of data in no-blocking mode
mbed_official	376:cb4d9db17537	1793	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1794	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	1795	* @retval void
mbed_official	376:cb4d9db17537	1796	*/
mbed_official	376:cb4d9db17537	1797	static void SPI_TxISR(SPI_HandleTypeDef *hspi)
mbed_official	376:cb4d9db17537	1798	{
mbed_official	376:cb4d9db17537	1799	/* Transmit data in 8 Bit mode */
mbed_official	376:cb4d9db17537	1800	if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
mbed_official	376:cb4d9db17537	1801	{
mbed_official	376:cb4d9db17537	1802	hspi->Instance->DR = (*hspi->pTxBuffPtr++);
mbed_official	376:cb4d9db17537	1803	}
mbed_official	376:cb4d9db17537	1804	/* Transmit data in 16 Bit mode */
mbed_official	376:cb4d9db17537	1805	else
mbed_official	376:cb4d9db17537	1806	{
mbed_official	376:cb4d9db17537	1807	hspi->Instance->DR = ((uint16_t)hspi->pTxBuffPtr);
mbed_official	376:cb4d9db17537	1808	hspi->pTxBuffPtr+=2;
mbed_official	376:cb4d9db17537	1809	}
mbed_official	376:cb4d9db17537	1810	hspi->TxXferCount--;
mbed_official	376:cb4d9db17537	1811
mbed_official	376:cb4d9db17537	1812	if(hspi->TxXferCount == 0)
mbed_official	376:cb4d9db17537	1813	{
mbed_official	376:cb4d9db17537	1814	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	1815	{
mbed_official	376:cb4d9db17537	1816	/* calculate and transfer CRC on Tx line */
mbed_official	376:cb4d9db17537	1817	hspi->Instance->CR1 \|= SPI_CR1_CRCNEXT;
mbed_official	376:cb4d9db17537	1818	}
mbed_official	376:cb4d9db17537	1819	SPI_TxCloseIRQHandler(hspi);
mbed_official	376:cb4d9db17537	1820	}
mbed_official	376:cb4d9db17537	1821	}
mbed_official	376:cb4d9db17537	1822
mbed_official	376:cb4d9db17537	1823	/**
mbed_official	376:cb4d9db17537	1824	* @brief Interrupt Handler to close Rx transfer
mbed_official	376:cb4d9db17537	1825	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1826	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	1827	* @retval void
mbed_official	376:cb4d9db17537	1828	*/
mbed_official	376:cb4d9db17537	1829	static void SPI_RxCloseIRQHandler(SPI_HandleTypeDef *hspi)
mbed_official	376:cb4d9db17537	1830	{
mbed_official	376:cb4d9db17537	1831	__IO uint16_t tmpreg;
mbed_official	376:cb4d9db17537	1832
mbed_official	376:cb4d9db17537	1833	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	1834	{
mbed_official	376:cb4d9db17537	1835	/* Wait until RXNE flag is set to send data */
mbed_official	376:cb4d9db17537	1836	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
mbed_official	376:cb4d9db17537	1837	{
mbed_official	376:cb4d9db17537	1838	hspi->ErrorCode \|= HAL_SPI_ERROR_FLAG;
mbed_official	376:cb4d9db17537	1839	}
mbed_official	376:cb4d9db17537	1840
mbed_official	376:cb4d9db17537	1841	/* Read CRC to reset RXNE flag */
mbed_official	376:cb4d9db17537	1842	tmpreg = hspi->Instance->DR;
mbed_official	376:cb4d9db17537	1843
mbed_official	376:cb4d9db17537	1844	/* Wait until RXNE flag is set to send data */
mbed_official	376:cb4d9db17537	1845	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
mbed_official	376:cb4d9db17537	1846	{
mbed_official	376:cb4d9db17537	1847	hspi->ErrorCode \|= HAL_SPI_ERROR_FLAG;
mbed_official	376:cb4d9db17537	1848	}
mbed_official	376:cb4d9db17537	1849
mbed_official	376:cb4d9db17537	1850	/* Check if CRC error occurred */
mbed_official	376:cb4d9db17537	1851	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
mbed_official	376:cb4d9db17537	1852	{
mbed_official	376:cb4d9db17537	1853	hspi->ErrorCode \|= HAL_SPI_ERROR_CRC;
mbed_official	376:cb4d9db17537	1854
mbed_official	376:cb4d9db17537	1855	/* Reset CRC Calculation */
mbed_official	376:cb4d9db17537	1856	__HAL_SPI_RESET_CRC(hspi);
mbed_official	376:cb4d9db17537	1857	}
mbed_official	376:cb4d9db17537	1858	}
mbed_official	376:cb4d9db17537	1859
mbed_official	376:cb4d9db17537	1860	/* Disable RXNE and ERR interrupt */
mbed_official	376:cb4d9db17537	1861	__HAL_SPI_DISABLE_IT(hspi, (uint32_t)(SPI_IT_RXNE));
mbed_official	376:cb4d9db17537	1862
mbed_official	376:cb4d9db17537	1863	/* if Transmit process is finished */
mbed_official	376:cb4d9db17537	1864	if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) == RESET)
mbed_official	376:cb4d9db17537	1865	{
mbed_official	376:cb4d9db17537	1866	/* Disable ERR interrupt */
mbed_official	376:cb4d9db17537	1867	__HAL_SPI_DISABLE_IT(hspi, (uint32_t)(SPI_IT_ERR));
mbed_official	376:cb4d9db17537	1868
mbed_official	376:cb4d9db17537	1869	if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)\|\|(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
mbed_official	376:cb4d9db17537	1870	{
mbed_official	376:cb4d9db17537	1871	/* Disable SPI peripheral */
mbed_official	376:cb4d9db17537	1872	__HAL_SPI_DISABLE(hspi);
mbed_official	376:cb4d9db17537	1873	}
mbed_official	376:cb4d9db17537	1874
mbed_official	376:cb4d9db17537	1875	/* Check if Errors has been detected during transfer */
mbed_official	376:cb4d9db17537	1876	if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
mbed_official	376:cb4d9db17537	1877	{
mbed_official	376:cb4d9db17537	1878	/* Check if we are in Rx or in Rx/Tx Mode */
mbed_official	376:cb4d9db17537	1879	if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
mbed_official	376:cb4d9db17537	1880	{
mbed_official	376:cb4d9db17537	1881	/* Set state to READY before run the Callback Complete */
mbed_official	376:cb4d9db17537	1882	hspi->State = HAL_SPI_STATE_READY;
mbed_official	376:cb4d9db17537	1883	HAL_SPI_TxRxCpltCallback(hspi);
mbed_official	376:cb4d9db17537	1884	}
mbed_official	376:cb4d9db17537	1885	else
mbed_official	376:cb4d9db17537	1886	{
mbed_official	376:cb4d9db17537	1887	/* Set state to READY before run the Callback Complete */
mbed_official	376:cb4d9db17537	1888	hspi->State = HAL_SPI_STATE_READY;
mbed_official	376:cb4d9db17537	1889	HAL_SPI_RxCpltCallback(hspi);
mbed_official	376:cb4d9db17537	1890	}
mbed_official	376:cb4d9db17537	1891	}
mbed_official	376:cb4d9db17537	1892	else
mbed_official	376:cb4d9db17537	1893	{
mbed_official	376:cb4d9db17537	1894	/* Set state to READY before run the Callback Complete */
mbed_official	376:cb4d9db17537	1895	hspi->State = HAL_SPI_STATE_READY;
mbed_official	376:cb4d9db17537	1896	/* Call Error call back in case of Error */
mbed_official	376:cb4d9db17537	1897	HAL_SPI_ErrorCallback(hspi);
mbed_official	376:cb4d9db17537	1898	}
mbed_official	376:cb4d9db17537	1899	}
mbed_official	376:cb4d9db17537	1900	}
mbed_official	376:cb4d9db17537	1901
mbed_official	376:cb4d9db17537	1902	/**
mbed_official	376:cb4d9db17537	1903	* @brief Interrupt Handler to receive amount of data in 2Lines mode
mbed_official	376:cb4d9db17537	1904	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1905	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	1906	* @retval void
mbed_official	376:cb4d9db17537	1907	*/
mbed_official	376:cb4d9db17537	1908	static void SPI_2LinesRxISR(SPI_HandleTypeDef *hspi)
mbed_official	376:cb4d9db17537	1909	{
mbed_official	376:cb4d9db17537	1910	/* Receive data in 8 Bit mode */
mbed_official	376:cb4d9db17537	1911	if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
mbed_official	376:cb4d9db17537	1912	{
mbed_official	376:cb4d9db17537	1913	(*hspi->pRxBuffPtr++) = hspi->Instance->DR;
mbed_official	376:cb4d9db17537	1914	}
mbed_official	376:cb4d9db17537	1915	/* Receive data in 16 Bit mode */
mbed_official	376:cb4d9db17537	1916	else
mbed_official	376:cb4d9db17537	1917	{
mbed_official	376:cb4d9db17537	1918	((uint16_t)hspi->pRxBuffPtr) = hspi->Instance->DR;
mbed_official	376:cb4d9db17537	1919	hspi->pRxBuffPtr+=2;
mbed_official	376:cb4d9db17537	1920	}
mbed_official	376:cb4d9db17537	1921	hspi->RxXferCount--;
mbed_official	376:cb4d9db17537	1922
mbed_official	376:cb4d9db17537	1923	if(hspi->RxXferCount==0)
mbed_official	376:cb4d9db17537	1924	{
mbed_official	376:cb4d9db17537	1925	SPI_RxCloseIRQHandler(hspi);
mbed_official	376:cb4d9db17537	1926	}
mbed_official	376:cb4d9db17537	1927	}
mbed_official	376:cb4d9db17537	1928
mbed_official	376:cb4d9db17537	1929	/**
mbed_official	376:cb4d9db17537	1930	* @brief Interrupt Handler to receive amount of data in no-blocking mode
mbed_official	376:cb4d9db17537	1931	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1932	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	1933	* @retval void
mbed_official	376:cb4d9db17537	1934	*/
mbed_official	376:cb4d9db17537	1935	static void SPI_RxISR(SPI_HandleTypeDef *hspi)
mbed_official	376:cb4d9db17537	1936	{
mbed_official	376:cb4d9db17537	1937	/* Receive data in 8 Bit mode */
mbed_official	376:cb4d9db17537	1938	if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
mbed_official	376:cb4d9db17537	1939	{
mbed_official	376:cb4d9db17537	1940	(*hspi->pRxBuffPtr++) = hspi->Instance->DR;
mbed_official	376:cb4d9db17537	1941	}
mbed_official	376:cb4d9db17537	1942	/* Receive data in 16 Bit mode */
mbed_official	376:cb4d9db17537	1943	else
mbed_official	376:cb4d9db17537	1944	{
mbed_official	376:cb4d9db17537	1945	((uint16_t)hspi->pRxBuffPtr) = hspi->Instance->DR;
mbed_official	376:cb4d9db17537	1946	hspi->pRxBuffPtr+=2;
mbed_official	376:cb4d9db17537	1947	}
mbed_official	376:cb4d9db17537	1948	hspi->RxXferCount--;
mbed_official	376:cb4d9db17537	1949
mbed_official	376:cb4d9db17537	1950	/* Enable CRC Transmission */
mbed_official	376:cb4d9db17537	1951	if((hspi->RxXferCount == 1) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED))
mbed_official	376:cb4d9db17537	1952	{
mbed_official	376:cb4d9db17537	1953	/* Set CRC Next to calculate CRC on Rx side */
mbed_official	376:cb4d9db17537	1954	hspi->Instance->CR1 \|= SPI_CR1_CRCNEXT;
mbed_official	376:cb4d9db17537	1955	}
mbed_official	376:cb4d9db17537	1956
mbed_official	376:cb4d9db17537	1957	if(hspi->RxXferCount == 0)
mbed_official	376:cb4d9db17537	1958	{
mbed_official	376:cb4d9db17537	1959	SPI_RxCloseIRQHandler(hspi);
mbed_official	376:cb4d9db17537	1960	}
mbed_official	376:cb4d9db17537	1961	}
mbed_official	376:cb4d9db17537	1962
mbed_official	376:cb4d9db17537	1963	/**
mbed_official	376:cb4d9db17537	1964	* @brief DMA SPI transmit process complete callback
mbed_official	376:cb4d9db17537	1965	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	1966	* the configuration information for the specified DMA module.
mbed_official	376:cb4d9db17537	1967	* @retval None
mbed_official	376:cb4d9db17537	1968	*/
mbed_official	376:cb4d9db17537	1969	static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma)
mbed_official	376:cb4d9db17537	1970	{
mbed_official	376:cb4d9db17537	1971	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	376:cb4d9db17537	1972
mbed_official	376:cb4d9db17537	1973
mbed_official	376:cb4d9db17537	1974	/* DMA Normal Mode */
mbed_official	376:cb4d9db17537	1975	if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
mbed_official	376:cb4d9db17537	1976	{
mbed_official	376:cb4d9db17537	1977	/* Wait until TXE flag is set to send data */
mbed_official	376:cb4d9db17537	1978	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
mbed_official	376:cb4d9db17537	1979	{
mbed_official	376:cb4d9db17537	1980	hspi->ErrorCode \|= HAL_SPI_ERROR_FLAG;
mbed_official	376:cb4d9db17537	1981	}
mbed_official	376:cb4d9db17537	1982
mbed_official	376:cb4d9db17537	1983	/* Disable Tx DMA Request */
mbed_official	376:cb4d9db17537	1984	hspi->Instance->CR2 &= (uint32_t)~((uint32_t)SPI_CR2_TXDMAEN);
mbed_official	376:cb4d9db17537	1985
mbed_official	376:cb4d9db17537	1986	/* Wait until Busy flag is reset before disabling SPI */
mbed_official	376:cb4d9db17537	1987	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
mbed_official	376:cb4d9db17537	1988	{
mbed_official	376:cb4d9db17537	1989	hspi->ErrorCode \|= HAL_SPI_ERROR_FLAG;
mbed_official	376:cb4d9db17537	1990	}
mbed_official	376:cb4d9db17537	1991
mbed_official	376:cb4d9db17537	1992	hspi->TxXferCount = 0;
mbed_official	376:cb4d9db17537	1993
mbed_official	376:cb4d9db17537	1994	hspi->State = HAL_SPI_STATE_READY;
mbed_official	376:cb4d9db17537	1995	}
mbed_official	376:cb4d9db17537	1996
mbed_official	376:cb4d9db17537	1997	/* Clear OVERUN flag in 2 Lines communication mode because received is not read */
mbed_official	376:cb4d9db17537	1998	if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
mbed_official	376:cb4d9db17537	1999	{
mbed_official	376:cb4d9db17537	2000	__HAL_SPI_CLEAR_OVRFLAG(hspi);
mbed_official	376:cb4d9db17537	2001	}
mbed_official	376:cb4d9db17537	2002
mbed_official	376:cb4d9db17537	2003	/* Check if Errors has been detected during transfer */
mbed_official	376:cb4d9db17537	2004	if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
mbed_official	376:cb4d9db17537	2005	{
mbed_official	376:cb4d9db17537	2006	HAL_SPI_ErrorCallback(hspi);
mbed_official	376:cb4d9db17537	2007	}
mbed_official	376:cb4d9db17537	2008	else
mbed_official	376:cb4d9db17537	2009	{
mbed_official	376:cb4d9db17537	2010	HAL_SPI_TxCpltCallback(hspi);
mbed_official	376:cb4d9db17537	2011	}
mbed_official	376:cb4d9db17537	2012	}
mbed_official	376:cb4d9db17537	2013
mbed_official	376:cb4d9db17537	2014	/**
mbed_official	376:cb4d9db17537	2015	* @brief DMA SPI receive process complete callback
mbed_official	376:cb4d9db17537	2016	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	2017	* the configuration information for the specified DMA module.
mbed_official	376:cb4d9db17537	2018	* @retval None
mbed_official	376:cb4d9db17537	2019	*/
mbed_official	376:cb4d9db17537	2020	static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
mbed_official	376:cb4d9db17537	2021	{
mbed_official	376:cb4d9db17537	2022	__IO uint16_t tmpreg;
mbed_official	376:cb4d9db17537	2023
mbed_official	376:cb4d9db17537	2024	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	376:cb4d9db17537	2025	/* DMA Normal mode */
mbed_official	376:cb4d9db17537	2026	if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
mbed_official	376:cb4d9db17537	2027	{
mbed_official	376:cb4d9db17537	2028	if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)\|\|(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
mbed_official	376:cb4d9db17537	2029	{
mbed_official	376:cb4d9db17537	2030	/* Disable SPI peripheral */
mbed_official	376:cb4d9db17537	2031	__HAL_SPI_DISABLE(hspi);
mbed_official	376:cb4d9db17537	2032	}
mbed_official	376:cb4d9db17537	2033
mbed_official	376:cb4d9db17537	2034	/* Disable Rx DMA Request */
mbed_official	376:cb4d9db17537	2035	hspi->Instance->CR2 &= (uint32_t)~((uint32_t)SPI_CR2_RXDMAEN);
mbed_official	376:cb4d9db17537	2036	/* Disable Tx DMA Request (done by default to handle the case Master RX direction 2 lines) */
mbed_official	376:cb4d9db17537	2037	hspi->Instance->CR2 &= (uint32_t)~((uint32_t)SPI_CR2_TXDMAEN);
mbed_official	376:cb4d9db17537	2038
mbed_official	376:cb4d9db17537	2039	hspi->RxXferCount = 0;
mbed_official	376:cb4d9db17537	2040	hspi->State = HAL_SPI_STATE_READY;
mbed_official	376:cb4d9db17537	2041
mbed_official	376:cb4d9db17537	2042	/* Reset CRC Calculation */
mbed_official	376:cb4d9db17537	2043	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	2044	{
mbed_official	376:cb4d9db17537	2045	/* Wait until RXNE flag is set to send data */
mbed_official	376:cb4d9db17537	2046	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
mbed_official	376:cb4d9db17537	2047	{
mbed_official	376:cb4d9db17537	2048	hspi->ErrorCode \|= HAL_SPI_ERROR_FLAG;
mbed_official	376:cb4d9db17537	2049	}
mbed_official	376:cb4d9db17537	2050
mbed_official	376:cb4d9db17537	2051	/* Read CRC */
mbed_official	376:cb4d9db17537	2052	tmpreg = hspi->Instance->DR;
mbed_official	376:cb4d9db17537	2053
mbed_official	376:cb4d9db17537	2054	/* Wait until RXNE flag is set */
mbed_official	376:cb4d9db17537	2055	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
mbed_official	376:cb4d9db17537	2056	{
mbed_official	376:cb4d9db17537	2057	hspi->ErrorCode \|= HAL_SPI_ERROR_FLAG;
mbed_official	376:cb4d9db17537	2058	}
mbed_official	376:cb4d9db17537	2059
mbed_official	376:cb4d9db17537	2060	/* Check if CRC error occurred */
mbed_official	376:cb4d9db17537	2061	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
mbed_official	376:cb4d9db17537	2062	{
mbed_official	376:cb4d9db17537	2063	hspi->ErrorCode \|= HAL_SPI_ERROR_CRC;
mbed_official	376:cb4d9db17537	2064	__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
mbed_official	376:cb4d9db17537	2065	}
mbed_official	376:cb4d9db17537	2066	}
mbed_official	376:cb4d9db17537	2067
mbed_official	376:cb4d9db17537	2068	/* Check if Errors has been detected during transfer */
mbed_official	376:cb4d9db17537	2069	if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
mbed_official	376:cb4d9db17537	2070	{
mbed_official	376:cb4d9db17537	2071	HAL_SPI_ErrorCallback(hspi);
mbed_official	376:cb4d9db17537	2072	}
mbed_official	376:cb4d9db17537	2073	else
mbed_official	376:cb4d9db17537	2074	{
mbed_official	376:cb4d9db17537	2075	HAL_SPI_RxCpltCallback(hspi);
mbed_official	376:cb4d9db17537	2076	}
mbed_official	376:cb4d9db17537	2077	}
mbed_official	376:cb4d9db17537	2078	else
mbed_official	376:cb4d9db17537	2079	{
mbed_official	376:cb4d9db17537	2080	HAL_SPI_RxCpltCallback(hspi);
mbed_official	376:cb4d9db17537	2081	}
mbed_official	376:cb4d9db17537	2082	}
mbed_official	376:cb4d9db17537	2083
mbed_official	376:cb4d9db17537	2084	/**
mbed_official	376:cb4d9db17537	2085	* @brief DMA SPI transmit receive process complete callback
mbed_official	376:cb4d9db17537	2086	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	2087	* the configuration information for the specified DMA module.
mbed_official	376:cb4d9db17537	2088	* @retval None
mbed_official	376:cb4d9db17537	2089	*/
mbed_official	376:cb4d9db17537	2090	static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
mbed_official	376:cb4d9db17537	2091	{
mbed_official	376:cb4d9db17537	2092	__IO uint16_t tmpreg;
mbed_official	376:cb4d9db17537	2093
mbed_official	376:cb4d9db17537	2094	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	376:cb4d9db17537	2095	if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
mbed_official	376:cb4d9db17537	2096	{
mbed_official	376:cb4d9db17537	2097	/* Reset CRC Calculation */
mbed_official	376:cb4d9db17537	2098	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	2099	{
mbed_official	376:cb4d9db17537	2100	/* Check if CRC is done on going (RXNE flag set) */
mbed_official	376:cb4d9db17537	2101	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) == HAL_OK)
mbed_official	376:cb4d9db17537	2102	{
mbed_official	376:cb4d9db17537	2103	/* Wait until RXNE flag is set to send data */
mbed_official	376:cb4d9db17537	2104	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
mbed_official	376:cb4d9db17537	2105	{
mbed_official	376:cb4d9db17537	2106	hspi->ErrorCode \|= HAL_SPI_ERROR_FLAG;
mbed_official	376:cb4d9db17537	2107	}
mbed_official	376:cb4d9db17537	2108	}
mbed_official	376:cb4d9db17537	2109	/* Read CRC */
mbed_official	376:cb4d9db17537	2110	tmpreg = hspi->Instance->DR;
mbed_official	376:cb4d9db17537	2111
mbed_official	376:cb4d9db17537	2112	/* Check if CRC error occurred */
mbed_official	376:cb4d9db17537	2113	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
mbed_official	376:cb4d9db17537	2114	{
mbed_official	376:cb4d9db17537	2115	hspi->ErrorCode \|= HAL_SPI_ERROR_CRC;
mbed_official	376:cb4d9db17537	2116	__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
mbed_official	376:cb4d9db17537	2117	}
mbed_official	376:cb4d9db17537	2118	}
mbed_official	376:cb4d9db17537	2119	/* Wait until TXE flag is set to send data */
mbed_official	376:cb4d9db17537	2120	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
mbed_official	376:cb4d9db17537	2121	{
mbed_official	376:cb4d9db17537	2122	hspi->ErrorCode \|= HAL_SPI_ERROR_FLAG;
mbed_official	376:cb4d9db17537	2123	}
mbed_official	376:cb4d9db17537	2124
mbed_official	376:cb4d9db17537	2125	/* Disable Tx DMA Request */
mbed_official	376:cb4d9db17537	2126	hspi->Instance->CR2 &= (uint32_t)~((uint32_t)SPI_CR2_TXDMAEN);
mbed_official	376:cb4d9db17537	2127
mbed_official	376:cb4d9db17537	2128	/* Wait until Busy flag is reset before disabling SPI */
mbed_official	376:cb4d9db17537	2129	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
mbed_official	376:cb4d9db17537	2130	{
mbed_official	376:cb4d9db17537	2131	hspi->ErrorCode \|= HAL_SPI_ERROR_FLAG;
mbed_official	376:cb4d9db17537	2132	}
mbed_official	376:cb4d9db17537	2133
mbed_official	376:cb4d9db17537	2134	/* Disable Rx DMA Request */
mbed_official	376:cb4d9db17537	2135	hspi->Instance->CR2 &= (uint32_t)~((uint32_t)SPI_CR2_RXDMAEN);
mbed_official	376:cb4d9db17537	2136
mbed_official	376:cb4d9db17537	2137	hspi->TxXferCount = 0;
mbed_official	376:cb4d9db17537	2138	hspi->RxXferCount = 0;
mbed_official	376:cb4d9db17537	2139
mbed_official	376:cb4d9db17537	2140	hspi->State = HAL_SPI_STATE_READY;
mbed_official	376:cb4d9db17537	2141
mbed_official	376:cb4d9db17537	2142	/* Check if Errors has been detected during transfer */
mbed_official	376:cb4d9db17537	2143	if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
mbed_official	376:cb4d9db17537	2144	{
mbed_official	376:cb4d9db17537	2145	HAL_SPI_ErrorCallback(hspi);
mbed_official	376:cb4d9db17537	2146	}
mbed_official	376:cb4d9db17537	2147	else
mbed_official	376:cb4d9db17537	2148	{
mbed_official	376:cb4d9db17537	2149	HAL_SPI_TxRxCpltCallback(hspi);
mbed_official	376:cb4d9db17537	2150	}
mbed_official	376:cb4d9db17537	2151	}
mbed_official	376:cb4d9db17537	2152	else
mbed_official	376:cb4d9db17537	2153	{
mbed_official	376:cb4d9db17537	2154	HAL_SPI_TxRxCpltCallback(hspi);
mbed_official	376:cb4d9db17537	2155	}
mbed_official	376:cb4d9db17537	2156	}
mbed_official	376:cb4d9db17537	2157
mbed_official	376:cb4d9db17537	2158	/**
mbed_official	376:cb4d9db17537	2159	* @brief DMA SPI half transmit process complete callback
mbed_official	376:cb4d9db17537	2160	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	2161	* the configuration information for the specified DMA module.
mbed_official	376:cb4d9db17537	2162	* @retval None
mbed_official	376:cb4d9db17537	2163	*/
mbed_official	376:cb4d9db17537	2164	static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma)
mbed_official	376:cb4d9db17537	2165	{
mbed_official	376:cb4d9db17537	2166	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	376:cb4d9db17537	2167
mbed_official	376:cb4d9db17537	2168	HAL_SPI_TxHalfCpltCallback(hspi);
mbed_official	376:cb4d9db17537	2169	}
mbed_official	376:cb4d9db17537	2170
mbed_official	376:cb4d9db17537	2171	/**
mbed_official	376:cb4d9db17537	2172	* @brief DMA SPI half receive process complete callback
mbed_official	376:cb4d9db17537	2173	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	2174	* the configuration information for the specified DMA module.
mbed_official	376:cb4d9db17537	2175	* @retval None
mbed_official	376:cb4d9db17537	2176	*/
mbed_official	376:cb4d9db17537	2177	static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma)
mbed_official	376:cb4d9db17537	2178	{
mbed_official	376:cb4d9db17537	2179	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	376:cb4d9db17537	2180
mbed_official	376:cb4d9db17537	2181	HAL_SPI_RxHalfCpltCallback(hspi);
mbed_official	376:cb4d9db17537	2182	}
mbed_official	376:cb4d9db17537	2183
mbed_official	376:cb4d9db17537	2184	/**
mbed_official	376:cb4d9db17537	2185	* @brief DMA SPI Half transmit receive process complete callback
mbed_official	376:cb4d9db17537	2186	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	2187	* the configuration information for the specified DMA module.
mbed_official	376:cb4d9db17537	2188	* @retval None
mbed_official	376:cb4d9db17537	2189	*/
mbed_official	376:cb4d9db17537	2190	static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma)
mbed_official	376:cb4d9db17537	2191	{
mbed_official	376:cb4d9db17537	2192	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	376:cb4d9db17537	2193
mbed_official	376:cb4d9db17537	2194	HAL_SPI_TxRxHalfCpltCallback(hspi);
mbed_official	376:cb4d9db17537	2195	}
mbed_official	376:cb4d9db17537	2196
mbed_official	376:cb4d9db17537	2197
mbed_official	376:cb4d9db17537	2198	/**
mbed_official	376:cb4d9db17537	2199	* @brief DMA SPI communication error callback
mbed_official	376:cb4d9db17537	2200	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	2201	* the configuration information for the specified DMA module.
mbed_official	376:cb4d9db17537	2202	* @retval None
mbed_official	376:cb4d9db17537	2203	*/
mbed_official	376:cb4d9db17537	2204	static void SPI_DMAError(DMA_HandleTypeDef *hdma)
mbed_official	376:cb4d9db17537	2205	{
mbed_official	376:cb4d9db17537	2206	SPI_HandleTypeDef* hspi = (SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	376:cb4d9db17537	2207	hspi->TxXferCount = 0;
mbed_official	376:cb4d9db17537	2208	hspi->RxXferCount = 0;
mbed_official	376:cb4d9db17537	2209	hspi->State= HAL_SPI_STATE_READY;
mbed_official	376:cb4d9db17537	2210	hspi->ErrorCode \|= HAL_SPI_ERROR_DMA;
mbed_official	376:cb4d9db17537	2211	HAL_SPI_ErrorCallback(hspi);
mbed_official	376:cb4d9db17537	2212	}
mbed_official	376:cb4d9db17537	2213
mbed_official	376:cb4d9db17537	2214	/**
mbed_official	376:cb4d9db17537	2215	* @brief This function handles SPI Communication Timeout.
mbed_official	376:cb4d9db17537	2216	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	376:cb4d9db17537	2217	* the configuration information for SPI module.
mbed_official	376:cb4d9db17537	2218	* @retval HAL status
mbed_official	376:cb4d9db17537	2219	*/
mbed_official	376:cb4d9db17537	2220	static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
mbed_official	376:cb4d9db17537	2221	{
mbed_official	376:cb4d9db17537	2222	uint32_t tickstart = 0x00;
mbed_official	376:cb4d9db17537	2223	tickstart = HAL_GetTick();
mbed_official	376:cb4d9db17537	2224
mbed_official	376:cb4d9db17537	2225	/* Wait until flag is set */
mbed_official	376:cb4d9db17537	2226	if(Status == RESET)
mbed_official	376:cb4d9db17537	2227	{
mbed_official	376:cb4d9db17537	2228	while(__HAL_SPI_GET_FLAG(hspi, Flag) == RESET)
mbed_official	376:cb4d9db17537	2229	{
mbed_official	376:cb4d9db17537	2230	/* Check for the Timeout */
mbed_official	376:cb4d9db17537	2231	if(Timeout != HAL_MAX_DELAY)
mbed_official	376:cb4d9db17537	2232	{
mbed_official	376:cb4d9db17537	2233	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
mbed_official	376:cb4d9db17537	2234	{
mbed_official	376:cb4d9db17537	2235	/* Disable the SPI and reset the CRC: the CRC value should be cleared
mbed_official	376:cb4d9db17537	2236	on both master and slave sides in order to resynchronize the master
mbed_official	376:cb4d9db17537	2237	and slave for their respective CRC calculation */
mbed_official	376:cb4d9db17537	2238
mbed_official	376:cb4d9db17537	2239	/* Disable TXE, RXNE and ERR interrupts for the interrupt process */
mbed_official	376:cb4d9db17537	2240	__HAL_SPI_DISABLE_IT(hspi, (uint32_t)(SPI_IT_TXE \| SPI_IT_RXNE \| SPI_IT_ERR));
mbed_official	376:cb4d9db17537	2241
mbed_official	376:cb4d9db17537	2242	/* Disable SPI peripheral */
mbed_official	376:cb4d9db17537	2243	__HAL_SPI_DISABLE(hspi);
mbed_official	376:cb4d9db17537	2244
mbed_official	376:cb4d9db17537	2245	/* Reset CRC Calculation */
mbed_official	376:cb4d9db17537	2246	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	2247	{
mbed_official	376:cb4d9db17537	2248	__HAL_SPI_RESET_CRC(hspi);
mbed_official	376:cb4d9db17537	2249	}
mbed_official	376:cb4d9db17537	2250
mbed_official	376:cb4d9db17537	2251	hspi->State= HAL_SPI_STATE_READY;
mbed_official	376:cb4d9db17537	2252
mbed_official	376:cb4d9db17537	2253	/* Process Unlocked */
mbed_official	376:cb4d9db17537	2254	__HAL_UNLOCK(hspi);
mbed_official	376:cb4d9db17537	2255
mbed_official	376:cb4d9db17537	2256	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	2257	}
mbed_official	376:cb4d9db17537	2258	}
mbed_official	376:cb4d9db17537	2259	}
mbed_official	376:cb4d9db17537	2260	}
mbed_official	376:cb4d9db17537	2261	else
mbed_official	376:cb4d9db17537	2262	{
mbed_official	376:cb4d9db17537	2263	while(__HAL_SPI_GET_FLAG(hspi, Flag) != RESET)
mbed_official	376:cb4d9db17537	2264	{
mbed_official	376:cb4d9db17537	2265	if(Timeout != HAL_MAX_DELAY)
mbed_official	376:cb4d9db17537	2266	{
mbed_official	376:cb4d9db17537	2267	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
mbed_official	376:cb4d9db17537	2268	{
mbed_official	376:cb4d9db17537	2269	/* Disable the SPI and reset the CRC: the CRC value should be cleared
mbed_official	376:cb4d9db17537	2270	on both master and slave sides in order to resynchronize the master
mbed_official	376:cb4d9db17537	2271	and slave for their respective CRC calculation */
mbed_official	376:cb4d9db17537	2272
mbed_official	376:cb4d9db17537	2273	/* Disable TXE, RXNE and ERR interrupts for the interrupt process */
mbed_official	376:cb4d9db17537	2274	__HAL_SPI_DISABLE_IT(hspi, (uint32_t)(SPI_IT_TXE \| SPI_IT_RXNE \| SPI_IT_ERR));
mbed_official	376:cb4d9db17537	2275
mbed_official	376:cb4d9db17537	2276	/* Disable SPI peripheral */
mbed_official	376:cb4d9db17537	2277	__HAL_SPI_DISABLE(hspi);
mbed_official	376:cb4d9db17537	2278
mbed_official	376:cb4d9db17537	2279	/* Reset CRC Calculation */
mbed_official	376:cb4d9db17537	2280	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	376:cb4d9db17537	2281	{
mbed_official	376:cb4d9db17537	2282	__HAL_SPI_RESET_CRC(hspi);
mbed_official	376:cb4d9db17537	2283	}
mbed_official	376:cb4d9db17537	2284
mbed_official	376:cb4d9db17537	2285	hspi->State= HAL_SPI_STATE_READY;
mbed_official	376:cb4d9db17537	2286
mbed_official	376:cb4d9db17537	2287	/* Process Unlocked */
mbed_official	376:cb4d9db17537	2288	__HAL_UNLOCK(hspi);
mbed_official	376:cb4d9db17537	2289
mbed_official	376:cb4d9db17537	2290	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	2291	}
mbed_official	376:cb4d9db17537	2292	}
mbed_official	376:cb4d9db17537	2293	}
mbed_official	376:cb4d9db17537	2294	}
mbed_official	376:cb4d9db17537	2295	return HAL_OK;
mbed_official	376:cb4d9db17537	2296	}
mbed_official	376:cb4d9db17537	2297
mbed_official	376:cb4d9db17537	2298
mbed_official	376:cb4d9db17537	2299	/**
mbed_official	376:cb4d9db17537	2300	* @}
mbed_official	376:cb4d9db17537	2301	*/
mbed_official	376:cb4d9db17537	2302
mbed_official	376:cb4d9db17537	2303	#endif /* HAL_SPI_MODULE_ENABLED */
mbed_official	376:cb4d9db17537	2304	/**
mbed_official	376:cb4d9db17537	2305	* @}
mbed_official	376:cb4d9db17537	2306	*/
mbed_official	376:cb4d9db17537	2307
mbed_official	376:cb4d9db17537	2308	/**
mbed_official	376:cb4d9db17537	2309	* @}
mbed_official	376:cb4d9db17537	2310	*/
mbed_official	376:cb4d9db17537	2311
mbed_official	376:cb4d9db17537	2312	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/