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targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_tim.h@579:53297373a894, 2015-07-01 (annotated)

Committer:: mbed_official
Date:: Wed Jul 01 09:45:11 2015 +0100
Revision:: 579:53297373a894
Parent:: 394:83f921546702

Synchronized with git revision d5b4d2ab9c47edb4dc5776e7177b0c2263459081

Full URL: https://github.com/mbedmicro/mbed/commit/d5b4d2ab9c47edb4dc5776e7177b0c2263459081/

Initial version of drivers for SAMR21

Who changed what in which revision?

User	Revision	Line number	New contents of line
mbed_official	354:e67efb2aab0e	1	/**
mbed_official	354:e67efb2aab0e	2	******************************************************************************
mbed_official	354:e67efb2aab0e	3	* @file stm32l1xx_hal_tim.h
mbed_official	354:e67efb2aab0e	4	* @author MCD Application Team
mbed_official	354:e67efb2aab0e	5	* @version V1.0.0
mbed_official	354:e67efb2aab0e	6	* @date 5-September-2014
mbed_official	354:e67efb2aab0e	7	* @brief Header file of TIM HAL module.
mbed_official	354:e67efb2aab0e	8	******************************************************************************
mbed_official	354:e67efb2aab0e	9	* @attention
mbed_official	354:e67efb2aab0e	10	*
mbed_official	354:e67efb2aab0e	11	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official	354:e67efb2aab0e	12	*
mbed_official	354:e67efb2aab0e	13	* Redistribution and use in source and binary forms, with or without modification,
mbed_official	354:e67efb2aab0e	14	* are permitted provided that the following conditions are met:
mbed_official	354:e67efb2aab0e	15	* 1. Redistributions of source code must retain the above copyright notice,
mbed_official	354:e67efb2aab0e	16	* this list of conditions and the following disclaimer.
mbed_official	354:e67efb2aab0e	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official	354:e67efb2aab0e	18	* this list of conditions and the following disclaimer in the documentation
mbed_official	354:e67efb2aab0e	19	* and/or other materials provided with the distribution.
mbed_official	354:e67efb2aab0e	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official	354:e67efb2aab0e	21	* may be used to endorse or promote products derived from this software
mbed_official	354:e67efb2aab0e	22	* without specific prior written permission.
mbed_official	354:e67efb2aab0e	23	*
mbed_official	354:e67efb2aab0e	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official	354:e67efb2aab0e	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official	354:e67efb2aab0e	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official	354:e67efb2aab0e	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official	354:e67efb2aab0e	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official	354:e67efb2aab0e	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official	354:e67efb2aab0e	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official	354:e67efb2aab0e	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official	354:e67efb2aab0e	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official	354:e67efb2aab0e	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official	354:e67efb2aab0e	34	*
mbed_official	354:e67efb2aab0e	35	******************************************************************************
mbed_official	354:e67efb2aab0e	36	*/
mbed_official	354:e67efb2aab0e	37
mbed_official	354:e67efb2aab0e	38	/* Define to prevent recursive inclusion -------------------------------------*/
mbed_official	354:e67efb2aab0e	39	#ifndef __STM32L1xx_HAL_TIM_H
mbed_official	354:e67efb2aab0e	40	#define __STM32L1xx_HAL_TIM_H
mbed_official	354:e67efb2aab0e	41
mbed_official	354:e67efb2aab0e	42	#ifdef __cplusplus
mbed_official	354:e67efb2aab0e	43	extern "C" {
mbed_official	354:e67efb2aab0e	44	#endif
mbed_official	354:e67efb2aab0e	45
mbed_official	354:e67efb2aab0e	46	/* Includes ------------------------------------------------------------------*/
mbed_official	354:e67efb2aab0e	47	#include "stm32l1xx_hal_def.h"
mbed_official	354:e67efb2aab0e	48
mbed_official	354:e67efb2aab0e	49	/** @addtogroup STM32L1xx_HAL_Driver
mbed_official	354:e67efb2aab0e	50	* @{
mbed_official	354:e67efb2aab0e	51	*/
mbed_official	354:e67efb2aab0e	52
mbed_official	354:e67efb2aab0e	53	/** @addtogroup TIM
mbed_official	354:e67efb2aab0e	54	* @{
mbed_official	354:e67efb2aab0e	55	*/
mbed_official	354:e67efb2aab0e	56
mbed_official	354:e67efb2aab0e	57	/* Exported types ------------------------------------------------------------*/
mbed_official	354:e67efb2aab0e	58	/** @defgroup TIM_Exported_Types TIM Exported Types
mbed_official	354:e67efb2aab0e	59	* @{
mbed_official	354:e67efb2aab0e	60	*/
mbed_official	354:e67efb2aab0e	61	/**
mbed_official	354:e67efb2aab0e	62	* @brief TIM Time base Configuration Structure definition
mbed_official	354:e67efb2aab0e	63	*/
mbed_official	354:e67efb2aab0e	64	typedef struct
mbed_official	354:e67efb2aab0e	65	{
mbed_official	354:e67efb2aab0e	66	uint32_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
mbed_official	354:e67efb2aab0e	67	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
mbed_official	354:e67efb2aab0e	68
mbed_official	354:e67efb2aab0e	69	uint32_t CounterMode; /*!< Specifies the counter mode.
mbed_official	354:e67efb2aab0e	70	This parameter can be a value of @ref TIM_Counter_Mode */
mbed_official	354:e67efb2aab0e	71
mbed_official	354:e67efb2aab0e	72	uint32_t Period; /*!< Specifies the period value to be loaded into the active
mbed_official	354:e67efb2aab0e	73	Auto-Reload Register at the next update event.
mbed_official	354:e67efb2aab0e	74	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
mbed_official	354:e67efb2aab0e	75
mbed_official	354:e67efb2aab0e	76	uint32_t ClockDivision; /*!< Specifies the clock division.
mbed_official	354:e67efb2aab0e	77	This parameter can be a value of @ref TIM_ClockDivision */
mbed_official	354:e67efb2aab0e	78
mbed_official	354:e67efb2aab0e	79	} TIM_Base_InitTypeDef;
mbed_official	354:e67efb2aab0e	80
mbed_official	354:e67efb2aab0e	81	/**
mbed_official	354:e67efb2aab0e	82	* @brief TIM Output Compare Configuration Structure definition
mbed_official	354:e67efb2aab0e	83	*/
mbed_official	354:e67efb2aab0e	84	typedef struct
mbed_official	354:e67efb2aab0e	85	{
mbed_official	354:e67efb2aab0e	86	uint32_t OCMode; /*!< Specifies the TIM mode.
mbed_official	354:e67efb2aab0e	87	This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
mbed_official	354:e67efb2aab0e	88
mbed_official	354:e67efb2aab0e	89	uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
mbed_official	354:e67efb2aab0e	90	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
mbed_official	354:e67efb2aab0e	91
mbed_official	354:e67efb2aab0e	92	uint32_t OCPolarity; /*!< Specifies the output polarity.
mbed_official	354:e67efb2aab0e	93	This parameter can be a value of @ref TIM_Output_Compare_Polarity */
mbed_official	354:e67efb2aab0e	94
mbed_official	354:e67efb2aab0e	95	uint32_t OCFastMode; /*!< Specifies the Fast mode state.
mbed_official	354:e67efb2aab0e	96	This parameter can be a value of @ref TIM_Output_Fast_State
mbed_official	354:e67efb2aab0e	97	@note This parameter is valid only in PWM1 and PWM2 mode. */
mbed_official	354:e67efb2aab0e	98
mbed_official	354:e67efb2aab0e	99	uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
mbed_official	354:e67efb2aab0e	100	This parameter can be a value of @ref TIM_Output_Compare_Idle_State
mbed_official	354:e67efb2aab0e	101	@note This parameter is valid only for TIM1 and TIM8. */
mbed_official	354:e67efb2aab0e	102	} TIM_OC_InitTypeDef;
mbed_official	354:e67efb2aab0e	103
mbed_official	354:e67efb2aab0e	104	/**
mbed_official	354:e67efb2aab0e	105	* @brief TIM One Pulse Mode Configuration Structure definition
mbed_official	354:e67efb2aab0e	106	*/
mbed_official	354:e67efb2aab0e	107	typedef struct
mbed_official	354:e67efb2aab0e	108	{
mbed_official	354:e67efb2aab0e	109	uint32_t OCMode; /*!< Specifies the TIM mode.
mbed_official	354:e67efb2aab0e	110	This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
mbed_official	354:e67efb2aab0e	111
mbed_official	354:e67efb2aab0e	112	uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
mbed_official	354:e67efb2aab0e	113	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
mbed_official	354:e67efb2aab0e	114
mbed_official	354:e67efb2aab0e	115	uint32_t OCPolarity; /*!< Specifies the output polarity.
mbed_official	354:e67efb2aab0e	116	This parameter can be a value of @ref TIM_Output_Compare_Polarity */
mbed_official	354:e67efb2aab0e	117
mbed_official	354:e67efb2aab0e	118	uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
mbed_official	354:e67efb2aab0e	119	This parameter can be a value of @ref TIM_Output_Compare_Idle_State
mbed_official	354:e67efb2aab0e	120	@note This parameter is valid only for TIM1 and TIM8. */
mbed_official	354:e67efb2aab0e	121
mbed_official	354:e67efb2aab0e	122	uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
mbed_official	354:e67efb2aab0e	123	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official	354:e67efb2aab0e	124
mbed_official	354:e67efb2aab0e	125	uint32_t ICSelection; /*!< Specifies the input.
mbed_official	354:e67efb2aab0e	126	This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official	354:e67efb2aab0e	127
mbed_official	354:e67efb2aab0e	128	uint32_t ICFilter; /*!< Specifies the input capture filter.
mbed_official	354:e67efb2aab0e	129	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	354:e67efb2aab0e	130	} TIM_OnePulse_InitTypeDef;
mbed_official	354:e67efb2aab0e	131
mbed_official	354:e67efb2aab0e	132
mbed_official	354:e67efb2aab0e	133	/**
mbed_official	354:e67efb2aab0e	134	* @brief TIM Input Capture Configuration Structure definition
mbed_official	354:e67efb2aab0e	135	*/
mbed_official	354:e67efb2aab0e	136	typedef struct
mbed_official	354:e67efb2aab0e	137	{
mbed_official	354:e67efb2aab0e	138	uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
mbed_official	354:e67efb2aab0e	139	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official	354:e67efb2aab0e	140
mbed_official	354:e67efb2aab0e	141	uint32_t ICSelection; /*!< Specifies the input.
mbed_official	354:e67efb2aab0e	142	This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official	354:e67efb2aab0e	143
mbed_official	354:e67efb2aab0e	144	uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler.
mbed_official	354:e67efb2aab0e	145	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
mbed_official	354:e67efb2aab0e	146
mbed_official	354:e67efb2aab0e	147	uint32_t ICFilter; /*!< Specifies the input capture filter.
mbed_official	354:e67efb2aab0e	148	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	354:e67efb2aab0e	149	} TIM_IC_InitTypeDef;
mbed_official	354:e67efb2aab0e	150
mbed_official	354:e67efb2aab0e	151	/**
mbed_official	354:e67efb2aab0e	152	* @brief TIM Encoder Configuration Structure definition
mbed_official	354:e67efb2aab0e	153	*/
mbed_official	354:e67efb2aab0e	154	typedef struct
mbed_official	354:e67efb2aab0e	155	{
mbed_official	354:e67efb2aab0e	156	uint32_t EncoderMode; /*!< Specifies the active edge of the input signal.
mbed_official	354:e67efb2aab0e	157	This parameter can be a value of @ref TIM_Encoder_Mode */
mbed_official	354:e67efb2aab0e	158
mbed_official	354:e67efb2aab0e	159	uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
mbed_official	354:e67efb2aab0e	160	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official	354:e67efb2aab0e	161
mbed_official	354:e67efb2aab0e	162	uint32_t IC1Selection; /*!< Specifies the input.
mbed_official	354:e67efb2aab0e	163	This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official	354:e67efb2aab0e	164
mbed_official	354:e67efb2aab0e	165	uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
mbed_official	354:e67efb2aab0e	166	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
mbed_official	354:e67efb2aab0e	167
mbed_official	354:e67efb2aab0e	168	uint32_t IC1Filter; /*!< Specifies the input capture filter.
mbed_official	354:e67efb2aab0e	169	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	354:e67efb2aab0e	170
mbed_official	354:e67efb2aab0e	171	uint32_t IC2Polarity; /*!< Specifies the active edge of the input signal.
mbed_official	354:e67efb2aab0e	172	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official	354:e67efb2aab0e	173
mbed_official	354:e67efb2aab0e	174	uint32_t IC2Selection; /*!< Specifies the input.
mbed_official	354:e67efb2aab0e	175	This parameter can be a value of @ref TIM_Input_Capture_Selection */
mbed_official	354:e67efb2aab0e	176
mbed_official	354:e67efb2aab0e	177	uint32_t IC2Prescaler; /*!< Specifies the Input Capture Prescaler.
mbed_official	354:e67efb2aab0e	178	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
mbed_official	354:e67efb2aab0e	179
mbed_official	354:e67efb2aab0e	180	uint32_t IC2Filter; /*!< Specifies the input capture filter.
mbed_official	354:e67efb2aab0e	181	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	354:e67efb2aab0e	182	} TIM_Encoder_InitTypeDef;
mbed_official	354:e67efb2aab0e	183
mbed_official	354:e67efb2aab0e	184
mbed_official	354:e67efb2aab0e	185	/**
mbed_official	354:e67efb2aab0e	186	* @brief Clock Configuration Handle Structure definition
mbed_official	354:e67efb2aab0e	187	*/
mbed_official	354:e67efb2aab0e	188	typedef struct
mbed_official	354:e67efb2aab0e	189	{
mbed_official	354:e67efb2aab0e	190	uint32_t ClockSource; /*!< TIM clock sources
mbed_official	354:e67efb2aab0e	191	This parameter can be a value of @ref TIM_Clock_Source */
mbed_official	354:e67efb2aab0e	192	uint32_t ClockPolarity; /*!< TIM clock polarity
mbed_official	354:e67efb2aab0e	193	This parameter can be a value of @ref TIM_Clock_Polarity */
mbed_official	354:e67efb2aab0e	194	uint32_t ClockPrescaler; /*!< TIM clock prescaler
mbed_official	354:e67efb2aab0e	195	This parameter can be a value of @ref TIM_Clock_Prescaler */
mbed_official	354:e67efb2aab0e	196	uint32_t ClockFilter; /*!< TIM clock filter
mbed_official	354:e67efb2aab0e	197	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	354:e67efb2aab0e	198	}TIM_ClockConfigTypeDef;
mbed_official	354:e67efb2aab0e	199
mbed_official	354:e67efb2aab0e	200	/**
mbed_official	354:e67efb2aab0e	201	* @brief Clear Input Configuration Handle Structure definition
mbed_official	354:e67efb2aab0e	202	*/
mbed_official	354:e67efb2aab0e	203	typedef struct
mbed_official	354:e67efb2aab0e	204	{
mbed_official	354:e67efb2aab0e	205	uint32_t ClearInputState; /*!< TIM clear Input state
mbed_official	354:e67efb2aab0e	206	This parameter can be ENABLE or DISABLE */
mbed_official	354:e67efb2aab0e	207	uint32_t ClearInputSource; /*!< TIM clear Input sources
mbed_official	354:e67efb2aab0e	208	This parameter can be a value of @ref TIM_ClearInput_Source */
mbed_official	354:e67efb2aab0e	209	uint32_t ClearInputPolarity; /*!< TIM Clear Input polarity
mbed_official	354:e67efb2aab0e	210	This parameter can be a value of @ref TIM_ClearInput_Polarity */
mbed_official	354:e67efb2aab0e	211	uint32_t ClearInputPrescaler; /*!< TIM Clear Input prescaler
mbed_official	354:e67efb2aab0e	212	This parameter can be a value of @ref TIM_ClearInput_Prescaler */
mbed_official	354:e67efb2aab0e	213	uint32_t ClearInputFilter; /*!< TIM Clear Input filter
mbed_official	354:e67efb2aab0e	214	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	354:e67efb2aab0e	215	}TIM_ClearInputConfigTypeDef;
mbed_official	354:e67efb2aab0e	216
mbed_official	354:e67efb2aab0e	217	/**
mbed_official	354:e67efb2aab0e	218	* @brief TIM Slave configuration Structure definition
mbed_official	354:e67efb2aab0e	219	*/
mbed_official	354:e67efb2aab0e	220	typedef struct {
mbed_official	354:e67efb2aab0e	221	uint32_t SlaveMode; /*!< Slave mode selection
mbed_official	354:e67efb2aab0e	222	This parameter can be a value of @ref TIM_Slave_Mode */
mbed_official	354:e67efb2aab0e	223	uint32_t InputTrigger; /*!< Input Trigger source
mbed_official	354:e67efb2aab0e	224	This parameter can be a value of @ref TIM_Trigger_Selection */
mbed_official	354:e67efb2aab0e	225	uint32_t TriggerPolarity; /*!< Input Trigger polarity
mbed_official	354:e67efb2aab0e	226	This parameter can be a value of @ref TIM_Trigger_Polarity */
mbed_official	354:e67efb2aab0e	227	uint32_t TriggerPrescaler; /*!< Input trigger prescaler
mbed_official	354:e67efb2aab0e	228	This parameter can be a value of @ref TIM_Trigger_Prescaler */
mbed_official	354:e67efb2aab0e	229	uint32_t TriggerFilter; /*!< Input trigger filter
mbed_official	354:e67efb2aab0e	230	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official	354:e67efb2aab0e	231
mbed_official	354:e67efb2aab0e	232	}TIM_SlaveConfigTypeDef;
mbed_official	354:e67efb2aab0e	233
mbed_official	354:e67efb2aab0e	234	/**
mbed_official	354:e67efb2aab0e	235	* @brief HAL State structures definition
mbed_official	354:e67efb2aab0e	236	*/
mbed_official	354:e67efb2aab0e	237	typedef enum
mbed_official	354:e67efb2aab0e	238	{
mbed_official	354:e67efb2aab0e	239	HAL_TIM_STATE_RESET = 0x00, /!< Peripheral not yet initialized or disabled /
mbed_official	354:e67efb2aab0e	240	HAL_TIM_STATE_READY = 0x01, /!< Peripheral Initialized and ready for use /
mbed_official	354:e67efb2aab0e	241	HAL_TIM_STATE_BUSY = 0x02, /!< An internal process is ongoing /
mbed_official	354:e67efb2aab0e	242	HAL_TIM_STATE_TIMEOUT = 0x03, /!< Timeout state /
mbed_official	354:e67efb2aab0e	243	HAL_TIM_STATE_ERROR = 0x04 /!< Reception process is ongoing /
mbed_official	354:e67efb2aab0e	244	}HAL_TIM_StateTypeDef;
mbed_official	354:e67efb2aab0e	245
mbed_official	354:e67efb2aab0e	246	/**
mbed_official	354:e67efb2aab0e	247	* @brief HAL Active channel structures definition
mbed_official	354:e67efb2aab0e	248	*/
mbed_official	354:e67efb2aab0e	249	typedef enum
mbed_official	354:e67efb2aab0e	250	{
mbed_official	354:e67efb2aab0e	251	HAL_TIM_ACTIVE_CHANNEL_1 = 0x01, /!< The active channel is 1 /
mbed_official	354:e67efb2aab0e	252	HAL_TIM_ACTIVE_CHANNEL_2 = 0x02, /!< The active channel is 2 /
mbed_official	354:e67efb2aab0e	253	HAL_TIM_ACTIVE_CHANNEL_3 = 0x04, /!< The active channel is 3 /
mbed_official	354:e67efb2aab0e	254	HAL_TIM_ACTIVE_CHANNEL_4 = 0x08, /!< The active channel is 4 /
mbed_official	354:e67efb2aab0e	255	HAL_TIM_ACTIVE_CHANNEL_CLEARED = 0x00 /!< All active channels cleared /
mbed_official	354:e67efb2aab0e	256	}HAL_TIM_ActiveChannel;
mbed_official	354:e67efb2aab0e	257
mbed_official	354:e67efb2aab0e	258	/**
mbed_official	354:e67efb2aab0e	259	* @brief TIM Time Base Handle Structure definition
mbed_official	354:e67efb2aab0e	260	*/
mbed_official	354:e67efb2aab0e	261	typedef struct
mbed_official	354:e67efb2aab0e	262	{
mbed_official	354:e67efb2aab0e	263	TIM_TypeDef Instance; /!< Register base address */
mbed_official	354:e67efb2aab0e	264	TIM_Base_InitTypeDef Init; /!< TIM Time Base required parameters /
mbed_official	354:e67efb2aab0e	265	HAL_TIM_ActiveChannel Channel; /!< Active channel /
mbed_official	354:e67efb2aab0e	266	DMA_HandleTypeDef hdma[7]; /!< DMA Handlers array
mbed_official	354:e67efb2aab0e	267	This array is accessed by a @ref DMA_Handle_index */
mbed_official	354:e67efb2aab0e	268	HAL_LockTypeDef Lock; /!< Locking object /
mbed_official	354:e67efb2aab0e	269	__IO HAL_TIM_StateTypeDef State; /!< TIM operation state /
mbed_official	354:e67efb2aab0e	270	}TIM_HandleTypeDef;
mbed_official	354:e67efb2aab0e	271
mbed_official	354:e67efb2aab0e	272	/**
mbed_official	354:e67efb2aab0e	273	* @}
mbed_official	354:e67efb2aab0e	274	*/
mbed_official	354:e67efb2aab0e	275
mbed_official	354:e67efb2aab0e	276	/* Exported constants --------------------------------------------------------*/
mbed_official	354:e67efb2aab0e	277	/** @defgroup TIM_Exported_Constants TIM Exported Constants
mbed_official	354:e67efb2aab0e	278	* @{
mbed_official	354:e67efb2aab0e	279	*/
mbed_official	354:e67efb2aab0e	280
mbed_official	354:e67efb2aab0e	281	/** @defgroup TIM_Input_Channel_Polarity TIM_Input_Channel_Polarity
mbed_official	354:e67efb2aab0e	282	* @{
mbed_official	354:e67efb2aab0e	283	*/
mbed_official	354:e67efb2aab0e	284	#define TIM_INPUTCHANNELPOLARITY_RISING ((uint32_t)0x00000000) /!< Polarity for TIx source /
mbed_official	354:e67efb2aab0e	285	#define TIM_INPUTCHANNELPOLARITY_FALLING (TIM_CCER_CC1P) /!< Polarity for TIx source /
mbed_official	354:e67efb2aab0e	286	#define TIM_INPUTCHANNELPOLARITY_BOTHEDGE (TIM_CCER_CC1P \| TIM_CCER_CC1NP) /!< Polarity for TIx source /
mbed_official	354:e67efb2aab0e	287	/**
mbed_official	354:e67efb2aab0e	288	* @}
mbed_official	354:e67efb2aab0e	289	*/
mbed_official	354:e67efb2aab0e	290
mbed_official	354:e67efb2aab0e	291	/** @defgroup TIM_ETR_Polarity TIM_ETR_Polarity
mbed_official	354:e67efb2aab0e	292	* @{
mbed_official	354:e67efb2aab0e	293	*/
mbed_official	354:e67efb2aab0e	294	#define TIM_ETRPOLARITY_INVERTED (TIM_SMCR_ETP) /!< Polarity for ETR source /
mbed_official	354:e67efb2aab0e	295	#define TIM_ETRPOLARITY_NONINVERTED ((uint32_t)0x0000) /!< Polarity for ETR source /
mbed_official	354:e67efb2aab0e	296	/**
mbed_official	354:e67efb2aab0e	297	* @}
mbed_official	354:e67efb2aab0e	298	*/
mbed_official	354:e67efb2aab0e	299
mbed_official	354:e67efb2aab0e	300	/** @defgroup TIM_ETR_Prescaler TIM_ETR_Prescaler
mbed_official	354:e67efb2aab0e	301	* @{
mbed_official	354:e67efb2aab0e	302	*/
mbed_official	354:e67efb2aab0e	303	#define TIM_ETRPRESCALER_DIV1 ((uint32_t)0x0000) /!< No prescaler is used /
mbed_official	354:e67efb2aab0e	304	#define TIM_ETRPRESCALER_DIV2 (TIM_SMCR_ETPS_0) /!< ETR input source is divided by 2 /
mbed_official	354:e67efb2aab0e	305	#define TIM_ETRPRESCALER_DIV4 (TIM_SMCR_ETPS_1) /!< ETR input source is divided by 4 /
mbed_official	354:e67efb2aab0e	306	#define TIM_ETRPRESCALER_DIV8 (TIM_SMCR_ETPS) /!< ETR input source is divided by 8 /
mbed_official	354:e67efb2aab0e	307	/**
mbed_official	354:e67efb2aab0e	308	* @}
mbed_official	354:e67efb2aab0e	309	*/
mbed_official	354:e67efb2aab0e	310
mbed_official	354:e67efb2aab0e	311	/** @defgroup TIM_Counter_Mode TIM_Counter_Mode
mbed_official	354:e67efb2aab0e	312	* @{
mbed_official	354:e67efb2aab0e	313	*/
mbed_official	354:e67efb2aab0e	314	#define TIM_COUNTERMODE_UP ((uint32_t)0x0000)
mbed_official	354:e67efb2aab0e	315	#define TIM_COUNTERMODE_DOWN TIM_CR1_DIR
mbed_official	354:e67efb2aab0e	316	#define TIM_COUNTERMODE_CENTERALIGNED1 TIM_CR1_CMS_0
mbed_official	354:e67efb2aab0e	317	#define TIM_COUNTERMODE_CENTERALIGNED2 TIM_CR1_CMS_1
mbed_official	354:e67efb2aab0e	318	#define TIM_COUNTERMODE_CENTERALIGNED3 TIM_CR1_CMS
mbed_official	354:e67efb2aab0e	319
mbed_official	354:e67efb2aab0e	320	#define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_COUNTERMODE_UP) \|\| \
mbed_official	354:e67efb2aab0e	321	((MODE) == TIM_COUNTERMODE_DOWN) \|\| \
mbed_official	354:e67efb2aab0e	322	((MODE) == TIM_COUNTERMODE_CENTERALIGNED1) \|\| \
mbed_official	354:e67efb2aab0e	323	((MODE) == TIM_COUNTERMODE_CENTERALIGNED2) \|\| \
mbed_official	354:e67efb2aab0e	324	((MODE) == TIM_COUNTERMODE_CENTERALIGNED3))
mbed_official	354:e67efb2aab0e	325	/**
mbed_official	354:e67efb2aab0e	326	* @}
mbed_official	354:e67efb2aab0e	327	*/
mbed_official	354:e67efb2aab0e	328
mbed_official	354:e67efb2aab0e	329	/** @defgroup TIM_ClockDivision TIM_ClockDivision
mbed_official	354:e67efb2aab0e	330	* @{
mbed_official	354:e67efb2aab0e	331	*/
mbed_official	354:e67efb2aab0e	332	#define TIM_CLOCKDIVISION_DIV1 ((uint32_t)0x0000)
mbed_official	354:e67efb2aab0e	333	#define TIM_CLOCKDIVISION_DIV2 (TIM_CR1_CKD_0)
mbed_official	354:e67efb2aab0e	334	#define TIM_CLOCKDIVISION_DIV4 (TIM_CR1_CKD_1)
mbed_official	354:e67efb2aab0e	335
mbed_official	354:e67efb2aab0e	336	#define IS_TIM_CLOCKDIVISION_DIV(DIV) (((DIV) == TIM_CLOCKDIVISION_DIV1) \|\| \
mbed_official	354:e67efb2aab0e	337	((DIV) == TIM_CLOCKDIVISION_DIV2) \|\| \
mbed_official	354:e67efb2aab0e	338	((DIV) == TIM_CLOCKDIVISION_DIV4))
mbed_official	354:e67efb2aab0e	339	/**
mbed_official	354:e67efb2aab0e	340	* @}
mbed_official	354:e67efb2aab0e	341	*/
mbed_official	354:e67efb2aab0e	342
mbed_official	354:e67efb2aab0e	343	/** @defgroup TIM_Output_Compare_and_PWM_modes TIM_Output_Compare_and_PWM_modes
mbed_official	354:e67efb2aab0e	344	* @{
mbed_official	354:e67efb2aab0e	345	*/
mbed_official	354:e67efb2aab0e	346	#define TIM_OCMODE_TIMING ((uint32_t)0x0000)
mbed_official	354:e67efb2aab0e	347	#define TIM_OCMODE_ACTIVE (TIM_CCMR1_OC1M_0)
mbed_official	354:e67efb2aab0e	348	#define TIM_OCMODE_INACTIVE (TIM_CCMR1_OC1M_1)
mbed_official	354:e67efb2aab0e	349	#define TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_0 \| TIM_CCMR1_OC1M_1)
mbed_official	354:e67efb2aab0e	350	#define TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_2)
mbed_official	354:e67efb2aab0e	351	#define TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M)
mbed_official	354:e67efb2aab0e	352	#define TIM_OCMODE_FORCED_ACTIVE (TIM_CCMR1_OC1M_0 \| TIM_CCMR1_OC1M_2)
mbed_official	354:e67efb2aab0e	353	#define TIM_OCMODE_FORCED_INACTIVE (TIM_CCMR1_OC1M_2)
mbed_official	354:e67efb2aab0e	354
mbed_official	354:e67efb2aab0e	355	#define IS_TIM_PWM_MODE(MODE) (((MODE) == TIM_OCMODE_PWM1) \|\| \
mbed_official	354:e67efb2aab0e	356	((MODE) == TIM_OCMODE_PWM2))
mbed_official	354:e67efb2aab0e	357
mbed_official	354:e67efb2aab0e	358	#define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMODE_TIMING) \|\| \
mbed_official	354:e67efb2aab0e	359	((MODE) == TIM_OCMODE_ACTIVE) \|\| \
mbed_official	354:e67efb2aab0e	360	((MODE) == TIM_OCMODE_INACTIVE) \|\| \
mbed_official	354:e67efb2aab0e	361	((MODE) == TIM_OCMODE_TOGGLE) \|\| \
mbed_official	354:e67efb2aab0e	362	((MODE) == TIM_OCMODE_FORCED_ACTIVE) \|\| \
mbed_official	354:e67efb2aab0e	363	((MODE) == TIM_OCMODE_FORCED_INACTIVE))
mbed_official	354:e67efb2aab0e	364	/**
mbed_official	354:e67efb2aab0e	365	* @}
mbed_official	354:e67efb2aab0e	366	*/
mbed_official	354:e67efb2aab0e	367
mbed_official	354:e67efb2aab0e	368	/** @defgroup TIM_Output_Compare_State TIM_Output_Compare_State
mbed_official	354:e67efb2aab0e	369	* @{
mbed_official	354:e67efb2aab0e	370	*/
mbed_official	354:e67efb2aab0e	371	#define TIM_OUTPUTSTATE_DISABLE ((uint32_t)0x0000)
mbed_official	354:e67efb2aab0e	372	#define TIM_OUTPUTSTATE_ENABLE (TIM_CCER_CC1E)
mbed_official	354:e67efb2aab0e	373
mbed_official	354:e67efb2aab0e	374	#define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OUTPUTSTATE_DISABLE) \|\| \
mbed_official	354:e67efb2aab0e	375	((STATE) == TIM_OUTPUTSTATE_ENABLE))
mbed_official	354:e67efb2aab0e	376	/**
mbed_official	354:e67efb2aab0e	377	* @}
mbed_official	354:e67efb2aab0e	378	*/
mbed_official	354:e67efb2aab0e	379
mbed_official	354:e67efb2aab0e	380	/** @defgroup TIM_Output_Fast_State TIM_Output_Fast_State
mbed_official	354:e67efb2aab0e	381	* @{
mbed_official	354:e67efb2aab0e	382	*/
mbed_official	354:e67efb2aab0e	383	#define TIM_OCFAST_DISABLE ((uint32_t)0x0000)
mbed_official	354:e67efb2aab0e	384	#define TIM_OCFAST_ENABLE (TIM_CCMR1_OC1FE)
mbed_official	354:e67efb2aab0e	385
mbed_official	354:e67efb2aab0e	386	#define IS_TIM_FAST_STATE(STATE) (((STATE) == TIM_OCFAST_DISABLE) \|\| \
mbed_official	354:e67efb2aab0e	387	((STATE) == TIM_OCFAST_ENABLE))
mbed_official	354:e67efb2aab0e	388	/**
mbed_official	354:e67efb2aab0e	389	* @}
mbed_official	354:e67efb2aab0e	390	*/
mbed_official	354:e67efb2aab0e	391
mbed_official	354:e67efb2aab0e	392	/** @defgroup TIM_Output_Compare_Polarity TIM_Output_Compare_Polarity
mbed_official	354:e67efb2aab0e	393	* @{
mbed_official	354:e67efb2aab0e	394	*/
mbed_official	354:e67efb2aab0e	395	#define TIM_OCPOLARITY_HIGH ((uint32_t)0x0000)
mbed_official	354:e67efb2aab0e	396	#define TIM_OCPOLARITY_LOW (TIM_CCER_CC1P)
mbed_official	354:e67efb2aab0e	397
mbed_official	354:e67efb2aab0e	398	#define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPOLARITY_HIGH) \|\| \
mbed_official	354:e67efb2aab0e	399	((POLARITY) == TIM_OCPOLARITY_LOW))
mbed_official	354:e67efb2aab0e	400	/**
mbed_official	354:e67efb2aab0e	401	* @}
mbed_official	354:e67efb2aab0e	402	*/
mbed_official	354:e67efb2aab0e	403
mbed_official	354:e67efb2aab0e	404	/** @defgroup TIM_Output_Compare_Idle_State TIM_Output_Compare_Idle_State
mbed_official	354:e67efb2aab0e	405	* @{
mbed_official	354:e67efb2aab0e	406	*/
mbed_official	354:e67efb2aab0e	407	#define TIM_OCIDLESTATE_SET (TIM_CR2_OIS1)
mbed_official	354:e67efb2aab0e	408	#define TIM_OCIDLESTATE_RESET ((uint32_t)0x0000)
mbed_official	354:e67efb2aab0e	409	#define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIDLESTATE_SET) \|\| \
mbed_official	354:e67efb2aab0e	410	((STATE) == TIM_OCIDLESTATE_RESET))
mbed_official	354:e67efb2aab0e	411	/**
mbed_official	354:e67efb2aab0e	412	* @}
mbed_official	354:e67efb2aab0e	413	*/
mbed_official	354:e67efb2aab0e	414
mbed_official	354:e67efb2aab0e	415	/** @defgroup TIM_Channel TIM_Channel
mbed_official	354:e67efb2aab0e	416	* @{
mbed_official	354:e67efb2aab0e	417	*/
mbed_official	354:e67efb2aab0e	418	#define TIM_CHANNEL_1 ((uint32_t)0x0000)
mbed_official	354:e67efb2aab0e	419	#define TIM_CHANNEL_2 ((uint32_t)0x0004)
mbed_official	354:e67efb2aab0e	420	#define TIM_CHANNEL_3 ((uint32_t)0x0008)
mbed_official	354:e67efb2aab0e	421	#define TIM_CHANNEL_4 ((uint32_t)0x000C)
mbed_official	354:e67efb2aab0e	422	#define TIM_CHANNEL_ALL ((uint32_t)0x0018)
mbed_official	354:e67efb2aab0e	423
mbed_official	354:e67efb2aab0e	424	#define IS_TIM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) \|\| \
mbed_official	354:e67efb2aab0e	425	((CHANNEL) == TIM_CHANNEL_2) \|\| \
mbed_official	354:e67efb2aab0e	426	((CHANNEL) == TIM_CHANNEL_3) \|\| \
mbed_official	354:e67efb2aab0e	427	((CHANNEL) == TIM_CHANNEL_4) \|\| \
mbed_official	354:e67efb2aab0e	428	((CHANNEL) == TIM_CHANNEL_ALL))
mbed_official	354:e67efb2aab0e	429
mbed_official	354:e67efb2aab0e	430	#define IS_TIM_PWMI_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) \|\| \
mbed_official	354:e67efb2aab0e	431	((CHANNEL) == TIM_CHANNEL_2))
mbed_official	354:e67efb2aab0e	432
mbed_official	354:e67efb2aab0e	433	#define IS_TIM_OPM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) \|\| \
mbed_official	354:e67efb2aab0e	434	((CHANNEL) == TIM_CHANNEL_2))
mbed_official	354:e67efb2aab0e	435	/**
mbed_official	354:e67efb2aab0e	436	* @}
mbed_official	354:e67efb2aab0e	437	*/
mbed_official	354:e67efb2aab0e	438
mbed_official	354:e67efb2aab0e	439	/** @defgroup TIM_Input_Capture_Polarity TIM_Input_Capture_Polarity
mbed_official	354:e67efb2aab0e	440	* @{
mbed_official	354:e67efb2aab0e	441	*/
mbed_official	354:e67efb2aab0e	442	#define TIM_ICPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING
mbed_official	354:e67efb2aab0e	443	#define TIM_ICPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING
mbed_official	354:e67efb2aab0e	444	#define TIM_ICPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE
mbed_official	354:e67efb2aab0e	445
mbed_official	354:e67efb2aab0e	446	#define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPOLARITY_RISING) \|\| \
mbed_official	354:e67efb2aab0e	447	((POLARITY) == TIM_ICPOLARITY_FALLING) \|\| \
mbed_official	354:e67efb2aab0e	448	((POLARITY) == TIM_ICPOLARITY_BOTHEDGE))
mbed_official	354:e67efb2aab0e	449	/**
mbed_official	354:e67efb2aab0e	450	* @}
mbed_official	354:e67efb2aab0e	451	*/
mbed_official	354:e67efb2aab0e	452
mbed_official	354:e67efb2aab0e	453	/** @defgroup TIM_Input_Capture_Selection TIM_Input_Capture_Selection
mbed_official	354:e67efb2aab0e	454	* @{
mbed_official	354:e67efb2aab0e	455	*/
mbed_official	354:e67efb2aab0e	456	#define TIM_ICSELECTION_DIRECTTI (TIM_CCMR1_CC1S_0) /*!< TIM Input 1, 2, 3 or 4 is selected to be
mbed_official	354:e67efb2aab0e	457	connected to IC1, IC2, IC3 or IC4, respectively */
mbed_official	354:e67efb2aab0e	458	#define TIM_ICSELECTION_INDIRECTTI (TIM_CCMR1_CC1S_1) /*!< TIM Input 1, 2, 3 or 4 is selected to be
mbed_official	354:e67efb2aab0e	459	connected to IC2, IC1, IC4 or IC3, respectively */
mbed_official	354:e67efb2aab0e	460	#define TIM_ICSELECTION_TRC (TIM_CCMR1_CC1S) /!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC /
mbed_official	354:e67efb2aab0e	461
mbed_official	354:e67efb2aab0e	462	#define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSELECTION_DIRECTTI) \|\| \
mbed_official	354:e67efb2aab0e	463	((SELECTION) == TIM_ICSELECTION_INDIRECTTI) \|\| \
mbed_official	354:e67efb2aab0e	464	((SELECTION) == TIM_ICSELECTION_TRC))
mbed_official	354:e67efb2aab0e	465	/**
mbed_official	354:e67efb2aab0e	466	* @}
mbed_official	354:e67efb2aab0e	467	*/
mbed_official	354:e67efb2aab0e	468
mbed_official	354:e67efb2aab0e	469	/** @defgroup TIM_Input_Capture_Prescaler TIM_Input_Capture_Prescaler
mbed_official	354:e67efb2aab0e	470	* @{
mbed_official	354:e67efb2aab0e	471	*/
mbed_official	354:e67efb2aab0e	472	#define TIM_ICPSC_DIV1 ((uint32_t)0x0000) /!< Capture performed each time an edge is detected on the capture input /
mbed_official	354:e67efb2aab0e	473	#define TIM_ICPSC_DIV2 (TIM_CCMR1_IC1PSC_0) /!< Capture performed once every 2 events /
mbed_official	354:e67efb2aab0e	474	#define TIM_ICPSC_DIV4 (TIM_CCMR1_IC1PSC_1) /!< Capture performed once every 4 events /
mbed_official	354:e67efb2aab0e	475	#define TIM_ICPSC_DIV8 (TIM_CCMR1_IC1PSC) /!< Capture performed once every 8 events /
mbed_official	354:e67efb2aab0e	476
mbed_official	354:e67efb2aab0e	477	#define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) \|\| \
mbed_official	354:e67efb2aab0e	478	((PRESCALER) == TIM_ICPSC_DIV2) \|\| \
mbed_official	354:e67efb2aab0e	479	((PRESCALER) == TIM_ICPSC_DIV4) \|\| \
mbed_official	354:e67efb2aab0e	480	((PRESCALER) == TIM_ICPSC_DIV8))
mbed_official	354:e67efb2aab0e	481	/**
mbed_official	354:e67efb2aab0e	482	* @}
mbed_official	354:e67efb2aab0e	483	*/
mbed_official	354:e67efb2aab0e	484
mbed_official	354:e67efb2aab0e	485	/** @defgroup TIM_One_Pulse_Mode TIM_One_Pulse_Mode
mbed_official	354:e67efb2aab0e	486	* @{
mbed_official	354:e67efb2aab0e	487	*/
mbed_official	354:e67efb2aab0e	488	#define TIM_OPMODE_SINGLE (TIM_CR1_OPM)
mbed_official	354:e67efb2aab0e	489	#define TIM_OPMODE_REPETITIVE ((uint32_t)0x0000)
mbed_official	354:e67efb2aab0e	490
mbed_official	354:e67efb2aab0e	491	#define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMODE_SINGLE) \|\| \
mbed_official	354:e67efb2aab0e	492	((MODE) == TIM_OPMODE_REPETITIVE))
mbed_official	354:e67efb2aab0e	493	/**
mbed_official	354:e67efb2aab0e	494	* @}
mbed_official	354:e67efb2aab0e	495	*/
mbed_official	354:e67efb2aab0e	496
mbed_official	354:e67efb2aab0e	497	/** @defgroup TIM_Encoder_Mode TIM_Encoder_Mode
mbed_official	354:e67efb2aab0e	498	* @{
mbed_official	354:e67efb2aab0e	499	*/
mbed_official	354:e67efb2aab0e	500	#define TIM_ENCODERMODE_TI1 (TIM_SMCR_SMS_0)
mbed_official	354:e67efb2aab0e	501	#define TIM_ENCODERMODE_TI2 (TIM_SMCR_SMS_1)
mbed_official	354:e67efb2aab0e	502	#define TIM_ENCODERMODE_TI12 (TIM_SMCR_SMS_1 \| TIM_SMCR_SMS_0)
mbed_official	354:e67efb2aab0e	503
mbed_official	354:e67efb2aab0e	504	#define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_ENCODERMODE_TI1) \|\| \
mbed_official	354:e67efb2aab0e	505	((MODE) == TIM_ENCODERMODE_TI2) \|\| \
mbed_official	354:e67efb2aab0e	506	((MODE) == TIM_ENCODERMODE_TI12))
mbed_official	354:e67efb2aab0e	507	/**
mbed_official	354:e67efb2aab0e	508	* @}
mbed_official	354:e67efb2aab0e	509	*/
mbed_official	354:e67efb2aab0e	510
mbed_official	354:e67efb2aab0e	511	/** @defgroup TIM_Interrupt_definition TIM_Interrupt_definition
mbed_official	354:e67efb2aab0e	512	* @{
mbed_official	354:e67efb2aab0e	513	*/
mbed_official	354:e67efb2aab0e	514	#define TIM_IT_UPDATE (TIM_DIER_UIE)
mbed_official	354:e67efb2aab0e	515	#define TIM_IT_CC1 (TIM_DIER_CC1IE)
mbed_official	354:e67efb2aab0e	516	#define TIM_IT_CC2 (TIM_DIER_CC2IE)
mbed_official	354:e67efb2aab0e	517	#define TIM_IT_CC3 (TIM_DIER_CC3IE)
mbed_official	354:e67efb2aab0e	518	#define TIM_IT_CC4 (TIM_DIER_CC4IE)
mbed_official	354:e67efb2aab0e	519	#define TIM_IT_TRIGGER (TIM_DIER_TIE)
mbed_official	354:e67efb2aab0e	520
mbed_official	354:e67efb2aab0e	521	/**
mbed_official	354:e67efb2aab0e	522	* @}
mbed_official	354:e67efb2aab0e	523	*/
mbed_official	354:e67efb2aab0e	524
mbed_official	354:e67efb2aab0e	525	/** @defgroup TIM_DMA_sources TIM_DMA_sources
mbed_official	354:e67efb2aab0e	526	* @{
mbed_official	354:e67efb2aab0e	527	*/
mbed_official	354:e67efb2aab0e	528	#define TIM_DMA_UPDATE (TIM_DIER_UDE)
mbed_official	354:e67efb2aab0e	529	#define TIM_DMA_CC1 (TIM_DIER_CC1DE)
mbed_official	354:e67efb2aab0e	530	#define TIM_DMA_CC2 (TIM_DIER_CC2DE)
mbed_official	354:e67efb2aab0e	531	#define TIM_DMA_CC3 (TIM_DIER_CC3DE)
mbed_official	354:e67efb2aab0e	532	#define TIM_DMA_CC4 (TIM_DIER_CC4DE)
mbed_official	354:e67efb2aab0e	533	#define TIM_DMA_TRIGGER (TIM_DIER_TDE)
mbed_official	354:e67efb2aab0e	534
mbed_official	354:e67efb2aab0e	535	#define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & 0xFFFF80FF) == 0x00000000) && ((SOURCE) != 0x00000000))
mbed_official	354:e67efb2aab0e	536	/**
mbed_official	354:e67efb2aab0e	537	* @}
mbed_official	354:e67efb2aab0e	538	*/
mbed_official	354:e67efb2aab0e	539
mbed_official	354:e67efb2aab0e	540	/** @defgroup TIM_Event_Source TIM_Event_Source
mbed_official	354:e67efb2aab0e	541	* @{
mbed_official	354:e67efb2aab0e	542	*/
mbed_official	354:e67efb2aab0e	543	#define TIM_EventSource_Update TIM_EGR_UG
mbed_official	354:e67efb2aab0e	544	#define TIM_EventSource_CC1 TIM_EGR_CC1G
mbed_official	354:e67efb2aab0e	545	#define TIM_EventSource_CC2 TIM_EGR_CC2G
mbed_official	354:e67efb2aab0e	546	#define TIM_EventSource_CC3 TIM_EGR_CC3G
mbed_official	354:e67efb2aab0e	547	#define TIM_EventSource_CC4 TIM_EGR_CC4G
mbed_official	354:e67efb2aab0e	548	#define TIM_EventSource_Trigger TIM_EGR_TG
mbed_official	354:e67efb2aab0e	549
mbed_official	354:e67efb2aab0e	550	#define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & 0xFFFFFF00) == 0x00000000) && ((SOURCE) != 0x00000000))
mbed_official	354:e67efb2aab0e	551	/**
mbed_official	354:e67efb2aab0e	552	* @}
mbed_official	354:e67efb2aab0e	553	*/
mbed_official	354:e67efb2aab0e	554
mbed_official	354:e67efb2aab0e	555	/** @defgroup TIM_Flag_definition TIM_Flag_definition
mbed_official	354:e67efb2aab0e	556	* @{
mbed_official	354:e67efb2aab0e	557	*/
mbed_official	354:e67efb2aab0e	558	#define TIM_FLAG_UPDATE (TIM_SR_UIF)
mbed_official	354:e67efb2aab0e	559	#define TIM_FLAG_CC1 (TIM_SR_CC1IF)
mbed_official	354:e67efb2aab0e	560	#define TIM_FLAG_CC2 (TIM_SR_CC2IF)
mbed_official	354:e67efb2aab0e	561	#define TIM_FLAG_CC3 (TIM_SR_CC3IF)
mbed_official	354:e67efb2aab0e	562	#define TIM_FLAG_CC4 (TIM_SR_CC4IF)
mbed_official	354:e67efb2aab0e	563	#define TIM_FLAG_TRIGGER (TIM_SR_TIF)
mbed_official	354:e67efb2aab0e	564	#define TIM_FLAG_CC1OF (TIM_SR_CC1OF)
mbed_official	354:e67efb2aab0e	565	#define TIM_FLAG_CC2OF (TIM_SR_CC2OF)
mbed_official	354:e67efb2aab0e	566	#define TIM_FLAG_CC3OF (TIM_SR_CC3OF)
mbed_official	354:e67efb2aab0e	567	#define TIM_FLAG_CC4OF (TIM_SR_CC4OF)
mbed_official	354:e67efb2aab0e	568
mbed_official	354:e67efb2aab0e	569	/**
mbed_official	354:e67efb2aab0e	570	* @}
mbed_official	354:e67efb2aab0e	571	*/
mbed_official	354:e67efb2aab0e	572
mbed_official	354:e67efb2aab0e	573	/** @defgroup TIM_Clock_Source TIM_Clock_Source
mbed_official	354:e67efb2aab0e	574	* @{
mbed_official	354:e67efb2aab0e	575	*/
mbed_official	354:e67efb2aab0e	576	#define TIM_CLOCKSOURCE_ETRMODE2 (TIM_SMCR_ETPS_1)
mbed_official	354:e67efb2aab0e	577	#define TIM_CLOCKSOURCE_INTERNAL (TIM_SMCR_ETPS_0)
mbed_official	354:e67efb2aab0e	578	#define TIM_CLOCKSOURCE_ITR0 ((uint32_t)0x0000)
mbed_official	354:e67efb2aab0e	579	#define TIM_CLOCKSOURCE_ITR1 (TIM_SMCR_TS_0)
mbed_official	354:e67efb2aab0e	580	#define TIM_CLOCKSOURCE_ITR2 (TIM_SMCR_TS_1)
mbed_official	354:e67efb2aab0e	581	#define TIM_CLOCKSOURCE_ITR3 (TIM_SMCR_TS_0 \| TIM_SMCR_TS_1)
mbed_official	354:e67efb2aab0e	582	#define TIM_CLOCKSOURCE_TI1ED (TIM_SMCR_TS_2)
mbed_official	354:e67efb2aab0e	583	#define TIM_CLOCKSOURCE_TI1 (TIM_SMCR_TS_0 \| TIM_SMCR_TS_2)
mbed_official	354:e67efb2aab0e	584	#define TIM_CLOCKSOURCE_TI2 (TIM_SMCR_TS_1 \| TIM_SMCR_TS_2)
mbed_official	354:e67efb2aab0e	585	#define TIM_CLOCKSOURCE_ETRMODE1 (TIM_SMCR_TS)
mbed_official	354:e67efb2aab0e	586
mbed_official	354:e67efb2aab0e	587	#define IS_TIM_CLOCKSOURCE(CLOCK) (((CLOCK) == TIM_CLOCKSOURCE_INTERNAL) \|\| \
mbed_official	354:e67efb2aab0e	588	((CLOCK) == TIM_CLOCKSOURCE_ETRMODE2) \|\| \
mbed_official	354:e67efb2aab0e	589	((CLOCK) == TIM_CLOCKSOURCE_ITR0) \|\| \
mbed_official	354:e67efb2aab0e	590	((CLOCK) == TIM_CLOCKSOURCE_ITR1) \|\| \
mbed_official	354:e67efb2aab0e	591	((CLOCK) == TIM_CLOCKSOURCE_ITR2) \|\| \
mbed_official	354:e67efb2aab0e	592	((CLOCK) == TIM_CLOCKSOURCE_ITR3) \|\| \
mbed_official	354:e67efb2aab0e	593	((CLOCK) == TIM_CLOCKSOURCE_TI1ED) \|\| \
mbed_official	354:e67efb2aab0e	594	((CLOCK) == TIM_CLOCKSOURCE_TI1) \|\| \
mbed_official	354:e67efb2aab0e	595	((CLOCK) == TIM_CLOCKSOURCE_TI2) \|\| \
mbed_official	354:e67efb2aab0e	596	((CLOCK) == TIM_CLOCKSOURCE_ETRMODE1))
mbed_official	354:e67efb2aab0e	597	/**
mbed_official	354:e67efb2aab0e	598	* @}
mbed_official	354:e67efb2aab0e	599	*/
mbed_official	354:e67efb2aab0e	600
mbed_official	354:e67efb2aab0e	601	/** @defgroup TIM_Clock_Polarity TIM_Clock_Polarity
mbed_official	354:e67efb2aab0e	602	* @{
mbed_official	354:e67efb2aab0e	603	*/
mbed_official	354:e67efb2aab0e	604	#define TIM_CLOCKPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /!< Polarity for ETRx clock sources /
mbed_official	354:e67efb2aab0e	605	#define TIM_CLOCKPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /!< Polarity for ETRx clock sources /
mbed_official	354:e67efb2aab0e	606	#define TIM_CLOCKPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /!< Polarity for TIx clock sources /
mbed_official	354:e67efb2aab0e	607	#define TIM_CLOCKPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /!< Polarity for TIx clock sources /
mbed_official	354:e67efb2aab0e	608	#define TIM_CLOCKPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /!< Polarity for TIx clock sources /
mbed_official	354:e67efb2aab0e	609
mbed_official	354:e67efb2aab0e	610	#define IS_TIM_CLOCKPOLARITY(POLARITY) (((POLARITY) == TIM_CLOCKPOLARITY_INVERTED) \|\| \
mbed_official	354:e67efb2aab0e	611	((POLARITY) == TIM_CLOCKPOLARITY_NONINVERTED) \|\| \
mbed_official	354:e67efb2aab0e	612	((POLARITY) == TIM_CLOCKPOLARITY_RISING) \|\| \
mbed_official	354:e67efb2aab0e	613	((POLARITY) == TIM_CLOCKPOLARITY_FALLING) \|\| \
mbed_official	354:e67efb2aab0e	614	((POLARITY) == TIM_CLOCKPOLARITY_BOTHEDGE))
mbed_official	354:e67efb2aab0e	615	/**
mbed_official	354:e67efb2aab0e	616	* @}
mbed_official	354:e67efb2aab0e	617	*/
mbed_official	354:e67efb2aab0e	618
mbed_official	354:e67efb2aab0e	619	/** @defgroup TIM_Clock_Prescaler TIM_Clock_Prescaler
mbed_official	354:e67efb2aab0e	620	* @{
mbed_official	354:e67efb2aab0e	621	*/
mbed_official	354:e67efb2aab0e	622	#define TIM_CLOCKPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /!< No prescaler is used /
mbed_official	354:e67efb2aab0e	623	#define TIM_CLOCKPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /!< Prescaler for External ETR Clock: Capture performed once every 2 events. /
mbed_official	354:e67efb2aab0e	624	#define TIM_CLOCKPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /!< Prescaler for External ETR Clock: Capture performed once every 4 events. /
mbed_official	354:e67efb2aab0e	625	#define TIM_CLOCKPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /!< Prescaler for External ETR Clock: Capture performed once every 8 events. /
mbed_official	354:e67efb2aab0e	626
mbed_official	354:e67efb2aab0e	627	#define IS_TIM_CLOCKPRESCALER(PRESCALER) (((PRESCALER) == TIM_CLOCKPRESCALER_DIV1) \|\| \
mbed_official	354:e67efb2aab0e	628	((PRESCALER) == TIM_CLOCKPRESCALER_DIV2) \|\| \
mbed_official	354:e67efb2aab0e	629	((PRESCALER) == TIM_CLOCKPRESCALER_DIV4) \|\| \
mbed_official	354:e67efb2aab0e	630	((PRESCALER) == TIM_CLOCKPRESCALER_DIV8))
mbed_official	354:e67efb2aab0e	631	/**
mbed_official	354:e67efb2aab0e	632	* @}
mbed_official	354:e67efb2aab0e	633	*/
mbed_official	354:e67efb2aab0e	634
mbed_official	354:e67efb2aab0e	635	/** @defgroup TIM_Clock_Filter TIM_Clock_Filter
mbed_official	354:e67efb2aab0e	636	* @{
mbed_official	354:e67efb2aab0e	637	*/
mbed_official	354:e67efb2aab0e	638	#define IS_TIM_CLOCKFILTER(ICFILTER) ((ICFILTER) <= 0xF)
mbed_official	354:e67efb2aab0e	639	/**
mbed_official	354:e67efb2aab0e	640	* @}
mbed_official	354:e67efb2aab0e	641	*/
mbed_official	354:e67efb2aab0e	642
mbed_official	354:e67efb2aab0e	643	/** @defgroup TIM_ClearInput_Source TIM_ClearInput_Source
mbed_official	354:e67efb2aab0e	644	* @{
mbed_official	354:e67efb2aab0e	645	*/
mbed_official	354:e67efb2aab0e	646	#define TIM_CLEARINPUTSOURCE_ETR ((uint32_t)0x0001)
mbed_official	354:e67efb2aab0e	647	#define TIM_CLEARINPUTSOURCE_OCREFCLR ((uint32_t)0x0002)
mbed_official	354:e67efb2aab0e	648	#define TIM_CLEARINPUTSOURCE_NONE ((uint32_t)0x0000)
mbed_official	354:e67efb2aab0e	649
mbed_official	354:e67efb2aab0e	650	#define IS_TIM_CLEARINPUT_SOURCE(SOURCE) (((SOURCE) == TIM_CLEARINPUTSOURCE_ETR) \|\| \
mbed_official	354:e67efb2aab0e	651	((SOURCE) == TIM_CLEARINPUTSOURCE_OCREFCLR) \|\| \
mbed_official	354:e67efb2aab0e	652	((SOURCE) == TIM_CLEARINPUTSOURCE_NONE))
mbed_official	354:e67efb2aab0e	653	/**
mbed_official	354:e67efb2aab0e	654	* @}
mbed_official	354:e67efb2aab0e	655	*/
mbed_official	354:e67efb2aab0e	656
mbed_official	354:e67efb2aab0e	657	/** @defgroup TIM_ClearInput_Polarity TIM_ClearInput_Polarity
mbed_official	354:e67efb2aab0e	658	* @{
mbed_official	354:e67efb2aab0e	659	*/
mbed_official	354:e67efb2aab0e	660	#define TIM_CLEARINPUTPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /!< Polarity for ETRx pin /
mbed_official	354:e67efb2aab0e	661	#define TIM_CLEARINPUTPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /!< Polarity for ETRx pin /
mbed_official	354:e67efb2aab0e	662
mbed_official	354:e67efb2aab0e	663
mbed_official	354:e67efb2aab0e	664	#define IS_TIM_CLEARINPUT_POLARITY(POLARITY) (((POLARITY) == TIM_CLEARINPUTPOLARITY_INVERTED) \|\| \
mbed_official	354:e67efb2aab0e	665	((POLARITY) == TIM_CLEARINPUTPOLARITY_NONINVERTED))
mbed_official	354:e67efb2aab0e	666	/**
mbed_official	354:e67efb2aab0e	667	* @}
mbed_official	354:e67efb2aab0e	668	*/
mbed_official	354:e67efb2aab0e	669
mbed_official	354:e67efb2aab0e	670	/** @defgroup TIM_ClearInput_Prescaler TIM_ClearInput_Prescaler
mbed_official	354:e67efb2aab0e	671	* @{
mbed_official	354:e67efb2aab0e	672	*/
mbed_official	354:e67efb2aab0e	673	#define TIM_CLEARINPUTPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /!< No prescaler is used /
mbed_official	354:e67efb2aab0e	674	#define TIM_CLEARINPUTPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /!< Prescaler for External ETR pin: Capture performed once every 2 events. /
mbed_official	354:e67efb2aab0e	675	#define TIM_CLEARINPUTPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /!< Prescaler for External ETR pin: Capture performed once every 4 events. /
mbed_official	354:e67efb2aab0e	676	#define TIM_CLEARINPUTPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /!< Prescaler for External ETR pin: Capture performed once every 8 events. /
mbed_official	354:e67efb2aab0e	677
mbed_official	354:e67efb2aab0e	678	#define IS_TIM_CLEARINPUT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV1) \|\| \
mbed_official	354:e67efb2aab0e	679	((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV2) \|\| \
mbed_official	354:e67efb2aab0e	680	((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV4) \|\| \
mbed_official	354:e67efb2aab0e	681	((PRESCALER) == TIM_CLEARINPUTPRESCALER_DIV8))
mbed_official	354:e67efb2aab0e	682	/**
mbed_official	354:e67efb2aab0e	683	* @}
mbed_official	354:e67efb2aab0e	684	*/
mbed_official	354:e67efb2aab0e	685
mbed_official	354:e67efb2aab0e	686	/** @defgroup TIM_ClearInput_Filter TIM_ClearInput_Filter
mbed_official	354:e67efb2aab0e	687	* @{
mbed_official	354:e67efb2aab0e	688	*/
mbed_official	354:e67efb2aab0e	689	#define IS_TIM_CLEARINPUT_FILTER(ICFILTER) ((ICFILTER) <= 0xF)
mbed_official	354:e67efb2aab0e	690	/**
mbed_official	354:e67efb2aab0e	691	* @}
mbed_official	354:e67efb2aab0e	692	*/
mbed_official	354:e67efb2aab0e	693
mbed_official	354:e67efb2aab0e	694	/** @defgroup TIM_OSSR_Off_State_Selection_for_Run_mode_state TIM_OSSR_Off_State_Selection_for_Run_mode_state
mbed_official	354:e67efb2aab0e	695	* @{
mbed_official	354:e67efb2aab0e	696	*/
mbed_official	354:e67efb2aab0e	697	#define TIM_OSSR_ENABLE (TIM_BDTR_OSSR)
mbed_official	354:e67efb2aab0e	698	#define TIM_OSSR_DISABLE ((uint32_t)0x0000)
mbed_official	354:e67efb2aab0e	699
mbed_official	354:e67efb2aab0e	700	#define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSR_ENABLE) \|\| \
mbed_official	354:e67efb2aab0e	701	((STATE) == TIM_OSSR_DISABLE))
mbed_official	354:e67efb2aab0e	702	/**
mbed_official	354:e67efb2aab0e	703	* @}
mbed_official	354:e67efb2aab0e	704	*/
mbed_official	354:e67efb2aab0e	705
mbed_official	354:e67efb2aab0e	706	/** @defgroup TIM_OSSI_Off_State_Selection_for_Idle_mode_state TIM_OSSI_Off_State_Selection_for_Idle_mode_state
mbed_official	354:e67efb2aab0e	707	* @{
mbed_official	354:e67efb2aab0e	708	*/
mbed_official	354:e67efb2aab0e	709	#define TIM_OSSI_ENABLE (TIM_BDTR_OSSI)
mbed_official	354:e67efb2aab0e	710	#define TIM_OSSI_DISABLE ((uint32_t)0x0000)
mbed_official	354:e67efb2aab0e	711
mbed_official	354:e67efb2aab0e	712	#define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSI_ENABLE) \|\| \
mbed_official	354:e67efb2aab0e	713	((STATE) == TIM_OSSI_DISABLE))
mbed_official	354:e67efb2aab0e	714	/**
mbed_official	354:e67efb2aab0e	715	* @}
mbed_official	354:e67efb2aab0e	716	*/
mbed_official	354:e67efb2aab0e	717
mbed_official	354:e67efb2aab0e	718	/** @defgroup TIM_Lock_level TIM_Lock_level
mbed_official	354:e67efb2aab0e	719	* @{
mbed_official	354:e67efb2aab0e	720	*/
mbed_official	354:e67efb2aab0e	721	#define TIM_LOCKLEVEL_OFF ((uint32_t)0x0000)
mbed_official	354:e67efb2aab0e	722	#define TIM_LOCKLEVEL_1 (TIM_BDTR_LOCK_0)
mbed_official	354:e67efb2aab0e	723	#define TIM_LOCKLEVEL_2 (TIM_BDTR_LOCK_1)
mbed_official	354:e67efb2aab0e	724	#define TIM_LOCKLEVEL_3 (TIM_BDTR_LOCK)
mbed_official	354:e67efb2aab0e	725
mbed_official	354:e67efb2aab0e	726	#define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLEVEL_OFF) \|\| \
mbed_official	354:e67efb2aab0e	727	((LEVEL) == TIM_LOCKLEVEL_1) \|\| \
mbed_official	354:e67efb2aab0e	728	((LEVEL) == TIM_LOCKLEVEL_2) \|\| \
mbed_official	354:e67efb2aab0e	729	((LEVEL) == TIM_LOCKLEVEL_3))
mbed_official	354:e67efb2aab0e	730	/**
mbed_official	354:e67efb2aab0e	731	* @}
mbed_official	354:e67efb2aab0e	732	*/
mbed_official	354:e67efb2aab0e	733
mbed_official	354:e67efb2aab0e	734	/** @defgroup TIM_AOE_Bit_Set_Reset TIM_AOE_Bit_Set_Reset
mbed_official	354:e67efb2aab0e	735	* @{
mbed_official	354:e67efb2aab0e	736	*/
mbed_official	354:e67efb2aab0e	737	#define TIM_AUTOMATICOUTPUT_ENABLE (TIM_BDTR_AOE)
mbed_official	354:e67efb2aab0e	738	#define TIM_AUTOMATICOUTPUT_DISABLE ((uint32_t)0x0000)
mbed_official	354:e67efb2aab0e	739
mbed_official	354:e67efb2aab0e	740	#define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AUTOMATICOUTPUT_ENABLE) \|\| \
mbed_official	354:e67efb2aab0e	741	((STATE) == TIM_AUTOMATICOUTPUT_DISABLE))
mbed_official	354:e67efb2aab0e	742	/**
mbed_official	354:e67efb2aab0e	743	* @}
mbed_official	354:e67efb2aab0e	744	*/
mbed_official	354:e67efb2aab0e	745
mbed_official	354:e67efb2aab0e	746	/** @defgroup TIM_Master_Mode_Selection TIM_Master_Mode_Selection
mbed_official	354:e67efb2aab0e	747	* @{
mbed_official	354:e67efb2aab0e	748	*/
mbed_official	354:e67efb2aab0e	749	#define TIM_TRGO_RESET ((uint32_t)0x0000)
mbed_official	354:e67efb2aab0e	750	#define TIM_TRGO_ENABLE (TIM_CR2_MMS_0)
mbed_official	354:e67efb2aab0e	751	#define TIM_TRGO_UPDATE (TIM_CR2_MMS_1)
mbed_official	354:e67efb2aab0e	752	#define TIM_TRGO_OC1 ((TIM_CR2_MMS_1 \| TIM_CR2_MMS_0))
mbed_official	354:e67efb2aab0e	753	#define TIM_TRGO_OC1REF (TIM_CR2_MMS_2)
mbed_official	354:e67efb2aab0e	754	#define TIM_TRGO_OC2REF ((TIM_CR2_MMS_2 \| TIM_CR2_MMS_0))
mbed_official	354:e67efb2aab0e	755	#define TIM_TRGO_OC3REF ((TIM_CR2_MMS_2 \| TIM_CR2_MMS_1))
mbed_official	354:e67efb2aab0e	756	#define TIM_TRGO_OC4REF ((TIM_CR2_MMS_2 \| TIM_CR2_MMS_1 \| TIM_CR2_MMS_0))
mbed_official	354:e67efb2aab0e	757
mbed_official	354:e67efb2aab0e	758	#define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGO_RESET) \|\| \
mbed_official	354:e67efb2aab0e	759	((SOURCE) == TIM_TRGO_ENABLE) \|\| \
mbed_official	354:e67efb2aab0e	760	((SOURCE) == TIM_TRGO_UPDATE) \|\| \
mbed_official	354:e67efb2aab0e	761	((SOURCE) == TIM_TRGO_OC1) \|\| \
mbed_official	354:e67efb2aab0e	762	((SOURCE) == TIM_TRGO_OC1REF) \|\| \
mbed_official	354:e67efb2aab0e	763	((SOURCE) == TIM_TRGO_OC2REF) \|\| \
mbed_official	354:e67efb2aab0e	764	((SOURCE) == TIM_TRGO_OC3REF) \|\| \
mbed_official	354:e67efb2aab0e	765	((SOURCE) == TIM_TRGO_OC4REF))
mbed_official	354:e67efb2aab0e	766	/**
mbed_official	354:e67efb2aab0e	767	* @}
mbed_official	354:e67efb2aab0e	768	*/
mbed_official	354:e67efb2aab0e	769
mbed_official	354:e67efb2aab0e	770	/** @defgroup TIM_Slave_Mode TIM_Slave_Mode
mbed_official	354:e67efb2aab0e	771	* @{
mbed_official	354:e67efb2aab0e	772	*/
mbed_official	354:e67efb2aab0e	773	#define TIM_SLAVEMODE_DISABLE ((uint32_t)0x0000)
mbed_official	354:e67efb2aab0e	774	#define TIM_SLAVEMODE_RESET ((uint32_t)0x0004)
mbed_official	354:e67efb2aab0e	775	#define TIM_SLAVEMODE_GATED ((uint32_t)0x0005)
mbed_official	354:e67efb2aab0e	776	#define TIM_SLAVEMODE_TRIGGER ((uint32_t)0x0006)
mbed_official	354:e67efb2aab0e	777	#define TIM_SLAVEMODE_EXTERNAL1 ((uint32_t)0x0007)
mbed_official	354:e67efb2aab0e	778
mbed_official	354:e67efb2aab0e	779	#define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SLAVEMODE_DISABLE) \|\| \
mbed_official	354:e67efb2aab0e	780	((MODE) == TIM_SLAVEMODE_GATED) \|\| \
mbed_official	354:e67efb2aab0e	781	((MODE) == TIM_SLAVEMODE_RESET) \|\| \
mbed_official	354:e67efb2aab0e	782	((MODE) == TIM_SLAVEMODE_TRIGGER) \|\| \
mbed_official	354:e67efb2aab0e	783	((MODE) == TIM_SLAVEMODE_EXTERNAL1))
mbed_official	354:e67efb2aab0e	784	/**
mbed_official	354:e67efb2aab0e	785	* @}
mbed_official	354:e67efb2aab0e	786	*/
mbed_official	354:e67efb2aab0e	787
mbed_official	354:e67efb2aab0e	788	/** @defgroup TIM_Master_Slave_Mode TIM_Master_Slave_Mode
mbed_official	354:e67efb2aab0e	789	* @{
mbed_official	354:e67efb2aab0e	790	*/
mbed_official	354:e67efb2aab0e	791	#define TIM_MASTERSLAVEMODE_ENABLE ((uint32_t)0x0080)
mbed_official	354:e67efb2aab0e	792	#define TIM_MASTERSLAVEMODE_DISABLE ((uint32_t)0x0000)
mbed_official	354:e67efb2aab0e	793
mbed_official	354:e67efb2aab0e	794	#define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MASTERSLAVEMODE_ENABLE) \|\| \
mbed_official	354:e67efb2aab0e	795	((STATE) == TIM_MASTERSLAVEMODE_DISABLE))
mbed_official	354:e67efb2aab0e	796	/**
mbed_official	354:e67efb2aab0e	797	* @}
mbed_official	354:e67efb2aab0e	798	*/
mbed_official	354:e67efb2aab0e	799
mbed_official	354:e67efb2aab0e	800	/** @defgroup TIM_Trigger_Selection TIM_Trigger_Selection
mbed_official	354:e67efb2aab0e	801	* @{
mbed_official	354:e67efb2aab0e	802	*/
mbed_official	354:e67efb2aab0e	803	#define TIM_TS_ITR0 ((uint32_t)0x0000)
mbed_official	354:e67efb2aab0e	804	#define TIM_TS_ITR1 ((uint32_t)0x0010)
mbed_official	354:e67efb2aab0e	805	#define TIM_TS_ITR2 ((uint32_t)0x0020)
mbed_official	354:e67efb2aab0e	806	#define TIM_TS_ITR3 ((uint32_t)0x0030)
mbed_official	354:e67efb2aab0e	807	#define TIM_TS_TI1F_ED ((uint32_t)0x0040)
mbed_official	354:e67efb2aab0e	808	#define TIM_TS_TI1FP1 ((uint32_t)0x0050)
mbed_official	354:e67efb2aab0e	809	#define TIM_TS_TI2FP2 ((uint32_t)0x0060)
mbed_official	354:e67efb2aab0e	810	#define TIM_TS_ETRF ((uint32_t)0x0070)
mbed_official	354:e67efb2aab0e	811	#define TIM_TS_NONE ((uint32_t)0xFFFF)
mbed_official	354:e67efb2aab0e	812
mbed_official	354:e67efb2aab0e	813	#define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) \|\| \
mbed_official	354:e67efb2aab0e	814	((SELECTION) == TIM_TS_ITR1) \|\| \
mbed_official	354:e67efb2aab0e	815	((SELECTION) == TIM_TS_ITR2) \|\| \
mbed_official	354:e67efb2aab0e	816	((SELECTION) == TIM_TS_ITR3) \|\| \
mbed_official	354:e67efb2aab0e	817	((SELECTION) == TIM_TS_TI1F_ED) \|\| \
mbed_official	354:e67efb2aab0e	818	((SELECTION) == TIM_TS_TI1FP1) \|\| \
mbed_official	354:e67efb2aab0e	819	((SELECTION) == TIM_TS_TI2FP2) \|\| \
mbed_official	354:e67efb2aab0e	820	((SELECTION) == TIM_TS_ETRF))
mbed_official	354:e67efb2aab0e	821
mbed_official	354:e67efb2aab0e	822	#define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) \|\| \
mbed_official	354:e67efb2aab0e	823	((SELECTION) == TIM_TS_ITR1) \|\| \
mbed_official	354:e67efb2aab0e	824	((SELECTION) == TIM_TS_ITR2) \|\| \
mbed_official	354:e67efb2aab0e	825	((SELECTION) == TIM_TS_ITR3))
mbed_official	354:e67efb2aab0e	826
mbed_official	354:e67efb2aab0e	827	#define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) \|\| \
mbed_official	354:e67efb2aab0e	828	((SELECTION) == TIM_TS_ITR1) \|\| \
mbed_official	354:e67efb2aab0e	829	((SELECTION) == TIM_TS_ITR2) \|\| \
mbed_official	354:e67efb2aab0e	830	((SELECTION) == TIM_TS_ITR3) \|\| \
mbed_official	354:e67efb2aab0e	831	((SELECTION) == TIM_TS_NONE))
mbed_official	354:e67efb2aab0e	832	/**
mbed_official	354:e67efb2aab0e	833	* @}
mbed_official	354:e67efb2aab0e	834	*/
mbed_official	354:e67efb2aab0e	835
mbed_official	354:e67efb2aab0e	836	/** @defgroup TIM_Trigger_Polarity TIM_Trigger_Polarity
mbed_official	354:e67efb2aab0e	837	* @{
mbed_official	354:e67efb2aab0e	838	*/
mbed_official	354:e67efb2aab0e	839	#define TIM_TRIGGERPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /!< Polarity for ETRx trigger sources /
mbed_official	354:e67efb2aab0e	840	#define TIM_TRIGGERPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /!< Polarity for ETRx trigger sources /
mbed_official	354:e67efb2aab0e	841	#define TIM_TRIGGERPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /!< Polarity for TIxFPx or TI1_ED trigger sources /
mbed_official	354:e67efb2aab0e	842	#define TIM_TRIGGERPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /!< Polarity for TIxFPx or TI1_ED trigger sources /
mbed_official	354:e67efb2aab0e	843	#define TIM_TRIGGERPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /!< Polarity for TIxFPx or TI1_ED trigger sources /
mbed_official	354:e67efb2aab0e	844
mbed_official	354:e67efb2aab0e	845	#define IS_TIM_TRIGGERPOLARITY(POLARITY) (((POLARITY) == TIM_TRIGGERPOLARITY_INVERTED ) \|\| \
mbed_official	354:e67efb2aab0e	846	((POLARITY) == TIM_TRIGGERPOLARITY_NONINVERTED) \|\| \
mbed_official	354:e67efb2aab0e	847	((POLARITY) == TIM_TRIGGERPOLARITY_RISING ) \|\| \
mbed_official	354:e67efb2aab0e	848	((POLARITY) == TIM_TRIGGERPOLARITY_FALLING ) \|\| \
mbed_official	354:e67efb2aab0e	849	((POLARITY) == TIM_TRIGGERPOLARITY_BOTHEDGE ))
mbed_official	354:e67efb2aab0e	850	/**
mbed_official	354:e67efb2aab0e	851	* @}
mbed_official	354:e67efb2aab0e	852	*/
mbed_official	354:e67efb2aab0e	853
mbed_official	354:e67efb2aab0e	854	/** @defgroup TIM_Trigger_Prescaler TIM_Trigger_Prescaler
mbed_official	354:e67efb2aab0e	855	* @{
mbed_official	354:e67efb2aab0e	856	*/
mbed_official	354:e67efb2aab0e	857	#define TIM_TRIGGERPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /!< No prescaler is used /
mbed_official	354:e67efb2aab0e	858	#define TIM_TRIGGERPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /!< Prescaler for External ETR Trigger: Capture performed once every 2 events. /
mbed_official	354:e67efb2aab0e	859	#define TIM_TRIGGERPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /!< Prescaler for External ETR Trigger: Capture performed once every 4 events. /
mbed_official	354:e67efb2aab0e	860	#define TIM_TRIGGERPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /!< Prescaler for External ETR Trigger: Capture performed once every 8 events. /
mbed_official	354:e67efb2aab0e	861
mbed_official	354:e67efb2aab0e	862	#define IS_TIM_TRIGGERPRESCALER(PRESCALER) (((PRESCALER) == TIM_TRIGGERPRESCALER_DIV1) \|\| \
mbed_official	354:e67efb2aab0e	863	((PRESCALER) == TIM_TRIGGERPRESCALER_DIV2) \|\| \
mbed_official	354:e67efb2aab0e	864	((PRESCALER) == TIM_TRIGGERPRESCALER_DIV4) \|\| \
mbed_official	354:e67efb2aab0e	865	((PRESCALER) == TIM_TRIGGERPRESCALER_DIV8))
mbed_official	354:e67efb2aab0e	866	/**
mbed_official	354:e67efb2aab0e	867	* @}
mbed_official	354:e67efb2aab0e	868	*/
mbed_official	354:e67efb2aab0e	869
mbed_official	354:e67efb2aab0e	870	/** @defgroup TIM_Trigger_Filter TIM_Trigger_Filter
mbed_official	354:e67efb2aab0e	871	* @{
mbed_official	354:e67efb2aab0e	872	*/
mbed_official	354:e67efb2aab0e	873	#define IS_TIM_TRIGGERFILTER(ICFILTER) ((ICFILTER) <= 0xF)
mbed_official	354:e67efb2aab0e	874	/**
mbed_official	354:e67efb2aab0e	875	* @}
mbed_official	354:e67efb2aab0e	876	*/
mbed_official	354:e67efb2aab0e	877
mbed_official	354:e67efb2aab0e	878	/** @defgroup TIM_TI1_Selection TIM_TI1_Selection
mbed_official	354:e67efb2aab0e	879	* @{
mbed_official	354:e67efb2aab0e	880	*/
mbed_official	354:e67efb2aab0e	881	#define TIM_TI1SELECTION_CH1 ((uint32_t)0x0000)
mbed_official	354:e67efb2aab0e	882	#define TIM_TI1SELECTION_XORCOMBINATION (TIM_CR2_TI1S)
mbed_official	354:e67efb2aab0e	883
mbed_official	354:e67efb2aab0e	884	#define IS_TIM_TI1SELECTION(TI1SELECTION) (((TI1SELECTION) == TIM_TI1SELECTION_CH1) \|\| \
mbed_official	354:e67efb2aab0e	885	((TI1SELECTION) == TIM_TI1SELECTION_XORCOMBINATION))
mbed_official	354:e67efb2aab0e	886	/**
mbed_official	354:e67efb2aab0e	887	* @}
mbed_official	354:e67efb2aab0e	888	*/
mbed_official	354:e67efb2aab0e	889
mbed_official	354:e67efb2aab0e	890	/** @defgroup TIM_DMA_Base_address TIM_DMA_Base_address
mbed_official	354:e67efb2aab0e	891	* @{
mbed_official	354:e67efb2aab0e	892	*/
mbed_official	354:e67efb2aab0e	893	#define TIM_DMABase_CR1 (0x00000000)
mbed_official	354:e67efb2aab0e	894	#define TIM_DMABase_CR2 (0x00000001)
mbed_official	354:e67efb2aab0e	895	#define TIM_DMABase_SMCR (0x00000002)
mbed_official	354:e67efb2aab0e	896	#define TIM_DMABase_DIER (0x00000003)
mbed_official	354:e67efb2aab0e	897	#define TIM_DMABase_SR (0x00000004)
mbed_official	354:e67efb2aab0e	898	#define TIM_DMABase_EGR (0x00000005)
mbed_official	354:e67efb2aab0e	899	#define TIM_DMABase_CCMR1 (0x00000006)
mbed_official	354:e67efb2aab0e	900	#define TIM_DMABase_CCMR2 (0x00000007)
mbed_official	354:e67efb2aab0e	901	#define TIM_DMABase_CCER (0x00000008)
mbed_official	354:e67efb2aab0e	902	#define TIM_DMABase_CNT (0x00000009)
mbed_official	354:e67efb2aab0e	903	#define TIM_DMABase_PSC (0x0000000A)
mbed_official	354:e67efb2aab0e	904	#define TIM_DMABase_ARR (0x0000000B)
mbed_official	354:e67efb2aab0e	905	#define TIM_DMABase_CCR1 (0x0000000D)
mbed_official	354:e67efb2aab0e	906	#define TIM_DMABase_CCR2 (0x0000000E)
mbed_official	354:e67efb2aab0e	907	#define TIM_DMABase_CCR3 (0x0000000F)
mbed_official	354:e67efb2aab0e	908	#define TIM_DMABase_CCR4 (0x00000010)
mbed_official	354:e67efb2aab0e	909	#define TIM_DMABase_DCR (0x00000012)
mbed_official	354:e67efb2aab0e	910	#define TIM_DMABase_OR (0x00000013)
mbed_official	354:e67efb2aab0e	911
mbed_official	354:e67efb2aab0e	912	#define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) \|\| \
mbed_official	354:e67efb2aab0e	913	((BASE) == TIM_DMABase_CR2) \|\| \
mbed_official	354:e67efb2aab0e	914	((BASE) == TIM_DMABase_SMCR) \|\| \
mbed_official	354:e67efb2aab0e	915	((BASE) == TIM_DMABase_DIER) \|\| \
mbed_official	354:e67efb2aab0e	916	((BASE) == TIM_DMABase_SR) \|\| \
mbed_official	354:e67efb2aab0e	917	((BASE) == TIM_DMABase_EGR) \|\| \
mbed_official	354:e67efb2aab0e	918	((BASE) == TIM_DMABase_CCMR1) \|\| \
mbed_official	354:e67efb2aab0e	919	((BASE) == TIM_DMABase_CCMR2) \|\| \
mbed_official	354:e67efb2aab0e	920	((BASE) == TIM_DMABase_CCER) \|\| \
mbed_official	354:e67efb2aab0e	921	((BASE) == TIM_DMABase_CNT) \|\| \
mbed_official	354:e67efb2aab0e	922	((BASE) == TIM_DMABase_PSC) \|\| \
mbed_official	354:e67efb2aab0e	923	((BASE) == TIM_DMABase_ARR) \|\| \
mbed_official	354:e67efb2aab0e	924	((BASE) == TIM_DMABase_CCR1) \|\| \
mbed_official	354:e67efb2aab0e	925	((BASE) == TIM_DMABase_CCR2) \|\| \
mbed_official	354:e67efb2aab0e	926	((BASE) == TIM_DMABase_CCR3) \|\| \
mbed_official	354:e67efb2aab0e	927	((BASE) == TIM_DMABase_CCR4) \|\| \
mbed_official	354:e67efb2aab0e	928	((BASE) == TIM_DMABase_DCR) \|\| \
mbed_official	354:e67efb2aab0e	929	((BASE) == TIM_DMABase_OR))
mbed_official	354:e67efb2aab0e	930	/**
mbed_official	354:e67efb2aab0e	931	* @}
mbed_official	354:e67efb2aab0e	932	*/
mbed_official	354:e67efb2aab0e	933
mbed_official	354:e67efb2aab0e	934	/** @defgroup TIM_DMA_Burst_Length TIM_DMA_Burst_Length
mbed_official	354:e67efb2aab0e	935	* @{
mbed_official	354:e67efb2aab0e	936	*/
mbed_official	354:e67efb2aab0e	937	#define TIM_DMABurstLength_1Transfer (0x00000000)
mbed_official	354:e67efb2aab0e	938	#define TIM_DMABurstLength_2Transfers (0x00000100)
mbed_official	354:e67efb2aab0e	939	#define TIM_DMABurstLength_3Transfers (0x00000200)
mbed_official	354:e67efb2aab0e	940	#define TIM_DMABurstLength_4Transfers (0x00000300)
mbed_official	354:e67efb2aab0e	941	#define TIM_DMABurstLength_5Transfers (0x00000400)
mbed_official	354:e67efb2aab0e	942	#define TIM_DMABurstLength_6Transfers (0x00000500)
mbed_official	354:e67efb2aab0e	943	#define TIM_DMABurstLength_7Transfers (0x00000600)
mbed_official	354:e67efb2aab0e	944	#define TIM_DMABurstLength_8Transfers (0x00000700)
mbed_official	354:e67efb2aab0e	945	#define TIM_DMABurstLength_9Transfers (0x00000800)
mbed_official	354:e67efb2aab0e	946	#define TIM_DMABurstLength_10Transfers (0x00000900)
mbed_official	354:e67efb2aab0e	947	#define TIM_DMABurstLength_11Transfers (0x00000A00)
mbed_official	354:e67efb2aab0e	948	#define TIM_DMABurstLength_12Transfers (0x00000B00)
mbed_official	354:e67efb2aab0e	949	#define TIM_DMABurstLength_13Transfers (0x00000C00)
mbed_official	354:e67efb2aab0e	950	#define TIM_DMABurstLength_14Transfers (0x00000D00)
mbed_official	354:e67efb2aab0e	951	#define TIM_DMABurstLength_15Transfers (0x00000E00)
mbed_official	354:e67efb2aab0e	952	#define TIM_DMABurstLength_16Transfers (0x00000F00)
mbed_official	354:e67efb2aab0e	953	#define TIM_DMABurstLength_17Transfers (0x00001000)
mbed_official	354:e67efb2aab0e	954	#define TIM_DMABurstLength_18Transfers (0x00001100)
mbed_official	354:e67efb2aab0e	955
mbed_official	354:e67efb2aab0e	956	#define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Transfer) \|\| \
mbed_official	354:e67efb2aab0e	957	((LENGTH) == TIM_DMABurstLength_2Transfers) \|\| \
mbed_official	354:e67efb2aab0e	958	((LENGTH) == TIM_DMABurstLength_3Transfers) \|\| \
mbed_official	354:e67efb2aab0e	959	((LENGTH) == TIM_DMABurstLength_4Transfers) \|\| \
mbed_official	354:e67efb2aab0e	960	((LENGTH) == TIM_DMABurstLength_5Transfers) \|\| \
mbed_official	354:e67efb2aab0e	961	((LENGTH) == TIM_DMABurstLength_6Transfers) \|\| \
mbed_official	354:e67efb2aab0e	962	((LENGTH) == TIM_DMABurstLength_7Transfers) \|\| \
mbed_official	354:e67efb2aab0e	963	((LENGTH) == TIM_DMABurstLength_8Transfers) \|\| \
mbed_official	354:e67efb2aab0e	964	((LENGTH) == TIM_DMABurstLength_9Transfers) \|\| \
mbed_official	354:e67efb2aab0e	965	((LENGTH) == TIM_DMABurstLength_10Transfers) \|\| \
mbed_official	354:e67efb2aab0e	966	((LENGTH) == TIM_DMABurstLength_11Transfers) \|\| \
mbed_official	354:e67efb2aab0e	967	((LENGTH) == TIM_DMABurstLength_12Transfers) \|\| \
mbed_official	354:e67efb2aab0e	968	((LENGTH) == TIM_DMABurstLength_13Transfers) \|\| \
mbed_official	354:e67efb2aab0e	969	((LENGTH) == TIM_DMABurstLength_14Transfers) \|\| \
mbed_official	354:e67efb2aab0e	970	((LENGTH) == TIM_DMABurstLength_15Transfers) \|\| \
mbed_official	354:e67efb2aab0e	971	((LENGTH) == TIM_DMABurstLength_16Transfers) \|\| \
mbed_official	354:e67efb2aab0e	972	((LENGTH) == TIM_DMABurstLength_17Transfers) \|\| \
mbed_official	354:e67efb2aab0e	973	((LENGTH) == TIM_DMABurstLength_18Transfers))
mbed_official	354:e67efb2aab0e	974	/**
mbed_official	354:e67efb2aab0e	975	* @}
mbed_official	354:e67efb2aab0e	976	*/
mbed_official	354:e67efb2aab0e	977
mbed_official	354:e67efb2aab0e	978	/** @defgroup TIM_Input_Capture_Filer_Value TIM_Input_Capture_Filer_Value
mbed_official	354:e67efb2aab0e	979	* @{
mbed_official	354:e67efb2aab0e	980	*/
mbed_official	354:e67efb2aab0e	981	#define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF)
mbed_official	354:e67efb2aab0e	982	/**
mbed_official	354:e67efb2aab0e	983	* @}
mbed_official	354:e67efb2aab0e	984	*/
mbed_official	354:e67efb2aab0e	985
mbed_official	354:e67efb2aab0e	986	/** @defgroup DMA_Handle_index DMA_Handle_index
mbed_official	354:e67efb2aab0e	987	* @{
mbed_official	354:e67efb2aab0e	988	*/
mbed_official	354:e67efb2aab0e	989	#define TIM_DMA_ID_UPDATE ((uint16_t) 0x0) /!< Index of the DMA handle used for Update DMA requests /
mbed_official	354:e67efb2aab0e	990	#define TIM_DMA_ID_CC1 ((uint16_t) 0x1) /!< Index of the DMA handle used for Capture/Compare 1 DMA requests /
mbed_official	354:e67efb2aab0e	991	#define TIM_DMA_ID_CC2 ((uint16_t) 0x2) /!< Index of the DMA handle used for Capture/Compare 2 DMA requests /
mbed_official	354:e67efb2aab0e	992	#define TIM_DMA_ID_CC3 ((uint16_t) 0x3) /!< Index of the DMA handle used for Capture/Compare 3 DMA requests /
mbed_official	354:e67efb2aab0e	993	#define TIM_DMA_ID_CC4 ((uint16_t) 0x4) /!< Index of the DMA handle used for Capture/Compare 4 DMA requests /
mbed_official	354:e67efb2aab0e	994	#define TIM_DMA_ID_TRIGGER ((uint16_t) 0x6) /!< Index of the DMA handle used for Trigger DMA requests /
mbed_official	354:e67efb2aab0e	995	/**
mbed_official	354:e67efb2aab0e	996	* @}
mbed_official	354:e67efb2aab0e	997	*/
mbed_official	354:e67efb2aab0e	998
mbed_official	354:e67efb2aab0e	999	/** @defgroup Channel_CC_State Channel_CC_State
mbed_official	354:e67efb2aab0e	1000	* @{
mbed_official	354:e67efb2aab0e	1001	*/
mbed_official	354:e67efb2aab0e	1002	#define TIM_CCx_ENABLE ((uint32_t)0x0001)
mbed_official	354:e67efb2aab0e	1003	#define TIM_CCx_DISABLE ((uint32_t)0x0000)
mbed_official	354:e67efb2aab0e	1004	/**
mbed_official	354:e67efb2aab0e	1005	* @}
mbed_official	354:e67efb2aab0e	1006	*/
mbed_official	354:e67efb2aab0e	1007
mbed_official	354:e67efb2aab0e	1008	/**
mbed_official	354:e67efb2aab0e	1009	* @}
mbed_official	354:e67efb2aab0e	1010	*/
mbed_official	354:e67efb2aab0e	1011
mbed_official	354:e67efb2aab0e	1012	/* Private Constants -----------------------------------------------------------*/
mbed_official	354:e67efb2aab0e	1013	/** @defgroup TIM_Private_Constants TIM_Private_Constants
mbed_official	354:e67efb2aab0e	1014	* @{
mbed_official	354:e67efb2aab0e	1015	*/
mbed_official	354:e67efb2aab0e	1016
mbed_official	354:e67efb2aab0e	1017	/* The counter of a timer instance is disabled only if all the CCx
mbed_official	354:e67efb2aab0e	1018	channels have been disabled */
mbed_official	354:e67efb2aab0e	1019	#define CCER_CCxE_MASK ((uint32_t)(TIM_CCER_CC1E \| TIM_CCER_CC2E \| TIM_CCER_CC3E \| TIM_CCER_CC4E))
mbed_official	354:e67efb2aab0e	1020	/**
mbed_official	354:e67efb2aab0e	1021	* @}
mbed_official	354:e67efb2aab0e	1022	*/
mbed_official	354:e67efb2aab0e	1023
mbed_official	354:e67efb2aab0e	1024
mbed_official	354:e67efb2aab0e	1025
mbed_official	354:e67efb2aab0e	1026	/* Exported macros -----------------------------------------------------------*/
mbed_official	354:e67efb2aab0e	1027	/** @defgroup TIM_Exported_Macros TIM Exported Macros
mbed_official	354:e67efb2aab0e	1028	* @{
mbed_official	354:e67efb2aab0e	1029	*/
mbed_official	354:e67efb2aab0e	1030
mbed_official	354:e67efb2aab0e	1031	/** @brief Reset TIM handle state
mbed_official	354:e67efb2aab0e	1032	* @param __HANDLE__: TIM handle.
mbed_official	354:e67efb2aab0e	1033	* @retval None
mbed_official	354:e67efb2aab0e	1034	*/
mbed_official	354:e67efb2aab0e	1035	#define __HAL_TIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TIM_STATE_RESET)
mbed_official	354:e67efb2aab0e	1036
mbed_official	354:e67efb2aab0e	1037	/**
mbed_official	354:e67efb2aab0e	1038	* @brief Enable the TIM peripheral.
mbed_official	354:e67efb2aab0e	1039	* @param __HANDLE__: TIM handle
mbed_official	354:e67efb2aab0e	1040	* @retval None
mbed_official	354:e67efb2aab0e	1041	*/
mbed_official	354:e67efb2aab0e	1042	#define __HAL_TIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1\|=(TIM_CR1_CEN))
mbed_official	354:e67efb2aab0e	1043
mbed_official	354:e67efb2aab0e	1044	/**
mbed_official	354:e67efb2aab0e	1045	* @brief Disable the TIM peripheral.
mbed_official	354:e67efb2aab0e	1046	* @param __HANDLE__: TIM handle
mbed_official	354:e67efb2aab0e	1047	* @retval None
mbed_official	354:e67efb2aab0e	1048	*/
mbed_official	354:e67efb2aab0e	1049	#define __HAL_TIM_DISABLE(__HANDLE__) \
mbed_official	354:e67efb2aab0e	1050	do { \
mbed_official	354:e67efb2aab0e	1051	if (((__HANDLE__)->Instance->CCER & CCER_CCxE_MASK) == 0) \
mbed_official	354:e67efb2aab0e	1052	{ \
mbed_official	354:e67efb2aab0e	1053	(__HANDLE__)->Instance->CR1 &= ~(TIM_CR1_CEN); \
mbed_official	354:e67efb2aab0e	1054	} \
mbed_official	354:e67efb2aab0e	1055	} while(0)
mbed_official	354:e67efb2aab0e	1056
mbed_official	354:e67efb2aab0e	1057	/**
mbed_official	354:e67efb2aab0e	1058	* @brief Enable the specified TIM interrupt.
mbed_official	354:e67efb2aab0e	1059	* @param __HANDLE__: TIM handle
mbed_official	354:e67efb2aab0e	1060	* @param __INTERRUPT__: specifies the TIM interrupt sources to be enabled or disabled.
mbed_official	354:e67efb2aab0e	1061	* @retval None
mbed_official	354:e67efb2aab0e	1062	*/
mbed_official	354:e67efb2aab0e	1063	#define __HAL_TIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER \|= (__INTERRUPT__))
mbed_official	354:e67efb2aab0e	1064
mbed_official	354:e67efb2aab0e	1065	/**
mbed_official	354:e67efb2aab0e	1066	* @brief Enable the specified DMA Channel.
mbed_official	354:e67efb2aab0e	1067	* @param __HANDLE__: TIM handle
mbed_official	354:e67efb2aab0e	1068	* @param __DMA__: specifies the DMA Channel to be enabled or disabled.
mbed_official	354:e67efb2aab0e	1069	* @retval None
mbed_official	354:e67efb2aab0e	1070	*/
mbed_official	354:e67efb2aab0e	1071	#define __HAL_TIM_ENABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER \|= (__DMA__))
mbed_official	354:e67efb2aab0e	1072
mbed_official	354:e67efb2aab0e	1073	/**
mbed_official	354:e67efb2aab0e	1074	* @brief Disable the specified TIM interrupt.
mbed_official	354:e67efb2aab0e	1075	* @param __HANDLE__: TIM handle
mbed_official	354:e67efb2aab0e	1076	* @param __INTERRUPT__: specifies the TIM interrupt sources to be enabled or disabled.
mbed_official	354:e67efb2aab0e	1077	* @retval None
mbed_official	354:e67efb2aab0e	1078	*/
mbed_official	354:e67efb2aab0e	1079	#define __HAL_TIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER &= ~(__INTERRUPT__))
mbed_official	354:e67efb2aab0e	1080
mbed_official	354:e67efb2aab0e	1081	/**
mbed_official	354:e67efb2aab0e	1082	* @brief Disable the specified DMA Channel.
mbed_official	354:e67efb2aab0e	1083	* @param __HANDLE__: TIM handle
mbed_official	354:e67efb2aab0e	1084	* @param __DMA__: specifies the DMA Channel to be enabled or disabled.
mbed_official	354:e67efb2aab0e	1085	* @retval None
mbed_official	354:e67efb2aab0e	1086	*/
mbed_official	354:e67efb2aab0e	1087	#define __HAL_TIM_DISABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER &= ~(__DMA__))
mbed_official	354:e67efb2aab0e	1088
mbed_official	354:e67efb2aab0e	1089	/**
mbed_official	354:e67efb2aab0e	1090	* @brief Get the TIM Channel pending flags.
mbed_official	354:e67efb2aab0e	1091	* @param __HANDLE__: TIM handle
mbed_official	354:e67efb2aab0e	1092	* @param __FLAG__: Get the specified flag.
mbed_official	354:e67efb2aab0e	1093	* @retval The state of FLAG (SET or RESET).
mbed_official	354:e67efb2aab0e	1094	*/
mbed_official	354:e67efb2aab0e	1095	#define __HAL_TIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR &(__FLAG__)) == (__FLAG__))
mbed_official	354:e67efb2aab0e	1096
mbed_official	354:e67efb2aab0e	1097	/**
mbed_official	354:e67efb2aab0e	1098	* @brief Clear the TIM Channel pending flags.
mbed_official	354:e67efb2aab0e	1099	* @param __HANDLE__: TIM handle
mbed_official	354:e67efb2aab0e	1100	* @param __FLAG__: specifies the flag to clear.
mbed_official	354:e67efb2aab0e	1101	* @retval None
mbed_official	354:e67efb2aab0e	1102	*/
mbed_official	354:e67efb2aab0e	1103	#define __HAL_TIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
mbed_official	354:e67efb2aab0e	1104
mbed_official	354:e67efb2aab0e	1105	/**
mbed_official	354:e67efb2aab0e	1106	* @brief Checks whether the specified TIM interrupt has occurred or not.
mbed_official	354:e67efb2aab0e	1107	* @param __HANDLE__: TIM handle
mbed_official	354:e67efb2aab0e	1108	* @param __INTERRUPT__: specifies the TIM interrupt source to check.
mbed_official	354:e67efb2aab0e	1109	* @retval The state of TIM_IT (SET or RESET).
mbed_official	354:e67efb2aab0e	1110	*/
mbed_official	354:e67efb2aab0e	1111	#define __HAL_TIM_GET_ITSTATUS(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->DIER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
mbed_official	354:e67efb2aab0e	1112
mbed_official	354:e67efb2aab0e	1113	/** @brief Clear the TIM interrupt pending bits
mbed_official	354:e67efb2aab0e	1114	* @param __HANDLE__: TIM handle
mbed_official	354:e67efb2aab0e	1115	* @param __INTERRUPT__: specifies the interrupt pending bit to clear.
mbed_official	354:e67efb2aab0e	1116	* @retval None
mbed_official	354:e67efb2aab0e	1117	*/
mbed_official	354:e67efb2aab0e	1118	#define __HAL_TIM_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->SR = ~(__INTERRUPT__))
mbed_official	354:e67efb2aab0e	1119
mbed_official	354:e67efb2aab0e	1120	/** @brief TIM counter direction
mbed_official	354:e67efb2aab0e	1121	* @param __HANDLE__: TIM handle
mbed_official	354:e67efb2aab0e	1122	*/
mbed_official	354:e67efb2aab0e	1123	#define __HAL_TIM_DIRECTION_STATUS(__HANDLE__) (((__HANDLE__)->Instance->CR1 & (TIM_CR1_DIR)) == (TIM_CR1_DIR))
mbed_official	354:e67efb2aab0e	1124
mbed_official	354:e67efb2aab0e	1125	/** @brief Set TIM prescaler
mbed_official	354:e67efb2aab0e	1126	* @param __HANDLE__: TIM handle
mbed_official	354:e67efb2aab0e	1127	* @param __PRESC__: specifies the prescaler value.
mbed_official	354:e67efb2aab0e	1128	* @retval None
mbed_official	354:e67efb2aab0e	1129	*/
mbed_official	354:e67efb2aab0e	1130	#define __HAL_TIM_PRESCALER(__HANDLE__, __PRESC__) ((__HANDLE__)->Instance->PSC = (__PRESC__))
mbed_official	354:e67efb2aab0e	1131
mbed_official	354:e67efb2aab0e	1132	/** @brief Set TIM IC prescaler
mbed_official	354:e67efb2aab0e	1133	* @param __HANDLE__: TIM handle
mbed_official	354:e67efb2aab0e	1134	* @param __CHANNEL__: specifies TIM Channel
mbed_official	354:e67efb2aab0e	1135	* @param __ICPSC__: specifies the prescaler value.
mbed_official	354:e67efb2aab0e	1136	* @retval None
mbed_official	354:e67efb2aab0e	1137	*/
mbed_official	354:e67efb2aab0e	1138	#define __HAL_TIM_SetICPrescalerValue(__HANDLE__, __CHANNEL__, __ICPSC__) \
mbed_official	354:e67efb2aab0e	1139	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 \|= (__ICPSC__)) :\
mbed_official	354:e67efb2aab0e	1140	((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 \|= ((__ICPSC__) << 8)) :\
mbed_official	354:e67efb2aab0e	1141	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 \|= (__ICPSC__)) :\
mbed_official	354:e67efb2aab0e	1142	((__HANDLE__)->Instance->CCMR2 \|= ((__ICPSC__) << 8)))
mbed_official	354:e67efb2aab0e	1143
mbed_official	354:e67efb2aab0e	1144	/** @brief Reset TIM IC prescaler
mbed_official	354:e67efb2aab0e	1145	* @param __HANDLE__: TIM handle
mbed_official	354:e67efb2aab0e	1146	* @param __CHANNEL__: specifies TIM Channel
mbed_official	354:e67efb2aab0e	1147	* @retval None
mbed_official	354:e67efb2aab0e	1148	*/
mbed_official	354:e67efb2aab0e	1149	#define __HAL_TIM_ResetICPrescalerValue(__HANDLE__, __CHANNEL__) \
mbed_official	354:e67efb2aab0e	1150	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC1PSC) :\
mbed_official	354:e67efb2aab0e	1151	((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC2PSC) :\
mbed_official	354:e67efb2aab0e	1152	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC3PSC) :\
mbed_official	354:e67efb2aab0e	1153	((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC4PSC))
mbed_official	354:e67efb2aab0e	1154
mbed_official	354:e67efb2aab0e	1155	/**
mbed_official	354:e67efb2aab0e	1156	* @brief Sets the TIM Capture Compare Register value on runtime without
mbed_official	354:e67efb2aab0e	1157	* calling another time ConfigChannel function.
mbed_official	354:e67efb2aab0e	1158	* @param __HANDLE__: TIM handle.
mbed_official	354:e67efb2aab0e	1159	* @param __CHANNEL__ : TIM Channels to be configured.
mbed_official	354:e67efb2aab0e	1160	* This parameter can be one of the following values:
mbed_official	354:e67efb2aab0e	1161	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	354:e67efb2aab0e	1162	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	354:e67efb2aab0e	1163	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	354:e67efb2aab0e	1164	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	354:e67efb2aab0e	1165	* @param __COMPARE__: specifies the Capture Compare register new value.
mbed_official	354:e67efb2aab0e	1166	* @retval None
mbed_official	354:e67efb2aab0e	1167	*/
mbed_official	354:e67efb2aab0e	1168	#define __HAL_TIM_SetCompare(__HANDLE__, __CHANNEL__, __COMPARE__) \
mbed_official	354:e67efb2aab0e	1169	((__IO uint32_t )(&((__HANDLE__)->Instance->CCR1) + ((__CHANNEL__) >> 2)) = (__COMPARE__))
mbed_official	354:e67efb2aab0e	1170
mbed_official	354:e67efb2aab0e	1171	/**
mbed_official	354:e67efb2aab0e	1172	* @brief Gets the TIM Capture Compare Register value on runtime
mbed_official	354:e67efb2aab0e	1173	* @param __HANDLE__: TIM handle.
mbed_official	354:e67efb2aab0e	1174	* @param __CHANNEL__ : TIM Channel associated with the capture compare register
mbed_official	354:e67efb2aab0e	1175	* This parameter can be one of the following values:
mbed_official	354:e67efb2aab0e	1176	* @arg TIM_CHANNEL_1: get capture/compare 1 register value
mbed_official	354:e67efb2aab0e	1177	* @arg TIM_CHANNEL_2: get capture/compare 2 register value
mbed_official	354:e67efb2aab0e	1178	* @arg TIM_CHANNEL_3: get capture/compare 3 register value
mbed_official	354:e67efb2aab0e	1179	* @arg TIM_CHANNEL_4: get capture/compare 4 register value
mbed_official	354:e67efb2aab0e	1180	* @retval None
mbed_official	354:e67efb2aab0e	1181	*/
mbed_official	354:e67efb2aab0e	1182	#define __HAL_TIM_GetCompare(__HANDLE__, __CHANNEL__) \
mbed_official	354:e67efb2aab0e	1183	((__IO uint32_t )(&((__HANDLE__)->Instance->CCR1) + ((__CHANNEL__) >> 2)))
mbed_official	354:e67efb2aab0e	1184
mbed_official	354:e67efb2aab0e	1185	/**
mbed_official	354:e67efb2aab0e	1186	* @brief Sets the TIM Counter Register value on runtime.
mbed_official	354:e67efb2aab0e	1187	* @param __HANDLE__: TIM handle.
mbed_official	354:e67efb2aab0e	1188	* @param __COUNTER__: specifies the Counter register new value.
mbed_official	354:e67efb2aab0e	1189	* @retval None
mbed_official	354:e67efb2aab0e	1190	*/
mbed_official	354:e67efb2aab0e	1191	#define __HAL_TIM_SetCounter(__HANDLE__, __COUNTER__) ((__HANDLE__)->Instance->CNT = (__COUNTER__))
mbed_official	354:e67efb2aab0e	1192
mbed_official	354:e67efb2aab0e	1193	/**
mbed_official	354:e67efb2aab0e	1194	* @brief Gets the TIM Counter Register value on runtime.
mbed_official	354:e67efb2aab0e	1195	* @param __HANDLE__: TIM handle.
mbed_official	354:e67efb2aab0e	1196	* @retval None
mbed_official	354:e67efb2aab0e	1197	*/
mbed_official	354:e67efb2aab0e	1198	#define __HAL_TIM_GetCounter(__HANDLE__) \
mbed_official	354:e67efb2aab0e	1199	((__HANDLE__)->Instance->CNT)
mbed_official	354:e67efb2aab0e	1200
mbed_official	354:e67efb2aab0e	1201	/**
mbed_official	354:e67efb2aab0e	1202	* @brief Sets the TIM Autoreload Register value on runtime without calling
mbed_official	354:e67efb2aab0e	1203	* another time any Init function.
mbed_official	354:e67efb2aab0e	1204	* @param __HANDLE__: TIM handle.
mbed_official	354:e67efb2aab0e	1205	* @param __AUTORELOAD__: specifies the Counter register new value.
mbed_official	354:e67efb2aab0e	1206	* @retval None
mbed_official	354:e67efb2aab0e	1207	*/
mbed_official	354:e67efb2aab0e	1208	#define __HAL_TIM_SetAutoreload(__HANDLE__, __AUTORELOAD__) \
mbed_official	354:e67efb2aab0e	1209	do{ \
mbed_official	354:e67efb2aab0e	1210	(__HANDLE__)->Instance->ARR = (__AUTORELOAD__); \
mbed_official	354:e67efb2aab0e	1211	(__HANDLE__)->Init.Period = (__AUTORELOAD__); \
mbed_official	354:e67efb2aab0e	1212	} while(0)
mbed_official	354:e67efb2aab0e	1213
mbed_official	354:e67efb2aab0e	1214	/**
mbed_official	354:e67efb2aab0e	1215	* @brief Gets the TIM Autoreload Register value on runtime
mbed_official	354:e67efb2aab0e	1216	* @param __HANDLE__: TIM handle.
mbed_official	354:e67efb2aab0e	1217	* @retval None
mbed_official	354:e67efb2aab0e	1218	*/
mbed_official	354:e67efb2aab0e	1219	#define __HAL_TIM_GetAutoreload(__HANDLE__) \
mbed_official	354:e67efb2aab0e	1220	((__HANDLE__)->Instance->ARR)
mbed_official	354:e67efb2aab0e	1221
mbed_official	354:e67efb2aab0e	1222	/**
mbed_official	354:e67efb2aab0e	1223	* @brief Sets the TIM Clock Division value on runtime without calling
mbed_official	354:e67efb2aab0e	1224	* another time any Init function.
mbed_official	354:e67efb2aab0e	1225	* @param __HANDLE__: TIM handle.
mbed_official	354:e67efb2aab0e	1226	* @param __CKD__: specifies the clock division value.
mbed_official	354:e67efb2aab0e	1227	* This parameter can be one of the following value:
mbed_official	354:e67efb2aab0e	1228	* @arg TIM_CLOCKDIVISION_DIV1
mbed_official	354:e67efb2aab0e	1229	* @arg TIM_CLOCKDIVISION_DIV2
mbed_official	354:e67efb2aab0e	1230	* @arg TIM_CLOCKDIVISION_DIV4
mbed_official	354:e67efb2aab0e	1231	* @retval None
mbed_official	354:e67efb2aab0e	1232	*/
mbed_official	354:e67efb2aab0e	1233	#define __HAL_TIM_SetClockDivision(__HANDLE__, __CKD__) \
mbed_official	354:e67efb2aab0e	1234	do{ \
mbed_official	354:e67efb2aab0e	1235	(__HANDLE__)->Instance->CR1 &= (uint16_t)(~TIM_CR1_CKD); \
mbed_official	354:e67efb2aab0e	1236	(__HANDLE__)->Instance->CR1 \|= (__CKD__); \
mbed_official	354:e67efb2aab0e	1237	(__HANDLE__)->Init.ClockDivision = (__CKD__); \
mbed_official	354:e67efb2aab0e	1238	} while(0)
mbed_official	354:e67efb2aab0e	1239
mbed_official	354:e67efb2aab0e	1240	/**
mbed_official	354:e67efb2aab0e	1241	* @brief Gets the TIM Clock Division value on runtime
mbed_official	354:e67efb2aab0e	1242	* @param __HANDLE__: TIM handle.
mbed_official	354:e67efb2aab0e	1243	* @retval None
mbed_official	354:e67efb2aab0e	1244	*/
mbed_official	354:e67efb2aab0e	1245	#define __HAL_TIM_GetClockDivision(__HANDLE__) \
mbed_official	354:e67efb2aab0e	1246	((__HANDLE__)->Instance->CR1 & TIM_CR1_CKD)
mbed_official	354:e67efb2aab0e	1247
mbed_official	354:e67efb2aab0e	1248	/**
mbed_official	354:e67efb2aab0e	1249	* @brief Sets the TIM Input Capture prescaler on runtime without calling
mbed_official	354:e67efb2aab0e	1250	* another time HAL_TIM_IC_ConfigChannel() function.
mbed_official	354:e67efb2aab0e	1251	* @param __HANDLE__: TIM handle.
mbed_official	354:e67efb2aab0e	1252	* @param __CHANNEL__ : TIM Channels to be configured.
mbed_official	354:e67efb2aab0e	1253	* This parameter can be one of the following values:
mbed_official	354:e67efb2aab0e	1254	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	354:e67efb2aab0e	1255	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	354:e67efb2aab0e	1256	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	354:e67efb2aab0e	1257	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	354:e67efb2aab0e	1258	* @param __ICPSC__: specifies the Input Capture4 prescaler new value.
mbed_official	354:e67efb2aab0e	1259	* This parameter can be one of the following values:
mbed_official	354:e67efb2aab0e	1260	* @arg TIM_ICPSC_DIV1: no prescaler
mbed_official	354:e67efb2aab0e	1261	* @arg TIM_ICPSC_DIV2: capture is done once every 2 events
mbed_official	354:e67efb2aab0e	1262	* @arg TIM_ICPSC_DIV4: capture is done once every 4 events
mbed_official	354:e67efb2aab0e	1263	* @arg TIM_ICPSC_DIV8: capture is done once every 8 events
mbed_official	354:e67efb2aab0e	1264	* @retval None
mbed_official	354:e67efb2aab0e	1265	*/
mbed_official	354:e67efb2aab0e	1266	#define __HAL_TIM_SetICPrescaler(__HANDLE__, __CHANNEL__, __ICPSC__) \
mbed_official	354:e67efb2aab0e	1267	do{ \
mbed_official	354:e67efb2aab0e	1268	__HAL_TIM_ResetICPrescalerValue((__HANDLE__), (__CHANNEL__)); \
mbed_official	354:e67efb2aab0e	1269	__HAL_TIM_SetICPrescalerValue((__HANDLE__), (__CHANNEL__), (__ICPSC__)); \
mbed_official	354:e67efb2aab0e	1270	} while(0)
mbed_official	354:e67efb2aab0e	1271
mbed_official	354:e67efb2aab0e	1272	/**
mbed_official	354:e67efb2aab0e	1273	* @brief Gets the TIM Input Capture prescaler on runtime
mbed_official	354:e67efb2aab0e	1274	* @param __HANDLE__: TIM handle.
mbed_official	354:e67efb2aab0e	1275	* @param __CHANNEL__ : TIM Channels to be configured.
mbed_official	354:e67efb2aab0e	1276	* This parameter can be one of the following values:
mbed_official	354:e67efb2aab0e	1277	* @arg TIM_CHANNEL_1: get input capture 1 prescaler value
mbed_official	354:e67efb2aab0e	1278	* @arg TIM_CHANNEL_2: get input capture 2 prescaler value
mbed_official	354:e67efb2aab0e	1279	* @arg TIM_CHANNEL_3: get input capture 3 prescaler value
mbed_official	354:e67efb2aab0e	1280	* @arg TIM_CHANNEL_4: get input capture 4 prescaler value
mbed_official	354:e67efb2aab0e	1281	* @retval None
mbed_official	354:e67efb2aab0e	1282	*/
mbed_official	354:e67efb2aab0e	1283	#define __HAL_TIM_GetICPrescaler(__HANDLE__, __CHANNEL__) \
mbed_official	354:e67efb2aab0e	1284	(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) :\
mbed_official	354:e67efb2aab0e	1285	((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8) :\
mbed_official	354:e67efb2aab0e	1286	((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) :\
mbed_official	354:e67efb2aab0e	1287	(((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8)
mbed_official	354:e67efb2aab0e	1288
mbed_official	354:e67efb2aab0e	1289	/**
mbed_official	354:e67efb2aab0e	1290	* @}
mbed_official	354:e67efb2aab0e	1291	*/
mbed_official	354:e67efb2aab0e	1292
mbed_official	354:e67efb2aab0e	1293	/* Include TIM HAL Extension module */
mbed_official	354:e67efb2aab0e	1294	#include "stm32l1xx_hal_tim_ex.h"
mbed_official	354:e67efb2aab0e	1295
mbed_official	354:e67efb2aab0e	1296	/* Exported functions --------------------------------------------------------*/
mbed_official	354:e67efb2aab0e	1297	/** @addtogroup TIM_Exported_Functions
mbed_official	354:e67efb2aab0e	1298	* @{
mbed_official	354:e67efb2aab0e	1299	*/
mbed_official	354:e67efb2aab0e	1300
mbed_official	354:e67efb2aab0e	1301	/** @addtogroup TIM_Exported_Functions_Group1
mbed_official	354:e67efb2aab0e	1302	* @{
mbed_official	354:e67efb2aab0e	1303	*/
mbed_official	354:e67efb2aab0e	1304	/* Time Base functions ********************************************************/
mbed_official	354:e67efb2aab0e	1305	HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1306	HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1307	void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1308	void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1309	/* Blocking mode: Polling */
mbed_official	354:e67efb2aab0e	1310	HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1311	HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1312	/* Non-Blocking mode: Interrupt */
mbed_official	354:e67efb2aab0e	1313	HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1314	HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1315	/* Non-Blocking mode: DMA */
mbed_official	354:e67efb2aab0e	1316	HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef htim, uint32_t pData, uint16_t Length);
mbed_official	354:e67efb2aab0e	1317	HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1318
mbed_official	354:e67efb2aab0e	1319	/**
mbed_official	354:e67efb2aab0e	1320	* @}
mbed_official	354:e67efb2aab0e	1321	*/
mbed_official	354:e67efb2aab0e	1322
mbed_official	354:e67efb2aab0e	1323	/** @addtogroup TIM_Exported_Functions_Group2
mbed_official	354:e67efb2aab0e	1324	* @{
mbed_official	354:e67efb2aab0e	1325	*/
mbed_official	354:e67efb2aab0e	1326	/* Timer Output Compare functions **********************************************/
mbed_official	354:e67efb2aab0e	1327	HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1328	HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1329	void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1330	void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1331	/* Blocking mode: Polling */
mbed_official	354:e67efb2aab0e	1332	HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1333	HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1334	/* Non-Blocking mode: Interrupt */
mbed_official	354:e67efb2aab0e	1335	HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1336	HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1337	/* Non-Blocking mode: DMA */
mbed_official	354:e67efb2aab0e	1338	HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
mbed_official	354:e67efb2aab0e	1339	HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1340
mbed_official	354:e67efb2aab0e	1341	/**
mbed_official	354:e67efb2aab0e	1342	* @}
mbed_official	354:e67efb2aab0e	1343	*/
mbed_official	354:e67efb2aab0e	1344
mbed_official	354:e67efb2aab0e	1345	/** @addtogroup TIM_Exported_Functions_Group3
mbed_official	354:e67efb2aab0e	1346	* @{
mbed_official	354:e67efb2aab0e	1347	*/
mbed_official	354:e67efb2aab0e	1348	/* Timer PWM functions *********************************************************/
mbed_official	354:e67efb2aab0e	1349	HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1350	HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1351	void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1352	void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1353	/* Blocking mode: Polling */
mbed_official	354:e67efb2aab0e	1354	HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1355	HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1356	/* Non-Blocking mode: Interrupt */
mbed_official	354:e67efb2aab0e	1357	HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1358	HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1359	/* Non-Blocking mode: DMA */
mbed_official	354:e67efb2aab0e	1360	HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
mbed_official	354:e67efb2aab0e	1361	HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1362	/**
mbed_official	354:e67efb2aab0e	1363	* @}
mbed_official	354:e67efb2aab0e	1364	*/
mbed_official	354:e67efb2aab0e	1365
mbed_official	354:e67efb2aab0e	1366	/** @addtogroup TIM_Exported_Functions_Group4
mbed_official	354:e67efb2aab0e	1367	* @{
mbed_official	354:e67efb2aab0e	1368	*/
mbed_official	354:e67efb2aab0e	1369	/* Timer Input Capture functions ***********************************************/
mbed_official	354:e67efb2aab0e	1370	HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1371	HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1372	void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1373	void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1374	/* Blocking mode: Polling */
mbed_official	354:e67efb2aab0e	1375	HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1376	HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1377	/* Non-Blocking mode: Interrupt */
mbed_official	354:e67efb2aab0e	1378	HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1379	HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1380	/* Non-Blocking mode: DMA */
mbed_official	354:e67efb2aab0e	1381	HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
mbed_official	354:e67efb2aab0e	1382	HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1383	/**
mbed_official	354:e67efb2aab0e	1384	* @}
mbed_official	354:e67efb2aab0e	1385	*/
mbed_official	354:e67efb2aab0e	1386
mbed_official	354:e67efb2aab0e	1387	/** @addtogroup TIM_Exported_Functions_Group5
mbed_official	354:e67efb2aab0e	1388	* @{
mbed_official	354:e67efb2aab0e	1389	*/
mbed_official	354:e67efb2aab0e	1390	/* Timer One Pulse functions ***************************************************/
mbed_official	354:e67efb2aab0e	1391	HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode);
mbed_official	354:e67efb2aab0e	1392	HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1393	void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1394	void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1395	/* Blocking mode: Polling */
mbed_official	354:e67efb2aab0e	1396	HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
mbed_official	354:e67efb2aab0e	1397	HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
mbed_official	354:e67efb2aab0e	1398	/* Non-Blocking mode: Interrupt */
mbed_official	354:e67efb2aab0e	1399	HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
mbed_official	354:e67efb2aab0e	1400	HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
mbed_official	354:e67efb2aab0e	1401	/**
mbed_official	354:e67efb2aab0e	1402	* @}
mbed_official	354:e67efb2aab0e	1403	*/
mbed_official	354:e67efb2aab0e	1404
mbed_official	354:e67efb2aab0e	1405	/** @addtogroup TIM_Exported_Functions_Group6
mbed_official	354:e67efb2aab0e	1406	* @{
mbed_official	354:e67efb2aab0e	1407	*/
mbed_official	354:e67efb2aab0e	1408	/* Timer Encoder functions *****************************************************/
mbed_official	354:e67efb2aab0e	1409	HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef htim, TIM_Encoder_InitTypeDef sConfig);
mbed_official	354:e67efb2aab0e	1410	HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1411	void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1412	void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1413	/* Blocking mode: Polling */
mbed_official	354:e67efb2aab0e	1414	HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1415	HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1416	/* Non-Blocking mode: Interrupt */
mbed_official	354:e67efb2aab0e	1417	HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1418	HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1419	/* Non-Blocking mode: DMA */
mbed_official	354:e67efb2aab0e	1420	HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData1, uint32_t *pData2, uint16_t Length);
mbed_official	354:e67efb2aab0e	1421	HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1422
mbed_official	354:e67efb2aab0e	1423	/**
mbed_official	354:e67efb2aab0e	1424	* @}
mbed_official	354:e67efb2aab0e	1425	*/
mbed_official	354:e67efb2aab0e	1426
mbed_official	354:e67efb2aab0e	1427	/** @addtogroup TIM_Exported_Functions_Group7
mbed_official	354:e67efb2aab0e	1428	* @{
mbed_official	354:e67efb2aab0e	1429	*/
mbed_official	354:e67efb2aab0e	1430	/* Interrupt Handler functions **********************************************/
mbed_official	354:e67efb2aab0e	1431	void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1432	/**
mbed_official	354:e67efb2aab0e	1433	* @}
mbed_official	354:e67efb2aab0e	1434	*/
mbed_official	354:e67efb2aab0e	1435
mbed_official	354:e67efb2aab0e	1436	/** @addtogroup TIM_Exported_Functions_Group8
mbed_official	354:e67efb2aab0e	1437	* @{
mbed_official	354:e67efb2aab0e	1438	*/
mbed_official	354:e67efb2aab0e	1439	/* Control functions *********************************************************/
mbed_official	354:e67efb2aab0e	1440	HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef htim, TIM_OC_InitTypeDef sConfig, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1441	HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef htim, TIM_OC_InitTypeDef sConfig, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1442	HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef htim, TIM_IC_InitTypeDef sConfig, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1443	HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef htim, TIM_OnePulse_InitTypeDef sConfig, uint32_t OutputChannel, uint32_t InputChannel);
mbed_official	354:e67efb2aab0e	1444	HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef htim, TIM_ClearInputConfigTypeDef sClearInputConfig, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1445	HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef htim, TIM_ClockConfigTypeDef sClockSourceConfig);
mbed_official	354:e67efb2aab0e	1446	HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection);
mbed_official	354:e67efb2aab0e	1447	HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef htim, TIM_SlaveConfigTypeDef sSlaveConfig);
mbed_official	354:e67efb2aab0e	1448	HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \
mbed_official	354:e67efb2aab0e	1449	uint32_t *BurstBuffer, uint32_t BurstLength);
mbed_official	354:e67efb2aab0e	1450	HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
mbed_official	354:e67efb2aab0e	1451	HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \
mbed_official	354:e67efb2aab0e	1452	uint32_t *BurstBuffer, uint32_t BurstLength);
mbed_official	354:e67efb2aab0e	1453	HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
mbed_official	354:e67efb2aab0e	1454	HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource);
mbed_official	354:e67efb2aab0e	1455	uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel);
mbed_official	354:e67efb2aab0e	1456
mbed_official	354:e67efb2aab0e	1457	/**
mbed_official	354:e67efb2aab0e	1458	* @}
mbed_official	354:e67efb2aab0e	1459	*/
mbed_official	354:e67efb2aab0e	1460
mbed_official	354:e67efb2aab0e	1461	/** @addtogroup TIM_Exported_Functions_Group9
mbed_official	354:e67efb2aab0e	1462	* @{
mbed_official	354:e67efb2aab0e	1463	*/
mbed_official	354:e67efb2aab0e	1464	/* Callback in non blocking modes (Interrupt and DMA) *************************/
mbed_official	354:e67efb2aab0e	1465	void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1466	void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1467	void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1468	void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1469	void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1470	void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1471	/**
mbed_official	354:e67efb2aab0e	1472	* @}
mbed_official	354:e67efb2aab0e	1473	*/
mbed_official	354:e67efb2aab0e	1474
mbed_official	354:e67efb2aab0e	1475	/** @addtogroup TIM_Exported_Functions_Group10
mbed_official	354:e67efb2aab0e	1476	* @{
mbed_official	354:e67efb2aab0e	1477	*/
mbed_official	354:e67efb2aab0e	1478	/* Peripheral State functions **************************************************/
mbed_official	354:e67efb2aab0e	1479	HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1480	HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1481	HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1482	HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1483	HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1484	HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim);
mbed_official	354:e67efb2aab0e	1485
mbed_official	354:e67efb2aab0e	1486	/**
mbed_official	354:e67efb2aab0e	1487	* @}
mbed_official	354:e67efb2aab0e	1488	*/
mbed_official	354:e67efb2aab0e	1489
mbed_official	354:e67efb2aab0e	1490	/**
mbed_official	354:e67efb2aab0e	1491	* @}
mbed_official	354:e67efb2aab0e	1492	*/
mbed_official	354:e67efb2aab0e	1493
mbed_official	354:e67efb2aab0e	1494	/**
mbed_official	354:e67efb2aab0e	1495	* @}
mbed_official	354:e67efb2aab0e	1496	*/
mbed_official	354:e67efb2aab0e	1497
mbed_official	354:e67efb2aab0e	1498	/**
mbed_official	354:e67efb2aab0e	1499	* @}
mbed_official	354:e67efb2aab0e	1500	*/
mbed_official	354:e67efb2aab0e	1501
mbed_official	354:e67efb2aab0e	1502	#ifdef __cplusplus
mbed_official	354:e67efb2aab0e	1503	}
mbed_official	354:e67efb2aab0e	1504	#endif
mbed_official	354:e67efb2aab0e	1505
mbed_official	354:e67efb2aab0e	1506	#endif /* __STM32L1xx_HAL_TIM_H */
mbed_official	354:e67efb2aab0e	1507
mbed_official	354:e67efb2aab0e	1508	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/