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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_rcc.c@579:53297373a894, 2015-07-01 (annotated)

Committer:
mbed_official
Date:
Wed Jul 01 09:45:11 2015 +0100
Revision:
579:53297373a894
Parent:
394:83f921546702 
Synchronized with git revision d5b4d2ab9c47edb4dc5776e7177b0c2263459081



Full URL: https://github.com/mbedmicro/mbed/commit/d5b4d2ab9c47edb4dc5776e7177b0c2263459081/



Initial version of drivers for SAMR21

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 354:e67efb2aab0e 1 /**
mbed_official 354:e67efb2aab0e 2 ******************************************************************************
mbed_official 354:e67efb2aab0e 3 * @file stm32l1xx_hal_rcc.c
mbed_official 354:e67efb2aab0e 4 * @author MCD Application Team
mbed_official 354:e67efb2aab0e 5 * @version V1.0.0
mbed_official 354:e67efb2aab0e 6 * @date 5-September-2014
mbed_official 354:e67efb2aab0e 7 * @brief RCC HAL module driver.
mbed_official 354:e67efb2aab0e 8 * This file provides firmware functions to manage the following
mbed_official 354:e67efb2aab0e 9 * functionalities of the Reset and Clock Control (RCC) peripheral:
mbed_official 354:e67efb2aab0e 10 * + Initialization and de-initialization functions
mbed_official 354:e67efb2aab0e 11 * + Peripheral Control functions
mbed_official 354:e67efb2aab0e 12 *
mbed_official 354:e67efb2aab0e 13 @verbatim
mbed_official 354:e67efb2aab0e 14 ==============================================================================
mbed_official 354:e67efb2aab0e 15 ##### RCC specific features #####
mbed_official 354:e67efb2aab0e 16 ==============================================================================
mbed_official 354:e67efb2aab0e 17 [..]
mbed_official 354:e67efb2aab0e 18 After reset the device is running from multispeed internal oscillator clock
mbed_official 354:e67efb2aab0e 19 (MSI 2.097MHz) with Flash 0 wait state and Flash prefetch buffer is disabled,
mbed_official 354:e67efb2aab0e 20 and all peripherals are off except internal SRAM, Flash and JTAG.
mbed_official 354:e67efb2aab0e 21 (+) There is no prescaler on High speed (AHB) and Low speed (APB) busses;
mbed_official 354:e67efb2aab0e 22 all peripherals mapped on these busses are running at MSI speed.
mbed_official 354:e67efb2aab0e 23 (+) The clock for all peripherals is switched off, except the SRAM and FLASH.
mbed_official 354:e67efb2aab0e 24 (+) All GPIOs are in input floating state, except the JTAG pins which
mbed_official 354:e67efb2aab0e 25 are assigned to be used for debug purpose.
mbed_official 354:e67efb2aab0e 26 [..] Once the device started from reset, the user application has to:
mbed_official 354:e67efb2aab0e 27 (+) Configure the clock source to be used to drive the System clock
mbed_official 354:e67efb2aab0e 28 (if the application needs higher frequency/performance)
mbed_official 354:e67efb2aab0e 29 (+) Configure the System clock frequency and Flash settings
mbed_official 354:e67efb2aab0e 30 (+) Configure the AHB and APB busses prescalers
mbed_official 354:e67efb2aab0e 31 (+) Enable the clock for the peripheral(s) to be used
mbed_official 354:e67efb2aab0e 32 (+) Configure the clock source(s) for peripherals whose clocks are not
mbed_official 354:e67efb2aab0e 33 derived from the System clock (I2S, RTC, ADC, USB OTG FS/SDIO/RNG)
mbed_official 354:e67efb2aab0e 34 (*) SDIO only for STM32L1xxxD devices
mbed_official 354:e67efb2aab0e 35 @endverbatim
mbed_official 354:e67efb2aab0e 36 ******************************************************************************
mbed_official 354:e67efb2aab0e 37 * @attention
mbed_official 354:e67efb2aab0e 38 *
mbed_official 354:e67efb2aab0e 39 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 354:e67efb2aab0e 40 *
mbed_official 354:e67efb2aab0e 41 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 354:e67efb2aab0e 42 * are permitted provided that the following conditions are met:
mbed_official 354:e67efb2aab0e 43 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 354:e67efb2aab0e 44 * this list of conditions and the following disclaimer.
mbed_official 354:e67efb2aab0e 45 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 354:e67efb2aab0e 46 * this list of conditions and the following disclaimer in the documentation
mbed_official 354:e67efb2aab0e 47 * and/or other materials provided with the distribution.
mbed_official 354:e67efb2aab0e 48 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 354:e67efb2aab0e 49 * may be used to endorse or promote products derived from this software
mbed_official 354:e67efb2aab0e 50 * without specific prior written permission.
mbed_official 354:e67efb2aab0e 51 *
mbed_official 354:e67efb2aab0e 52 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 354:e67efb2aab0e 53 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 354:e67efb2aab0e 54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 354:e67efb2aab0e 55 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 354:e67efb2aab0e 56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 354:e67efb2aab0e 57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 354:e67efb2aab0e 58 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 354:e67efb2aab0e 59 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 354:e67efb2aab0e 60 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 354:e67efb2aab0e 61 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 354:e67efb2aab0e 62 *
mbed_official 354:e67efb2aab0e 63 ******************************************************************************
mbed_official 354:e67efb2aab0e 64 */
mbed_official 354:e67efb2aab0e 65
mbed_official 354:e67efb2aab0e 66 /* Includes ------------------------------------------------------------------*/
mbed_official 354:e67efb2aab0e 67 #include "stm32l1xx_hal.h"
mbed_official 354:e67efb2aab0e 68
mbed_official 354:e67efb2aab0e 69 /** @addtogroup STM32L1xx_HAL_Driver
mbed_official 354:e67efb2aab0e 70 * @{
mbed_official 354:e67efb2aab0e 71 */
mbed_official 354:e67efb2aab0e 72
mbed_official 354:e67efb2aab0e 73 /** @defgroup RCC RCC
mbed_official 354:e67efb2aab0e 74 * @brief RCC HAL module driver
mbed_official 354:e67efb2aab0e 75 * @{
mbed_official 354:e67efb2aab0e 76 */
mbed_official 354:e67efb2aab0e 77
mbed_official 354:e67efb2aab0e 78 #ifdef HAL_RCC_MODULE_ENABLED
mbed_official 354:e67efb2aab0e 79
mbed_official 354:e67efb2aab0e 80 /* Private typedef -----------------------------------------------------------*/
mbed_official 354:e67efb2aab0e 81 /* Private define ------------------------------------------------------------*/
mbed_official 354:e67efb2aab0e 82 /** @defgroup RCC_Private_Defines RCC Private Defines
mbed_official 354:e67efb2aab0e 83 * @{
mbed_official 354:e67efb2aab0e 84 */
mbed_official 354:e67efb2aab0e 85
mbed_official 354:e67efb2aab0e 86 #define HSE_TIMEOUT_VALUE HSE_STARTUP_TIMEOUT
mbed_official 354:e67efb2aab0e 87 #define MSI_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */
mbed_official 354:e67efb2aab0e 88 #define HSI_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */
mbed_official 354:e67efb2aab0e 89 #define LSI_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */
mbed_official 354:e67efb2aab0e 90 #define PLL_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */
mbed_official 354:e67efb2aab0e 91 #define CLOCKSWITCH_TIMEOUT_VALUE ((uint32_t)5000) /* 5 s */
mbed_official 354:e67efb2aab0e 92
mbed_official 354:e67efb2aab0e 93 /**
mbed_official 354:e67efb2aab0e 94 * @}
mbed_official 354:e67efb2aab0e 95 */
mbed_official 354:e67efb2aab0e 96
mbed_official 354:e67efb2aab0e 97 /* Private macro -------------------------------------------------------------*/
mbed_official 354:e67efb2aab0e 98 /** @defgroup RCC_Private_Macros RCC Private Macros
mbed_official 354:e67efb2aab0e 99 * @{
mbed_official 354:e67efb2aab0e 100 */
mbed_official 354:e67efb2aab0e 101
mbed_official 354:e67efb2aab0e 102 #define __MCO1_CLK_ENABLE() __GPIOA_CLK_ENABLE()
mbed_official 354:e67efb2aab0e 103 #define MCO1_GPIO_PORT GPIOA
mbed_official 354:e67efb2aab0e 104 #define MCO1_PIN GPIO_PIN_8
mbed_official 354:e67efb2aab0e 105
mbed_official 354:e67efb2aab0e 106 /**
mbed_official 354:e67efb2aab0e 107 * @}
mbed_official 354:e67efb2aab0e 108 */
mbed_official 354:e67efb2aab0e 109
mbed_official 354:e67efb2aab0e 110 /* Private variables ---------------------------------------------------------*/
mbed_official 354:e67efb2aab0e 111 /** @defgroup RCC_Private_Variables RCC Private Variables
mbed_official 354:e67efb2aab0e 112 * @{
mbed_official 354:e67efb2aab0e 113 */
mbed_official 354:e67efb2aab0e 114 const uint8_t aAPBAHBPrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9};
mbed_official 354:e67efb2aab0e 115 const uint8_t aPLLDivisionFactorTable[4] = {1, 2, 3, 4};
mbed_official 354:e67efb2aab0e 116 const uint8_t aPLLMulFactorTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
mbed_official 354:e67efb2aab0e 117
mbed_official 354:e67efb2aab0e 118 /**
mbed_official 354:e67efb2aab0e 119 * @}
mbed_official 354:e67efb2aab0e 120 */
mbed_official 354:e67efb2aab0e 121
mbed_official 354:e67efb2aab0e 122 /* Private function prototypes -----------------------------------------------*/
mbed_official 354:e67efb2aab0e 123 /* Private functions ---------------------------------------------------------*/
mbed_official 354:e67efb2aab0e 124
mbed_official 354:e67efb2aab0e 125 /** @defgroup RCC_Private_Functions RCC Exported Functions
mbed_official 354:e67efb2aab0e 126 * @{
mbed_official 354:e67efb2aab0e 127 */
mbed_official 354:e67efb2aab0e 128
mbed_official 354:e67efb2aab0e 129 /** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions
mbed_official 354:e67efb2aab0e 130 * @brief Initialization and Configuration functions
mbed_official 354:e67efb2aab0e 131 *
mbed_official 354:e67efb2aab0e 132 @verbatim
mbed_official 354:e67efb2aab0e 133 ===============================================================================
mbed_official 354:e67efb2aab0e 134 ##### Initialization and de-initialization functions #####
mbed_official 354:e67efb2aab0e 135 ===============================================================================
mbed_official 354:e67efb2aab0e 136 [..]
mbed_official 354:e67efb2aab0e 137 This section provides functions allowing to configure the internal/external oscillators
mbed_official 354:e67efb2aab0e 138 (MSI, HSE, HSI, LSE, LSI, PLL, CSS and MCO) and the System busses clocks (SYSCLK, AHB, APB1
mbed_official 354:e67efb2aab0e 139 and APB2).
mbed_official 354:e67efb2aab0e 140
mbed_official 354:e67efb2aab0e 141 [..] Internal/external clock and PLL configuration
mbed_official 354:e67efb2aab0e 142 (#) MSI (Multispeed internal), Seven frequency ranges are available: 65.536 kHz,
mbed_official 354:e67efb2aab0e 143 131.072 kHz, 262.144 kHz, 524.288 kHz, 1.048 MHz, 2.097 MHz (default value) and 4.194 MHz.
mbed_official 354:e67efb2aab0e 144
mbed_official 354:e67efb2aab0e 145 (#) HSI (high-speed internal), 16 MHz factory-trimmed RC used directly or through
mbed_official 354:e67efb2aab0e 146 the PLL as System clock source.
mbed_official 354:e67efb2aab0e 147
mbed_official 354:e67efb2aab0e 148 (#) LSI (low-speed internal), ~37 KHz low consumption RC used as IWDG and/or RTC
mbed_official 354:e67efb2aab0e 149 clock source.
mbed_official 354:e67efb2aab0e 150
mbed_official 354:e67efb2aab0e 151 (#) HSE (high-speed external), 1 to 24 MHz crystal oscillator used directly or
mbed_official 354:e67efb2aab0e 152 through the PLL as System clock source. Can be used also as RTC clock source.
mbed_official 354:e67efb2aab0e 153
mbed_official 354:e67efb2aab0e 154 (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source.
mbed_official 354:e67efb2aab0e 155
mbed_official 354:e67efb2aab0e 156 (#) PLL (clocked by HSI or HSE), featuring two different output clocks:
mbed_official 354:e67efb2aab0e 157 (++) The first output is used to generate the high speed system clock (up to 32 MHz)
mbed_official 354:e67efb2aab0e 158 (++) The second output is used to generate the clock for the USB OTG FS (48 MHz)
mbed_official 354:e67efb2aab0e 159
mbed_official 354:e67efb2aab0e 160 (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE()
mbed_official 354:e67efb2aab0e 161 and if a HSE clock failure occurs(HSE used directly or through PLL as System
mbed_official 354:e67efb2aab0e 162 clock source), the System clockis automatically switched to MSI and an interrupt
mbed_official 354:e67efb2aab0e 163 is generated if enabled. The interrupt is linked to the Cortex-M3 NMI
mbed_official 354:e67efb2aab0e 164 (Non-Maskable Interrupt) exception vector.
mbed_official 354:e67efb2aab0e 165
mbed_official 354:e67efb2aab0e 166 (#) MCO1 (microcontroller clock output), used to output SYSCLK, HSI, LSI, MSI, LSE,
mbed_official 354:e67efb2aab0e 167 HSE or PLL clock (through a configurable prescaler) on PA8 pin.
mbed_official 354:e67efb2aab0e 168
mbed_official 354:e67efb2aab0e 169 [..] System, AHB and APB busses clocks configuration
mbed_official 354:e67efb2aab0e 170 (#) Several clock sources can be used to drive the System clock (SYSCLK): MSI, HSI,
mbed_official 354:e67efb2aab0e 171 HSE and PLL.
mbed_official 354:e67efb2aab0e 172 The AHB clock (HCLK) is derived from System clock through configurable
mbed_official 354:e67efb2aab0e 173 prescaler and used to clock the CPU, memory and peripherals mapped
mbed_official 354:e67efb2aab0e 174 on AHB bus (DMA, GPIO...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived
mbed_official 354:e67efb2aab0e 175 from AHB clock through configurable prescalers and used to clock
mbed_official 354:e67efb2aab0e 176 the peripherals mapped on these busses. You can use
mbed_official 354:e67efb2aab0e 177 "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks.
mbed_official 354:e67efb2aab0e 178
mbed_official 354:e67efb2aab0e 179 -@- All the peripheral clocks are derived from the System clock (SYSCLK) except:
mbed_official 354:e67efb2aab0e 180 (+@) RTC: RTC clock can be derived either from the LSI, LSE or HSE clock
mbed_official 354:e67efb2aab0e 181 divided by 2 to 16. You have to use __HAL_RCC_RTC_CONFIG() and __HAL_RCC_RTC_ENABLE()
mbed_official 354:e67efb2aab0e 182 macros to configure this clock.
mbed_official 354:e67efb2aab0e 183 (+@) LCD: LCD clock can be derived either from the LSI, LSE or HSE clock
mbed_official 354:e67efb2aab0e 184 divided by 2 to 16. You have to use __HAL_RCC_LCD_CONFIG()
mbed_official 354:e67efb2aab0e 185 macros to configure this clock.
mbed_official 354:e67efb2aab0e 186 (+@) USB OTG FS and RTC: USB OTG FS require a frequency equal to 48 MHz
mbed_official 354:e67efb2aab0e 187 to work correctly. This clock is derived of the main PLL through PLL Multiplier.
mbed_official 354:e67efb2aab0e 188 (+@) IWDG clock which is always the LSI clock.
mbed_official 354:e67efb2aab0e 189
mbed_official 354:e67efb2aab0e 190 (#) The maximum frequency of the SYSCLK and HCLK is 32 MHz, PCLK2 32 MHz
mbed_official 354:e67efb2aab0e 191 and PCLK1 32 MHz. Depending on the device voltage range, the maximum
mbed_official 354:e67efb2aab0e 192 frequency should be adapted accordingly:
mbed_official 354:e67efb2aab0e 193 +----------------------------------------------------------------------+
mbed_official 354:e67efb2aab0e 194 | Latency | HCLK clock frequency (MHz) |
mbed_official 354:e67efb2aab0e 195 | |------------------------------------------------------|
mbed_official 354:e67efb2aab0e 196 | | voltage range 1 | voltage range 2 | voltage range 3 |
mbed_official 354:e67efb2aab0e 197 | | 1.8 V | 1.5 V | 1.2 V |
mbed_official 354:e67efb2aab0e 198 |---------------|------------------|-----------------|-----------------|
mbed_official 354:e67efb2aab0e 199 |0WS(1CPU cycle)| 0 < HCLK <= 16 | 0 < HCLK <= 8 | 0 < HCLK <= 2 |
mbed_official 354:e67efb2aab0e 200 |---------------|------------------|-----------------|-----------------|
mbed_official 354:e67efb2aab0e 201 |1WS(2CPU cycle)| 16 < HCLK <= 32 | 8 < HCLK <= 16 | 2 < HCLK <= 4 |
mbed_official 354:e67efb2aab0e 202 +----------------------------------------------------------------------+
mbed_official 354:e67efb2aab0e 203 (#) The following table gives the different clock source frequencies depending on the product
mbed_official 354:e67efb2aab0e 204 voltage range:
mbed_official 354:e67efb2aab0e 205 +------------------------------------------------------------------------------------------+
mbed_official 354:e67efb2aab0e 206 | Product voltage | Clock frequency |
mbed_official 354:e67efb2aab0e 207 | |------------------|-----------------------------|-----------------------|
mbed_official 354:e67efb2aab0e 208 | range | MSI | HSI | HSE | PLL |
mbed_official 354:e67efb2aab0e 209 |-----------------|---------|--------|-----------------------------|-----------------------|
mbed_official 354:e67efb2aab0e 210 | Range 1 (1.8 V) | 4.2 MHz | 16 MHz | HSE 32 MHz (external clock) | 32 MHz |
mbed_official 354:e67efb2aab0e 211 | | | | or 24 MHz (crystal) | (PLLVCO max = 96 MHz) |
mbed_official 354:e67efb2aab0e 212 |-----------------|---------|--------|-----------------------------|-----------------------|
mbed_official 354:e67efb2aab0e 213 | Range 2 (1.5 V) | 4.2 MHz | 16 MHz | 16 MHz | 16 MHz |
mbed_official 354:e67efb2aab0e 214 | | | | | (PLLVCO max = 48 MHz) |
mbed_official 354:e67efb2aab0e 215 |-----------------|---------|--------|-----------------------------|-----------------------|
mbed_official 354:e67efb2aab0e 216 | Range 3 (1.2 V) | 4.2 MHz | NA | 8 MHz | 4 MHz |
mbed_official 354:e67efb2aab0e 217 | | | | | (PLLVCO max = 24 MHz) |
mbed_official 354:e67efb2aab0e 218 +------------------------------------------------------------------------------------------+
mbed_official 354:e67efb2aab0e 219
mbed_official 354:e67efb2aab0e 220 @endverbatim
mbed_official 354:e67efb2aab0e 221 * @{
mbed_official 354:e67efb2aab0e 222 */
mbed_official 354:e67efb2aab0e 223
mbed_official 354:e67efb2aab0e 224 /**
mbed_official 354:e67efb2aab0e 225 * @brief Resets the RCC clock configuration to the default reset state.
mbed_official 354:e67efb2aab0e 226 * @note The default reset state of the clock configuration is given below:
mbed_official 354:e67efb2aab0e 227 * - MSI ON and used as system clock source
mbed_official 354:e67efb2aab0e 228 * - HSI, HSE and PLL OFF
mbed_official 354:e67efb2aab0e 229 * - AHB, APB1 and APB2 prescaler set to 1.
mbed_official 354:e67efb2aab0e 230 * - CSS and MCO1 OFF
mbed_official 354:e67efb2aab0e 231 * - All interrupts disabled
mbed_official 354:e67efb2aab0e 232 * @note This function doesn't modify the configuration of the
mbed_official 354:e67efb2aab0e 233 * - Peripheral clocks
mbed_official 354:e67efb2aab0e 234 * - LSI, LSE and RTC clocks
mbed_official 354:e67efb2aab0e 235 * @retval None
mbed_official 354:e67efb2aab0e 236 */
mbed_official 354:e67efb2aab0e 237 void HAL_RCC_DeInit(void)
mbed_official 354:e67efb2aab0e 238 {
mbed_official 354:e67efb2aab0e 239 /* Set MSION bit */
mbed_official 354:e67efb2aab0e 240 SET_BIT(RCC->CR, RCC_CR_MSION);
mbed_official 354:e67efb2aab0e 241
mbed_official 354:e67efb2aab0e 242 /* Switch SYSCLK to MSI*/
mbed_official 354:e67efb2aab0e 243 CLEAR_BIT(RCC->CFGR, RCC_CFGR_SW);
mbed_official 354:e67efb2aab0e 244
mbed_official 354:e67efb2aab0e 245 /* Reset HSION, HSEON, CSSON, HSEBYP & PLLON bits */
mbed_official 354:e67efb2aab0e 246 CLEAR_BIT(RCC->CR, RCC_CR_HSION | RCC_CR_HSEON | RCC_CR_CSSON | RCC_CR_PLLON | RCC_CR_HSEBYP);
mbed_official 354:e67efb2aab0e 247
mbed_official 354:e67efb2aab0e 248 /* Reset CFGR register */
mbed_official 354:e67efb2aab0e 249 CLEAR_REG(RCC->CFGR);
mbed_official 354:e67efb2aab0e 250
mbed_official 354:e67efb2aab0e 251 /* Set MSIClockRange & MSITRIM[4:0] bits to the reset value */
mbed_official 354:e67efb2aab0e 252 MODIFY_REG(RCC->ICSCR, (RCC_ICSCR_MSIRANGE | RCC_ICSCR_MSITRIM), (((uint32_t)0 << POSITION_VAL(RCC_ICSCR_MSITRIM)) | RCC_ICSCR_MSIRANGE_5));
mbed_official 354:e67efb2aab0e 253
mbed_official 354:e67efb2aab0e 254 /* Set HSITRIM bits to the reset value */
mbed_official 354:e67efb2aab0e 255 MODIFY_REG(RCC->ICSCR, RCC_ICSCR_HSITRIM, ((uint32_t)0x10 << POSITION_VAL(RCC_ICSCR_HSITRIM)));
mbed_official 354:e67efb2aab0e 256
mbed_official 354:e67efb2aab0e 257 /* Disable all interrupts */
mbed_official 354:e67efb2aab0e 258 CLEAR_REG(RCC->CIR);
mbed_official 354:e67efb2aab0e 259 }
mbed_official 354:e67efb2aab0e 260
mbed_official 354:e67efb2aab0e 261 /**
mbed_official 354:e67efb2aab0e 262 * @brief Initializes the RCC Oscillators according to the specified parameters in the
mbed_official 354:e67efb2aab0e 263 * RCC_OscInitTypeDef.
mbed_official 354:e67efb2aab0e 264 * @param RCC_OscInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official 354:e67efb2aab0e 265 * contains the configuration information for the RCC Oscillators.
mbed_official 354:e67efb2aab0e 266 * @note The PLL is not disabled when used as system clock.
mbed_official 354:e67efb2aab0e 267 * @retval HAL status
mbed_official 354:e67efb2aab0e 268 */
mbed_official 354:e67efb2aab0e 269 HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
mbed_official 354:e67efb2aab0e 270 {
mbed_official 354:e67efb2aab0e 271 uint32_t tickstart = 0;
mbed_official 354:e67efb2aab0e 272
mbed_official 354:e67efb2aab0e 273 /* Check the parameters */
mbed_official 354:e67efb2aab0e 274 assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
mbed_official 354:e67efb2aab0e 275
mbed_official 354:e67efb2aab0e 276 /*------------------------------- HSE Configuration ------------------------*/
mbed_official 354:e67efb2aab0e 277 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
mbed_official 354:e67efb2aab0e 278 {
mbed_official 354:e67efb2aab0e 279 /* Check the parameters */
mbed_official 354:e67efb2aab0e 280 assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
mbed_official 354:e67efb2aab0e 281 /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
mbed_official 354:e67efb2aab0e 282 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE)
mbed_official 354:e67efb2aab0e 283 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
mbed_official 354:e67efb2aab0e 284 {
mbed_official 354:e67efb2aab0e 285 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState != RCC_HSE_ON))
mbed_official 354:e67efb2aab0e 286 {
mbed_official 354:e67efb2aab0e 287 return HAL_ERROR;
mbed_official 354:e67efb2aab0e 288 }
mbed_official 354:e67efb2aab0e 289 }
mbed_official 354:e67efb2aab0e 290 else
mbed_official 354:e67efb2aab0e 291 {
mbed_official 354:e67efb2aab0e 292 /* Reset HSEON and HSEBYP bits before configuring the HSE --------------*/
mbed_official 354:e67efb2aab0e 293 __HAL_RCC_HSE_CONFIG(RCC_HSE_OFF);
mbed_official 354:e67efb2aab0e 294
mbed_official 354:e67efb2aab0e 295 /* Get Start Tick*/
mbed_official 354:e67efb2aab0e 296 tickstart = HAL_GetTick();
mbed_official 354:e67efb2aab0e 297
mbed_official 354:e67efb2aab0e 298 /* Wait till HSE is disabled */
mbed_official 354:e67efb2aab0e 299 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
mbed_official 354:e67efb2aab0e 300 {
mbed_official 354:e67efb2aab0e 301 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 302 {
mbed_official 354:e67efb2aab0e 303 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 304 }
mbed_official 354:e67efb2aab0e 305 }
mbed_official 354:e67efb2aab0e 306
mbed_official 354:e67efb2aab0e 307 /* Set the new HSE configuration ---------------------------------------*/
mbed_official 354:e67efb2aab0e 308 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
mbed_official 354:e67efb2aab0e 309
mbed_official 354:e67efb2aab0e 310 /* Check the HSE State */
mbed_official 354:e67efb2aab0e 311 if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
mbed_official 354:e67efb2aab0e 312 {
mbed_official 354:e67efb2aab0e 313 /* Get Start Tick*/
mbed_official 354:e67efb2aab0e 314 tickstart = HAL_GetTick();
mbed_official 354:e67efb2aab0e 315
mbed_official 354:e67efb2aab0e 316 /* Wait till HSE is ready */
mbed_official 354:e67efb2aab0e 317 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official 354:e67efb2aab0e 318 {
mbed_official 354:e67efb2aab0e 319 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 320 {
mbed_official 354:e67efb2aab0e 321 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 322 }
mbed_official 354:e67efb2aab0e 323 }
mbed_official 354:e67efb2aab0e 324 }
mbed_official 354:e67efb2aab0e 325 else
mbed_official 354:e67efb2aab0e 326 {
mbed_official 354:e67efb2aab0e 327 /* Get Start Tick*/
mbed_official 354:e67efb2aab0e 328 tickstart = HAL_GetTick();
mbed_official 354:e67efb2aab0e 329
mbed_official 354:e67efb2aab0e 330 /* Wait till HSE is bypassed or disabled */
mbed_official 354:e67efb2aab0e 331 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
mbed_official 354:e67efb2aab0e 332 {
mbed_official 354:e67efb2aab0e 333 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 334 {
mbed_official 354:e67efb2aab0e 335 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 336 }
mbed_official 354:e67efb2aab0e 337 }
mbed_official 354:e67efb2aab0e 338 }
mbed_official 354:e67efb2aab0e 339 }
mbed_official 354:e67efb2aab0e 340 }
mbed_official 354:e67efb2aab0e 341 /*----------------------------- HSI Configuration --------------------------*/
mbed_official 354:e67efb2aab0e 342 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
mbed_official 354:e67efb2aab0e 343 {
mbed_official 354:e67efb2aab0e 344 /* Check the parameters */
mbed_official 354:e67efb2aab0e 345 assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
mbed_official 354:e67efb2aab0e 346 assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
mbed_official 354:e67efb2aab0e 347
mbed_official 354:e67efb2aab0e 348 /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
mbed_official 354:e67efb2aab0e 349 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI)
mbed_official 354:e67efb2aab0e 350 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI)))
mbed_official 354:e67efb2aab0e 351 {
mbed_official 354:e67efb2aab0e 352 /* When HSI is used as system clock it will not disabled */
mbed_official 354:e67efb2aab0e 353 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
mbed_official 354:e67efb2aab0e 354 {
mbed_official 354:e67efb2aab0e 355 return HAL_ERROR;
mbed_official 354:e67efb2aab0e 356 }
mbed_official 354:e67efb2aab0e 357 /* Otherwise, just the calibration is allowed */
mbed_official 354:e67efb2aab0e 358 else
mbed_official 354:e67efb2aab0e 359 {
mbed_official 354:e67efb2aab0e 360 /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
mbed_official 354:e67efb2aab0e 361 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
mbed_official 354:e67efb2aab0e 362 }
mbed_official 354:e67efb2aab0e 363 }
mbed_official 354:e67efb2aab0e 364 else
mbed_official 354:e67efb2aab0e 365 {
mbed_official 354:e67efb2aab0e 366 /* Check the HSI State */
mbed_official 354:e67efb2aab0e 367 if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
mbed_official 354:e67efb2aab0e 368 {
mbed_official 354:e67efb2aab0e 369 /* Enable the Internal High Speed oscillator (HSI). */
mbed_official 354:e67efb2aab0e 370 __HAL_RCC_HSI_ENABLE();
mbed_official 354:e67efb2aab0e 371
mbed_official 354:e67efb2aab0e 372 /* Get Start Tick*/
mbed_official 354:e67efb2aab0e 373 tickstart = HAL_GetTick();
mbed_official 354:e67efb2aab0e 374
mbed_official 354:e67efb2aab0e 375 /* Wait till HSI is ready */
mbed_official 354:e67efb2aab0e 376 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official 354:e67efb2aab0e 377 {
mbed_official 354:e67efb2aab0e 378 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 379 {
mbed_official 354:e67efb2aab0e 380 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 381 }
mbed_official 354:e67efb2aab0e 382 }
mbed_official 354:e67efb2aab0e 383
mbed_official 354:e67efb2aab0e 384 /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
mbed_official 354:e67efb2aab0e 385 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
mbed_official 354:e67efb2aab0e 386 }
mbed_official 354:e67efb2aab0e 387 else
mbed_official 354:e67efb2aab0e 388 {
mbed_official 354:e67efb2aab0e 389 /* Disable the Internal High Speed oscillator (HSI). */
mbed_official 354:e67efb2aab0e 390 __HAL_RCC_HSI_DISABLE();
mbed_official 354:e67efb2aab0e 391
mbed_official 354:e67efb2aab0e 392 /* Get Start Tick*/
mbed_official 354:e67efb2aab0e 393 tickstart = HAL_GetTick();
mbed_official 354:e67efb2aab0e 394
mbed_official 354:e67efb2aab0e 395 /* Wait till HSI is ready */
mbed_official 354:e67efb2aab0e 396 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
mbed_official 354:e67efb2aab0e 397 {
mbed_official 354:e67efb2aab0e 398 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 399 {
mbed_official 354:e67efb2aab0e 400 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 401 }
mbed_official 354:e67efb2aab0e 402 }
mbed_official 354:e67efb2aab0e 403 }
mbed_official 354:e67efb2aab0e 404 }
mbed_official 354:e67efb2aab0e 405 }
mbed_official 354:e67efb2aab0e 406 /*----------------------------- MSI Configuration --------------------------*/
mbed_official 354:e67efb2aab0e 407 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_MSI) == RCC_OSCILLATORTYPE_MSI)
mbed_official 354:e67efb2aab0e 408 {
mbed_official 354:e67efb2aab0e 409 /* Check the parameters */
mbed_official 354:e67efb2aab0e 410 assert_param(IS_RCC_MSI(RCC_OscInitStruct->MSIState));
mbed_official 354:e67efb2aab0e 411 assert_param(IS_RCC_MSIRANGE(RCC_OscInitStruct->MSIClockRange));
mbed_official 354:e67efb2aab0e 412
mbed_official 354:e67efb2aab0e 413 /* Configures the Internal Multi Speed oscillator (MSI) clock range. */
mbed_official 354:e67efb2aab0e 414 __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange);
mbed_official 354:e67efb2aab0e 415
mbed_official 354:e67efb2aab0e 416 /* Check if MSI is used as system clock */
mbed_official 354:e67efb2aab0e 417 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_MSI))
mbed_official 354:e67efb2aab0e 418 {
mbed_official 354:e67efb2aab0e 419 /* When MSI is used as system clock it will not disabled */
mbed_official 354:e67efb2aab0e 420 if((__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != RESET) && (RCC_OscInitStruct->MSIState != RCC_MSI_ON))
mbed_official 354:e67efb2aab0e 421 {
mbed_official 354:e67efb2aab0e 422 return HAL_ERROR;
mbed_official 354:e67efb2aab0e 423 }
mbed_official 354:e67efb2aab0e 424 /* Otherwise, just the calibration is allowed */
mbed_official 354:e67efb2aab0e 425 else
mbed_official 354:e67efb2aab0e 426 {
mbed_official 354:e67efb2aab0e 427 /* Adjusts the Multi Speed oscillator (MSI) calibration value. */
mbed_official 354:e67efb2aab0e 428 __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue);
mbed_official 354:e67efb2aab0e 429 }
mbed_official 354:e67efb2aab0e 430 }
mbed_official 354:e67efb2aab0e 431 else
mbed_official 354:e67efb2aab0e 432 {
mbed_official 354:e67efb2aab0e 433 /* Check the MSI State */
mbed_official 354:e67efb2aab0e 434 if((RCC_OscInitStruct->MSIState)!= RCC_MSI_OFF)
mbed_official 354:e67efb2aab0e 435 {
mbed_official 354:e67efb2aab0e 436 /* Enable the Multi Speed oscillator (MSI). */
mbed_official 354:e67efb2aab0e 437 __HAL_RCC_MSI_ENABLE();
mbed_official 354:e67efb2aab0e 438
mbed_official 354:e67efb2aab0e 439 /* Get Start Tick*/
mbed_official 354:e67efb2aab0e 440 tickstart = HAL_GetTick();
mbed_official 354:e67efb2aab0e 441
mbed_official 354:e67efb2aab0e 442 /* Wait till MSI is ready */
mbed_official 354:e67efb2aab0e 443 while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == RESET)
mbed_official 354:e67efb2aab0e 444 {
mbed_official 354:e67efb2aab0e 445 if((HAL_GetTick() - tickstart ) > MSI_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 446 {
mbed_official 354:e67efb2aab0e 447 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 448 }
mbed_official 354:e67efb2aab0e 449 }
mbed_official 354:e67efb2aab0e 450
mbed_official 354:e67efb2aab0e 451 /* Adjusts the Multi Speed oscillator (MSI) calibration value. */
mbed_official 354:e67efb2aab0e 452 __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue);
mbed_official 354:e67efb2aab0e 453 }
mbed_official 354:e67efb2aab0e 454 else
mbed_official 354:e67efb2aab0e 455 {
mbed_official 354:e67efb2aab0e 456 /* Disable the Multi Speed oscillator (MSI). */
mbed_official 354:e67efb2aab0e 457 __HAL_RCC_MSI_DISABLE();
mbed_official 354:e67efb2aab0e 458
mbed_official 354:e67efb2aab0e 459 /* Get Start Tick*/
mbed_official 354:e67efb2aab0e 460 tickstart = HAL_GetTick();
mbed_official 354:e67efb2aab0e 461
mbed_official 354:e67efb2aab0e 462 /* Wait till MSI is ready */
mbed_official 354:e67efb2aab0e 463 while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != RESET)
mbed_official 354:e67efb2aab0e 464 {
mbed_official 354:e67efb2aab0e 465 if((HAL_GetTick() - tickstart ) > MSI_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 466 {
mbed_official 354:e67efb2aab0e 467 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 468 }
mbed_official 354:e67efb2aab0e 469 }
mbed_official 354:e67efb2aab0e 470 }
mbed_official 354:e67efb2aab0e 471 }
mbed_official 354:e67efb2aab0e 472 }
mbed_official 354:e67efb2aab0e 473 /*------------------------------ LSI Configuration -------------------------*/
mbed_official 354:e67efb2aab0e 474 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
mbed_official 354:e67efb2aab0e 475 {
mbed_official 354:e67efb2aab0e 476 /* Check the parameters */
mbed_official 354:e67efb2aab0e 477 assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
mbed_official 354:e67efb2aab0e 478
mbed_official 354:e67efb2aab0e 479 /* Check the LSI State */
mbed_official 354:e67efb2aab0e 480 if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
mbed_official 354:e67efb2aab0e 481 {
mbed_official 354:e67efb2aab0e 482 /* Enable the Internal Low Speed oscillator (LSI). */
mbed_official 354:e67efb2aab0e 483 __HAL_RCC_LSI_ENABLE();
mbed_official 354:e67efb2aab0e 484
mbed_official 354:e67efb2aab0e 485 /* Get Start Tick*/
mbed_official 354:e67efb2aab0e 486 tickstart = HAL_GetTick();
mbed_official 354:e67efb2aab0e 487
mbed_official 354:e67efb2aab0e 488 /* Wait till LSI is ready */
mbed_official 354:e67efb2aab0e 489 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
mbed_official 354:e67efb2aab0e 490 {
mbed_official 354:e67efb2aab0e 491 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 492 {
mbed_official 354:e67efb2aab0e 493 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 494 }
mbed_official 354:e67efb2aab0e 495 }
mbed_official 354:e67efb2aab0e 496 }
mbed_official 354:e67efb2aab0e 497 else
mbed_official 354:e67efb2aab0e 498 {
mbed_official 354:e67efb2aab0e 499 /* Disable the Internal Low Speed oscillator (LSI). */
mbed_official 354:e67efb2aab0e 500 __HAL_RCC_LSI_DISABLE();
mbed_official 354:e67efb2aab0e 501
mbed_official 354:e67efb2aab0e 502 /* Get Start Tick*/
mbed_official 354:e67efb2aab0e 503 tickstart = HAL_GetTick();
mbed_official 354:e67efb2aab0e 504
mbed_official 354:e67efb2aab0e 505 /* Wait till LSI is ready */
mbed_official 354:e67efb2aab0e 506 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
mbed_official 354:e67efb2aab0e 507 {
mbed_official 354:e67efb2aab0e 508 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 509 {
mbed_official 354:e67efb2aab0e 510 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 511 }
mbed_official 354:e67efb2aab0e 512 }
mbed_official 354:e67efb2aab0e 513 }
mbed_official 354:e67efb2aab0e 514 }
mbed_official 354:e67efb2aab0e 515 /*------------------------------ LSE Configuration -------------------------*/
mbed_official 354:e67efb2aab0e 516 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
mbed_official 354:e67efb2aab0e 517 {
mbed_official 354:e67efb2aab0e 518 /* Check the parameters */
mbed_official 354:e67efb2aab0e 519 assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
mbed_official 354:e67efb2aab0e 520
mbed_official 354:e67efb2aab0e 521 /* Enable Power Clock*/
mbed_official 354:e67efb2aab0e 522 __PWR_CLK_ENABLE();
mbed_official 354:e67efb2aab0e 523
mbed_official 354:e67efb2aab0e 524 /* Enable write access to Backup domain */
mbed_official 354:e67efb2aab0e 525 SET_BIT(PWR->CR, PWR_CR_DBP);
mbed_official 354:e67efb2aab0e 526
mbed_official 354:e67efb2aab0e 527 /* Wait for Backup domain Write protection disable */
mbed_official 354:e67efb2aab0e 528 tickstart = HAL_GetTick();
mbed_official 354:e67efb2aab0e 529
mbed_official 354:e67efb2aab0e 530 while((PWR->CR & PWR_CR_DBP) == RESET)
mbed_official 354:e67efb2aab0e 531 {
mbed_official 354:e67efb2aab0e 532 if((HAL_GetTick() - tickstart ) > DBP_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 533 {
mbed_official 354:e67efb2aab0e 534 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 535 }
mbed_official 354:e67efb2aab0e 536 }
mbed_official 354:e67efb2aab0e 537
mbed_official 354:e67efb2aab0e 538 /* Reset LSEON and LSEBYP bits before configuring the LSE ----------------*/
mbed_official 354:e67efb2aab0e 539 __HAL_RCC_LSE_CONFIG(RCC_LSE_OFF);
mbed_official 354:e67efb2aab0e 540
mbed_official 354:e67efb2aab0e 541 /* Get Start Tick*/
mbed_official 354:e67efb2aab0e 542 tickstart = HAL_GetTick();
mbed_official 354:e67efb2aab0e 543
mbed_official 354:e67efb2aab0e 544 /* Wait till LSE is ready */
mbed_official 354:e67efb2aab0e 545 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
mbed_official 354:e67efb2aab0e 546 {
mbed_official 354:e67efb2aab0e 547 if((HAL_GetTick() - tickstart ) > LSE_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 548 {
mbed_official 354:e67efb2aab0e 549 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 550 }
mbed_official 354:e67efb2aab0e 551 }
mbed_official 354:e67efb2aab0e 552
mbed_official 354:e67efb2aab0e 553 /* Set the new LSE configuration -----------------------------------------*/
mbed_official 354:e67efb2aab0e 554 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
mbed_official 354:e67efb2aab0e 555 /* Check the LSE State */
mbed_official 354:e67efb2aab0e 556 if((RCC_OscInitStruct->LSEState) == RCC_LSE_ON)
mbed_official 354:e67efb2aab0e 557 {
mbed_official 354:e67efb2aab0e 558 /* Get Start Tick*/
mbed_official 354:e67efb2aab0e 559 tickstart = HAL_GetTick();
mbed_official 354:e67efb2aab0e 560
mbed_official 354:e67efb2aab0e 561 /* Wait till LSE is ready */
mbed_official 354:e67efb2aab0e 562 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
mbed_official 354:e67efb2aab0e 563 {
mbed_official 354:e67efb2aab0e 564 if((HAL_GetTick() - tickstart ) > LSE_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 565 {
mbed_official 354:e67efb2aab0e 566 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 567 }
mbed_official 354:e67efb2aab0e 568 }
mbed_official 354:e67efb2aab0e 569 }
mbed_official 354:e67efb2aab0e 570 else
mbed_official 354:e67efb2aab0e 571 {
mbed_official 354:e67efb2aab0e 572 /* Get Start Tick*/
mbed_official 354:e67efb2aab0e 573 tickstart = HAL_GetTick();
mbed_official 354:e67efb2aab0e 574
mbed_official 354:e67efb2aab0e 575 /* Wait till LSE is ready */
mbed_official 354:e67efb2aab0e 576 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
mbed_official 354:e67efb2aab0e 577 {
mbed_official 354:e67efb2aab0e 578 if((HAL_GetTick() - tickstart ) > LSE_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 579 {
mbed_official 354:e67efb2aab0e 580 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 581 }
mbed_official 354:e67efb2aab0e 582 }
mbed_official 354:e67efb2aab0e 583 }
mbed_official 354:e67efb2aab0e 584 }
mbed_official 354:e67efb2aab0e 585 /*-------------------------------- PLL Configuration -----------------------*/
mbed_official 354:e67efb2aab0e 586 /* Check the parameters */
mbed_official 354:e67efb2aab0e 587 assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
mbed_official 354:e67efb2aab0e 588 if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
mbed_official 354:e67efb2aab0e 589 {
mbed_official 354:e67efb2aab0e 590 /* Check if the PLL is used as system clock or not */
mbed_official 354:e67efb2aab0e 591 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
mbed_official 354:e67efb2aab0e 592 {
mbed_official 354:e67efb2aab0e 593 if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
mbed_official 354:e67efb2aab0e 594 {
mbed_official 354:e67efb2aab0e 595 /* Check the parameters */
mbed_official 354:e67efb2aab0e 596 assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
mbed_official 354:e67efb2aab0e 597 assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
mbed_official 354:e67efb2aab0e 598 assert_param(IS_RCC_PLL_DIV(RCC_OscInitStruct->PLL.PLLDIV));
mbed_official 354:e67efb2aab0e 599
mbed_official 354:e67efb2aab0e 600
mbed_official 354:e67efb2aab0e 601 /* Disable the main PLL. */
mbed_official 354:e67efb2aab0e 602 __HAL_RCC_PLL_DISABLE();
mbed_official 354:e67efb2aab0e 603
mbed_official 354:e67efb2aab0e 604 /* Get Start Tick*/
mbed_official 354:e67efb2aab0e 605 tickstart = HAL_GetTick();
mbed_official 354:e67efb2aab0e 606
mbed_official 354:e67efb2aab0e 607 /* Wait till PLL is ready */
mbed_official 354:e67efb2aab0e 608 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
mbed_official 354:e67efb2aab0e 609 {
mbed_official 354:e67efb2aab0e 610 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 611 {
mbed_official 354:e67efb2aab0e 612 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 613 }
mbed_official 354:e67efb2aab0e 614 }
mbed_official 354:e67efb2aab0e 615
mbed_official 354:e67efb2aab0e 616 /* Configure the main PLL clock source, multiplication and division factors. */
mbed_official 354:e67efb2aab0e 617 __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
mbed_official 354:e67efb2aab0e 618 RCC_OscInitStruct->PLL.PLLMUL,
mbed_official 354:e67efb2aab0e 619 RCC_OscInitStruct->PLL.PLLDIV);
mbed_official 354:e67efb2aab0e 620 /* Enable the main PLL. */
mbed_official 354:e67efb2aab0e 621 __HAL_RCC_PLL_ENABLE();
mbed_official 354:e67efb2aab0e 622
mbed_official 354:e67efb2aab0e 623 /* Get Start Tick*/
mbed_official 354:e67efb2aab0e 624 tickstart = HAL_GetTick();
mbed_official 354:e67efb2aab0e 625
mbed_official 354:e67efb2aab0e 626 /* Wait till PLL is ready */
mbed_official 354:e67efb2aab0e 627 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official 354:e67efb2aab0e 628 {
mbed_official 354:e67efb2aab0e 629 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 630 {
mbed_official 354:e67efb2aab0e 631 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 632 }
mbed_official 354:e67efb2aab0e 633 }
mbed_official 354:e67efb2aab0e 634 }
mbed_official 354:e67efb2aab0e 635 else
mbed_official 354:e67efb2aab0e 636 {
mbed_official 354:e67efb2aab0e 637 /* Disable the main PLL. */
mbed_official 354:e67efb2aab0e 638 __HAL_RCC_PLL_DISABLE();
mbed_official 354:e67efb2aab0e 639
mbed_official 354:e67efb2aab0e 640 /* Get Start Tick*/
mbed_official 354:e67efb2aab0e 641 tickstart = HAL_GetTick();
mbed_official 354:e67efb2aab0e 642
mbed_official 354:e67efb2aab0e 643 /* Wait till PLL is ready */
mbed_official 354:e67efb2aab0e 644 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
mbed_official 354:e67efb2aab0e 645 {
mbed_official 354:e67efb2aab0e 646 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 647 {
mbed_official 354:e67efb2aab0e 648 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 649 }
mbed_official 354:e67efb2aab0e 650 }
mbed_official 354:e67efb2aab0e 651 }
mbed_official 354:e67efb2aab0e 652 }
mbed_official 354:e67efb2aab0e 653 else
mbed_official 354:e67efb2aab0e 654 {
mbed_official 354:e67efb2aab0e 655 return HAL_ERROR;
mbed_official 354:e67efb2aab0e 656 }
mbed_official 354:e67efb2aab0e 657 }
mbed_official 354:e67efb2aab0e 658 return HAL_OK;
mbed_official 354:e67efb2aab0e 659 }
mbed_official 354:e67efb2aab0e 660
mbed_official 354:e67efb2aab0e 661 /**
mbed_official 354:e67efb2aab0e 662 * @brief Initializes the CPU, AHB and APB busses clocks according to the specified
mbed_official 354:e67efb2aab0e 663 * parameters in the RCC_ClkInitStruct.
mbed_official 354:e67efb2aab0e 664 * @param RCC_ClkInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official 354:e67efb2aab0e 665 * contains the configuration information for the RCC peripheral.
mbed_official 354:e67efb2aab0e 666 * @param FLatency: FLASH Latency
mbed_official 354:e67efb2aab0e 667 * This parameter can be one of the following values:
mbed_official 354:e67efb2aab0e 668 * @arg FLASH_LATENCY_0: FLASH Zero Latency cycle
mbed_official 354:e67efb2aab0e 669 * @arg FLASH_LATENCY_1: FLASH One Latency cycle
mbed_official 354:e67efb2aab0e 670 * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
mbed_official 354:e67efb2aab0e 671 * and updated by HAL_RCC_GetHCLKFreq() function called within this function
mbed_official 354:e67efb2aab0e 672 *
mbed_official 354:e67efb2aab0e 673 * @note The MSI is used (enabled by hardware) as system clock source after
mbed_official 354:e67efb2aab0e 674 * startup from Reset, wake-up from STOP and STANDBY mode, or in case
mbed_official 354:e67efb2aab0e 675 * of failure of the HSE used directly or indirectly as system clock
mbed_official 354:e67efb2aab0e 676 * (if the Clock Security System CSS is enabled).
mbed_official 354:e67efb2aab0e 677 *
mbed_official 354:e67efb2aab0e 678 * @note A switch from one clock source to another occurs only if the target
mbed_official 354:e67efb2aab0e 679 * clock source is ready (clock stable after startup delay or PLL locked).
mbed_official 354:e67efb2aab0e 680 * If a clock source which is not yet ready is selected, the switch will
mbed_official 354:e67efb2aab0e 681 * occur when the clock source will be ready.
mbed_official 354:e67efb2aab0e 682 * You can use HAL_RCC_GetClockConfig() function to know which clock is
mbed_official 354:e67efb2aab0e 683 * currently used as system clock source.
mbed_official 354:e67efb2aab0e 684 * @note Depending on the device voltage range, the software has to set correctly
mbed_official 354:e67efb2aab0e 685 * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
mbed_official 354:e67efb2aab0e 686 * (for more details refer to section above "Initialization/de-initialization functions")
mbed_official 354:e67efb2aab0e 687 * @retval None
mbed_official 354:e67efb2aab0e 688 */
mbed_official 354:e67efb2aab0e 689 HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
mbed_official 354:e67efb2aab0e 690 {
mbed_official 354:e67efb2aab0e 691 uint32_t tickstart = 0;
mbed_official 354:e67efb2aab0e 692
mbed_official 354:e67efb2aab0e 693 /* Check the parameters */
mbed_official 354:e67efb2aab0e 694 assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType));
mbed_official 354:e67efb2aab0e 695 assert_param(IS_FLASH_LATENCY(FLatency));
mbed_official 354:e67efb2aab0e 696
mbed_official 354:e67efb2aab0e 697 /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
mbed_official 354:e67efb2aab0e 698 must be correctly programmed according to the frequency of the CPU clock
mbed_official 354:e67efb2aab0e 699 (HCLK) and the supply voltage of the device. */
mbed_official 354:e67efb2aab0e 700
mbed_official 354:e67efb2aab0e 701 /* Increasing the CPU frequency */
mbed_official 354:e67efb2aab0e 702 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
mbed_official 354:e67efb2aab0e 703 {
mbed_official 354:e67efb2aab0e 704 /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
mbed_official 354:e67efb2aab0e 705 __HAL_FLASH_SET_LATENCY(FLatency);
mbed_official 354:e67efb2aab0e 706
mbed_official 354:e67efb2aab0e 707 /* Check that the new number of wait states is taken into account to access the Flash
mbed_official 354:e67efb2aab0e 708 memory by reading the FLASH_ACR register */
mbed_official 354:e67efb2aab0e 709 if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
mbed_official 354:e67efb2aab0e 710 {
mbed_official 354:e67efb2aab0e 711 return HAL_ERROR;
mbed_official 354:e67efb2aab0e 712 }
mbed_official 354:e67efb2aab0e 713
mbed_official 354:e67efb2aab0e 714 /*-------------------------- HCLK Configuration --------------------------*/
mbed_official 354:e67efb2aab0e 715 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
mbed_official 354:e67efb2aab0e 716 {
mbed_official 354:e67efb2aab0e 717 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
mbed_official 354:e67efb2aab0e 718 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
mbed_official 354:e67efb2aab0e 719 }
mbed_official 354:e67efb2aab0e 720
mbed_official 354:e67efb2aab0e 721 /*------------------------- SYSCLK Configuration ---------------------------*/
mbed_official 354:e67efb2aab0e 722 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
mbed_official 354:e67efb2aab0e 723 {
mbed_official 354:e67efb2aab0e 724 assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
mbed_official 354:e67efb2aab0e 725
mbed_official 354:e67efb2aab0e 726 /* HSE is selected as System Clock Source */
mbed_official 354:e67efb2aab0e 727 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 354:e67efb2aab0e 728 {
mbed_official 354:e67efb2aab0e 729 /* Check the HSE ready flag */
mbed_official 354:e67efb2aab0e 730 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official 354:e67efb2aab0e 731 {
mbed_official 354:e67efb2aab0e 732 return HAL_ERROR;
mbed_official 354:e67efb2aab0e 733 }
mbed_official 354:e67efb2aab0e 734 }
mbed_official 354:e67efb2aab0e 735 /* PLL is selected as System Clock Source */
mbed_official 354:e67efb2aab0e 736 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official 354:e67efb2aab0e 737 {
mbed_official 354:e67efb2aab0e 738 /* Check the PLL ready flag */
mbed_official 354:e67efb2aab0e 739 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official 354:e67efb2aab0e 740 {
mbed_official 354:e67efb2aab0e 741 return HAL_ERROR;
mbed_official 354:e67efb2aab0e 742 }
mbed_official 354:e67efb2aab0e 743 }
mbed_official 354:e67efb2aab0e 744 /* HSI is selected as System Clock Source */
mbed_official 354:e67efb2aab0e 745 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI)
mbed_official 354:e67efb2aab0e 746 {
mbed_official 354:e67efb2aab0e 747 /* Check the HSI ready flag */
mbed_official 354:e67efb2aab0e 748 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official 354:e67efb2aab0e 749 {
mbed_official 354:e67efb2aab0e 750 return HAL_ERROR;
mbed_official 354:e67efb2aab0e 751 }
mbed_official 354:e67efb2aab0e 752 }
mbed_official 354:e67efb2aab0e 753 /* MSI is selected as System Clock Source */
mbed_official 354:e67efb2aab0e 754 else
mbed_official 354:e67efb2aab0e 755 {
mbed_official 354:e67efb2aab0e 756 /* Check the MSI ready flag */
mbed_official 354:e67efb2aab0e 757 if(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == RESET)
mbed_official 354:e67efb2aab0e 758 {
mbed_official 354:e67efb2aab0e 759 return HAL_ERROR;
mbed_official 354:e67efb2aab0e 760 }
mbed_official 354:e67efb2aab0e 761 }
mbed_official 354:e67efb2aab0e 762 MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource);
mbed_official 354:e67efb2aab0e 763
mbed_official 354:e67efb2aab0e 764 /* Get Start Tick*/
mbed_official 354:e67efb2aab0e 765 tickstart = HAL_GetTick();
mbed_official 354:e67efb2aab0e 766
mbed_official 354:e67efb2aab0e 767 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 354:e67efb2aab0e 768 {
mbed_official 354:e67efb2aab0e 769 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_HSE)
mbed_official 354:e67efb2aab0e 770 {
mbed_official 354:e67efb2aab0e 771 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 772 {
mbed_official 354:e67efb2aab0e 773 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 774 }
mbed_official 354:e67efb2aab0e 775 }
mbed_official 354:e67efb2aab0e 776 }
mbed_official 354:e67efb2aab0e 777 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official 354:e67efb2aab0e 778 {
mbed_official 354:e67efb2aab0e 779 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
mbed_official 354:e67efb2aab0e 780 {
mbed_official 354:e67efb2aab0e 781 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 782 {
mbed_official 354:e67efb2aab0e 783 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 784 }
mbed_official 354:e67efb2aab0e 785 }
mbed_official 354:e67efb2aab0e 786 }
mbed_official 354:e67efb2aab0e 787 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI)
mbed_official 354:e67efb2aab0e 788 {
mbed_official 354:e67efb2aab0e 789 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_HSI)
mbed_official 354:e67efb2aab0e 790 {
mbed_official 354:e67efb2aab0e 791 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 792 {
mbed_official 354:e67efb2aab0e 793 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 794 }
mbed_official 354:e67efb2aab0e 795 }
mbed_official 354:e67efb2aab0e 796 }
mbed_official 354:e67efb2aab0e 797 else
mbed_official 354:e67efb2aab0e 798 {
mbed_official 354:e67efb2aab0e 799 while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_MSI)
mbed_official 354:e67efb2aab0e 800 {
mbed_official 354:e67efb2aab0e 801 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 802 {
mbed_official 354:e67efb2aab0e 803 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 804 }
mbed_official 354:e67efb2aab0e 805 }
mbed_official 354:e67efb2aab0e 806 }
mbed_official 354:e67efb2aab0e 807 }
mbed_official 354:e67efb2aab0e 808 }
mbed_official 354:e67efb2aab0e 809 /* Decreasing the CPU frequency */
mbed_official 354:e67efb2aab0e 810 else
mbed_official 354:e67efb2aab0e 811 {
mbed_official 354:e67efb2aab0e 812 /*-------------------------- HCLK Configuration --------------------------*/
mbed_official 354:e67efb2aab0e 813 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
mbed_official 354:e67efb2aab0e 814 {
mbed_official 354:e67efb2aab0e 815 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
mbed_official 354:e67efb2aab0e 816 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
mbed_official 354:e67efb2aab0e 817 }
mbed_official 354:e67efb2aab0e 818
mbed_official 354:e67efb2aab0e 819 /*------------------------- SYSCLK Configuration -------------------------*/
mbed_official 354:e67efb2aab0e 820 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
mbed_official 354:e67efb2aab0e 821 {
mbed_official 354:e67efb2aab0e 822 assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
mbed_official 354:e67efb2aab0e 823
mbed_official 354:e67efb2aab0e 824 /* HSE is selected as System Clock Source */
mbed_official 354:e67efb2aab0e 825 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 354:e67efb2aab0e 826 {
mbed_official 354:e67efb2aab0e 827 /* Check the HSE ready flag */
mbed_official 354:e67efb2aab0e 828 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official 354:e67efb2aab0e 829 {
mbed_official 354:e67efb2aab0e 830 return HAL_ERROR;
mbed_official 354:e67efb2aab0e 831 }
mbed_official 354:e67efb2aab0e 832 }
mbed_official 354:e67efb2aab0e 833 /* PLL is selected as System Clock Source */
mbed_official 354:e67efb2aab0e 834 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official 354:e67efb2aab0e 835 {
mbed_official 354:e67efb2aab0e 836 /* Check the PLL ready flag */
mbed_official 354:e67efb2aab0e 837 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official 354:e67efb2aab0e 838 {
mbed_official 354:e67efb2aab0e 839 return HAL_ERROR;
mbed_official 354:e67efb2aab0e 840 }
mbed_official 354:e67efb2aab0e 841 }
mbed_official 354:e67efb2aab0e 842 /* HSI is selected as System Clock Source */
mbed_official 354:e67efb2aab0e 843 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI)
mbed_official 354:e67efb2aab0e 844 {
mbed_official 354:e67efb2aab0e 845 /* Check the HSI ready flag */
mbed_official 354:e67efb2aab0e 846 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official 354:e67efb2aab0e 847 {
mbed_official 354:e67efb2aab0e 848 return HAL_ERROR;
mbed_official 354:e67efb2aab0e 849 }
mbed_official 354:e67efb2aab0e 850 }
mbed_official 354:e67efb2aab0e 851 /* MSI is selected as System Clock Source */
mbed_official 354:e67efb2aab0e 852 else
mbed_official 354:e67efb2aab0e 853 {
mbed_official 354:e67efb2aab0e 854 /* Check the MSI ready flag */
mbed_official 354:e67efb2aab0e 855 if(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == RESET)
mbed_official 354:e67efb2aab0e 856 {
mbed_official 354:e67efb2aab0e 857 return HAL_ERROR;
mbed_official 354:e67efb2aab0e 858 }
mbed_official 354:e67efb2aab0e 859 }
mbed_official 354:e67efb2aab0e 860 MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource);
mbed_official 354:e67efb2aab0e 861
mbed_official 354:e67efb2aab0e 862 /* Get Start Tick*/
mbed_official 354:e67efb2aab0e 863 tickstart = HAL_GetTick();
mbed_official 354:e67efb2aab0e 864
mbed_official 354:e67efb2aab0e 865 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 354:e67efb2aab0e 866 {
mbed_official 354:e67efb2aab0e 867 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_HSE)
mbed_official 354:e67efb2aab0e 868 {
mbed_official 354:e67efb2aab0e 869 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 870 {
mbed_official 354:e67efb2aab0e 871 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 872 }
mbed_official 354:e67efb2aab0e 873 }
mbed_official 354:e67efb2aab0e 874 }
mbed_official 354:e67efb2aab0e 875 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official 354:e67efb2aab0e 876 {
mbed_official 354:e67efb2aab0e 877 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
mbed_official 354:e67efb2aab0e 878 {
mbed_official 354:e67efb2aab0e 879 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 880 {
mbed_official 354:e67efb2aab0e 881 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 882 }
mbed_official 354:e67efb2aab0e 883 }
mbed_official 354:e67efb2aab0e 884 }
mbed_official 354:e67efb2aab0e 885 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI)
mbed_official 354:e67efb2aab0e 886 {
mbed_official 354:e67efb2aab0e 887 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_HSI)
mbed_official 354:e67efb2aab0e 888 {
mbed_official 354:e67efb2aab0e 889 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 890 {
mbed_official 354:e67efb2aab0e 891 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 892 }
mbed_official 354:e67efb2aab0e 893 }
mbed_official 354:e67efb2aab0e 894 }
mbed_official 354:e67efb2aab0e 895 else
mbed_official 354:e67efb2aab0e 896 {
mbed_official 354:e67efb2aab0e 897 while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_MSI)
mbed_official 354:e67efb2aab0e 898 {
mbed_official 354:e67efb2aab0e 899 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 354:e67efb2aab0e 900 {
mbed_official 354:e67efb2aab0e 901 return HAL_TIMEOUT;
mbed_official 354:e67efb2aab0e 902 }
mbed_official 354:e67efb2aab0e 903 }
mbed_official 354:e67efb2aab0e 904 }
mbed_official 354:e67efb2aab0e 905 }
mbed_official 354:e67efb2aab0e 906
mbed_official 354:e67efb2aab0e 907 /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
mbed_official 354:e67efb2aab0e 908 __HAL_FLASH_SET_LATENCY(FLatency);
mbed_official 354:e67efb2aab0e 909
mbed_official 354:e67efb2aab0e 910 /* Check that the new number of wait states is taken into account to access the Flash
mbed_official 354:e67efb2aab0e 911 memory by reading the FLASH_ACR register */
mbed_official 354:e67efb2aab0e 912 if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
mbed_official 354:e67efb2aab0e 913 {
mbed_official 354:e67efb2aab0e 914 return HAL_ERROR;
mbed_official 354:e67efb2aab0e 915 }
mbed_official 354:e67efb2aab0e 916 }
mbed_official 354:e67efb2aab0e 917
mbed_official 354:e67efb2aab0e 918 /*-------------------------- PCLK1 Configuration ---------------------------*/
mbed_official 354:e67efb2aab0e 919 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
mbed_official 354:e67efb2aab0e 920 {
mbed_official 354:e67efb2aab0e 921 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
mbed_official 354:e67efb2aab0e 922 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
mbed_official 354:e67efb2aab0e 923 }
mbed_official 354:e67efb2aab0e 924
mbed_official 354:e67efb2aab0e 925 /*-------------------------- PCLK2 Configuration ---------------------------*/
mbed_official 354:e67efb2aab0e 926 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
mbed_official 354:e67efb2aab0e 927 {
mbed_official 354:e67efb2aab0e 928 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
mbed_official 354:e67efb2aab0e 929 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
mbed_official 354:e67efb2aab0e 930 }
mbed_official 354:e67efb2aab0e 931
mbed_official 354:e67efb2aab0e 932 /* Configure the source of time base considering new system clocks settings*/
mbed_official 354:e67efb2aab0e 933 HAL_InitTick (TICK_INT_PRIORITY);
mbed_official 354:e67efb2aab0e 934
mbed_official 354:e67efb2aab0e 935 return HAL_OK;
mbed_official 354:e67efb2aab0e 936 }
mbed_official 354:e67efb2aab0e 937
mbed_official 354:e67efb2aab0e 938 /**
mbed_official 354:e67efb2aab0e 939 * @}
mbed_official 354:e67efb2aab0e 940 */
mbed_official 354:e67efb2aab0e 941
mbed_official 354:e67efb2aab0e 942 /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions
mbed_official 354:e67efb2aab0e 943 * @brief RCC clocks control functions
mbed_official 354:e67efb2aab0e 944 *
mbed_official 354:e67efb2aab0e 945 @verbatim
mbed_official 354:e67efb2aab0e 946 ===============================================================================
mbed_official 354:e67efb2aab0e 947 ##### Peripheral Control functions #####
mbed_official 354:e67efb2aab0e 948 ===============================================================================
mbed_official 354:e67efb2aab0e 949 [..]
mbed_official 354:e67efb2aab0e 950 This subsection provides a set of functions allowing to control the RCC Clocks
mbed_official 354:e67efb2aab0e 951 frequencies.
mbed_official 354:e67efb2aab0e 952
mbed_official 354:e67efb2aab0e 953 @endverbatim
mbed_official 354:e67efb2aab0e 954 * @{
mbed_official 354:e67efb2aab0e 955 */
mbed_official 354:e67efb2aab0e 956
mbed_official 354:e67efb2aab0e 957 /**
mbed_official 354:e67efb2aab0e 958 * @brief Selects the clock source to output on MCO pin.
mbed_official 354:e67efb2aab0e 959 * @note MCO pin should be configured in alternate function mode.
mbed_official 354:e67efb2aab0e 960 * @param RCC_MCOx: specifies the output direction for the clock source.
mbed_official 354:e67efb2aab0e 961 * This parameter can be one of the following values:
mbed_official 354:e67efb2aab0e 962 * @arg RCC_MCO: Clock source to output on MCO1 pin(PA8).
mbed_official 354:e67efb2aab0e 963 * @param RCC_MCOSource: specifies the clock source to output.
mbed_official 354:e67efb2aab0e 964 * This parameter can be one of the following values:
mbed_official 354:e67efb2aab0e 965 * @arg RCC_MCO1SOURCE_NOCLOCK: No clock selected
mbed_official 354:e67efb2aab0e 966 * @arg RCC_MCO1SOURCE_SYSCLK: System clock selected
mbed_official 354:e67efb2aab0e 967 * @arg RCC_MCO1SOURCE_HSI: HSI oscillator clock selected
mbed_official 354:e67efb2aab0e 968 * @arg RCC_MCO1SOURCE_MSI: MSI oscillator clock selected
mbed_official 354:e67efb2aab0e 969 * @arg RCC_MCO1SOURCE_HSE: HSE oscillator clock selected
mbed_official 354:e67efb2aab0e 970 * @arg RCC_MCO1SOURCE_PLLCLK: PLL clock selected
mbed_official 354:e67efb2aab0e 971 * @arg RCC_MCO1SOURCE_LSI: LSI clock selected
mbed_official 354:e67efb2aab0e 972 * @arg RCC_MCO1SOURCE_LSE: LSE clock selected
mbed_official 354:e67efb2aab0e 973 * @param RCC_MCODiv: specifies the MCO DIV.
mbed_official 354:e67efb2aab0e 974 * This parameter can be one of the following values:
mbed_official 354:e67efb2aab0e 975 * @arg RCC_MCODIV_1: no division applied to MCO clock
mbed_official 354:e67efb2aab0e 976 * @arg RCC_MCODIV_2: division by 2 applied to MCO clock
mbed_official 354:e67efb2aab0e 977 * @arg RCC_MCODIV_4: division by 4 applied to MCO clock
mbed_official 354:e67efb2aab0e 978 * @arg RCC_MCODIV_8: division by 8 applied to MCO clock
mbed_official 354:e67efb2aab0e 979 * @arg RCC_MCODIV_16: division by 16 applied to MCO clock
mbed_official 354:e67efb2aab0e 980 * @retval None
mbed_official 354:e67efb2aab0e 981 */
mbed_official 354:e67efb2aab0e 982 void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv)
mbed_official 354:e67efb2aab0e 983 {
mbed_official 354:e67efb2aab0e 984 GPIO_InitTypeDef gpio;
mbed_official 354:e67efb2aab0e 985
mbed_official 354:e67efb2aab0e 986 /* Check the parameters */
mbed_official 354:e67efb2aab0e 987 assert_param(IS_RCC_MCO(RCC_MCOx));
mbed_official 354:e67efb2aab0e 988 assert_param(IS_RCC_MCODIV(RCC_MCODiv));
mbed_official 354:e67efb2aab0e 989 assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource));
mbed_official 354:e67efb2aab0e 990
mbed_official 354:e67efb2aab0e 991 /* MCO Clock Enable */
mbed_official 354:e67efb2aab0e 992 __MCO1_CLK_ENABLE();
mbed_official 354:e67efb2aab0e 993
mbed_official 354:e67efb2aab0e 994 /* Configure the MCO1 pin in alternate function mode */
mbed_official 354:e67efb2aab0e 995 gpio.Pin = MCO1_PIN;
mbed_official 354:e67efb2aab0e 996 gpio.Mode = GPIO_MODE_AF_PP;
mbed_official 354:e67efb2aab0e 997 gpio.Speed = GPIO_SPEED_HIGH;
mbed_official 354:e67efb2aab0e 998 gpio.Pull = GPIO_NOPULL;
mbed_official 354:e67efb2aab0e 999 gpio.Alternate = GPIO_AF0_MCO;
mbed_official 354:e67efb2aab0e 1000 HAL_GPIO_Init(MCO1_GPIO_PORT, &gpio);
mbed_official 354:e67efb2aab0e 1001
mbed_official 354:e67efb2aab0e 1002 /* Mask MCO and MCOPRE[2:0] bits then Select MCO clock source and prescaler */
mbed_official 354:e67efb2aab0e 1003 MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCOSEL | RCC_CFGR_MCOPRE), (RCC_MCOSource | RCC_MCODiv));
mbed_official 354:e67efb2aab0e 1004 }
mbed_official 354:e67efb2aab0e 1005
mbed_official 354:e67efb2aab0e 1006 /**
mbed_official 354:e67efb2aab0e 1007 * @brief Enables the Clock Security System.
mbed_official 354:e67efb2aab0e 1008 * @note If a failure is detected on the HSE oscillator clock, this oscillator
mbed_official 354:e67efb2aab0e 1009 * is automatically disabled and an interrupt is generated to inform the
mbed_official 354:e67efb2aab0e 1010 * software about the failure (Clock Security System Interrupt, CSSI),
mbed_official 354:e67efb2aab0e 1011 * allowing the MCU to perform rescue operations. The CSSI is linked to
mbed_official 354:e67efb2aab0e 1012 * the Cortex-M3 NMI (Non-Maskable Interrupt) exception vector.
mbed_official 354:e67efb2aab0e 1013 * @retval None
mbed_official 354:e67efb2aab0e 1014 */
mbed_official 354:e67efb2aab0e 1015 void HAL_RCC_EnableCSS(void)
mbed_official 354:e67efb2aab0e 1016 {
mbed_official 354:e67efb2aab0e 1017 *(__IO uint32_t *) CR_CSSON_BB = (uint32_t)ENABLE;
mbed_official 354:e67efb2aab0e 1018 }
mbed_official 354:e67efb2aab0e 1019
mbed_official 354:e67efb2aab0e 1020 /**
mbed_official 354:e67efb2aab0e 1021 * @brief Disables the Clock Security System.
mbed_official 354:e67efb2aab0e 1022 * @retval None
mbed_official 354:e67efb2aab0e 1023 */
mbed_official 354:e67efb2aab0e 1024 void HAL_RCC_DisableCSS(void)
mbed_official 354:e67efb2aab0e 1025 {
mbed_official 354:e67efb2aab0e 1026 *(__IO uint32_t *) CR_CSSON_BB = (uint32_t)DISABLE;
mbed_official 354:e67efb2aab0e 1027 }
mbed_official 354:e67efb2aab0e 1028
mbed_official 354:e67efb2aab0e 1029 /**
mbed_official 354:e67efb2aab0e 1030 * @brief Returns the SYSCLK frequency
mbed_official 354:e67efb2aab0e 1031 *
mbed_official 354:e67efb2aab0e 1032 * @note The system frequency computed by this function is not the real
mbed_official 354:e67efb2aab0e 1033 * frequency in the chip. It is calculated based on the predefined
mbed_official 354:e67efb2aab0e 1034 * constant and the selected clock source:
mbed_official 354:e67efb2aab0e 1035 * @note If SYSCLK source is MSI, function returns values based on MSI
mbed_official 354:e67efb2aab0e 1036 * Value as defined by the MSI range.
mbed_official 354:e67efb2aab0e 1037 * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*)
mbed_official 354:e67efb2aab0e 1038 * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(**)
mbed_official 354:e67efb2aab0e 1039 * @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(**)
mbed_official 354:e67efb2aab0e 1040 * or HSI_VALUE(*) multiplied/divided by the PLL factors.
mbed_official 354:e67efb2aab0e 1041 * @note (*) HSI_VALUE is a constant defined in stm32l1xx_hal_conf.h file (default value
mbed_official 354:e67efb2aab0e 1042 * 16 MHz) but the real value may vary depending on the variations
mbed_official 354:e67efb2aab0e 1043 * in voltage and temperature.
mbed_official 354:e67efb2aab0e 1044 * @note (**) HSE_VALUE is a constant defined in stm32l1xx_hal_conf.h file (default value
mbed_official 354:e67efb2aab0e 1045 * 8 MHz), user has to ensure that HSE_VALUE is same as the real
mbed_official 354:e67efb2aab0e 1046 * frequency of the crystal used. Otherwise, this function may
mbed_official 354:e67efb2aab0e 1047 * have wrong result.
mbed_official 354:e67efb2aab0e 1048 *
mbed_official 354:e67efb2aab0e 1049 * @note The result of this function could be not correct when using fractional
mbed_official 354:e67efb2aab0e 1050 * value for HSE crystal.
mbed_official 354:e67efb2aab0e 1051 *
mbed_official 354:e67efb2aab0e 1052 * @note This function can be used by the user application to compute the
mbed_official 354:e67efb2aab0e 1053 * baudrate for the communication peripherals or configure other parameters.
mbed_official 354:e67efb2aab0e 1054 *
mbed_official 354:e67efb2aab0e 1055 * @note Each time SYSCLK changes, this function must be called to update the
mbed_official 354:e67efb2aab0e 1056 * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
mbed_official 354:e67efb2aab0e 1057 *
mbed_official 354:e67efb2aab0e 1058 *
mbed_official 354:e67efb2aab0e 1059 * @retval SYSCLK frequency
mbed_official 354:e67efb2aab0e 1060 */
mbed_official 354:e67efb2aab0e 1061 uint32_t HAL_RCC_GetSysClockFreq(void)
mbed_official 354:e67efb2aab0e 1062 {
mbed_official 354:e67efb2aab0e 1063 uint32_t tmpreg = 0, pllm = 0, plld = 0, pllvco = 0, msiclkrange = 0;
mbed_official 354:e67efb2aab0e 1064 uint32_t sysclockfreq = 0;
mbed_official 354:e67efb2aab0e 1065
mbed_official 354:e67efb2aab0e 1066 tmpreg = RCC->CFGR;
mbed_official 354:e67efb2aab0e 1067
mbed_official 354:e67efb2aab0e 1068 /* Get SYSCLK source -------------------------------------------------------*/
mbed_official 354:e67efb2aab0e 1069 switch (tmpreg & RCC_CFGR_SWS)
mbed_official 354:e67efb2aab0e 1070 {
mbed_official 354:e67efb2aab0e 1071 case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */
mbed_official 354:e67efb2aab0e 1072 {
mbed_official 354:e67efb2aab0e 1073 sysclockfreq = HSI_VALUE;
mbed_official 354:e67efb2aab0e 1074 break;
mbed_official 354:e67efb2aab0e 1075 }
mbed_official 354:e67efb2aab0e 1076 case RCC_CFGR_SWS_HSE: /* HSE used as system clock */
mbed_official 354:e67efb2aab0e 1077 {
mbed_official 354:e67efb2aab0e 1078 sysclockfreq = HSE_VALUE;
mbed_official 354:e67efb2aab0e 1079 break;
mbed_official 354:e67efb2aab0e 1080 }
mbed_official 354:e67efb2aab0e 1081 case RCC_CFGR_SWS_PLL: /* PLL used as system clock */
mbed_official 354:e67efb2aab0e 1082 {
mbed_official 354:e67efb2aab0e 1083 pllm = aPLLMulFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> POSITION_VAL(RCC_CFGR_PLLMUL)];
mbed_official 354:e67efb2aab0e 1084 plld = aPLLDivisionFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLDIV) >> POSITION_VAL(RCC_CFGR_PLLDIV)];
mbed_official 354:e67efb2aab0e 1085 if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
mbed_official 354:e67efb2aab0e 1086 {
mbed_official 354:e67efb2aab0e 1087 /* HSE used as PLL clock source */
mbed_official 354:e67efb2aab0e 1088 pllvco = HSE_VALUE * (pllm / plld);
mbed_official 354:e67efb2aab0e 1089 }
mbed_official 354:e67efb2aab0e 1090 else
mbed_official 354:e67efb2aab0e 1091 {
mbed_official 354:e67efb2aab0e 1092 /* HSI used as PLL clock source */
mbed_official 354:e67efb2aab0e 1093 pllvco = HSI_VALUE * (pllm / plld);
mbed_official 354:e67efb2aab0e 1094 }
mbed_official 354:e67efb2aab0e 1095 sysclockfreq = pllvco;
mbed_official 354:e67efb2aab0e 1096 break;
mbed_official 354:e67efb2aab0e 1097 }
mbed_official 354:e67efb2aab0e 1098 case RCC_CFGR_SWS_MSI: /* MSI used as system clock source */
mbed_official 354:e67efb2aab0e 1099 default: /* MSI used as system clock */
mbed_official 354:e67efb2aab0e 1100 {
mbed_official 354:e67efb2aab0e 1101 msiclkrange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE ) >> POSITION_VAL(RCC_ICSCR_MSIRANGE);
mbed_official 354:e67efb2aab0e 1102 sysclockfreq = (32768 * (1 << (msiclkrange + 1)));
mbed_official 354:e67efb2aab0e 1103 break;
mbed_official 354:e67efb2aab0e 1104 }
mbed_official 354:e67efb2aab0e 1105 }
mbed_official 354:e67efb2aab0e 1106 return sysclockfreq;
mbed_official 354:e67efb2aab0e 1107 }
mbed_official 354:e67efb2aab0e 1108
mbed_official 354:e67efb2aab0e 1109 /**
mbed_official 354:e67efb2aab0e 1110 * @brief Returns the HCLK frequency
mbed_official 354:e67efb2aab0e 1111 * @note Each time HCLK changes, this function must be called to update the
mbed_official 354:e67efb2aab0e 1112 * right HCLK value. Otherwise, any configuration based on this function will be incorrect.
mbed_official 354:e67efb2aab0e 1113 *
mbed_official 354:e67efb2aab0e 1114 * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
mbed_official 354:e67efb2aab0e 1115 * and updated within this function
mbed_official 354:e67efb2aab0e 1116 * @retval HCLK frequency
mbed_official 354:e67efb2aab0e 1117 */
mbed_official 354:e67efb2aab0e 1118 uint32_t HAL_RCC_GetHCLKFreq(void)
mbed_official 354:e67efb2aab0e 1119 {
mbed_official 354:e67efb2aab0e 1120 SystemCoreClock = HAL_RCC_GetSysClockFreq() >> aAPBAHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> POSITION_VAL(RCC_CFGR_HPRE)];
mbed_official 354:e67efb2aab0e 1121 return SystemCoreClock;
mbed_official 354:e67efb2aab0e 1122 }
mbed_official 354:e67efb2aab0e 1123
mbed_official 354:e67efb2aab0e 1124 /**
mbed_official 354:e67efb2aab0e 1125 * @brief Returns the PCLK1 frequency
mbed_official 354:e67efb2aab0e 1126 * @note Each time PCLK1 changes, this function must be called to update the
mbed_official 354:e67efb2aab0e 1127 * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
mbed_official 354:e67efb2aab0e 1128 * @retval PCLK1 frequency
mbed_official 354:e67efb2aab0e 1129 */
mbed_official 354:e67efb2aab0e 1130 uint32_t HAL_RCC_GetPCLK1Freq(void)
mbed_official 354:e67efb2aab0e 1131 {
mbed_official 354:e67efb2aab0e 1132 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
mbed_official 354:e67efb2aab0e 1133 return (HAL_RCC_GetHCLKFreq() >> aAPBAHBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> POSITION_VAL(RCC_CFGR_PPRE1)]);
mbed_official 354:e67efb2aab0e 1134 }
mbed_official 354:e67efb2aab0e 1135
mbed_official 354:e67efb2aab0e 1136 /**
mbed_official 354:e67efb2aab0e 1137 * @brief Returns the PCLK2 frequency
mbed_official 354:e67efb2aab0e 1138 * @note Each time PCLK2 changes, this function must be called to update the
mbed_official 354:e67efb2aab0e 1139 * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
mbed_official 354:e67efb2aab0e 1140 * @retval PCLK2 frequency
mbed_official 354:e67efb2aab0e 1141 */
mbed_official 354:e67efb2aab0e 1142 uint32_t HAL_RCC_GetPCLK2Freq(void)
mbed_official 354:e67efb2aab0e 1143 {
mbed_official 354:e67efb2aab0e 1144 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
mbed_official 354:e67efb2aab0e 1145 return (HAL_RCC_GetHCLKFreq()>> aAPBAHBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> POSITION_VAL(RCC_CFGR_PPRE2)]);
mbed_official 354:e67efb2aab0e 1146 }
mbed_official 354:e67efb2aab0e 1147
mbed_official 354:e67efb2aab0e 1148 /**
mbed_official 354:e67efb2aab0e 1149 * @brief Configures the RCC_OscInitStruct according to the internal
mbed_official 354:e67efb2aab0e 1150 * RCC configuration registers.
mbed_official 354:e67efb2aab0e 1151 * @param RCC_OscInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official 354:e67efb2aab0e 1152 * will be configured.
mbed_official 354:e67efb2aab0e 1153 * @retval None
mbed_official 354:e67efb2aab0e 1154 */
mbed_official 354:e67efb2aab0e 1155 void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
mbed_official 354:e67efb2aab0e 1156 {
mbed_official 354:e67efb2aab0e 1157 /* Set all possible values for the Oscillator type parameter ---------------*/
mbed_official 354:e67efb2aab0e 1158 RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI \
mbed_official 354:e67efb2aab0e 1159 | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_MSI;
mbed_official 354:e67efb2aab0e 1160
mbed_official 354:e67efb2aab0e 1161 /* Get the HSE configuration -----------------------------------------------*/
mbed_official 354:e67efb2aab0e 1162 if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP)
mbed_official 354:e67efb2aab0e 1163 {
mbed_official 354:e67efb2aab0e 1164 RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS;
mbed_official 354:e67efb2aab0e 1165 }
mbed_official 354:e67efb2aab0e 1166 else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON)
mbed_official 354:e67efb2aab0e 1167 {
mbed_official 354:e67efb2aab0e 1168 RCC_OscInitStruct->HSEState = RCC_HSE_ON;
mbed_official 354:e67efb2aab0e 1169 }
mbed_official 354:e67efb2aab0e 1170 else
mbed_official 354:e67efb2aab0e 1171 {
mbed_official 354:e67efb2aab0e 1172 RCC_OscInitStruct->HSEState = RCC_HSE_OFF;
mbed_official 354:e67efb2aab0e 1173 }
mbed_official 354:e67efb2aab0e 1174
mbed_official 354:e67efb2aab0e 1175 /* Get the HSI configuration -----------------------------------------------*/
mbed_official 354:e67efb2aab0e 1176 if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION)
mbed_official 354:e67efb2aab0e 1177 {
mbed_official 354:e67efb2aab0e 1178 RCC_OscInitStruct->HSIState = RCC_HSI_ON;
mbed_official 354:e67efb2aab0e 1179 }
mbed_official 354:e67efb2aab0e 1180 else
mbed_official 354:e67efb2aab0e 1181 {
mbed_official 354:e67efb2aab0e 1182 RCC_OscInitStruct->HSIState = RCC_HSI_OFF;
mbed_official 354:e67efb2aab0e 1183 }
mbed_official 354:e67efb2aab0e 1184
mbed_official 354:e67efb2aab0e 1185 RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->ICSCR & RCC_ICSCR_HSITRIM) >> POSITION_VAL(RCC_ICSCR_HSITRIM));
mbed_official 354:e67efb2aab0e 1186
mbed_official 354:e67efb2aab0e 1187 /* Get the MSI configuration -----------------------------------------------*/
mbed_official 354:e67efb2aab0e 1188 if((RCC->CR &RCC_CR_MSION) == RCC_CR_MSION)
mbed_official 354:e67efb2aab0e 1189 {
mbed_official 354:e67efb2aab0e 1190 RCC_OscInitStruct->MSIState = RCC_MSI_ON;
mbed_official 354:e67efb2aab0e 1191 }
mbed_official 354:e67efb2aab0e 1192 else
mbed_official 354:e67efb2aab0e 1193 {
mbed_official 354:e67efb2aab0e 1194 RCC_OscInitStruct->MSIState = RCC_MSI_OFF;
mbed_official 354:e67efb2aab0e 1195 }
mbed_official 354:e67efb2aab0e 1196
mbed_official 354:e67efb2aab0e 1197 RCC_OscInitStruct->MSICalibrationValue = (uint32_t)((RCC->ICSCR & RCC_ICSCR_MSITRIM) >> POSITION_VAL(RCC_ICSCR_MSITRIM));
mbed_official 354:e67efb2aab0e 1198 RCC_OscInitStruct->MSIClockRange = (uint32_t)((RCC->ICSCR & RCC_ICSCR_MSIRANGE));
mbed_official 354:e67efb2aab0e 1199
mbed_official 354:e67efb2aab0e 1200 /* Get the LSE configuration -----------------------------------------------*/
mbed_official 354:e67efb2aab0e 1201 if((RCC->CSR &RCC_CSR_LSEBYP) == RCC_CSR_LSEBYP)
mbed_official 354:e67efb2aab0e 1202 {
mbed_official 354:e67efb2aab0e 1203 RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS;
mbed_official 354:e67efb2aab0e 1204 }
mbed_official 354:e67efb2aab0e 1205 else if((RCC->CSR &RCC_CSR_LSEON) == RCC_CSR_LSEON)
mbed_official 354:e67efb2aab0e 1206 {
mbed_official 354:e67efb2aab0e 1207 RCC_OscInitStruct->LSEState = RCC_LSE_ON;
mbed_official 354:e67efb2aab0e 1208 }
mbed_official 354:e67efb2aab0e 1209 else
mbed_official 354:e67efb2aab0e 1210 {
mbed_official 354:e67efb2aab0e 1211 RCC_OscInitStruct->LSEState = RCC_LSE_OFF;
mbed_official 354:e67efb2aab0e 1212 }
mbed_official 354:e67efb2aab0e 1213
mbed_official 354:e67efb2aab0e 1214 /* Get the LSI configuration -----------------------------------------------*/
mbed_official 354:e67efb2aab0e 1215 if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION)
mbed_official 354:e67efb2aab0e 1216 {
mbed_official 354:e67efb2aab0e 1217 RCC_OscInitStruct->LSIState = RCC_LSI_ON;
mbed_official 354:e67efb2aab0e 1218 }
mbed_official 354:e67efb2aab0e 1219 else
mbed_official 354:e67efb2aab0e 1220 {
mbed_official 354:e67efb2aab0e 1221 RCC_OscInitStruct->LSIState = RCC_LSI_OFF;
mbed_official 354:e67efb2aab0e 1222 }
mbed_official 354:e67efb2aab0e 1223
mbed_official 354:e67efb2aab0e 1224 /* Get the PLL configuration -----------------------------------------------*/
mbed_official 354:e67efb2aab0e 1225 if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON)
mbed_official 354:e67efb2aab0e 1226 {
mbed_official 354:e67efb2aab0e 1227 RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON;
mbed_official 354:e67efb2aab0e 1228 }
mbed_official 354:e67efb2aab0e 1229 else
mbed_official 354:e67efb2aab0e 1230 {
mbed_official 354:e67efb2aab0e 1231 RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF;
mbed_official 354:e67efb2aab0e 1232 }
mbed_official 354:e67efb2aab0e 1233 RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLSRC);
mbed_official 354:e67efb2aab0e 1234 RCC_OscInitStruct->PLL.PLLMUL = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLMUL);
mbed_official 354:e67efb2aab0e 1235 RCC_OscInitStruct->PLL.PLLDIV = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLDIV);
mbed_official 354:e67efb2aab0e 1236 }
mbed_official 354:e67efb2aab0e 1237
mbed_official 354:e67efb2aab0e 1238 /**
mbed_official 354:e67efb2aab0e 1239 * @brief Configures the RCC_ClkInitStruct according to the internal
mbed_official 354:e67efb2aab0e 1240 * RCC configuration registers.
mbed_official 354:e67efb2aab0e 1241 * @param RCC_ClkInitStruct: pointer to an RCC_ClkInitTypeDef structure that
mbed_official 354:e67efb2aab0e 1242 * will be configured.
mbed_official 354:e67efb2aab0e 1243 * @param pFLatency: Pointer on the Flash Latency.
mbed_official 354:e67efb2aab0e 1244 * @retval None
mbed_official 354:e67efb2aab0e 1245 */
mbed_official 354:e67efb2aab0e 1246 void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency)
mbed_official 354:e67efb2aab0e 1247 {
mbed_official 354:e67efb2aab0e 1248 /* Set all possible values for the Clock type parameter --------------------*/
mbed_official 354:e67efb2aab0e 1249 RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
mbed_official 354:e67efb2aab0e 1250
mbed_official 354:e67efb2aab0e 1251 /* Get the SYSCLK configuration --------------------------------------------*/
mbed_official 354:e67efb2aab0e 1252 RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
mbed_official 354:e67efb2aab0e 1253
mbed_official 354:e67efb2aab0e 1254 /* Get the HCLK configuration ----------------------------------------------*/
mbed_official 354:e67efb2aab0e 1255 RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE);
mbed_official 354:e67efb2aab0e 1256
mbed_official 354:e67efb2aab0e 1257 /* Get the APB1 configuration ----------------------------------------------*/
mbed_official 354:e67efb2aab0e 1258 RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1);
mbed_official 354:e67efb2aab0e 1259
mbed_official 354:e67efb2aab0e 1260 /* Get the APB2 configuration ----------------------------------------------*/
mbed_official 354:e67efb2aab0e 1261 RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3);
mbed_official 354:e67efb2aab0e 1262
mbed_official 354:e67efb2aab0e 1263 /* Get the Flash Wait State (Latency) configuration ------------------------*/
mbed_official 354:e67efb2aab0e 1264 *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
mbed_official 354:e67efb2aab0e 1265 }
mbed_official 354:e67efb2aab0e 1266
mbed_official 354:e67efb2aab0e 1267 /**
mbed_official 354:e67efb2aab0e 1268 * @brief This function handles the RCC CSS interrupt request.
mbed_official 354:e67efb2aab0e 1269 * @note This API should be called under the NMI_Handler().
mbed_official 354:e67efb2aab0e 1270 * @retval None
mbed_official 354:e67efb2aab0e 1271 */
mbed_official 354:e67efb2aab0e 1272 void HAL_RCC_NMI_IRQHandler(void)
mbed_official 354:e67efb2aab0e 1273 {
mbed_official 354:e67efb2aab0e 1274 /* Check RCC CSSF flag */
mbed_official 354:e67efb2aab0e 1275 if(__HAL_RCC_GET_IT(RCC_IT_CSS))
mbed_official 354:e67efb2aab0e 1276 {
mbed_official 354:e67efb2aab0e 1277 /* RCC Clock Security System interrupt user callback */
mbed_official 354:e67efb2aab0e 1278 HAL_RCC_CCSCallback();
mbed_official 354:e67efb2aab0e 1279
mbed_official 354:e67efb2aab0e 1280 /* Clear RCC CSS pending bit */
mbed_official 354:e67efb2aab0e 1281 __HAL_RCC_CLEAR_IT(RCC_IT_CSS);
mbed_official 354:e67efb2aab0e 1282 }
mbed_official 354:e67efb2aab0e 1283 }
mbed_official 354:e67efb2aab0e 1284
mbed_official 354:e67efb2aab0e 1285 /**
mbed_official 354:e67efb2aab0e 1286 * @brief RCC Clock Security System interrupt callback
mbed_official 354:e67efb2aab0e 1287 * @retval none
mbed_official 354:e67efb2aab0e 1288 */
mbed_official 354:e67efb2aab0e 1289 __weak void HAL_RCC_CCSCallback(void)
mbed_official 354:e67efb2aab0e 1290 {
mbed_official 354:e67efb2aab0e 1291 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 354:e67efb2aab0e 1292 the HAL_RCC_CCSCallback could be implemented in the user file
mbed_official 354:e67efb2aab0e 1293 */
mbed_official 354:e67efb2aab0e 1294 }
mbed_official 354:e67efb2aab0e 1295
mbed_official 354:e67efb2aab0e 1296 /**
mbed_official 354:e67efb2aab0e 1297 * @}
mbed_official 354:e67efb2aab0e 1298 */
mbed_official 354:e67efb2aab0e 1299
mbed_official 354:e67efb2aab0e 1300 /**
mbed_official 354:e67efb2aab0e 1301 * @}
mbed_official 354:e67efb2aab0e 1302 */
mbed_official 354:e67efb2aab0e 1303
mbed_official 354:e67efb2aab0e 1304 #endif /* HAL_RCC_MODULE_ENABLED */
mbed_official 354:e67efb2aab0e 1305 /**
mbed_official 354:e67efb2aab0e 1306 * @}
mbed_official 354:e67efb2aab0e 1307 */
mbed_official 354:e67efb2aab0e 1308
mbed_official 354:e67efb2aab0e 1309 /**
mbed_official 354:e67efb2aab0e 1310 * @}
mbed_official 354:e67efb2aab0e 1311 */
mbed_official 354:e67efb2aab0e 1312
mbed_official 354:e67efb2aab0e 1313 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/