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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_dma.h@579:53297373a894, 2015-07-01 (annotated)

Committer:
mbed_official
Date:
Wed Jul 01 09:45:11 2015 +0100
Revision:
579:53297373a894
Parent:
394:83f921546702 
Synchronized with git revision d5b4d2ab9c47edb4dc5776e7177b0c2263459081



Full URL: https://github.com/mbedmicro/mbed/commit/d5b4d2ab9c47edb4dc5776e7177b0c2263459081/



Initial version of drivers for SAMR21

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 354:e67efb2aab0e 1 /**
mbed_official 354:e67efb2aab0e 2 ******************************************************************************
mbed_official 354:e67efb2aab0e 3 * @file stm32l1xx_hal_dma.h
mbed_official 354:e67efb2aab0e 4 * @author MCD Application Team
mbed_official 354:e67efb2aab0e 5 * @version V1.0.0
mbed_official 354:e67efb2aab0e 6 * @date 5-September-2014
mbed_official 354:e67efb2aab0e 7 * @brief Header file of DMA HAL module.
mbed_official 354:e67efb2aab0e 8 ******************************************************************************
mbed_official 354:e67efb2aab0e 9 * @attention
mbed_official 354:e67efb2aab0e 10 *
mbed_official 354:e67efb2aab0e 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 354:e67efb2aab0e 12 *
mbed_official 354:e67efb2aab0e 13 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 354:e67efb2aab0e 14 * are permitted provided that the following conditions are met:
mbed_official 354:e67efb2aab0e 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 354:e67efb2aab0e 16 * this list of conditions and the following disclaimer.
mbed_official 354:e67efb2aab0e 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 354:e67efb2aab0e 18 * this list of conditions and the following disclaimer in the documentation
mbed_official 354:e67efb2aab0e 19 * and/or other materials provided with the distribution.
mbed_official 354:e67efb2aab0e 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 354:e67efb2aab0e 21 * may be used to endorse or promote products derived from this software
mbed_official 354:e67efb2aab0e 22 * without specific prior written permission.
mbed_official 354:e67efb2aab0e 23 *
mbed_official 354:e67efb2aab0e 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 354:e67efb2aab0e 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 354:e67efb2aab0e 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 354:e67efb2aab0e 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 354:e67efb2aab0e 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 354:e67efb2aab0e 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 354:e67efb2aab0e 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 354:e67efb2aab0e 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 354:e67efb2aab0e 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 354:e67efb2aab0e 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 354:e67efb2aab0e 34 *
mbed_official 354:e67efb2aab0e 35 ******************************************************************************
mbed_official 354:e67efb2aab0e 36 */
mbed_official 354:e67efb2aab0e 37
mbed_official 354:e67efb2aab0e 38 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 354:e67efb2aab0e 39 #ifndef __STM32L1xx_HAL_DMA_H
mbed_official 354:e67efb2aab0e 40 #define __STM32L1xx_HAL_DMA_H
mbed_official 354:e67efb2aab0e 41
mbed_official 354:e67efb2aab0e 42 #ifdef __cplusplus
mbed_official 354:e67efb2aab0e 43 extern "C" {
mbed_official 354:e67efb2aab0e 44 #endif
mbed_official 354:e67efb2aab0e 45
mbed_official 354:e67efb2aab0e 46 /* Includes ------------------------------------------------------------------*/
mbed_official 354:e67efb2aab0e 47 #include "stm32l1xx_hal_def.h"
mbed_official 354:e67efb2aab0e 48
mbed_official 354:e67efb2aab0e 49 /** @addtogroup STM32L1xx_HAL_Driver
mbed_official 354:e67efb2aab0e 50 * @{
mbed_official 354:e67efb2aab0e 51 */
mbed_official 354:e67efb2aab0e 52
mbed_official 354:e67efb2aab0e 53 /** @addtogroup DMA
mbed_official 354:e67efb2aab0e 54 * @{
mbed_official 354:e67efb2aab0e 55 */
mbed_official 354:e67efb2aab0e 56
mbed_official 354:e67efb2aab0e 57 /* Exported types ------------------------------------------------------------*/
mbed_official 354:e67efb2aab0e 58 /** @defgroup DMA_Exported_Types DMA Exported Types
mbed_official 354:e67efb2aab0e 59 * @{
mbed_official 354:e67efb2aab0e 60 */
mbed_official 354:e67efb2aab0e 61
mbed_official 354:e67efb2aab0e 62 /**
mbed_official 354:e67efb2aab0e 63 * @brief DMA Configuration Structure definition
mbed_official 354:e67efb2aab0e 64 */
mbed_official 354:e67efb2aab0e 65 typedef struct
mbed_official 354:e67efb2aab0e 66 {
mbed_official 354:e67efb2aab0e 67 uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral,
mbed_official 354:e67efb2aab0e 68 from memory to memory or from peripheral to memory.
mbed_official 354:e67efb2aab0e 69 This parameter can be a value of @ref DMA_Data_transfer_direction */
mbed_official 354:e67efb2aab0e 70
mbed_official 354:e67efb2aab0e 71 uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should be incremented or not.
mbed_official 354:e67efb2aab0e 72 This parameter can be a value of @ref DMA_Peripheral_incremented_mode */
mbed_official 354:e67efb2aab0e 73
mbed_official 354:e67efb2aab0e 74 uint32_t MemInc; /*!< Specifies whether the memory address register should be incremented or not.
mbed_official 354:e67efb2aab0e 75 This parameter can be a value of @ref DMA_Memory_incremented_mode */
mbed_official 354:e67efb2aab0e 76
mbed_official 354:e67efb2aab0e 77 uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width.
mbed_official 354:e67efb2aab0e 78 This parameter can be a value of @ref DMA_Peripheral_data_size */
mbed_official 354:e67efb2aab0e 79
mbed_official 354:e67efb2aab0e 80 uint32_t MemDataAlignment; /*!< Specifies the Memory data width.
mbed_official 354:e67efb2aab0e 81 This parameter can be a value of @ref DMA_Memory_data_size */
mbed_official 354:e67efb2aab0e 82
mbed_official 354:e67efb2aab0e 83 uint32_t Mode; /*!< Specifies the operation mode of the DMAy Channelx.
mbed_official 354:e67efb2aab0e 84 This parameter can be a value of @ref DMA_mode
mbed_official 354:e67efb2aab0e 85 @note The circular buffer mode cannot be used if the memory-to-memory
mbed_official 354:e67efb2aab0e 86 data transfer is configured on the selected Channel */
mbed_official 354:e67efb2aab0e 87
mbed_official 354:e67efb2aab0e 88 uint32_t Priority; /*!< Specifies the software priority for the DMAy Channelx.
mbed_official 354:e67efb2aab0e 89 This parameter can be a value of @ref DMA_Priority_level */
mbed_official 354:e67efb2aab0e 90
mbed_official 354:e67efb2aab0e 91 } DMA_InitTypeDef;
mbed_official 354:e67efb2aab0e 92
mbed_official 354:e67efb2aab0e 93 /**
mbed_official 354:e67efb2aab0e 94 * @brief DMA Configuration enumeration values definition
mbed_official 354:e67efb2aab0e 95 */
mbed_official 354:e67efb2aab0e 96 typedef enum
mbed_official 354:e67efb2aab0e 97 {
mbed_official 354:e67efb2aab0e 98 DMA_MODE = 0, /*!< Control related DMA mode Parameter in DMA_InitTypeDef */
mbed_official 354:e67efb2aab0e 99 DMA_PRIORITY = 1, /*!< Control related priority level Parameter in DMA_InitTypeDef */
mbed_official 354:e67efb2aab0e 100
mbed_official 354:e67efb2aab0e 101 } DMA_ControlTypeDef;
mbed_official 354:e67efb2aab0e 102
mbed_official 354:e67efb2aab0e 103 /**
mbed_official 354:e67efb2aab0e 104 * @brief HAL DMA State structures definition
mbed_official 354:e67efb2aab0e 105 */
mbed_official 354:e67efb2aab0e 106 typedef enum
mbed_official 354:e67efb2aab0e 107 {
mbed_official 354:e67efb2aab0e 108 HAL_DMA_STATE_RESET = 0x00, /*!< DMA not yet initialized or disabled */
mbed_official 354:e67efb2aab0e 109 HAL_DMA_STATE_READY = 0x01, /*!< DMA process success and ready for use */
mbed_official 354:e67efb2aab0e 110 HAL_DMA_STATE_READY_HALF = 0x11, /*!< DMA Half process success */
mbed_official 354:e67efb2aab0e 111 HAL_DMA_STATE_BUSY = 0x02, /*!< DMA process is ongoing */
mbed_official 354:e67efb2aab0e 112 HAL_DMA_STATE_TIMEOUT = 0x03, /*!< DMA timeout state */
mbed_official 354:e67efb2aab0e 113 HAL_DMA_STATE_ERROR = 0x04, /*!< DMA error state */
mbed_official 354:e67efb2aab0e 114
mbed_official 354:e67efb2aab0e 115 }HAL_DMA_StateTypeDef;
mbed_official 354:e67efb2aab0e 116
mbed_official 354:e67efb2aab0e 117 /**
mbed_official 354:e67efb2aab0e 118 * @brief HAL DMA Error Code structure definition
mbed_official 354:e67efb2aab0e 119 */
mbed_official 354:e67efb2aab0e 120 typedef enum
mbed_official 354:e67efb2aab0e 121 {
mbed_official 354:e67efb2aab0e 122 HAL_DMA_FULL_TRANSFER = 0x00, /*!< Full transfer */
mbed_official 354:e67efb2aab0e 123 HAL_DMA_HALF_TRANSFER = 0x01, /*!< Half Transfer */
mbed_official 354:e67efb2aab0e 124
mbed_official 354:e67efb2aab0e 125 }HAL_DMA_LevelCompleteTypeDef;
mbed_official 354:e67efb2aab0e 126
mbed_official 354:e67efb2aab0e 127
mbed_official 354:e67efb2aab0e 128 /**
mbed_official 354:e67efb2aab0e 129 * @brief DMA handle Structure definition
mbed_official 354:e67efb2aab0e 130 */
mbed_official 354:e67efb2aab0e 131 typedef struct __DMA_HandleTypeDef
mbed_official 354:e67efb2aab0e 132 {
mbed_official 354:e67efb2aab0e 133 DMA_Channel_TypeDef *Instance; /*!< Register base address */
mbed_official 354:e67efb2aab0e 134
mbed_official 354:e67efb2aab0e 135 DMA_InitTypeDef Init; /*!< DMA communication parameters */
mbed_official 354:e67efb2aab0e 136
mbed_official 354:e67efb2aab0e 137 HAL_LockTypeDef Lock; /*!< DMA locking object */
mbed_official 354:e67efb2aab0e 138
mbed_official 354:e67efb2aab0e 139 HAL_DMA_StateTypeDef State; /*!< DMA transfer state */
mbed_official 354:e67efb2aab0e 140
mbed_official 354:e67efb2aab0e 141 void *Parent; /*!< Parent object state */
mbed_official 354:e67efb2aab0e 142
mbed_official 354:e67efb2aab0e 143 void (* XferCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */
mbed_official 354:e67efb2aab0e 144
mbed_official 354:e67efb2aab0e 145 void (* XferHalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */
mbed_official 354:e67efb2aab0e 146
mbed_official 354:e67efb2aab0e 147 void (* XferErrorCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */
mbed_official 354:e67efb2aab0e 148
mbed_official 354:e67efb2aab0e 149 __IO uint32_t ErrorCode; /*!< DMA Error code */
mbed_official 354:e67efb2aab0e 150
mbed_official 354:e67efb2aab0e 151 } DMA_HandleTypeDef;
mbed_official 354:e67efb2aab0e 152 /**
mbed_official 354:e67efb2aab0e 153 * @}
mbed_official 354:e67efb2aab0e 154 */
mbed_official 354:e67efb2aab0e 155
mbed_official 354:e67efb2aab0e 156
mbed_official 354:e67efb2aab0e 157
mbed_official 354:e67efb2aab0e 158 /* Exported constants --------------------------------------------------------*/
mbed_official 354:e67efb2aab0e 159
mbed_official 354:e67efb2aab0e 160 /** @defgroup DMA_Exported_Constants DMA Exported Constants
mbed_official 354:e67efb2aab0e 161 * @{
mbed_official 354:e67efb2aab0e 162 */
mbed_official 354:e67efb2aab0e 163
mbed_official 354:e67efb2aab0e 164 /** @defgroup DMA_Error_Code DMA_Error_Code
mbed_official 354:e67efb2aab0e 165 * @{
mbed_official 354:e67efb2aab0e 166 */
mbed_official 354:e67efb2aab0e 167 #define HAL_DMA_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
mbed_official 354:e67efb2aab0e 168 #define HAL_DMA_ERROR_TE ((uint32_t)0x00000001) /*!< Transfer error */
mbed_official 354:e67efb2aab0e 169 #define HAL_DMA_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
mbed_official 354:e67efb2aab0e 170 /**
mbed_official 354:e67efb2aab0e 171 * @}
mbed_official 354:e67efb2aab0e 172 */
mbed_official 354:e67efb2aab0e 173
mbed_official 354:e67efb2aab0e 174
mbed_official 354:e67efb2aab0e 175 /** @defgroup DMA_Data_transfer_direction DMA_Data_transfer_direction
mbed_official 354:e67efb2aab0e 176 * @{
mbed_official 354:e67efb2aab0e 177 */
mbed_official 354:e67efb2aab0e 178 #define DMA_PERIPH_TO_MEMORY ((uint32_t)0x00000000) /*!< Peripheral to memory direction */
mbed_official 354:e67efb2aab0e 179 #define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_CCR_DIR) /*!< Memory to peripheral direction */
mbed_official 354:e67efb2aab0e 180 #define DMA_MEMORY_TO_MEMORY ((uint32_t)(DMA_CCR_MEM2MEM)) /*!< Memory to memory direction */
mbed_official 354:e67efb2aab0e 181
mbed_official 354:e67efb2aab0e 182 #define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \
mbed_official 354:e67efb2aab0e 183 ((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \
mbed_official 354:e67efb2aab0e 184 ((DIRECTION) == DMA_MEMORY_TO_MEMORY))
mbed_official 354:e67efb2aab0e 185 /**
mbed_official 354:e67efb2aab0e 186 * @}
mbed_official 354:e67efb2aab0e 187 */
mbed_official 354:e67efb2aab0e 188
mbed_official 354:e67efb2aab0e 189 /** @defgroup DMA_Data_buffer_size DMA_Data_buffer_size
mbed_official 354:e67efb2aab0e 190 * @{
mbed_official 354:e67efb2aab0e 191 */
mbed_official 354:e67efb2aab0e 192 #define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))
mbed_official 354:e67efb2aab0e 193 /**
mbed_official 354:e67efb2aab0e 194 * @}
mbed_official 354:e67efb2aab0e 195 */
mbed_official 354:e67efb2aab0e 196
mbed_official 354:e67efb2aab0e 197 /** @defgroup DMA_Peripheral_incremented_mode DMA_Peripheral_incremented_mode
mbed_official 354:e67efb2aab0e 198 * @{
mbed_official 354:e67efb2aab0e 199 */
mbed_official 354:e67efb2aab0e 200 #define DMA_PINC_ENABLE ((uint32_t)DMA_CCR_PINC) /*!< Peripheral increment mode Enable */
mbed_official 354:e67efb2aab0e 201 #define DMA_PINC_DISABLE ((uint32_t)0x00000000) /*!< Peripheral increment mode Disable */
mbed_official 354:e67efb2aab0e 202
mbed_official 354:e67efb2aab0e 203 #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \
mbed_official 354:e67efb2aab0e 204 ((STATE) == DMA_PINC_DISABLE))
mbed_official 354:e67efb2aab0e 205 /**
mbed_official 354:e67efb2aab0e 206 * @}
mbed_official 354:e67efb2aab0e 207 */
mbed_official 354:e67efb2aab0e 208
mbed_official 354:e67efb2aab0e 209 /** @defgroup DMA_Memory_incremented_mode DMA_Memory_incremented_mode
mbed_official 354:e67efb2aab0e 210 * @{
mbed_official 354:e67efb2aab0e 211 */
mbed_official 354:e67efb2aab0e 212 #define DMA_MINC_ENABLE ((uint32_t)DMA_CCR_MINC) /*!< Memory increment mode Enable */
mbed_official 354:e67efb2aab0e 213 #define DMA_MINC_DISABLE ((uint32_t)0x00000000) /*!< Memory increment mode Disable */
mbed_official 354:e67efb2aab0e 214
mbed_official 354:e67efb2aab0e 215 #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \
mbed_official 354:e67efb2aab0e 216 ((STATE) == DMA_MINC_DISABLE))
mbed_official 354:e67efb2aab0e 217 /**
mbed_official 354:e67efb2aab0e 218 * @}
mbed_official 354:e67efb2aab0e 219 */
mbed_official 354:e67efb2aab0e 220
mbed_official 354:e67efb2aab0e 221 /** @defgroup DMA_Peripheral_data_size DMA_Peripheral_data_size
mbed_official 354:e67efb2aab0e 222 * @{
mbed_official 354:e67efb2aab0e 223 */
mbed_official 354:e67efb2aab0e 224 #define DMA_PDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Peripheral data alignment : Byte */
mbed_official 354:e67efb2aab0e 225 #define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_PSIZE_0) /*!< Peripheral data alignment : HalfWord */
mbed_official 354:e67efb2aab0e 226 #define DMA_PDATAALIGN_WORD ((uint32_t)DMA_CCR_PSIZE_1) /*!< Peripheral data alignment : Word */
mbed_official 354:e67efb2aab0e 227
mbed_official 354:e67efb2aab0e 228 #define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \
mbed_official 354:e67efb2aab0e 229 ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \
mbed_official 354:e67efb2aab0e 230 ((SIZE) == DMA_PDATAALIGN_WORD))
mbed_official 354:e67efb2aab0e 231 /**
mbed_official 354:e67efb2aab0e 232 * @}
mbed_official 354:e67efb2aab0e 233 */
mbed_official 354:e67efb2aab0e 234
mbed_official 354:e67efb2aab0e 235
mbed_official 354:e67efb2aab0e 236 /** @defgroup DMA_Memory_data_size DMA_Memory_data_size
mbed_official 354:e67efb2aab0e 237 * @{
mbed_official 354:e67efb2aab0e 238 */
mbed_official 354:e67efb2aab0e 239 #define DMA_MDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Memory data alignment : Byte */
mbed_official 354:e67efb2aab0e 240 #define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_MSIZE_0) /*!< Memory data alignment : HalfWord */
mbed_official 354:e67efb2aab0e 241 #define DMA_MDATAALIGN_WORD ((uint32_t)DMA_CCR_MSIZE_1) /*!< Memory data alignment : Word */
mbed_official 354:e67efb2aab0e 242
mbed_official 354:e67efb2aab0e 243 #define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \
mbed_official 354:e67efb2aab0e 244 ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \
mbed_official 354:e67efb2aab0e 245 ((SIZE) == DMA_MDATAALIGN_WORD ))
mbed_official 354:e67efb2aab0e 246 /**
mbed_official 354:e67efb2aab0e 247 * @}
mbed_official 354:e67efb2aab0e 248 */
mbed_official 354:e67efb2aab0e 249
mbed_official 354:e67efb2aab0e 250 /** @defgroup DMA_mode DMA_mode
mbed_official 354:e67efb2aab0e 251 * @{
mbed_official 354:e67efb2aab0e 252 */
mbed_official 354:e67efb2aab0e 253 #define DMA_NORMAL ((uint32_t)0x00000000) /*!< Normal Mode */
mbed_official 354:e67efb2aab0e 254 #define DMA_CIRCULAR ((uint32_t)DMA_CCR_CIRC) /*!< Circular Mode */
mbed_official 354:e67efb2aab0e 255
mbed_official 354:e67efb2aab0e 256 #define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \
mbed_official 354:e67efb2aab0e 257 ((MODE) == DMA_CIRCULAR))
mbed_official 354:e67efb2aab0e 258 /**
mbed_official 354:e67efb2aab0e 259 * @}
mbed_official 354:e67efb2aab0e 260 */
mbed_official 354:e67efb2aab0e 261
mbed_official 354:e67efb2aab0e 262 /** @defgroup DMA_Priority_level DMA_Priority_level
mbed_official 354:e67efb2aab0e 263 * @{
mbed_official 354:e67efb2aab0e 264 */
mbed_official 354:e67efb2aab0e 265 #define DMA_PRIORITY_LOW ((uint32_t)0x00000000) /*!< Priority level : Low */
mbed_official 354:e67efb2aab0e 266 #define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_CCR_PL_0) /*!< Priority level : Medium */
mbed_official 354:e67efb2aab0e 267 #define DMA_PRIORITY_HIGH ((uint32_t)DMA_CCR_PL_1) /*!< Priority level : High */
mbed_official 354:e67efb2aab0e 268 #define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_CCR_PL) /*!< Priority level : Very_High */
mbed_official 354:e67efb2aab0e 269
mbed_official 354:e67efb2aab0e 270 #define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \
mbed_official 354:e67efb2aab0e 271 ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \
mbed_official 354:e67efb2aab0e 272 ((PRIORITY) == DMA_PRIORITY_HIGH) || \
mbed_official 354:e67efb2aab0e 273 ((PRIORITY) == DMA_PRIORITY_VERY_HIGH))
mbed_official 354:e67efb2aab0e 274 /**
mbed_official 354:e67efb2aab0e 275 * @}
mbed_official 354:e67efb2aab0e 276 */
mbed_official 354:e67efb2aab0e 277
mbed_official 354:e67efb2aab0e 278
mbed_official 354:e67efb2aab0e 279 /** @defgroup DMA_interrupt_enable_definitions DMA_interrupt_enable_definitions
mbed_official 354:e67efb2aab0e 280 * @{
mbed_official 354:e67efb2aab0e 281 */
mbed_official 354:e67efb2aab0e 282
mbed_official 354:e67efb2aab0e 283 #define DMA_IT_TC ((uint32_t)DMA_CCR_TCIE)
mbed_official 354:e67efb2aab0e 284 #define DMA_IT_HT ((uint32_t)DMA_CCR_HTIE)
mbed_official 354:e67efb2aab0e 285 #define DMA_IT_TE ((uint32_t)DMA_CCR_TEIE)
mbed_official 354:e67efb2aab0e 286
mbed_official 354:e67efb2aab0e 287 /**
mbed_official 354:e67efb2aab0e 288 * @}
mbed_official 354:e67efb2aab0e 289 */
mbed_official 354:e67efb2aab0e 290
mbed_official 354:e67efb2aab0e 291 /** @defgroup DMA_flag_definitions DMA_flag_definitions
mbed_official 354:e67efb2aab0e 292 * @{
mbed_official 354:e67efb2aab0e 293 */
mbed_official 354:e67efb2aab0e 294
mbed_official 354:e67efb2aab0e 295 #define DMA_FLAG_GL1 ((uint32_t)0x00000001)
mbed_official 354:e67efb2aab0e 296 #define DMA_FLAG_TC1 ((uint32_t)0x00000002)
mbed_official 354:e67efb2aab0e 297 #define DMA_FLAG_HT1 ((uint32_t)0x00000004)
mbed_official 354:e67efb2aab0e 298 #define DMA_FLAG_TE1 ((uint32_t)0x00000008)
mbed_official 354:e67efb2aab0e 299 #define DMA_FLAG_GL2 ((uint32_t)0x00000010)
mbed_official 354:e67efb2aab0e 300 #define DMA_FLAG_TC2 ((uint32_t)0x00000020)
mbed_official 354:e67efb2aab0e 301 #define DMA_FLAG_HT2 ((uint32_t)0x00000040)
mbed_official 354:e67efb2aab0e 302 #define DMA_FLAG_TE2 ((uint32_t)0x00000080)
mbed_official 354:e67efb2aab0e 303 #define DMA_FLAG_GL3 ((uint32_t)0x00000100)
mbed_official 354:e67efb2aab0e 304 #define DMA_FLAG_TC3 ((uint32_t)0x00000200)
mbed_official 354:e67efb2aab0e 305 #define DMA_FLAG_HT3 ((uint32_t)0x00000400)
mbed_official 354:e67efb2aab0e 306 #define DMA_FLAG_TE3 ((uint32_t)0x00000800)
mbed_official 354:e67efb2aab0e 307 #define DMA_FLAG_GL4 ((uint32_t)0x00001000)
mbed_official 354:e67efb2aab0e 308 #define DMA_FLAG_TC4 ((uint32_t)0x00002000)
mbed_official 354:e67efb2aab0e 309 #define DMA_FLAG_HT4 ((uint32_t)0x00004000)
mbed_official 354:e67efb2aab0e 310 #define DMA_FLAG_TE4 ((uint32_t)0x00008000)
mbed_official 354:e67efb2aab0e 311 #define DMA_FLAG_GL5 ((uint32_t)0x00010000)
mbed_official 354:e67efb2aab0e 312 #define DMA_FLAG_TC5 ((uint32_t)0x00020000)
mbed_official 354:e67efb2aab0e 313 #define DMA_FLAG_HT5 ((uint32_t)0x00040000)
mbed_official 354:e67efb2aab0e 314 #define DMA_FLAG_TE5 ((uint32_t)0x00080000)
mbed_official 354:e67efb2aab0e 315 #define DMA_FLAG_GL6 ((uint32_t)0x00100000)
mbed_official 354:e67efb2aab0e 316 #define DMA_FLAG_TC6 ((uint32_t)0x00200000)
mbed_official 354:e67efb2aab0e 317 #define DMA_FLAG_HT6 ((uint32_t)0x00400000)
mbed_official 354:e67efb2aab0e 318 #define DMA_FLAG_TE6 ((uint32_t)0x00800000)
mbed_official 354:e67efb2aab0e 319 #define DMA_FLAG_GL7 ((uint32_t)0x01000000)
mbed_official 354:e67efb2aab0e 320 #define DMA_FLAG_TC7 ((uint32_t)0x02000000)
mbed_official 354:e67efb2aab0e 321 #define DMA_FLAG_HT7 ((uint32_t)0x04000000)
mbed_official 354:e67efb2aab0e 322 #define DMA_FLAG_TE7 ((uint32_t)0x08000000)
mbed_official 354:e67efb2aab0e 323
mbed_official 354:e67efb2aab0e 324
mbed_official 354:e67efb2aab0e 325 /**
mbed_official 354:e67efb2aab0e 326 * @}
mbed_official 354:e67efb2aab0e 327 */
mbed_official 354:e67efb2aab0e 328
mbed_official 354:e67efb2aab0e 329 /**
mbed_official 354:e67efb2aab0e 330 * @}
mbed_official 354:e67efb2aab0e 331 */
mbed_official 354:e67efb2aab0e 332
mbed_official 354:e67efb2aab0e 333 /* Exported macros -----------------------------------------------------------*/
mbed_official 354:e67efb2aab0e 334 /** @defgroup DMA_Exported_macros DMA Exported Macros
mbed_official 354:e67efb2aab0e 335 * @{
mbed_official 354:e67efb2aab0e 336 */
mbed_official 354:e67efb2aab0e 337
mbed_official 354:e67efb2aab0e 338 /** @brief Reset DMA handle state
mbed_official 354:e67efb2aab0e 339 * @param __HANDLE__: DMA handle.
mbed_official 354:e67efb2aab0e 340 * @retval None
mbed_official 354:e67efb2aab0e 341 */
mbed_official 354:e67efb2aab0e 342 #define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
mbed_official 354:e67efb2aab0e 343
mbed_official 354:e67efb2aab0e 344 /**
mbed_official 354:e67efb2aab0e 345 * @brief Enable the specified DMA Channel.
mbed_official 354:e67efb2aab0e 346 * @param __HANDLE__: DMA handle
mbed_official 354:e67efb2aab0e 347 * @retval None.
mbed_official 354:e67efb2aab0e 348 */
mbed_official 354:e67efb2aab0e 349 #define __HAL_DMA_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CCR, DMA_CCR_EN))
mbed_official 354:e67efb2aab0e 350
mbed_official 354:e67efb2aab0e 351 /**
mbed_official 354:e67efb2aab0e 352 * @brief Disable the specified DMA Channel.
mbed_official 354:e67efb2aab0e 353 * @param __HANDLE__: DMA handle
mbed_official 354:e67efb2aab0e 354 * @retval None.
mbed_official 354:e67efb2aab0e 355 */
mbed_official 354:e67efb2aab0e 356 #define __HAL_DMA_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CCR, DMA_CCR_EN))
mbed_official 354:e67efb2aab0e 357
mbed_official 354:e67efb2aab0e 358
mbed_official 354:e67efb2aab0e 359 /* Interrupt & Flag management */
mbed_official 354:e67efb2aab0e 360
mbed_official 354:e67efb2aab0e 361 /**
mbed_official 354:e67efb2aab0e 362 * @brief Enables the specified DMA Channel interrupts.
mbed_official 354:e67efb2aab0e 363 * @param __HANDLE__: DMA handle
mbed_official 354:e67efb2aab0e 364 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
mbed_official 354:e67efb2aab0e 365 * This parameter can be any combination of the following values:
mbed_official 354:e67efb2aab0e 366 * @arg DMA_IT_TC: Transfer complete interrupt mask
mbed_official 354:e67efb2aab0e 367 * @arg DMA_IT_HT: Half transfer complete interrupt mask
mbed_official 354:e67efb2aab0e 368 * @arg DMA_IT_TE: Transfer error interrupt mask
mbed_official 354:e67efb2aab0e 369 * @retval None
mbed_official 354:e67efb2aab0e 370 */
mbed_official 354:e67efb2aab0e 371 #define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CCR, (__INTERRUPT__)))
mbed_official 354:e67efb2aab0e 372
mbed_official 354:e67efb2aab0e 373 /**
mbed_official 354:e67efb2aab0e 374 * @brief Disables the specified DMA Channel interrupts.
mbed_official 354:e67efb2aab0e 375 * @param __HANDLE__: DMA handle
mbed_official 354:e67efb2aab0e 376 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
mbed_official 354:e67efb2aab0e 377 * This parameter can be any combination of the following values:
mbed_official 354:e67efb2aab0e 378 * @arg DMA_IT_TC: Transfer complete interrupt mask
mbed_official 354:e67efb2aab0e 379 * @arg DMA_IT_HT: Half transfer complete interrupt mask
mbed_official 354:e67efb2aab0e 380 * @arg DMA_IT_TE: Transfer error interrupt mask
mbed_official 354:e67efb2aab0e 381 * @retval None
mbed_official 354:e67efb2aab0e 382 */
mbed_official 354:e67efb2aab0e 383 #define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CCR , (__INTERRUPT__)))
mbed_official 354:e67efb2aab0e 384
mbed_official 354:e67efb2aab0e 385 /**
mbed_official 354:e67efb2aab0e 386 * @brief Checks whether the specified DMA Channel interrupt has occurred or not.
mbed_official 354:e67efb2aab0e 387 * @param __HANDLE__: DMA handle
mbed_official 354:e67efb2aab0e 388 * @param __INTERRUPT__: specifies the DMA interrupt source to check.
mbed_official 354:e67efb2aab0e 389 * This parameter can be one of the following values:
mbed_official 354:e67efb2aab0e 390 * @arg DMA_IT_TC: Transfer complete interrupt mask
mbed_official 354:e67efb2aab0e 391 * @arg DMA_IT_HT: Half transfer complete interrupt mask
mbed_official 354:e67efb2aab0e 392 * @arg DMA_IT_TE: Transfer error interrupt mask
mbed_official 354:e67efb2aab0e 393 * @retval The state of DMA_IT (SET or RESET).
mbed_official 354:e67efb2aab0e 394 */
mbed_official 354:e67efb2aab0e 395 #define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CCR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
mbed_official 354:e67efb2aab0e 396
mbed_official 354:e67efb2aab0e 397 /**
mbed_official 354:e67efb2aab0e 398 * @}
mbed_official 354:e67efb2aab0e 399 */
mbed_official 354:e67efb2aab0e 400
mbed_official 354:e67efb2aab0e 401
mbed_official 354:e67efb2aab0e 402 /* Include DMA HAL Extension module */
mbed_official 354:e67efb2aab0e 403 #include "stm32l1xx_hal_dma_ex.h"
mbed_official 354:e67efb2aab0e 404
mbed_official 354:e67efb2aab0e 405 /* Exported functions --------------------------------------------------------*/
mbed_official 354:e67efb2aab0e 406 /** @addtogroup DMA_Exported_Functions
mbed_official 354:e67efb2aab0e 407 * @{
mbed_official 354:e67efb2aab0e 408 */
mbed_official 354:e67efb2aab0e 409
mbed_official 354:e67efb2aab0e 410
mbed_official 354:e67efb2aab0e 411 /* Initialization and de-initialization functions *****************************/
mbed_official 354:e67efb2aab0e 412 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma);
mbed_official 354:e67efb2aab0e 413 HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma);
mbed_official 354:e67efb2aab0e 414
mbed_official 354:e67efb2aab0e 415 /* IO operation functions *****************************************************/
mbed_official 354:e67efb2aab0e 416 HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
mbed_official 354:e67efb2aab0e 417 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
mbed_official 354:e67efb2aab0e 418 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
mbed_official 354:e67efb2aab0e 419 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout);
mbed_official 354:e67efb2aab0e 420 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
mbed_official 354:e67efb2aab0e 421
mbed_official 354:e67efb2aab0e 422 /* Peripheral State and Error functions ***************************************/
mbed_official 354:e67efb2aab0e 423 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma);
mbed_official 354:e67efb2aab0e 424 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
mbed_official 354:e67efb2aab0e 425 /**
mbed_official 354:e67efb2aab0e 426 * @}
mbed_official 354:e67efb2aab0e 427 */
mbed_official 354:e67efb2aab0e 428
mbed_official 354:e67efb2aab0e 429
mbed_official 354:e67efb2aab0e 430 /**
mbed_official 354:e67efb2aab0e 431 * @}
mbed_official 354:e67efb2aab0e 432 */
mbed_official 354:e67efb2aab0e 433
mbed_official 354:e67efb2aab0e 434 /**
mbed_official 354:e67efb2aab0e 435 * @}
mbed_official 354:e67efb2aab0e 436 */
mbed_official 354:e67efb2aab0e 437
mbed_official 354:e67efb2aab0e 438 #ifdef __cplusplus
mbed_official 354:e67efb2aab0e 439 }
mbed_official 354:e67efb2aab0e 440 #endif
mbed_official 354:e67efb2aab0e 441
mbed_official 354:e67efb2aab0e 442 #endif /* __STM32L1xx_HAL_DMA_H */
mbed_official 354:e67efb2aab0e 443
mbed_official 354:e67efb2aab0e 444 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/