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targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal.h@579:53297373a894, 2015-07-01 (annotated)

Committer:: mbed_official
Date:: Wed Jul 01 09:45:11 2015 +0100
Revision:: 579:53297373a894
Parent:: 394:83f921546702

Synchronized with git revision d5b4d2ab9c47edb4dc5776e7177b0c2263459081

Full URL: https://github.com/mbedmicro/mbed/commit/d5b4d2ab9c47edb4dc5776e7177b0c2263459081/

Initial version of drivers for SAMR21

Who changed what in which revision?

User	Revision	Line number	New contents of line
mbed_official	354:e67efb2aab0e	1	/**
mbed_official	354:e67efb2aab0e	2	******************************************************************************
mbed_official	354:e67efb2aab0e	3	* @file stm32l1xx_hal.h
mbed_official	354:e67efb2aab0e	4	* @author MCD Application Team
mbed_official	354:e67efb2aab0e	5	* @version V1.0.0
mbed_official	354:e67efb2aab0e	6	* @date 5-September-2014
mbed_official	354:e67efb2aab0e	7	* @brief This file contains all the functions prototypes for the HAL
mbed_official	354:e67efb2aab0e	8	* module driver.
mbed_official	354:e67efb2aab0e	9	******************************************************************************
mbed_official	354:e67efb2aab0e	10	* @attention
mbed_official	354:e67efb2aab0e	11	*
mbed_official	354:e67efb2aab0e	12	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official	354:e67efb2aab0e	13	*
mbed_official	354:e67efb2aab0e	14	* Redistribution and use in source and binary forms, with or without modification,
mbed_official	354:e67efb2aab0e	15	* are permitted provided that the following conditions are met:
mbed_official	354:e67efb2aab0e	16	* 1. Redistributions of source code must retain the above copyright notice,
mbed_official	354:e67efb2aab0e	17	* this list of conditions and the following disclaimer.
mbed_official	354:e67efb2aab0e	18	* 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official	354:e67efb2aab0e	19	* this list of conditions and the following disclaimer in the documentation
mbed_official	354:e67efb2aab0e	20	* and/or other materials provided with the distribution.
mbed_official	354:e67efb2aab0e	21	* 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official	354:e67efb2aab0e	22	* may be used to endorse or promote products derived from this software
mbed_official	354:e67efb2aab0e	23	* without specific prior written permission.
mbed_official	354:e67efb2aab0e	24	*
mbed_official	354:e67efb2aab0e	25	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official	354:e67efb2aab0e	26	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official	354:e67efb2aab0e	27	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official	354:e67efb2aab0e	28	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official	354:e67efb2aab0e	29	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official	354:e67efb2aab0e	30	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official	354:e67efb2aab0e	31	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official	354:e67efb2aab0e	32	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official	354:e67efb2aab0e	33	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official	354:e67efb2aab0e	34	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official	354:e67efb2aab0e	35	*
mbed_official	354:e67efb2aab0e	36	******************************************************************************
mbed_official	354:e67efb2aab0e	37	*/
mbed_official	354:e67efb2aab0e	38
mbed_official	354:e67efb2aab0e	39	/* Define to prevent recursive inclusion -------------------------------------*/
mbed_official	354:e67efb2aab0e	40	#ifndef __STM32L1xx_HAL_H
mbed_official	354:e67efb2aab0e	41	#define __STM32L1xx_HAL_H
mbed_official	354:e67efb2aab0e	42
mbed_official	354:e67efb2aab0e	43	#ifdef __cplusplus
mbed_official	354:e67efb2aab0e	44	extern "C" {
mbed_official	354:e67efb2aab0e	45	#endif
mbed_official	354:e67efb2aab0e	46
mbed_official	354:e67efb2aab0e	47	/* Includes ------------------------------------------------------------------*/
mbed_official	354:e67efb2aab0e	48	#include "stm32l1xx_hal_conf.h"
mbed_official	354:e67efb2aab0e	49
mbed_official	354:e67efb2aab0e	50	/** @addtogroup STM32L1xx_HAL_Driver
mbed_official	354:e67efb2aab0e	51	* @{
mbed_official	354:e67efb2aab0e	52	*/
mbed_official	354:e67efb2aab0e	53
mbed_official	354:e67efb2aab0e	54	/** @addtogroup HAL
mbed_official	354:e67efb2aab0e	55	* @{
mbed_official	354:e67efb2aab0e	56	*/
mbed_official	354:e67efb2aab0e	57
mbed_official	354:e67efb2aab0e	58	/* Exported types ------------------------------------------------------------*/
mbed_official	354:e67efb2aab0e	59	/* Exported constants --------------------------------------------------------*/
mbed_official	354:e67efb2aab0e	60	/** @defgroup HAL_Exported_Constants HAL Exported Constants
mbed_official	354:e67efb2aab0e	61	* @{
mbed_official	354:e67efb2aab0e	62	*/
mbed_official	354:e67efb2aab0e	63
mbed_official	354:e67efb2aab0e	64	/** @defgroup SYSCFG_Constants SYSCFG: SYStem ConFiG
mbed_official	354:e67efb2aab0e	65	* @{
mbed_official	354:e67efb2aab0e	66	*/
mbed_official	354:e67efb2aab0e	67
mbed_official	354:e67efb2aab0e	68	/** @defgroup SYSCFG_BootMode Boot Mode
mbed_official	354:e67efb2aab0e	69	* @{
mbed_official	354:e67efb2aab0e	70	*/
mbed_official	354:e67efb2aab0e	71
mbed_official	354:e67efb2aab0e	72	#define SYSCFG_BOOT_MAINFLASH ((uint32_t)0x00000000)
mbed_official	354:e67efb2aab0e	73	#define SYSCFG_BOOT_SYSTEMFLASH ((uint32_t)SYSCFG_MEMRMP_BOOT_MODE_0)
mbed_official	354:e67efb2aab0e	74	#if defined(FSMC_R_BASE)
mbed_official	354:e67efb2aab0e	75	#define SYSCFG_BOOT_FSMC ((uint32_t)SYSCFG_MEMRMP_BOOT_MODE_1)
mbed_official	354:e67efb2aab0e	76	#endif /* FSMC_R_BASE */
mbed_official	354:e67efb2aab0e	77	#define SYSCFG_BOOT_SRAM ((uint32_t)SYSCFG_MEMRMP_BOOT_MODE)
mbed_official	354:e67efb2aab0e	78
mbed_official	354:e67efb2aab0e	79	/**
mbed_official	354:e67efb2aab0e	80	* @}
mbed_official	354:e67efb2aab0e	81	*/
mbed_official	354:e67efb2aab0e	82
mbed_official	354:e67efb2aab0e	83	/**
mbed_official	354:e67efb2aab0e	84	* @}
mbed_official	354:e67efb2aab0e	85	*/
mbed_official	354:e67efb2aab0e	86
mbed_official	354:e67efb2aab0e	87	/** @defgroup RI_Constants RI: Routing Interface
mbed_official	354:e67efb2aab0e	88	* @{
mbed_official	354:e67efb2aab0e	89	*/
mbed_official	354:e67efb2aab0e	90
mbed_official	354:e67efb2aab0e	91	/** @defgroup RI_InputCapture Input Capture
mbed_official	354:e67efb2aab0e	92	* @{
mbed_official	354:e67efb2aab0e	93	*/
mbed_official	354:e67efb2aab0e	94
mbed_official	354:e67efb2aab0e	95	#define RI_INPUTCAPTURE_IC1 RI_ICR_IC1 /!< Input Capture 1 /
mbed_official	354:e67efb2aab0e	96	#define RI_INPUTCAPTURE_IC2 RI_ICR_IC2 /!< Input Capture 2 /
mbed_official	354:e67efb2aab0e	97	#define RI_INPUTCAPTURE_IC3 RI_ICR_IC3 /!< Input Capture 3 /
mbed_official	354:e67efb2aab0e	98	#define RI_INPUTCAPTURE_IC4 RI_ICR_IC4 /!< Input Capture 4 /
mbed_official	354:e67efb2aab0e	99
mbed_official	354:e67efb2aab0e	100	/**
mbed_official	354:e67efb2aab0e	101	* @}
mbed_official	354:e67efb2aab0e	102	*/
mbed_official	354:e67efb2aab0e	103
mbed_official	354:e67efb2aab0e	104	/** @defgroup TIM_Select TIM Select
mbed_official	354:e67efb2aab0e	105	* @{
mbed_official	354:e67efb2aab0e	106	*/
mbed_official	354:e67efb2aab0e	107
mbed_official	354:e67efb2aab0e	108	#define TIM_SELECT_NONE ((uint32_t)0x00000000) /!< None selected /
mbed_official	354:e67efb2aab0e	109	#define TIM_SELECT_TIM2 ((uint32_t)RI_ICR_TIM_0) /!< Timer 2 selected /
mbed_official	354:e67efb2aab0e	110	#define TIM_SELECT_TIM3 ((uint32_t)RI_ICR_TIM_1) /!< Timer 3 selected /
mbed_official	354:e67efb2aab0e	111	#define TIM_SELECT_TIM4 ((uint32_t)RI_ICR_TIM) /!< Timer 4 selected /
mbed_official	354:e67efb2aab0e	112
mbed_official	354:e67efb2aab0e	113	#define IS_RI_TIM(__TIM__) (((__TIM__) == TIM_SELECT_NONE) \|\| \
mbed_official	354:e67efb2aab0e	114	((__TIM__) == TIM_SELECT_TIM2) \|\| \
mbed_official	354:e67efb2aab0e	115	((__TIM__) == TIM_SELECT_TIM3) \|\| \
mbed_official	354:e67efb2aab0e	116	((__TIM__) == TIM_SELECT_TIM4))
mbed_official	354:e67efb2aab0e	117
mbed_official	354:e67efb2aab0e	118	/**
mbed_official	354:e67efb2aab0e	119	* @}
mbed_official	354:e67efb2aab0e	120	*/
mbed_official	354:e67efb2aab0e	121
mbed_official	354:e67efb2aab0e	122	/** @defgroup RI_InputCaptureRouting Input Capture Routing
mbed_official	354:e67efb2aab0e	123	* @{
mbed_official	354:e67efb2aab0e	124	*/
mbed_official	354:e67efb2aab0e	125	/* TIMx_IC1 TIMx_IC2 TIMx_IC3 TIMx_IC4 */
mbed_official	354:e67efb2aab0e	126	#define RI_INPUTCAPTUREROUTING_0 ((uint32_t)0x00000000) /* PA0 PA1 PA2 PA3 */
mbed_official	354:e67efb2aab0e	127	#define RI_INPUTCAPTUREROUTING_1 ((uint32_t)0x00000001) /* PA4 PA5 PA6 PA7 */
mbed_official	354:e67efb2aab0e	128	#define RI_INPUTCAPTUREROUTING_2 ((uint32_t)0x00000002) /* PA8 PA9 PA10 PA11 */
mbed_official	354:e67efb2aab0e	129	#define RI_INPUTCAPTUREROUTING_3 ((uint32_t)0x00000003) /* PA12 PA13 PA14 PA15 */
mbed_official	354:e67efb2aab0e	130	#define RI_INPUTCAPTUREROUTING_4 ((uint32_t)0x00000004) /* PC0 PC1 PC2 PC3 */
mbed_official	354:e67efb2aab0e	131	#define RI_INPUTCAPTUREROUTING_5 ((uint32_t)0x00000005) /* PC4 PC5 PC6 PC7 */
mbed_official	354:e67efb2aab0e	132	#define RI_INPUTCAPTUREROUTING_6 ((uint32_t)0x00000006) /* PC8 PC9 PC10 PC11 */
mbed_official	354:e67efb2aab0e	133	#define RI_INPUTCAPTUREROUTING_7 ((uint32_t)0x00000007) /* PC12 PC13 PC14 PC15 */
mbed_official	354:e67efb2aab0e	134	#define RI_INPUTCAPTUREROUTING_8 ((uint32_t)0x00000008) /* PD0 PD1 PD2 PD3 */
mbed_official	354:e67efb2aab0e	135	#define RI_INPUTCAPTUREROUTING_9 ((uint32_t)0x00000009) /* PD4 PD5 PD6 PD7 */
mbed_official	354:e67efb2aab0e	136	#define RI_INPUTCAPTUREROUTING_10 ((uint32_t)0x0000000A) /* PD8 PD9 PD10 PD11 */
mbed_official	354:e67efb2aab0e	137	#define RI_INPUTCAPTUREROUTING_11 ((uint32_t)0x0000000B) /* PD12 PD13 PD14 PD15 */
mbed_official	354:e67efb2aab0e	138	#define RI_INPUTCAPTUREROUTING_12 ((uint32_t)0x0000000C) /* PE0 PE1 PE2 PE3 */
mbed_official	354:e67efb2aab0e	139	#define RI_INPUTCAPTUREROUTING_13 ((uint32_t)0x0000000D) /* PE4 PE5 PE6 PE7 */
mbed_official	354:e67efb2aab0e	140	#define RI_INPUTCAPTUREROUTING_14 ((uint32_t)0x0000000E) /* PE8 PE9 PE10 PE11 */
mbed_official	354:e67efb2aab0e	141	#define RI_INPUTCAPTUREROUTING_15 ((uint32_t)0x0000000F) /* PE12 PE13 PE14 PE15 */
mbed_official	354:e67efb2aab0e	142
mbed_official	354:e67efb2aab0e	143	#define IS_RI_INPUTCAPTURE_ROUTING(__ROUTING__) (((__ROUTING__) == RI_INPUTCAPTUREROUTING_0) \|\| \
mbed_official	354:e67efb2aab0e	144	((__ROUTING__) == RI_INPUTCAPTUREROUTING_1) \|\| \
mbed_official	354:e67efb2aab0e	145	((__ROUTING__) == RI_INPUTCAPTUREROUTING_2) \|\| \
mbed_official	354:e67efb2aab0e	146	((__ROUTING__) == RI_INPUTCAPTUREROUTING_3) \|\| \
mbed_official	354:e67efb2aab0e	147	((__ROUTING__) == RI_INPUTCAPTUREROUTING_4) \|\| \
mbed_official	354:e67efb2aab0e	148	((__ROUTING__) == RI_INPUTCAPTUREROUTING_5) \|\| \
mbed_official	354:e67efb2aab0e	149	((__ROUTING__) == RI_INPUTCAPTUREROUTING_6) \|\| \
mbed_official	354:e67efb2aab0e	150	((__ROUTING__) == RI_INPUTCAPTUREROUTING_7) \|\| \
mbed_official	354:e67efb2aab0e	151	((__ROUTING__) == RI_INPUTCAPTUREROUTING_8) \|\| \
mbed_official	354:e67efb2aab0e	152	((__ROUTING__) == RI_INPUTCAPTUREROUTING_9) \|\| \
mbed_official	354:e67efb2aab0e	153	((__ROUTING__) == RI_INPUTCAPTUREROUTING_10) \|\| \
mbed_official	354:e67efb2aab0e	154	((__ROUTING__) == RI_INPUTCAPTUREROUTING_11) \|\| \
mbed_official	354:e67efb2aab0e	155	((__ROUTING__) == RI_INPUTCAPTUREROUTING_12) \|\| \
mbed_official	354:e67efb2aab0e	156	((__ROUTING__) == RI_INPUTCAPTUREROUTING_13) \|\| \
mbed_official	354:e67efb2aab0e	157	((__ROUTING__) == RI_INPUTCAPTUREROUTING_14) \|\| \
mbed_official	354:e67efb2aab0e	158	((__ROUTING__) == RI_INPUTCAPTUREROUTING_15))
mbed_official	354:e67efb2aab0e	159
mbed_official	354:e67efb2aab0e	160	/**
mbed_official	354:e67efb2aab0e	161	* @}
mbed_official	354:e67efb2aab0e	162	*/
mbed_official	354:e67efb2aab0e	163
mbed_official	354:e67efb2aab0e	164	/** @defgroup RI_IOSwitch IO Switch
mbed_official	354:e67efb2aab0e	165	* @{
mbed_official	354:e67efb2aab0e	166	*/
mbed_official	354:e67efb2aab0e	167	#define RI_ASCR1_REGISTER ((uint32_t)0x80000000)
mbed_official	354:e67efb2aab0e	168	/* ASCR1 I/O switch: bit 31 is set to '1' to indicate that the mask is in ASCR1 register */
mbed_official	354:e67efb2aab0e	169	#define RI_IOSWITCH_CH0 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_0)
mbed_official	354:e67efb2aab0e	170	#define RI_IOSWITCH_CH1 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_1)
mbed_official	354:e67efb2aab0e	171	#define RI_IOSWITCH_CH2 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_2)
mbed_official	354:e67efb2aab0e	172	#define RI_IOSWITCH_CH3 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_3)
mbed_official	354:e67efb2aab0e	173	#define RI_IOSWITCH_CH4 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_4)
mbed_official	354:e67efb2aab0e	174	#define RI_IOSWITCH_CH5 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_5)
mbed_official	354:e67efb2aab0e	175	#define RI_IOSWITCH_CH6 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_6)
mbed_official	354:e67efb2aab0e	176	#define RI_IOSWITCH_CH7 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_7)
mbed_official	354:e67efb2aab0e	177	#define RI_IOSWITCH_CH8 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_8)
mbed_official	354:e67efb2aab0e	178	#define RI_IOSWITCH_CH9 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_9)
mbed_official	354:e67efb2aab0e	179	#define RI_IOSWITCH_CH10 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_10)
mbed_official	354:e67efb2aab0e	180	#define RI_IOSWITCH_CH11 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_11)
mbed_official	354:e67efb2aab0e	181	#define RI_IOSWITCH_CH12 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_12)
mbed_official	354:e67efb2aab0e	182	#define RI_IOSWITCH_CH13 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_13)
mbed_official	354:e67efb2aab0e	183	#define RI_IOSWITCH_CH14 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_14)
mbed_official	354:e67efb2aab0e	184	#define RI_IOSWITCH_CH15 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_15)
mbed_official	354:e67efb2aab0e	185	#define RI_IOSWITCH_CH18 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_18)
mbed_official	354:e67efb2aab0e	186	#define RI_IOSWITCH_CH19 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_19)
mbed_official	354:e67efb2aab0e	187	#define RI_IOSWITCH_CH20 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_20)
mbed_official	354:e67efb2aab0e	188	#define RI_IOSWITCH_CH21 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_21)
mbed_official	354:e67efb2aab0e	189	#define RI_IOSWITCH_CH22 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_22)
mbed_official	354:e67efb2aab0e	190	#define RI_IOSWITCH_CH23 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_23)
mbed_official	354:e67efb2aab0e	191	#define RI_IOSWITCH_CH24 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_24)
mbed_official	354:e67efb2aab0e	192	#define RI_IOSWITCH_CH25 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_25)
mbed_official	354:e67efb2aab0e	193	#define RI_IOSWITCH_VCOMP ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_VCOMP) /* VCOMP (ADC channel 26) is an internal switch used to connect selected channel to COMP1 non inverting input */
mbed_official	354:e67efb2aab0e	194	#if defined (RI_ASCR2_CH1b) /* STM32L1 devices category Cat.4 and Cat.5 */
mbed_official	354:e67efb2aab0e	195	#define RI_IOSWITCH_CH27 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_27)
mbed_official	354:e67efb2aab0e	196	#define RI_IOSWITCH_CH28 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_28)
mbed_official	354:e67efb2aab0e	197	#define RI_IOSWITCH_CH29 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_29)
mbed_official	354:e67efb2aab0e	198	#define RI_IOSWITCH_CH30 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_30)
mbed_official	354:e67efb2aab0e	199	#define RI_IOSWITCH_CH31 ((uint32_t)RI_ASCR1_REGISTER \| RI_ASCR1_CH_31)
mbed_official	354:e67efb2aab0e	200	#endif /* RI_ASCR2_CH1b */
mbed_official	354:e67efb2aab0e	201
mbed_official	354:e67efb2aab0e	202	/* ASCR2 IO switch: bit 31 is set to '0' to indicate that the mask is in ASCR2 register */
mbed_official	354:e67efb2aab0e	203	#define RI_IOSWITCH_GR10_1 ((uint32_t)RI_ASCR2_GR10_1)
mbed_official	354:e67efb2aab0e	204	#define RI_IOSWITCH_GR10_2 ((uint32_t)RI_ASCR2_GR10_2)
mbed_official	354:e67efb2aab0e	205	#define RI_IOSWITCH_GR10_3 ((uint32_t)RI_ASCR2_GR10_3)
mbed_official	354:e67efb2aab0e	206	#define RI_IOSWITCH_GR10_4 ((uint32_t)RI_ASCR2_GR10_4)
mbed_official	354:e67efb2aab0e	207	#define RI_IOSWITCH_GR6_1 ((uint32_t)RI_ASCR2_GR6_1)
mbed_official	354:e67efb2aab0e	208	#define RI_IOSWITCH_GR6_2 ((uint32_t)RI_ASCR2_GR6_2)
mbed_official	354:e67efb2aab0e	209	#define RI_IOSWITCH_GR5_1 ((uint32_t)RI_ASCR2_GR5_1)
mbed_official	354:e67efb2aab0e	210	#define RI_IOSWITCH_GR5_2 ((uint32_t)RI_ASCR2_GR5_2)
mbed_official	354:e67efb2aab0e	211	#define RI_IOSWITCH_GR5_3 ((uint32_t)RI_ASCR2_GR5_3)
mbed_official	354:e67efb2aab0e	212	#define RI_IOSWITCH_GR4_1 ((uint32_t)RI_ASCR2_GR4_1)
mbed_official	354:e67efb2aab0e	213	#define RI_IOSWITCH_GR4_2 ((uint32_t)RI_ASCR2_GR4_2)
mbed_official	354:e67efb2aab0e	214	#define RI_IOSWITCH_GR4_3 ((uint32_t)RI_ASCR2_GR4_3)
mbed_official	354:e67efb2aab0e	215	#if defined (RI_ASCR2_CH0b) /* STM32L1 devices category Cat.3, Cat.4 and Cat.5 */
mbed_official	354:e67efb2aab0e	216	#define RI_IOSWITCH_CH0b ((uint32_t)RI_ASCR2_CH0b)
mbed_official	354:e67efb2aab0e	217	#if defined (RI_ASCR2_CH1b) /* STM32L1 devices category Cat.4 and Cat.5 */
mbed_official	354:e67efb2aab0e	218	#define RI_IOSWITCH_CH1b ((uint32_t)RI_ASCR2_CH1b)
mbed_official	354:e67efb2aab0e	219	#define RI_IOSWITCH_CH2b ((uint32_t)RI_ASCR2_CH2b)
mbed_official	354:e67efb2aab0e	220	#define RI_IOSWITCH_CH3b ((uint32_t)RI_ASCR2_CH3b)
mbed_official	354:e67efb2aab0e	221	#define RI_IOSWITCH_CH6b ((uint32_t)RI_ASCR2_CH6b)
mbed_official	354:e67efb2aab0e	222	#define RI_IOSWITCH_CH7b ((uint32_t)RI_ASCR2_CH7b)
mbed_official	354:e67efb2aab0e	223	#define RI_IOSWITCH_CH8b ((uint32_t)RI_ASCR2_CH8b)
mbed_official	354:e67efb2aab0e	224	#define RI_IOSWITCH_CH9b ((uint32_t)RI_ASCR2_CH9b)
mbed_official	354:e67efb2aab0e	225	#define RI_IOSWITCH_CH10b ((uint32_t)RI_ASCR2_CH10b)
mbed_official	354:e67efb2aab0e	226	#define RI_IOSWITCH_CH11b ((uint32_t)RI_ASCR2_CH11b)
mbed_official	354:e67efb2aab0e	227	#define RI_IOSWITCH_CH12b ((uint32_t)RI_ASCR2_CH12b)
mbed_official	354:e67efb2aab0e	228	#endif /* RI_ASCR2_CH1b */
mbed_official	354:e67efb2aab0e	229	#define RI_IOSWITCH_GR6_3 ((uint32_t)RI_ASCR2_GR6_3)
mbed_official	354:e67efb2aab0e	230	#define RI_IOSWITCH_GR6_4 ((uint32_t)RI_ASCR2_GR6_4)
mbed_official	354:e67efb2aab0e	231	#endif /* RI_ASCR2_CH0b */
mbed_official	354:e67efb2aab0e	232
mbed_official	354:e67efb2aab0e	233
mbed_official	354:e67efb2aab0e	234	#if defined (RI_ASCR2_CH1b) /* STM32L1 devices category Cat.4 and Cat.5 */
mbed_official	354:e67efb2aab0e	235
mbed_official	354:e67efb2aab0e	236	#define IS_RI_IOSWITCH(__IOSWITCH__) (((__IOSWITCH__) == RI_IOSWITCH_CH0) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH1) \|\| \
mbed_official	354:e67efb2aab0e	237	((__IOSWITCH__) == RI_IOSWITCH_CH2) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH3) \|\| \
mbed_official	354:e67efb2aab0e	238	((__IOSWITCH__) == RI_IOSWITCH_CH4) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH5) \|\| \
mbed_official	354:e67efb2aab0e	239	((__IOSWITCH__) == RI_IOSWITCH_CH6) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH7) \|\| \
mbed_official	354:e67efb2aab0e	240	((__IOSWITCH__) == RI_IOSWITCH_CH8) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH9) \|\| \
mbed_official	354:e67efb2aab0e	241	((__IOSWITCH__) == RI_IOSWITCH_CH10) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH11) \|\| \
mbed_official	354:e67efb2aab0e	242	((__IOSWITCH__) == RI_IOSWITCH_CH12) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH13) \|\| \
mbed_official	354:e67efb2aab0e	243	((__IOSWITCH__) == RI_IOSWITCH_CH14) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH15) \|\| \
mbed_official	354:e67efb2aab0e	244	((__IOSWITCH__) == RI_IOSWITCH_CH18) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH19) \|\| \
mbed_official	354:e67efb2aab0e	245	((__IOSWITCH__) == RI_IOSWITCH_CH20) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH21) \|\| \
mbed_official	354:e67efb2aab0e	246	((__IOSWITCH__) == RI_IOSWITCH_CH22) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH23) \|\| \
mbed_official	354:e67efb2aab0e	247	((__IOSWITCH__) == RI_IOSWITCH_CH24) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH25) \|\| \
mbed_official	354:e67efb2aab0e	248	((__IOSWITCH__) == RI_IOSWITCH_VCOMP) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH27) \|\| \
mbed_official	354:e67efb2aab0e	249	((__IOSWITCH__) == RI_IOSWITCH_CH28) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH29) \|\| \
mbed_official	354:e67efb2aab0e	250	((__IOSWITCH__) == RI_IOSWITCH_CH30) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH31) \|\| \
mbed_official	354:e67efb2aab0e	251	((__IOSWITCH__) == RI_IOSWITCH_GR10_1) \|\| ((__IOSWITCH__) == RI_IOSWITCH_GR10_2) \|\| \
mbed_official	354:e67efb2aab0e	252	((__IOSWITCH__) == RI_IOSWITCH_GR10_3) \|\| ((__IOSWITCH__) == RI_IOSWITCH_GR10_4) \|\| \
mbed_official	354:e67efb2aab0e	253	((__IOSWITCH__) == RI_IOSWITCH_GR6_1) \|\| ((__IOSWITCH__) == RI_IOSWITCH_GR6_2) \|\| \
mbed_official	354:e67efb2aab0e	254	((__IOSWITCH__) == RI_IOSWITCH_GR6_3) \|\| ((__IOSWITCH__) == RI_IOSWITCH_GR6_4) \|\| \
mbed_official	354:e67efb2aab0e	255	((__IOSWITCH__) == RI_IOSWITCH_GR5_1) \|\| ((__IOSWITCH__) == RI_IOSWITCH_GR5_2) \|\| \
mbed_official	354:e67efb2aab0e	256	((__IOSWITCH__) == RI_IOSWITCH_GR5_3) \|\| ((__IOSWITCH__) == RI_IOSWITCH_GR4_1) \|\| \
mbed_official	354:e67efb2aab0e	257	((__IOSWITCH__) == RI_IOSWITCH_GR4_2) \|\| ((__IOSWITCH__) == RI_IOSWITCH_GR4_3) \|\| \
mbed_official	354:e67efb2aab0e	258	((__IOSWITCH__) == RI_IOSWITCH_CH0b) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH1b) \|\| \
mbed_official	354:e67efb2aab0e	259	((__IOSWITCH__) == RI_IOSWITCH_CH2b) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH3b) \|\| \
mbed_official	354:e67efb2aab0e	260	((__IOSWITCH__) == RI_IOSWITCH_CH6b) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH7b) \|\| \
mbed_official	354:e67efb2aab0e	261	((__IOSWITCH__) == RI_IOSWITCH_CH8b) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH9b) \|\| \
mbed_official	354:e67efb2aab0e	262	((__IOSWITCH__) == RI_IOSWITCH_CH10b) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH11b) \|\| \
mbed_official	354:e67efb2aab0e	263	((__IOSWITCH__) == RI_IOSWITCH_CH12b))
mbed_official	354:e67efb2aab0e	264
mbed_official	354:e67efb2aab0e	265	#else /* !RI_ASCR2_CH1b */
mbed_official	354:e67efb2aab0e	266
mbed_official	354:e67efb2aab0e	267	#if defined (RI_ASCR2_CH0b) /* STM32L1 devices category Cat.3 */
mbed_official	354:e67efb2aab0e	268
mbed_official	354:e67efb2aab0e	269	#define IS_RI_IOSWITCH(__IOSWITCH__) (((__IOSWITCH__) == RI_IOSWITCH_CH0) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH1) \|\| \
mbed_official	354:e67efb2aab0e	270	((__IOSWITCH__) == RI_IOSWITCH_CH2) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH3) \|\| \
mbed_official	354:e67efb2aab0e	271	((__IOSWITCH__) == RI_IOSWITCH_CH4) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH5) \|\| \
mbed_official	354:e67efb2aab0e	272	((__IOSWITCH__) == RI_IOSWITCH_CH6) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH7) \|\| \
mbed_official	354:e67efb2aab0e	273	((__IOSWITCH__) == RI_IOSWITCH_CH8) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH9) \|\| \
mbed_official	354:e67efb2aab0e	274	((__IOSWITCH__) == RI_IOSWITCH_CH10) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH11) \|\| \
mbed_official	354:e67efb2aab0e	275	((__IOSWITCH__) == RI_IOSWITCH_CH12) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH13) \|\| \
mbed_official	354:e67efb2aab0e	276	((__IOSWITCH__) == RI_IOSWITCH_CH14) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH15) \|\| \
mbed_official	354:e67efb2aab0e	277	((__IOSWITCH__) == RI_IOSWITCH_CH18) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH19) \|\| \
mbed_official	354:e67efb2aab0e	278	((__IOSWITCH__) == RI_IOSWITCH_CH20) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH21) \|\| \
mbed_official	354:e67efb2aab0e	279	((__IOSWITCH__) == RI_IOSWITCH_CH22) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH23) \|\| \
mbed_official	354:e67efb2aab0e	280	((__IOSWITCH__) == RI_IOSWITCH_CH24) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH25) \|\| \
mbed_official	354:e67efb2aab0e	281	((__IOSWITCH__) == RI_IOSWITCH_VCOMP) \|\| ((__IOSWITCH__) == RI_IOSWITCH_GR10_1) \|\| \
mbed_official	354:e67efb2aab0e	282	((__IOSWITCH__) == RI_IOSWITCH_GR10_2) \|\| ((__IOSWITCH__) == RI_IOSWITCH_GR10_3) \|\| \
mbed_official	354:e67efb2aab0e	283	((__IOSWITCH__) == RI_IOSWITCH_GR10_4) \|\| ((__IOSWITCH__) == RI_IOSWITCH_GR6_1) \|\| \
mbed_official	354:e67efb2aab0e	284	((__IOSWITCH__) == RI_IOSWITCH_GR6_2) \|\| ((__IOSWITCH__) == RI_IOSWITCH_GR5_1) \|\| \
mbed_official	354:e67efb2aab0e	285	((__IOSWITCH__) == RI_IOSWITCH_GR5_2) \|\| ((__IOSWITCH__) == RI_IOSWITCH_GR5_3) \|\| \
mbed_official	354:e67efb2aab0e	286	((__IOSWITCH__) == RI_IOSWITCH_GR4_1) \|\| ((__IOSWITCH__) == RI_IOSWITCH_GR4_2) \|\| \
mbed_official	354:e67efb2aab0e	287	((__IOSWITCH__) == RI_IOSWITCH_GR4_3) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH0b))
mbed_official	354:e67efb2aab0e	288
mbed_official	354:e67efb2aab0e	289	#else /* !RI_ASCR2_CH0b / / STM32L1 devices category Cat.1 and Cat.2 */
mbed_official	354:e67efb2aab0e	290
mbed_official	354:e67efb2aab0e	291	#define IS_RI_IOSWITCH(__IOSWITCH__) (((__IOSWITCH__) == RI_IOSWITCH_CH0) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH1) \|\| \
mbed_official	354:e67efb2aab0e	292	((__IOSWITCH__) == RI_IOSWITCH_CH2) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH3) \|\| \
mbed_official	354:e67efb2aab0e	293	((__IOSWITCH__) == RI_IOSWITCH_CH4) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH5) \|\| \
mbed_official	354:e67efb2aab0e	294	((__IOSWITCH__) == RI_IOSWITCH_CH6) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH7) \|\| \
mbed_official	354:e67efb2aab0e	295	((__IOSWITCH__) == RI_IOSWITCH_CH8) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH9) \|\| \
mbed_official	354:e67efb2aab0e	296	((__IOSWITCH__) == RI_IOSWITCH_CH10) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH11) \|\| \
mbed_official	354:e67efb2aab0e	297	((__IOSWITCH__) == RI_IOSWITCH_CH12) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH13) \|\| \
mbed_official	354:e67efb2aab0e	298	((__IOSWITCH__) == RI_IOSWITCH_CH14) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH15) \|\| \
mbed_official	354:e67efb2aab0e	299	((__IOSWITCH__) == RI_IOSWITCH_CH18) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH19) \|\| \
mbed_official	354:e67efb2aab0e	300	((__IOSWITCH__) == RI_IOSWITCH_CH20) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH21) \|\| \
mbed_official	354:e67efb2aab0e	301	((__IOSWITCH__) == RI_IOSWITCH_CH22) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH23) \|\| \
mbed_official	354:e67efb2aab0e	302	((__IOSWITCH__) == RI_IOSWITCH_CH24) \|\| ((__IOSWITCH__) == RI_IOSWITCH_CH25) \|\| \
mbed_official	354:e67efb2aab0e	303	((__IOSWITCH__) == RI_IOSWITCH_VCOMP) \|\| ((__IOSWITCH__) == RI_IOSWITCH_GR10_1) \|\| \
mbed_official	354:e67efb2aab0e	304	((__IOSWITCH__) == RI_IOSWITCH_GR10_2) \|\| ((__IOSWITCH__) == RI_IOSWITCH_GR10_3) \|\| \
mbed_official	354:e67efb2aab0e	305	((__IOSWITCH__) == RI_IOSWITCH_GR10_4) \|\| ((__IOSWITCH__) == RI_IOSWITCH_GR6_1) \|\| \
mbed_official	354:e67efb2aab0e	306	((__IOSWITCH__) == RI_IOSWITCH_GR6_2) \|\| ((__IOSWITCH__) == RI_IOSWITCH_GR5_1) \|\| \
mbed_official	354:e67efb2aab0e	307	((__IOSWITCH__) == RI_IOSWITCH_GR5_2) \|\| ((__IOSWITCH__) == RI_IOSWITCH_GR5_3) \|\| \
mbed_official	354:e67efb2aab0e	308	((__IOSWITCH__) == RI_IOSWITCH_GR4_1) \|\| ((__IOSWITCH__) == RI_IOSWITCH_GR4_2) \|\| \
mbed_official	354:e67efb2aab0e	309	((__IOSWITCH__) == RI_IOSWITCH_GR4_3))
mbed_official	354:e67efb2aab0e	310
mbed_official	354:e67efb2aab0e	311	#endif /* RI_ASCR2_CH0b */
mbed_official	354:e67efb2aab0e	312	#endif /* RI_ASCR2_CH1b */
mbed_official	354:e67efb2aab0e	313
mbed_official	354:e67efb2aab0e	314	/**
mbed_official	354:e67efb2aab0e	315	* @}
mbed_official	354:e67efb2aab0e	316	*/
mbed_official	354:e67efb2aab0e	317
mbed_official	354:e67efb2aab0e	318	/** @defgroup RI_Pin PIN define
mbed_official	354:e67efb2aab0e	319	* @{
mbed_official	354:e67efb2aab0e	320	*/
mbed_official	354:e67efb2aab0e	321	#define RI_PIN_0 ((uint16_t)0x0001) /!< Pin 0 selected /
mbed_official	354:e67efb2aab0e	322	#define RI_PIN_1 ((uint16_t)0x0002) /!< Pin 1 selected /
mbed_official	354:e67efb2aab0e	323	#define RI_PIN_2 ((uint16_t)0x0004) /!< Pin 2 selected /
mbed_official	354:e67efb2aab0e	324	#define RI_PIN_3 ((uint16_t)0x0008) /!< Pin 3 selected /
mbed_official	354:e67efb2aab0e	325	#define RI_PIN_4 ((uint16_t)0x0010) /!< Pin 4 selected /
mbed_official	354:e67efb2aab0e	326	#define RI_PIN_5 ((uint16_t)0x0020) /!< Pin 5 selected /
mbed_official	354:e67efb2aab0e	327	#define RI_PIN_6 ((uint16_t)0x0040) /!< Pin 6 selected /
mbed_official	354:e67efb2aab0e	328	#define RI_PIN_7 ((uint16_t)0x0080) /!< Pin 7 selected /
mbed_official	354:e67efb2aab0e	329	#define RI_PIN_8 ((uint16_t)0x0100) /!< Pin 8 selected /
mbed_official	354:e67efb2aab0e	330	#define RI_PIN_9 ((uint16_t)0x0200) /!< Pin 9 selected /
mbed_official	354:e67efb2aab0e	331	#define RI_PIN_10 ((uint16_t)0x0400) /!< Pin 10 selected /
mbed_official	354:e67efb2aab0e	332	#define RI_PIN_11 ((uint16_t)0x0800) /!< Pin 11 selected /
mbed_official	354:e67efb2aab0e	333	#define RI_PIN_12 ((uint16_t)0x1000) /!< Pin 12 selected /
mbed_official	354:e67efb2aab0e	334	#define RI_PIN_13 ((uint16_t)0x2000) /!< Pin 13 selected /
mbed_official	354:e67efb2aab0e	335	#define RI_PIN_14 ((uint16_t)0x4000) /!< Pin 14 selected /
mbed_official	354:e67efb2aab0e	336	#define RI_PIN_15 ((uint16_t)0x8000) /!< Pin 15 selected /
mbed_official	354:e67efb2aab0e	337	#define RI_PIN_ALL ((uint16_t)0xFFFF) /!< All pins selected /
mbed_official	354:e67efb2aab0e	338
mbed_official	354:e67efb2aab0e	339	#define IS_RI_PIN(__PIN__) ((__PIN__) != (uint16_t)0x00)
mbed_official	354:e67efb2aab0e	340
mbed_official	354:e67efb2aab0e	341	/**
mbed_official	354:e67efb2aab0e	342	* @}
mbed_official	354:e67efb2aab0e	343	*/
mbed_official	354:e67efb2aab0e	344
mbed_official	354:e67efb2aab0e	345	/**
mbed_official	354:e67efb2aab0e	346	* @}
mbed_official	354:e67efb2aab0e	347	*/
mbed_official	354:e67efb2aab0e	348
mbed_official	354:e67efb2aab0e	349	/**
mbed_official	354:e67efb2aab0e	350	* @}
mbed_official	354:e67efb2aab0e	351	*/
mbed_official	354:e67efb2aab0e	352
mbed_official	354:e67efb2aab0e	353	/* Exported macro ------------------------------------------------------------*/
mbed_official	354:e67efb2aab0e	354
mbed_official	354:e67efb2aab0e	355	/** @defgroup HAL_Exported_Macros HAL Exported Macros
mbed_official	354:e67efb2aab0e	356	* @{
mbed_official	354:e67efb2aab0e	357	*/
mbed_official	354:e67efb2aab0e	358
mbed_official	354:e67efb2aab0e	359	/** @defgroup DBGMCU_Macros DBGMCU: Debug MCU
mbed_official	354:e67efb2aab0e	360	* @{
mbed_official	354:e67efb2aab0e	361	*/
mbed_official	354:e67efb2aab0e	362
mbed_official	354:e67efb2aab0e	363	/** @defgroup DBGMCU_Freeze_Unfreeze Freeze Unfreeze Peripherals in Debug mode
mbed_official	354:e67efb2aab0e	364	* @brief Freeze/Unfreeze Peripherals in Debug mode
mbed_official	354:e67efb2aab0e	365	* @{
mbed_official	354:e67efb2aab0e	366	*/
mbed_official	354:e67efb2aab0e	367
mbed_official	354:e67efb2aab0e	368	/**
mbed_official	354:e67efb2aab0e	369	* @brief TIM2 Peripherals Debug mode
mbed_official	354:e67efb2aab0e	370	*/
mbed_official	354:e67efb2aab0e	371	#if defined (DBGMCU_APB1_FZ_DBG_TIM2_STOP)
mbed_official	354:e67efb2aab0e	372	#define __HAL_FREEZE_TIM2_DBGMCU() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM2_STOP)
mbed_official	354:e67efb2aab0e	373	#define __HAL_UNFREEZE_TIM2_DBGMCU() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM2_STOP)
mbed_official	354:e67efb2aab0e	374	#endif
mbed_official	354:e67efb2aab0e	375
mbed_official	354:e67efb2aab0e	376	/**
mbed_official	354:e67efb2aab0e	377	* @brief TIM3 Peripherals Debug mode
mbed_official	354:e67efb2aab0e	378	*/
mbed_official	354:e67efb2aab0e	379	#if defined (DBGMCU_APB1_FZ_DBG_TIM3_STOP)
mbed_official	354:e67efb2aab0e	380	#define __HAL_FREEZE_TIM3_DBGMCU() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM3_STOP)
mbed_official	354:e67efb2aab0e	381	#define __HAL_UNFREEZE_TIM3_DBGMCU() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM3_STOP)
mbed_official	354:e67efb2aab0e	382	#endif
mbed_official	354:e67efb2aab0e	383
mbed_official	354:e67efb2aab0e	384	/**
mbed_official	354:e67efb2aab0e	385	* @brief TIM4 Peripherals Debug mode
mbed_official	354:e67efb2aab0e	386	*/
mbed_official	354:e67efb2aab0e	387	#if defined (DBGMCU_APB1_FZ_DBG_TIM4_STOP)
mbed_official	354:e67efb2aab0e	388	#define __HAL_FREEZE_TIM4_DBGMCU() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM4_STOP)
mbed_official	354:e67efb2aab0e	389	#define __HAL_UNFREEZE_TIM4_DBGMCU() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM4_STOP)
mbed_official	354:e67efb2aab0e	390	#endif
mbed_official	354:e67efb2aab0e	391
mbed_official	354:e67efb2aab0e	392	/**
mbed_official	354:e67efb2aab0e	393	* @brief TIM5 Peripherals Debug mode
mbed_official	354:e67efb2aab0e	394	*/
mbed_official	354:e67efb2aab0e	395	#if defined (DBGMCU_APB1_FZ_DBG_TIM5_STOP)
mbed_official	354:e67efb2aab0e	396	#define __HAL_FREEZE_TIM5_DBGMCU() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM5_STOP)
mbed_official	354:e67efb2aab0e	397	#define __HAL_UNFREEZE_TIM5_DBGMCU() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM5_STOP)
mbed_official	354:e67efb2aab0e	398	#endif
mbed_official	354:e67efb2aab0e	399
mbed_official	354:e67efb2aab0e	400	/**
mbed_official	354:e67efb2aab0e	401	* @brief TIM6 Peripherals Debug mode
mbed_official	354:e67efb2aab0e	402	*/
mbed_official	354:e67efb2aab0e	403	#if defined (DBGMCU_APB1_FZ_DBG_TIM6_STOP)
mbed_official	354:e67efb2aab0e	404	#define __HAL_FREEZE_TIM6_DBGMCU() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM6_STOP)
mbed_official	354:e67efb2aab0e	405	#define __HAL_UNFREEZE_TIM6_DBGMCU() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM6_STOP)
mbed_official	354:e67efb2aab0e	406	#endif
mbed_official	354:e67efb2aab0e	407
mbed_official	354:e67efb2aab0e	408	/**
mbed_official	354:e67efb2aab0e	409	* @brief TIM7 Peripherals Debug mode
mbed_official	354:e67efb2aab0e	410	*/
mbed_official	354:e67efb2aab0e	411	#if defined (DBGMCU_APB1_FZ_DBG_TIM7_STOP)
mbed_official	354:e67efb2aab0e	412	#define __HAL_FREEZE_TIM7_DBGMCU() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM7_STOP)
mbed_official	354:e67efb2aab0e	413	#define __HAL_UNFREEZE_TIM7_DBGMCU() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM7_STOP)
mbed_official	354:e67efb2aab0e	414	#endif
mbed_official	354:e67efb2aab0e	415
mbed_official	354:e67efb2aab0e	416	/**
mbed_official	354:e67efb2aab0e	417	* @brief RTC Peripherals Debug mode
mbed_official	354:e67efb2aab0e	418	*/
mbed_official	354:e67efb2aab0e	419	#if defined (DBGMCU_APB1_FZ_DBG_RTC_STOP)
mbed_official	354:e67efb2aab0e	420	#define __HAL_FREEZE_RTC_DBGMCU() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_RTC_STOP)
mbed_official	354:e67efb2aab0e	421	#define __HAL_UNFREEZE_RTC_DBGMCU() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_RTC_STOP)
mbed_official	354:e67efb2aab0e	422	#endif
mbed_official	354:e67efb2aab0e	423
mbed_official	354:e67efb2aab0e	424	/**
mbed_official	354:e67efb2aab0e	425	* @brief WWDG Peripherals Debug mode
mbed_official	354:e67efb2aab0e	426	*/
mbed_official	354:e67efb2aab0e	427	#if defined (DBGMCU_APB1_FZ_DBG_WWDG_STOP)
mbed_official	354:e67efb2aab0e	428	#define __HAL_FREEZE_WWDG_DBGMCU() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_WWDG_STOP)
mbed_official	354:e67efb2aab0e	429	#define __HAL_UNFREEZE_WWDG_DBGMCU() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_WWDG_STOP)
mbed_official	354:e67efb2aab0e	430	#endif
mbed_official	354:e67efb2aab0e	431
mbed_official	354:e67efb2aab0e	432	/**
mbed_official	354:e67efb2aab0e	433	* @brief IWDG Peripherals Debug mode
mbed_official	354:e67efb2aab0e	434	*/
mbed_official	354:e67efb2aab0e	435	#if defined (DBGMCU_APB1_FZ_DBG_IWDG_STOP)
mbed_official	354:e67efb2aab0e	436	#define __HAL_FREEZE_IWDG_DBGMCU() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_IWDG_STOP)
mbed_official	354:e67efb2aab0e	437	#define __HAL_UNFREEZE_IWDG_DBGMCU() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_IWDG_STOP)
mbed_official	354:e67efb2aab0e	438	#endif
mbed_official	354:e67efb2aab0e	439
mbed_official	354:e67efb2aab0e	440	/**
mbed_official	354:e67efb2aab0e	441	* @brief I2C1 Peripherals Debug mode
mbed_official	354:e67efb2aab0e	442	*/
mbed_official	354:e67efb2aab0e	443	#if defined (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)
mbed_official	354:e67efb2aab0e	444	#define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)
mbed_official	354:e67efb2aab0e	445	#define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)
mbed_official	354:e67efb2aab0e	446	#endif
mbed_official	354:e67efb2aab0e	447
mbed_official	354:e67efb2aab0e	448	/**
mbed_official	354:e67efb2aab0e	449	* @brief I2C2 Peripherals Debug mode
mbed_official	354:e67efb2aab0e	450	*/
mbed_official	354:e67efb2aab0e	451	#if defined (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)
mbed_official	354:e67efb2aab0e	452	#define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)
mbed_official	354:e67efb2aab0e	453	#define __HAL_UNFREEZE_I2C2_TIMEOUT_DBGMCU() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)
mbed_official	354:e67efb2aab0e	454	#endif
mbed_official	354:e67efb2aab0e	455
mbed_official	354:e67efb2aab0e	456	/**
mbed_official	354:e67efb2aab0e	457	* @brief TIM9 Peripherals Debug mode
mbed_official	354:e67efb2aab0e	458	*/
mbed_official	354:e67efb2aab0e	459	#if defined (DBGMCU_APB2_FZ_DBG_TIM9_STOP)
mbed_official	354:e67efb2aab0e	460	#define __HAL_FREEZE_TIM9_DBGMCU() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM9_STOP)
mbed_official	354:e67efb2aab0e	461	#define __HAL_UNFREEZE_TIM9_DBGMCU() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM9_STOP)
mbed_official	354:e67efb2aab0e	462	#endif
mbed_official	354:e67efb2aab0e	463
mbed_official	354:e67efb2aab0e	464	/**
mbed_official	354:e67efb2aab0e	465	* @brief TIM10 Peripherals Debug mode
mbed_official	354:e67efb2aab0e	466	*/
mbed_official	354:e67efb2aab0e	467	#if defined (DBGMCU_APB2_FZ_DBG_TIM10_STOP)
mbed_official	354:e67efb2aab0e	468	#define __HAL_FREEZE_TIM10_DBGMCU() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM10_STOP)
mbed_official	354:e67efb2aab0e	469	#define __HAL_UNFREEZE_TIM10_DBGMCU() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM10_STOP)
mbed_official	354:e67efb2aab0e	470	#endif
mbed_official	354:e67efb2aab0e	471
mbed_official	354:e67efb2aab0e	472	/**
mbed_official	354:e67efb2aab0e	473	* @brief TIM11 Peripherals Debug mode
mbed_official	354:e67efb2aab0e	474	*/
mbed_official	354:e67efb2aab0e	475	#if defined (DBGMCU_APB2_FZ_DBG_TIM11_STOP)
mbed_official	354:e67efb2aab0e	476	#define __HAL_FREEZE_TIM11_DBGMCU() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM11_STOP)
mbed_official	354:e67efb2aab0e	477	#define __HAL_UNFREEZE_TIM11_DBGMCU() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM11_STOP)
mbed_official	354:e67efb2aab0e	478	#endif
mbed_official	354:e67efb2aab0e	479
mbed_official	354:e67efb2aab0e	480	/**
mbed_official	354:e67efb2aab0e	481	* @brief Enables or disables the output of internal reference voltage
mbed_official	354:e67efb2aab0e	482	* (VREFINT) on I/O pin.
mbed_official	354:e67efb2aab0e	483	* The VREFINT output can be routed to any I/O in group 3:
mbed_official	354:e67efb2aab0e	484	* - For Cat.1 and Cat.2 devices: CH8 (PB0) or CH9 (PB1).
mbed_official	354:e67efb2aab0e	485	* - For Cat.3 devices: CH8 (PB0), CH9 (PB1) or CH0b (PB2).
mbed_official	354:e67efb2aab0e	486	* - For Cat.4 and Cat.5 devices: CH8 (PB0), CH9 (PB1), CH0b (PB2),
mbed_official	354:e67efb2aab0e	487	* CH1b (PF11) or CH2b (PF12).
mbed_official	354:e67efb2aab0e	488	* Note: Comparator peripheral clock must be preliminarility enabled,
mbed_official	354:e67efb2aab0e	489	* either in COMP user function "HAL_COMP_MspInit()" (should be
mbed_official	354:e67efb2aab0e	490	* done if comparators are used) or by direct clock enable:
mbed_official	354:e67efb2aab0e	491	* Refer to macro "__COMP_CLK_ENABLE()".
mbed_official	354:e67efb2aab0e	492	* Note: In addition with this macro, Vrefint output buffer must be
mbed_official	354:e67efb2aab0e	493	* connected to the selected I/O pin. Refer to macro
mbed_official	354:e67efb2aab0e	494	* "__HAL_RI_IOSWITCH_CLOSE()".
mbed_official	354:e67efb2aab0e	495	* @note ENABLE: Internal reference voltage connected to I/O group 3
mbed_official	354:e67efb2aab0e	496	* @note DISABLE: Internal reference voltage disconnected from I/O group 3
mbed_official	354:e67efb2aab0e	497	* @retval None
mbed_official	354:e67efb2aab0e	498	*/
mbed_official	354:e67efb2aab0e	499	#define __HAL_VREFINT_OUT_ENABLE() SET_BIT(COMP->CSR, COMP_CSR_VREFOUTEN)
mbed_official	354:e67efb2aab0e	500	#define __HAL_VREFINT_OUT_DISABLE() CLEAR_BIT(COMP->CSR, COMP_CSR_VREFOUTEN)
mbed_official	354:e67efb2aab0e	501
mbed_official	354:e67efb2aab0e	502	/**
mbed_official	354:e67efb2aab0e	503	* @}
mbed_official	354:e67efb2aab0e	504	*/
mbed_official	354:e67efb2aab0e	505
mbed_official	354:e67efb2aab0e	506	/**
mbed_official	354:e67efb2aab0e	507	* @}
mbed_official	354:e67efb2aab0e	508	*/
mbed_official	354:e67efb2aab0e	509
mbed_official	354:e67efb2aab0e	510	/** @defgroup SYSCFG_Macros SYSCFG: SYStem ConFiG
mbed_official	354:e67efb2aab0e	511	* @{
mbed_official	354:e67efb2aab0e	512	*/
mbed_official	354:e67efb2aab0e	513
mbed_official	354:e67efb2aab0e	514	/** @defgroup SYSCFG_BootModeConfig Boot Mode Configuration
mbed_official	354:e67efb2aab0e	515	* @{
mbed_official	354:e67efb2aab0e	516	*/
mbed_official	354:e67efb2aab0e	517
mbed_official	354:e67efb2aab0e	518	/**
mbed_official	354:e67efb2aab0e	519	* @brief Main Flash memory mapped at 0x00000000
mbed_official	354:e67efb2aab0e	520	*/
mbed_official	354:e67efb2aab0e	521	#define __HAL_REMAPMEMORY_FLASH() CLEAR_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE)
mbed_official	354:e67efb2aab0e	522
mbed_official	354:e67efb2aab0e	523	/** @brief System Flash memory mapped at 0x00000000
mbed_official	354:e67efb2aab0e	524	*/
mbed_official	354:e67efb2aab0e	525	#define __HAL_REMAPMEMORY_SYSTEMFLASH() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, SYSCFG_MEMRMP_MEM_MODE_0)
mbed_official	354:e67efb2aab0e	526
mbed_official	354:e67efb2aab0e	527	/** @brief Embedded SRAM mapped at 0x00000000
mbed_official	354:e67efb2aab0e	528	*/
mbed_official	354:e67efb2aab0e	529	#define __HAL_REMAPMEMORY_SRAM() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, SYSCFG_MEMRMP_MEM_MODE_0 \| SYSCFG_MEMRMP_MEM_MODE_1)
mbed_official	354:e67efb2aab0e	530
mbed_official	354:e67efb2aab0e	531	#if defined(FSMC_R_BASE)
mbed_official	354:e67efb2aab0e	532	/** @brief FSMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
mbed_official	354:e67efb2aab0e	533	*/
mbed_official	354:e67efb2aab0e	534	#define __HAL_REMAPMEMORY_FSMC() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, SYSCFG_MEMRMP_MEM_MODE_1)
mbed_official	354:e67efb2aab0e	535
mbed_official	354:e67efb2aab0e	536	#endif /* FSMC_R_BASE */
mbed_official	354:e67efb2aab0e	537
mbed_official	354:e67efb2aab0e	538	/**
mbed_official	354:e67efb2aab0e	539	* @brief Returns the boot mode as configured by user.
mbed_official	354:e67efb2aab0e	540	* @retval The boot mode as configured by user. The returned value can be one
mbed_official	354:e67efb2aab0e	541	* of the following values:
mbed_official	354:e67efb2aab0e	542	* @arg SYSCFG_BOOT_MAINFLASH
mbed_official	354:e67efb2aab0e	543	* @arg SYSCFG_BOOT_SYSTEMFLASH
mbed_official	354:e67efb2aab0e	544	* @arg SYSCFG_BOOT_FSMC (available only for STM32L151xD, STM32L152xD & STM32L162xD)
mbed_official	354:e67efb2aab0e	545	* @arg SYSCFG_BOOT_SRAM
mbed_official	354:e67efb2aab0e	546	*/
mbed_official	354:e67efb2aab0e	547	#define __HAL_SYSCFG_GET_BOOT_MODE() READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_BOOT_MODE)
mbed_official	354:e67efb2aab0e	548
mbed_official	354:e67efb2aab0e	549	/**
mbed_official	354:e67efb2aab0e	550	* @}
mbed_official	354:e67efb2aab0e	551	*/
mbed_official	354:e67efb2aab0e	552
mbed_official	354:e67efb2aab0e	553	/** @defgroup SYSCFG_USBConfig USB DP line Configuration
mbed_official	354:e67efb2aab0e	554	* @{
mbed_official	354:e67efb2aab0e	555	*/
mbed_official	354:e67efb2aab0e	556
mbed_official	354:e67efb2aab0e	557	/**
mbed_official	354:e67efb2aab0e	558	* @brief Control the internal pull-up on USB DP line.
mbed_official	354:e67efb2aab0e	559	*/
mbed_official	354:e67efb2aab0e	560	#define __HAL_SYSCFG_USBPULLUP_ENABLE() SET_BIT(SYSCFG->PMC, SYSCFG_PMC_USB_PU)
mbed_official	354:e67efb2aab0e	561
mbed_official	354:e67efb2aab0e	562	#define __HAL_SYSCFG_USBPULLUP_DISABLE() CLEAR_BIT(SYSCFG->PMC, SYSCFG_PMC_USB_PU)
mbed_official	354:e67efb2aab0e	563
mbed_official	354:e67efb2aab0e	564	/**
mbed_official	354:e67efb2aab0e	565	* @}
mbed_official	354:e67efb2aab0e	566	*/
mbed_official	354:e67efb2aab0e	567
mbed_official	354:e67efb2aab0e	568	/**
mbed_official	354:e67efb2aab0e	569	* @}
mbed_official	354:e67efb2aab0e	570	*/
mbed_official	354:e67efb2aab0e	571
mbed_official	354:e67efb2aab0e	572	/** @defgroup RI_Macris RI: Routing Interface
mbed_official	354:e67efb2aab0e	573	* @{
mbed_official	354:e67efb2aab0e	574	*/
mbed_official	354:e67efb2aab0e	575
mbed_official	354:e67efb2aab0e	576	/** @defgroup RI_InputCaputureConfig Input Capture configuration
mbed_official	354:e67efb2aab0e	577	* @{
mbed_official	354:e67efb2aab0e	578	*/
mbed_official	354:e67efb2aab0e	579
mbed_official	354:e67efb2aab0e	580	/**
mbed_official	354:e67efb2aab0e	581	* @brief Configures the routing interface to map Input Capture 1 of TIMx to a selected I/O pin.
mbed_official	354:e67efb2aab0e	582	* @param __TIMSELECT__: Timer select.
mbed_official	354:e67efb2aab0e	583	* This parameter can be one of the following values:
mbed_official	354:e67efb2aab0e	584	* @arg TIM_SELECT_NONE: No timer selected and default Timer mapping is enabled.
mbed_official	354:e67efb2aab0e	585	* @arg TIM_SELECT_TIM2: Timer 2 Input Captures to be routed.
mbed_official	354:e67efb2aab0e	586	* @arg TIM_SELECT_TIM3: Timer 3 Input Captures to be routed.
mbed_official	354:e67efb2aab0e	587	* @arg TIM_SELECT_TIM4: Timer 4 Input Captures to be routed.
mbed_official	354:e67efb2aab0e	588	* @param __INPUT__: selects which pin to be routed to Input Capture.
mbed_official	354:e67efb2aab0e	589	* This parameter must be a value of @ref RI_InputCaptureRouting
mbed_official	354:e67efb2aab0e	590	* e.g.
mbed_official	354:e67efb2aab0e	591	* __HAL_RI_REMAP_INPUTCAPTURE1(TIM_SELECT_TIM2, RI_INPUTCAPTUREROUTING_1)
mbed_official	354:e67efb2aab0e	592	* allows routing of Input capture IC1 of TIM2 to PA4.
mbed_official	354:e67efb2aab0e	593	* For details about correspondence between RI_INPUTCAPTUREROUTING_x
mbed_official	354:e67efb2aab0e	594	* and I/O pins refer to the parameters' description in the header file
mbed_official	354:e67efb2aab0e	595	* or refer to the product reference manual.
mbed_official	354:e67efb2aab0e	596	* @note Input capture selection bits are not reset by this function.
mbed_official	354:e67efb2aab0e	597	* To reset input capture selection bits, use SYSCFG_RIDeInit() function.
mbed_official	354:e67efb2aab0e	598	* @note The I/O should be configured in alternate function mode (AF14) using
mbed_official	354:e67efb2aab0e	599	* GPIO_PinAFConfig() function.
mbed_official	354:e67efb2aab0e	600	* @retval None.
mbed_official	354:e67efb2aab0e	601	*/
mbed_official	354:e67efb2aab0e	602	#define __HAL_RI_REMAP_INPUTCAPTURE1(__TIMSELECT__, __INPUT__) \
mbed_official	354:e67efb2aab0e	603	do {assert_param(IS_RI_TIM(__TIMSELECT__)); \
mbed_official	354:e67efb2aab0e	604	assert_param(IS_RI_INPUTCAPTURE_ROUTING(__INPUT__)); \
mbed_official	354:e67efb2aab0e	605	MODIFY_REG(RI->ICR, RI_ICR_TIM, (__TIMSELECT__)); \
mbed_official	354:e67efb2aab0e	606	SET_BIT(RI->ICR, RI_INPUTCAPTURE_IC1); \
mbed_official	354:e67efb2aab0e	607	MODIFY_REG(RI->ICR, RI_ICR_IC1OS, (__INPUT__) << POSITION_VAL(RI_ICR_IC1OS)); \
mbed_official	354:e67efb2aab0e	608	}while(0)
mbed_official	354:e67efb2aab0e	609
mbed_official	354:e67efb2aab0e	610	/**
mbed_official	354:e67efb2aab0e	611	* @brief Configures the routing interface to map Input Capture 2 of TIMx to a selected I/O pin.
mbed_official	354:e67efb2aab0e	612	* @param __TIMSELECT__: Timer select.
mbed_official	354:e67efb2aab0e	613	* This parameter can be one of the following values:
mbed_official	354:e67efb2aab0e	614	* @arg TIM_SELECT_NONE: No timer selected and default Timer mapping is enabled.
mbed_official	354:e67efb2aab0e	615	* @arg TIM_SELECT_TIM2: Timer 2 Input Captures to be routed.
mbed_official	354:e67efb2aab0e	616	* @arg TIM_SELECT_TIM3: Timer 3 Input Captures to be routed.
mbed_official	354:e67efb2aab0e	617	* @arg TIM_SELECT_TIM4: Timer 4 Input Captures to be routed.
mbed_official	354:e67efb2aab0e	618	* @param __INPUT__: selects which pin to be routed to Input Capture.
mbed_official	354:e67efb2aab0e	619	* This parameter must be a value of @ref RI_InputCaptureRouting
mbed_official	354:e67efb2aab0e	620	* @retval None.
mbed_official	354:e67efb2aab0e	621	*/
mbed_official	354:e67efb2aab0e	622	#define __HAL_RI_REMAP_INPUTCAPTURE2(__TIMSELECT__, __INPUT__) \
mbed_official	354:e67efb2aab0e	623	do {assert_param(IS_RI_TIM(__TIMSELECT__)); \
mbed_official	354:e67efb2aab0e	624	assert_param(IS_RI_INPUTCAPTURE_ROUTING(__INPUT__)); \
mbed_official	354:e67efb2aab0e	625	MODIFY_REG(RI->ICR, RI_ICR_TIM, (__TIMSELECT__)); \
mbed_official	354:e67efb2aab0e	626	SET_BIT(RI->ICR, RI_INPUTCAPTURE_IC2); \
mbed_official	354:e67efb2aab0e	627	MODIFY_REG(RI->ICR, RI_ICR_IC2OS, (__INPUT__) << POSITION_VAL(RI_ICR_IC2OS)); \
mbed_official	354:e67efb2aab0e	628	}while(0)
mbed_official	354:e67efb2aab0e	629
mbed_official	354:e67efb2aab0e	630	/**
mbed_official	354:e67efb2aab0e	631	* @brief Configures the routing interface to map Input Capture 3 of TIMx to a selected I/O pin.
mbed_official	354:e67efb2aab0e	632	* @param __TIMSELECT__: Timer select.
mbed_official	354:e67efb2aab0e	633	* This parameter can be one of the following values:
mbed_official	354:e67efb2aab0e	634	* @arg TIM_SELECT_NONE: No timer selected and default Timer mapping is enabled.
mbed_official	354:e67efb2aab0e	635	* @arg TIM_SELECT_TIM2: Timer 2 Input Captures to be routed.
mbed_official	354:e67efb2aab0e	636	* @arg TIM_SELECT_TIM3: Timer 3 Input Captures to be routed.
mbed_official	354:e67efb2aab0e	637	* @arg TIM_SELECT_TIM4: Timer 4 Input Captures to be routed.
mbed_official	354:e67efb2aab0e	638	* @param __INPUT__: selects which pin to be routed to Input Capture.
mbed_official	354:e67efb2aab0e	639	* This parameter must be a value of @ref RI_InputCaptureRouting
mbed_official	354:e67efb2aab0e	640	* @retval None.
mbed_official	354:e67efb2aab0e	641	*/
mbed_official	354:e67efb2aab0e	642	#define __HAL_RI_REMAP_INPUTCAPTURE3(__TIMSELECT__, __INPUT__) \
mbed_official	354:e67efb2aab0e	643	do {assert_param(IS_RI_TIM(__TIMSELECT__)); \
mbed_official	354:e67efb2aab0e	644	assert_param(IS_RI_INPUTCAPTURE_ROUTING(__INPUT__)); \
mbed_official	354:e67efb2aab0e	645	MODIFY_REG(RI->ICR, RI_ICR_TIM, (__TIMSELECT__)); \
mbed_official	354:e67efb2aab0e	646	SET_BIT(RI->ICR, RI_INPUTCAPTURE_IC3); \
mbed_official	354:e67efb2aab0e	647	MODIFY_REG(RI->ICR, RI_ICR_IC3OS, (__INPUT__) << POSITION_VAL(RI_ICR_IC3OS)); \
mbed_official	354:e67efb2aab0e	648	}while(0)
mbed_official	354:e67efb2aab0e	649
mbed_official	354:e67efb2aab0e	650	/**
mbed_official	354:e67efb2aab0e	651	* @brief Configures the routing interface to map Input Capture 4 of TIMx to a selected I/O pin.
mbed_official	354:e67efb2aab0e	652	* @param __TIMSELECT__: Timer select.
mbed_official	354:e67efb2aab0e	653	* This parameter can be one of the following values:
mbed_official	354:e67efb2aab0e	654	* @arg TIM_SELECT_NONE: No timer selected and default Timer mapping is enabled.
mbed_official	354:e67efb2aab0e	655	* @arg TIM_SELECT_TIM2: Timer 2 Input Captures to be routed.
mbed_official	354:e67efb2aab0e	656	* @arg TIM_SELECT_TIM3: Timer 3 Input Captures to be routed.
mbed_official	354:e67efb2aab0e	657	* @arg TIM_SELECT_TIM4: Timer 4 Input Captures to be routed.
mbed_official	354:e67efb2aab0e	658	* @param __INPUT__: selects which pin to be routed to Input Capture.
mbed_official	354:e67efb2aab0e	659	* This parameter must be a value of @ref RI_InputCaptureRouting
mbed_official	354:e67efb2aab0e	660	* @retval None.
mbed_official	354:e67efb2aab0e	661	*/
mbed_official	354:e67efb2aab0e	662	#define __HAL_RI_REMAP_INPUTCAPTURE4(__TIMSELECT__, __INPUT__) \
mbed_official	354:e67efb2aab0e	663	do {assert_param(IS_RI_TIM(__TIMSELECT__)); \
mbed_official	354:e67efb2aab0e	664	assert_param(IS_RI_INPUTCAPTURE_ROUTING(__INPUT__)); \
mbed_official	354:e67efb2aab0e	665	MODIFY_REG(RI->ICR, RI_ICR_TIM, (__TIMSELECT__)); \
mbed_official	354:e67efb2aab0e	666	SET_BIT(RI->ICR, RI_INPUTCAPTURE_IC4); \
mbed_official	354:e67efb2aab0e	667	MODIFY_REG(RI->ICR, RI_ICR_IC4OS, (__INPUT__) << POSITION_VAL(RI_ICR_IC4OS)); \
mbed_official	354:e67efb2aab0e	668	}while(0)
mbed_official	354:e67efb2aab0e	669
mbed_official	354:e67efb2aab0e	670	/**
mbed_official	354:e67efb2aab0e	671	* @}
mbed_official	354:e67efb2aab0e	672	*/
mbed_official	354:e67efb2aab0e	673
mbed_official	354:e67efb2aab0e	674	/** @defgroup RI_SwitchControlConfig Switch Control configuration
mbed_official	354:e67efb2aab0e	675	* @{
mbed_official	354:e67efb2aab0e	676	*/
mbed_official	354:e67efb2aab0e	677
mbed_official	354:e67efb2aab0e	678	/**
mbed_official	354:e67efb2aab0e	679	* @brief Enable or disable the switch control mode.
mbed_official	354:e67efb2aab0e	680	* @note ENABLE: ADC analog switches closed if the corresponding
mbed_official	354:e67efb2aab0e	681	* I/O switch is also closed.
mbed_official	354:e67efb2aab0e	682	* When using COMP1, switch control mode must be enabled.
mbed_official	354:e67efb2aab0e	683	* @note DISABLE: ADC analog switches open or controlled by the ADC interface.
mbed_official	354:e67efb2aab0e	684	* When using the ADC for acquisition, switch control mode
mbed_official	354:e67efb2aab0e	685	* must be disabled.
mbed_official	354:e67efb2aab0e	686	* @note COMP1 comparator and ADC cannot be used at the same time since
mbed_official	354:e67efb2aab0e	687	* they share the ADC switch matrix.
mbed_official	354:e67efb2aab0e	688	* @retval None
mbed_official	354:e67efb2aab0e	689	*/
mbed_official	354:e67efb2aab0e	690	#define __HAL_RI_SWITCHCONTROLMODE_ENABLE() SET_BIT(RI->ASCR1, RI_ASCR1_SCM)
mbed_official	354:e67efb2aab0e	691
mbed_official	354:e67efb2aab0e	692	#define __HAL_RI_SWITCHCONTROLMODE_DISABLE() CLEAR_BIT(RI->ASCR1, RI_ASCR1_SCM)
mbed_official	354:e67efb2aab0e	693
mbed_official	354:e67efb2aab0e	694	/*
mbed_official	354:e67efb2aab0e	695	* @brief Close or Open the routing interface Input Output switches.
mbed_official	354:e67efb2aab0e	696	* @param __IOSWITCH__: selects the I/O analog switch number.
mbed_official	354:e67efb2aab0e	697	* This parameter must be a value of @ref RI_IOSwitch
mbed_official	354:e67efb2aab0e	698	* @retval None
mbed_official	354:e67efb2aab0e	699	*/
mbed_official	354:e67efb2aab0e	700	#define __HAL_RI_IOSWITCH_CLOSE(__IOSWITCH__) do { assert_param(IS_RI_IOSWITCH(__IOSWITCH__)); \
mbed_official	354:e67efb2aab0e	701	if ((__IOSWITCH__) >> 31 != 0 ) \
mbed_official	354:e67efb2aab0e	702	{ \
mbed_official	354:e67efb2aab0e	703	SET_BIT(RI->ASCR1, (__IOSWITCH__) & 0x7FFFFFFF); \
mbed_official	354:e67efb2aab0e	704	} \
mbed_official	354:e67efb2aab0e	705	else \
mbed_official	354:e67efb2aab0e	706	{ \
mbed_official	354:e67efb2aab0e	707	SET_BIT(RI->ASCR2, (__IOSWITCH__)); \
mbed_official	354:e67efb2aab0e	708	} \
mbed_official	354:e67efb2aab0e	709	}while(0)
mbed_official	354:e67efb2aab0e	710
mbed_official	354:e67efb2aab0e	711	#define __HAL_RI_IOSWITCH_OPEN(__IOSWITCH__) do { assert_param(IS_RI_IOSWITCH(__IOSWITCH__)); \
mbed_official	354:e67efb2aab0e	712	if ((__IOSWITCH__) >> 31 != 0 ) \
mbed_official	354:e67efb2aab0e	713	{ \
mbed_official	354:e67efb2aab0e	714	CLEAR_BIT(RI->ASCR1, (__IOSWITCH__) & 0x7FFFFFFF); \
mbed_official	354:e67efb2aab0e	715	} \
mbed_official	354:e67efb2aab0e	716	else \
mbed_official	354:e67efb2aab0e	717	{ \
mbed_official	354:e67efb2aab0e	718	CLEAR_BIT(RI->ASCR2, (__IOSWITCH__)); \
mbed_official	354:e67efb2aab0e	719	} \
mbed_official	354:e67efb2aab0e	720	}while(0)
mbed_official	354:e67efb2aab0e	721
mbed_official	354:e67efb2aab0e	722	#if defined (COMP_CSR_SW1)
mbed_official	354:e67efb2aab0e	723	/**
mbed_official	354:e67efb2aab0e	724	* @brief Close or open the internal switch COMP1_SW1.
mbed_official	354:e67efb2aab0e	725	* This switch connects I/O pin PC3 (can be used as ADC channel 13)
mbed_official	354:e67efb2aab0e	726	* and OPAMP3 ouput to ADC switch matrix (ADC channel VCOMP, channel
mbed_official	354:e67efb2aab0e	727	* 26) and COMP1 non-inverting input.
mbed_official	354:e67efb2aab0e	728	* Pin PC3 connection depends on another switch setting, refer to
mbed_official	354:e67efb2aab0e	729	* macro "__HAL_ADC_CHANNEL_SPEED_FAST()".
mbed_official	354:e67efb2aab0e	730	* @retval None.
mbed_official	354:e67efb2aab0e	731	*/
mbed_official	354:e67efb2aab0e	732	#define __HAL_RI_SWITCH_COMP1_SW1_CLOSE() SET_BIT(COMP->CSR, COMP_CSR_SW1)
mbed_official	354:e67efb2aab0e	733
mbed_official	354:e67efb2aab0e	734	#define __HAL_RI_SWITCH_COMP1_SW1_OPEN() CLEAR_BIT(COMP->CSR, COMP_CSR_SW1)
mbed_official	354:e67efb2aab0e	735	#endif /* COMP_CSR_SW1 */
mbed_official	354:e67efb2aab0e	736
mbed_official	354:e67efb2aab0e	737	/**
mbed_official	354:e67efb2aab0e	738	* @}
mbed_official	354:e67efb2aab0e	739	*/
mbed_official	354:e67efb2aab0e	740
mbed_official	354:e67efb2aab0e	741	/** @defgroup RI_HystConfig Hysteresis Activation and Deactivation
mbed_official	354:e67efb2aab0e	742	* @{
mbed_official	354:e67efb2aab0e	743	*/
mbed_official	354:e67efb2aab0e	744
mbed_official	354:e67efb2aab0e	745	/**
mbed_official	354:e67efb2aab0e	746	* @brief Enable or disable Hysteresis of the input schmitt triger of Ports A
mbed_official	354:e67efb2aab0e	747	* When the I/Os are programmed in input mode by standard I/O port
mbed_official	354:e67efb2aab0e	748	* registers, the Schmitt trigger and the hysteresis are enabled by default.
mbed_official	354:e67efb2aab0e	749	* When hysteresis is disabled, it is possible to read the
mbed_official	354:e67efb2aab0e	750	* corresponding port with a trigger level of VDDIO/2.
mbed_official	354:e67efb2aab0e	751	* @param __IOPIN__ : Selects the pin(s) on which to enable or disable hysteresis.
mbed_official	354:e67efb2aab0e	752	* This parameter must be a value of @ref RI_Pin
mbed_official	354:e67efb2aab0e	753	* @retval None
mbed_official	354:e67efb2aab0e	754	*/
mbed_official	354:e67efb2aab0e	755	#define __HAL_RI_HYSTERIS_PORTA_ON(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
mbed_official	354:e67efb2aab0e	756	CLEAR_BIT(RI->HYSCR1, (__IOPIN__)); \
mbed_official	354:e67efb2aab0e	757	} while(0)
mbed_official	354:e67efb2aab0e	758
mbed_official	354:e67efb2aab0e	759	#define __HAL_RI_HYSTERIS_PORTA_OFF(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
mbed_official	354:e67efb2aab0e	760	SET_BIT(RI->HYSCR1, (__IOPIN__)); \
mbed_official	354:e67efb2aab0e	761	} while(0)
mbed_official	354:e67efb2aab0e	762
mbed_official	354:e67efb2aab0e	763	/**
mbed_official	354:e67efb2aab0e	764	* @brief Enable or disable Hysteresis of the input schmitt triger of Ports B
mbed_official	354:e67efb2aab0e	765	* When the I/Os are programmed in input mode by standard I/O port
mbed_official	354:e67efb2aab0e	766	* registers, the Schmitt trigger and the hysteresis are enabled by default.
mbed_official	354:e67efb2aab0e	767	* When hysteresis is disabled, it is possible to read the
mbed_official	354:e67efb2aab0e	768	* corresponding port with a trigger level of VDDIO/2.
mbed_official	354:e67efb2aab0e	769	* @param __IOPIN__ : Selects the pin(s) on which to enable or disable hysteresis.
mbed_official	354:e67efb2aab0e	770	* This parameter must be a value of @ref RI_Pin
mbed_official	354:e67efb2aab0e	771	* @retval None
mbed_official	354:e67efb2aab0e	772	*/
mbed_official	354:e67efb2aab0e	773	#define __HAL_RI_HYSTERIS_PORTB_ON(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
mbed_official	354:e67efb2aab0e	774	CLEAR_BIT(RI->HYSCR1, (__IOPIN__) << 16 ); \
mbed_official	354:e67efb2aab0e	775	} while(0)
mbed_official	354:e67efb2aab0e	776
mbed_official	354:e67efb2aab0e	777	#define __HAL_RI_HYSTERIS_PORTB_OFF(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
mbed_official	354:e67efb2aab0e	778	SET_BIT(RI->HYSCR1, (__IOPIN__) << 16 ); \
mbed_official	354:e67efb2aab0e	779	} while(0)
mbed_official	354:e67efb2aab0e	780
mbed_official	354:e67efb2aab0e	781	/**
mbed_official	354:e67efb2aab0e	782	* @brief Enable or disable Hysteresis of the input schmitt triger of Ports C
mbed_official	354:e67efb2aab0e	783	* When the I/Os are programmed in input mode by standard I/O port
mbed_official	354:e67efb2aab0e	784	* registers, the Schmitt trigger and the hysteresis are enabled by default.
mbed_official	354:e67efb2aab0e	785	* When hysteresis is disabled, it is possible to read the
mbed_official	354:e67efb2aab0e	786	* corresponding port with a trigger level of VDDIO/2.
mbed_official	354:e67efb2aab0e	787	* @param __IOPIN__ : Selects the pin(s) on which to enable or disable hysteresis.
mbed_official	354:e67efb2aab0e	788	* This parameter must be a value of @ref RI_Pin
mbed_official	354:e67efb2aab0e	789	* @retval None
mbed_official	354:e67efb2aab0e	790	*/
mbed_official	354:e67efb2aab0e	791	#define __HAL_RI_HYSTERIS_PORTC_ON(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
mbed_official	354:e67efb2aab0e	792	CLEAR_BIT(RI->HYSCR2, (__IOPIN__)); \
mbed_official	354:e67efb2aab0e	793	} while(0)
mbed_official	354:e67efb2aab0e	794
mbed_official	354:e67efb2aab0e	795	#define __HAL_RI_HYSTERIS_PORTC_OFF(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
mbed_official	354:e67efb2aab0e	796	SET_BIT(RI->HYSCR2, (__IOPIN__)); \
mbed_official	354:e67efb2aab0e	797	} while(0)
mbed_official	354:e67efb2aab0e	798
mbed_official	354:e67efb2aab0e	799	/**
mbed_official	354:e67efb2aab0e	800	* @brief Enable or disable Hysteresis of the input schmitt triger of Ports D
mbed_official	354:e67efb2aab0e	801	* When the I/Os are programmed in input mode by standard I/O port
mbed_official	354:e67efb2aab0e	802	* registers, the Schmitt trigger and the hysteresis are enabled by default.
mbed_official	354:e67efb2aab0e	803	* When hysteresis is disabled, it is possible to read the
mbed_official	354:e67efb2aab0e	804	* corresponding port with a trigger level of VDDIO/2.
mbed_official	354:e67efb2aab0e	805	* @param __IOPIN__ : Selects the pin(s) on which to enable or disable hysteresis.
mbed_official	354:e67efb2aab0e	806	* This parameter must be a value of @ref RI_Pin
mbed_official	354:e67efb2aab0e	807	* @retval None
mbed_official	354:e67efb2aab0e	808	*/
mbed_official	354:e67efb2aab0e	809	#define __HAL_RI_HYSTERIS_PORTD_ON(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
mbed_official	354:e67efb2aab0e	810	CLEAR_BIT(RI->HYSCR2, (__IOPIN__) << 16 ); \
mbed_official	354:e67efb2aab0e	811	} while(0)
mbed_official	354:e67efb2aab0e	812
mbed_official	354:e67efb2aab0e	813	#define __HAL_RI_HYSTERIS_PORTD_OFF(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
mbed_official	354:e67efb2aab0e	814	SET_BIT(RI->HYSCR2, (__IOPIN__) << 16 ); \
mbed_official	354:e67efb2aab0e	815	} while(0)
mbed_official	354:e67efb2aab0e	816
mbed_official	354:e67efb2aab0e	817	#if defined (GPIOE_BASE)
mbed_official	354:e67efb2aab0e	818
mbed_official	354:e67efb2aab0e	819	/**
mbed_official	354:e67efb2aab0e	820	* @brief Enable or disable Hysteresis of the input schmitt triger of Ports E
mbed_official	354:e67efb2aab0e	821	* When the I/Os are programmed in input mode by standard I/O port
mbed_official	354:e67efb2aab0e	822	* registers, the Schmitt trigger and the hysteresis are enabled by default.
mbed_official	354:e67efb2aab0e	823	* When hysteresis is disabled, it is possible to read the
mbed_official	354:e67efb2aab0e	824	* corresponding port with a trigger level of VDDIO/2.
mbed_official	354:e67efb2aab0e	825	* @param __IOPIN__ : Selects the pin(s) on which to enable or disable hysteresis.
mbed_official	354:e67efb2aab0e	826	* This parameter must be a value of @ref RI_Pin
mbed_official	354:e67efb2aab0e	827	* @retval None
mbed_official	354:e67efb2aab0e	828	*/
mbed_official	354:e67efb2aab0e	829	#define __HAL_RI_HYSTERIS_PORTE_ON(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
mbed_official	354:e67efb2aab0e	830	CLEAR_BIT(RI->HYSCR3, (__IOPIN__)); \
mbed_official	354:e67efb2aab0e	831	} while(0)
mbed_official	354:e67efb2aab0e	832
mbed_official	354:e67efb2aab0e	833	#define __HAL_RI_HYSTERIS_PORTE_OFF(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
mbed_official	354:e67efb2aab0e	834	SET_BIT(RI->HYSCR3, (__IOPIN__)); \
mbed_official	354:e67efb2aab0e	835	} while(0)
mbed_official	354:e67efb2aab0e	836
mbed_official	354:e67efb2aab0e	837	#endif /* GPIOE_BASE */
mbed_official	354:e67efb2aab0e	838
mbed_official	354:e67efb2aab0e	839	#if defined(GPIOF_BASE) \|\| defined(GPIOG_BASE)
mbed_official	354:e67efb2aab0e	840
mbed_official	354:e67efb2aab0e	841	/**
mbed_official	354:e67efb2aab0e	842	* @brief Enable or disable Hysteresis of the input schmitt triger of Ports F
mbed_official	354:e67efb2aab0e	843	* When the I/Os are programmed in input mode by standard I/O port
mbed_official	354:e67efb2aab0e	844	* registers, the Schmitt trigger and the hysteresis are enabled by default.
mbed_official	354:e67efb2aab0e	845	* When hysteresis is disabled, it is possible to read the
mbed_official	354:e67efb2aab0e	846	* corresponding port with a trigger level of VDDIO/2.
mbed_official	354:e67efb2aab0e	847	* @param __IOPIN__ : Selects the pin(s) on which to enable or disable hysteresis.
mbed_official	354:e67efb2aab0e	848	* This parameter must be a value of @ref RI_Pin
mbed_official	354:e67efb2aab0e	849	* @retval None
mbed_official	354:e67efb2aab0e	850	*/
mbed_official	354:e67efb2aab0e	851	#define __HAL_RI_HYSTERIS_PORTF_ON(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
mbed_official	354:e67efb2aab0e	852	CLEAR_BIT(RI->HYSCR3, (__IOPIN__) << 16 ); \
mbed_official	354:e67efb2aab0e	853	} while(0)
mbed_official	354:e67efb2aab0e	854
mbed_official	354:e67efb2aab0e	855	#define __HAL_RI_HYSTERIS_PORTF_OFF(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
mbed_official	354:e67efb2aab0e	856	SET_BIT(RI->HYSCR3, (__IOPIN__) << 16 ); \
mbed_official	354:e67efb2aab0e	857	} while(0)
mbed_official	354:e67efb2aab0e	858
mbed_official	354:e67efb2aab0e	859	/**
mbed_official	354:e67efb2aab0e	860	* @brief Enable or disable Hysteresis of the input schmitt triger of Ports G
mbed_official	354:e67efb2aab0e	861	* When the I/Os are programmed in input mode by standard I/O port
mbed_official	354:e67efb2aab0e	862	* registers, the Schmitt trigger and the hysteresis are enabled by default.
mbed_official	354:e67efb2aab0e	863	* When hysteresis is disabled, it is possible to read the
mbed_official	354:e67efb2aab0e	864	* corresponding port with a trigger level of VDDIO/2.
mbed_official	354:e67efb2aab0e	865	* @param __IOPIN__ : Selects the pin(s) on which to enable or disable hysteresis.
mbed_official	354:e67efb2aab0e	866	* This parameter must be a value of @ref RI_Pin
mbed_official	354:e67efb2aab0e	867	* @retval None
mbed_official	354:e67efb2aab0e	868	*/
mbed_official	354:e67efb2aab0e	869	#define __HAL_RI_HYSTERIS_PORTG_ON(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
mbed_official	354:e67efb2aab0e	870	CLEAR_BIT(RI->HYSCR4, (__IOPIN__)); \
mbed_official	354:e67efb2aab0e	871	} while(0)
mbed_official	354:e67efb2aab0e	872
mbed_official	354:e67efb2aab0e	873	#define __HAL_RI_HYSTERIS_PORTG_OFF(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
mbed_official	354:e67efb2aab0e	874	SET_BIT(RI->HYSCR4, (__IOPIN__)); \
mbed_official	354:e67efb2aab0e	875	} while(0)
mbed_official	354:e67efb2aab0e	876
mbed_official	354:e67efb2aab0e	877	#endif /* GPIOF_BASE \|\| GPIOG_BASE */
mbed_official	354:e67efb2aab0e	878
mbed_official	354:e67efb2aab0e	879	/**
mbed_official	354:e67efb2aab0e	880	* @}
mbed_official	354:e67efb2aab0e	881	*/
mbed_official	354:e67efb2aab0e	882
mbed_official	354:e67efb2aab0e	883	/**
mbed_official	354:e67efb2aab0e	884	* @}
mbed_official	354:e67efb2aab0e	885	*/
mbed_official	354:e67efb2aab0e	886
mbed_official	354:e67efb2aab0e	887	/**
mbed_official	354:e67efb2aab0e	888	* @}
mbed_official	354:e67efb2aab0e	889	*/
mbed_official	354:e67efb2aab0e	890
mbed_official	354:e67efb2aab0e	891	/* Exported functions --------------------------------------------------------*/
mbed_official	354:e67efb2aab0e	892
mbed_official	354:e67efb2aab0e	893	/** @addtogroup HAL_Exported_Functions
mbed_official	354:e67efb2aab0e	894	* @{
mbed_official	354:e67efb2aab0e	895	*/
mbed_official	354:e67efb2aab0e	896
mbed_official	354:e67efb2aab0e	897	/** @addtogroup HAL_Exported_Functions_Group1
mbed_official	354:e67efb2aab0e	898	* @{
mbed_official	354:e67efb2aab0e	899	*/
mbed_official	354:e67efb2aab0e	900
mbed_official	354:e67efb2aab0e	901	/* Initialization and de-initialization functions ******************************/
mbed_official	354:e67efb2aab0e	902	HAL_StatusTypeDef HAL_Init(void);
mbed_official	354:e67efb2aab0e	903	HAL_StatusTypeDef HAL_DeInit(void);
mbed_official	354:e67efb2aab0e	904	void HAL_MspInit(void);
mbed_official	354:e67efb2aab0e	905	void HAL_MspDeInit(void);
mbed_official	354:e67efb2aab0e	906	HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
mbed_official	354:e67efb2aab0e	907
mbed_official	354:e67efb2aab0e	908	/**
mbed_official	354:e67efb2aab0e	909	* @}
mbed_official	354:e67efb2aab0e	910	*/
mbed_official	354:e67efb2aab0e	911
mbed_official	354:e67efb2aab0e	912	/** @addtogroup HAL_Exported_Functions_Group2
mbed_official	354:e67efb2aab0e	913	* @{
mbed_official	354:e67efb2aab0e	914	*/
mbed_official	354:e67efb2aab0e	915
mbed_official	354:e67efb2aab0e	916	/* Peripheral Control functions ************************************************/
mbed_official	354:e67efb2aab0e	917	void HAL_IncTick(void);
mbed_official	354:e67efb2aab0e	918	void HAL_Delay(__IO uint32_t Delay);
mbed_official	354:e67efb2aab0e	919	uint32_t HAL_GetTick(void);
mbed_official	354:e67efb2aab0e	920	void HAL_SuspendTick(void);
mbed_official	354:e67efb2aab0e	921	void HAL_ResumeTick(void);
mbed_official	354:e67efb2aab0e	922	uint32_t HAL_GetHalVersion(void);
mbed_official	354:e67efb2aab0e	923	uint32_t HAL_GetREVID(void);
mbed_official	354:e67efb2aab0e	924	uint32_t HAL_GetDEVID(void);
mbed_official	354:e67efb2aab0e	925	void HAL_EnableDBGSleepMode(void);
mbed_official	354:e67efb2aab0e	926	void HAL_DisableDBGSleepMode(void);
mbed_official	354:e67efb2aab0e	927	void HAL_EnableDBGStopMode(void);
mbed_official	354:e67efb2aab0e	928	void HAL_DisableDBGStopMode(void);
mbed_official	354:e67efb2aab0e	929	void HAL_EnableDBGStandbyMode(void);
mbed_official	354:e67efb2aab0e	930	void HAL_DisableDBGStandbyMode(void);
mbed_official	354:e67efb2aab0e	931
mbed_official	354:e67efb2aab0e	932	/**
mbed_official	354:e67efb2aab0e	933	* @}
mbed_official	354:e67efb2aab0e	934	*/
mbed_official	354:e67efb2aab0e	935
mbed_official	354:e67efb2aab0e	936	/**
mbed_official	354:e67efb2aab0e	937	* @}
mbed_official	354:e67efb2aab0e	938	*/
mbed_official	354:e67efb2aab0e	939
mbed_official	354:e67efb2aab0e	940
mbed_official	354:e67efb2aab0e	941	/**
mbed_official	354:e67efb2aab0e	942	* @}
mbed_official	354:e67efb2aab0e	943	*/
mbed_official	354:e67efb2aab0e	944
mbed_official	354:e67efb2aab0e	945	/**
mbed_official	354:e67efb2aab0e	946	* @}
mbed_official	354:e67efb2aab0e	947	*/
mbed_official	354:e67efb2aab0e	948
mbed_official	354:e67efb2aab0e	949	#ifdef __cplusplus
mbed_official	354:e67efb2aab0e	950	}
mbed_official	354:e67efb2aab0e	951	#endif
mbed_official	354:e67efb2aab0e	952
mbed_official	354:e67efb2aab0e	953	#endif /* __STM32L1xx_HAL_H */
mbed_official	354:e67efb2aab0e	954
mbed_official	354:e67efb2aab0e	955	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/