mbed-src - mbed library sources

Users » mbed_official » Code » mbed-src

mbed library sources

Dependents: Encrypted my_mbed lklk CyaSSL_DTLS_Cellular ... more

Superseded

This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

Import library mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_rcc.c@579:53297373a894, 2015-07-01 (annotated)

Committer:: mbed_official
Date:: Wed Jul 01 09:45:11 2015 +0100
Revision:: 579:53297373a894
Parent:: 528:8bb0742e5907

Synchronized with git revision d5b4d2ab9c47edb4dc5776e7177b0c2263459081

Full URL: https://github.com/mbedmicro/mbed/commit/d5b4d2ab9c47edb4dc5776e7177b0c2263459081/

Initial version of drivers for SAMR21

Who changed what in which revision?

User	Revision	Line number	New contents of line
mbed_official	376:cb4d9db17537	1	/**
mbed_official	376:cb4d9db17537	2	******************************************************************************
mbed_official	376:cb4d9db17537	3	* @file stm32l0xx_hal_rcc.c
mbed_official	376:cb4d9db17537	4	* @author MCD Application Team
mbed_official	489:119543c9f674	5	* @version V1.2.0
mbed_official	489:119543c9f674	6	* @date 06-February-2015
mbed_official	376:cb4d9db17537	7	* @brief RCC HAL module driver.
mbed_official	376:cb4d9db17537	8	* This file provides firmware functions to manage the following
mbed_official	376:cb4d9db17537	9	* functionalities of the Reset and Clock Control (RCC) peripheral:
mbed_official	376:cb4d9db17537	10	* + Initialization and de-initialization functions
mbed_official	376:cb4d9db17537	11	* + Peripheral Control functions
mbed_official	376:cb4d9db17537	12	*
mbed_official	376:cb4d9db17537	13	@verbatim
mbed_official	376:cb4d9db17537	14	==============================================================================
mbed_official	376:cb4d9db17537	15	##### RCC specific features #####
mbed_official	376:cb4d9db17537	16	==============================================================================
mbed_official	376:cb4d9db17537	17	[..] After reset the device is running from MSI (2 MHz) with Flash 0 WS,
mbed_official	376:cb4d9db17537	18	all peripherals are off except internal SRAM, Flash and SW-DP.
mbed_official	376:cb4d9db17537	19	(+) There is no prescaler on High speed (AHB) and Low speed (APB) busses;
mbed_official	376:cb4d9db17537	20	all peripherals mapped on these busses are running at MSI speed.
mbed_official	376:cb4d9db17537	21	(+) The clock for all peripherals is switched off, except the SRAM and
mbed_official	376:cb4d9db17537	22	FLASH.
mbed_official	376:cb4d9db17537	23	(+) All GPIOs are in input floating state, except the SW-DP pins which
mbed_official	376:cb4d9db17537	24	are assigned to be used for debug purpose.
mbed_official	376:cb4d9db17537	25	[..] Once the device started from reset, the user application has to:
mbed_official	376:cb4d9db17537	26	(+) Configure the clock source to be used to drive the System clock
mbed_official	376:cb4d9db17537	27	(if the application needs higher frequency/performance)
mbed_official	376:cb4d9db17537	28	(+) Configure the System clock frequency and Flash settings
mbed_official	376:cb4d9db17537	29	(+) Configure the AHB and APB busses prescalers
mbed_official	376:cb4d9db17537	30	(+) Enable the clock for the peripheral(s) to be used
mbed_official	376:cb4d9db17537	31	(+) Configure the clock source(s) for peripherals whose clocks are not
mbed_official	376:cb4d9db17537	32	derived from the System clock (ADC, RTC/LCD, RNG and IWDG)
mbed_official	489:119543c9f674	33
mbed_official	489:119543c9f674	34	##### RCC Limitations #####
mbed_official	489:119543c9f674	35	==============================================================================
mbed_official	489:119543c9f674	36	[..]
mbed_official	489:119543c9f674	37	A delay between an RCC peripheral clock enable and the effective peripheral
mbed_official	489:119543c9f674	38	enabling should be taken into account in order to manage the peripheral read/write
mbed_official	489:119543c9f674	39	from/to registeres.
mbed_official	489:119543c9f674	40	(+) This delay depends on the peripheral mapping.
mbed_official	489:119543c9f674	41	(+) If peripheral is mapped on AHB: the delay is 2 AHB clock cycle
mbed_official	489:119543c9f674	42	after the clock enable bit is set on the hardware register
mbed_official	489:119543c9f674	43	(+) If peripheral is mapped on APB: the delay is 2 APB clock cycle
mbed_official	489:119543c9f674	44	after the clock enable bit is set on the hardware register
mbed_official	489:119543c9f674	45
mbed_official	489:119543c9f674	46	[..]
mbed_official	489:119543c9f674	47	Possible Workarounds:
mbed_official	489:119543c9f674	48	(#) Enable the peripheral clock sometimes before the peripheral read/write
mbed_official	489:119543c9f674	49	register is required.
mbed_official	489:119543c9f674	50	(#) For AHB peripheral, insert two dummy read to the peripheral register.
mbed_official	489:119543c9f674	51	(#) For APB peripheral, insert a dummy read to the peripheral register.
mbed_official	489:119543c9f674	52
mbed_official	376:cb4d9db17537	53	@endverbatim
mbed_official	376:cb4d9db17537	54	******************************************************************************
mbed_official	376:cb4d9db17537	55	* @attention
mbed_official	376:cb4d9db17537	56	*
mbed_official	489:119543c9f674	57	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official	376:cb4d9db17537	58	*
mbed_official	376:cb4d9db17537	59	* Redistribution and use in source and binary forms, with or without modification,
mbed_official	376:cb4d9db17537	60	* are permitted provided that the following conditions are met:
mbed_official	376:cb4d9db17537	61	* 1. Redistributions of source code must retain the above copyright notice,
mbed_official	376:cb4d9db17537	62	* this list of conditions and the following disclaimer.
mbed_official	376:cb4d9db17537	63	* 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official	376:cb4d9db17537	64	* this list of conditions and the following disclaimer in the documentation
mbed_official	376:cb4d9db17537	65	* and/or other materials provided with the distribution.
mbed_official	376:cb4d9db17537	66	* 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official	376:cb4d9db17537	67	* may be used to endorse or promote products derived from this software
mbed_official	376:cb4d9db17537	68	* without specific prior written permission.
mbed_official	376:cb4d9db17537	69	*
mbed_official	376:cb4d9db17537	70	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official	376:cb4d9db17537	71	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official	376:cb4d9db17537	72	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official	376:cb4d9db17537	73	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official	376:cb4d9db17537	74	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official	376:cb4d9db17537	75	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official	376:cb4d9db17537	76	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official	376:cb4d9db17537	77	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official	376:cb4d9db17537	78	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official	376:cb4d9db17537	79	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official	376:cb4d9db17537	80	*
mbed_official	376:cb4d9db17537	81	******************************************************************************
mbed_official	376:cb4d9db17537	82	*/
mbed_official	376:cb4d9db17537	83
mbed_official	376:cb4d9db17537	84	/* Includes ------------------------------------------------------------------*/
mbed_official	376:cb4d9db17537	85	#include "stm32l0xx_hal.h"
mbed_official	376:cb4d9db17537	86
mbed_official	376:cb4d9db17537	87	/** @addtogroup STM32L0xx_HAL_Driver
mbed_official	376:cb4d9db17537	88	* @{
mbed_official	376:cb4d9db17537	89	*/
mbed_official	376:cb4d9db17537	90
mbed_official	489:119543c9f674	91	/** @addtogroup RCC
mbed_official	376:cb4d9db17537	92	* @brief RCC HAL module driver
mbed_official	376:cb4d9db17537	93	* @{
mbed_official	376:cb4d9db17537	94	*/
mbed_official	376:cb4d9db17537	95
mbed_official	376:cb4d9db17537	96	#ifdef HAL_RCC_MODULE_ENABLED
mbed_official	376:cb4d9db17537	97
mbed_official	489:119543c9f674	98	/** @defgroup RCC_Private_Constants RCC Private constants
mbed_official	489:119543c9f674	99	* @{
mbed_official	489:119543c9f674	100	*/
mbed_official	489:119543c9f674	101	#define RCC_HSE_TIMEOUT_VALUE HSE_STARTUP_TIMEOUT
mbed_official	489:119543c9f674	102	#define RCC_HSI_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */
mbed_official	489:119543c9f674	103	#define RCC_LSI_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */
mbed_official	489:119543c9f674	104	#define RCC_PLL_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */
mbed_official	489:119543c9f674	105	#define RCC_HSI48_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */
mbed_official	489:119543c9f674	106	#define RCC_MSI_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */
mbed_official	489:119543c9f674	107	#define RCC_CLOCKSWITCH_TIMEOUT_VALUE ((uint32_t)5000) /* 5 s */
mbed_official	376:cb4d9db17537	108
mbed_official	489:119543c9f674	109	#define __MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
mbed_official	376:cb4d9db17537	110	#define MCO1_GPIO_PORT GPIOA
mbed_official	376:cb4d9db17537	111	#define MCO1_PIN GPIO_PIN_8
mbed_official	376:cb4d9db17537	112	#define MCO2_PIN GPIO_PIN_9
mbed_official	376:cb4d9db17537	113
mbed_official	489:119543c9f674	114	/**
mbed_official	489:119543c9f674	115	* @}
mbed_official	489:119543c9f674	116	*/
mbed_official	489:119543c9f674	117
mbed_official	489:119543c9f674	118	/** @defgroup RCC_Private_Vatiables RCC Private Data
mbed_official	489:119543c9f674	119	* @{
mbed_official	489:119543c9f674	120	*/
mbed_official	528:8bb0742e5907	121	static const uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
mbed_official	528:8bb0742e5907	122	static const uint8_t APBAHBPrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9};
mbed_official	376:cb4d9db17537	123
mbed_official	489:119543c9f674	124	/**
mbed_official	489:119543c9f674	125	* @}
mbed_official	489:119543c9f674	126	*/
mbed_official	376:cb4d9db17537	127
mbed_official	489:119543c9f674	128	/** @addtogroup RCC_Exported_Functions
mbed_official	376:cb4d9db17537	129	* @{
mbed_official	376:cb4d9db17537	130	*/
mbed_official	376:cb4d9db17537	131
mbed_official	489:119543c9f674	132	/** @addtogroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions
mbed_official	376:cb4d9db17537	133	* @brief Initialization and Configuration functions
mbed_official	376:cb4d9db17537	134	*
mbed_official	376:cb4d9db17537	135	@verbatim
mbed_official	376:cb4d9db17537	136	===============================================================================
mbed_official	376:cb4d9db17537	137	##### Initialization and de-initialization functions #####
mbed_official	376:cb4d9db17537	138	===============================================================================
mbed_official	376:cb4d9db17537	139	[..]
mbed_official	376:cb4d9db17537	140	This section provide functions allowing to configure the internal/external
mbed_official	376:cb4d9db17537	141	clocks, PLL, CSS and MCO.
mbed_official	376:cb4d9db17537	142	[..] Internal/external clock and PLL configuration
mbed_official	376:cb4d9db17537	143	(#) HSI (high-speed internal), 16 MHz factory-trimmed RC used directly
mbed_official	376:cb4d9db17537	144	or through the PLL as System clock source.
mbed_official	376:cb4d9db17537	145	(#) MSI (multi-speed internal), multispeed low power RC
mbed_official	376:cb4d9db17537	146	(65.536 KHz to 4.194 MHz) MHz used as System clock source.
mbed_official	376:cb4d9db17537	147	(#) LSI (low-speed internal), 37 KHz low consumption RC used as IWDG
mbed_official	376:cb4d9db17537	148	and/or RTC clock source.
mbed_official	376:cb4d9db17537	149	(#) HSE (high-speed external), 1 to 24 MHz crystal oscillator used
mbed_official	376:cb4d9db17537	150	directly or through the PLL as System clock source. Can be used
mbed_official	376:cb4d9db17537	151	also as RTC clock source.
mbed_official	376:cb4d9db17537	152	(#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source.
mbed_official	376:cb4d9db17537	153	(#) PLL (clocked by HSI or HSE), for System clock and USB (48 MHz).
mbed_official	376:cb4d9db17537	154	(#) CSS (Clock security system), once enable and if a HSE clock failure
mbed_official	376:cb4d9db17537	155	occurs (HSE used directly or through PLL as System clock source),
mbed_official	376:cb4d9db17537	156	the System clock is automatically switched to MSI and an interrupt
mbed_official	376:cb4d9db17537	157	is generated if enabled.
mbed_official	376:cb4d9db17537	158	The interrupt is linked to the Cortex-M3 NMI (Non-Maskable Interrupt)
mbed_official	376:cb4d9db17537	159	exception vector.
mbed_official	376:cb4d9db17537	160	(#) MCO (microcontroller clock output), used to output SYSCLK, HSI, MSI,
mbed_official	376:cb4d9db17537	161	HSE, PLL, LSI or LSE clock (through a configurable prescaler) on
mbed_official	376:cb4d9db17537	162	PA8 pin.
mbed_official	376:cb4d9db17537	163	[..] System, AHB and APB busses clocks configuration
mbed_official	376:cb4d9db17537	164	(#) Several clock sources can be used to drive the System clock (SYSCLK): MSI, HSI,
mbed_official	376:cb4d9db17537	165	HSE and PLL.
mbed_official	376:cb4d9db17537	166	The AHB clock (HCLK) is derived from System clock through configurable
mbed_official	376:cb4d9db17537	167	prescaler and used to clock the CPU, memory and peripherals mapped
mbed_official	376:cb4d9db17537	168	on IOPORT, AHB bus (DMA,Flash...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived
mbed_official	376:cb4d9db17537	169	from AHB clock through configurable prescalers and used to clock
mbed_official	376:cb4d9db17537	170	the peripherals mapped on these busses. You can use
mbed_official	376:cb4d9db17537	171	"HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks.
mbed_official	376:cb4d9db17537	172
mbed_official	376:cb4d9db17537	173	-@- All the peripheral clocks are derived from the System clock (SYSCLK) except:
mbed_official	376:cb4d9db17537	174	(+@) I2S: the I2S clock can be derived from an external clock mapped on the I2S_CKIN pin.
mbed_official	376:cb4d9db17537	175
mbed_official	376:cb4d9db17537	176	(+@) RTC: the RTC clock can be derived either from the LSI, LSE or HSE clock
mbed_official	376:cb4d9db17537	177	divided by 2 to 16. You have to use __HAL_RCC_RTC_CONFIG() and __HAL_RCC_RTC_ENABLE()
mbed_official	376:cb4d9db17537	178	macros to configure this clock.
mbed_official	376:cb4d9db17537	179	(+@) USB FS,and RNG require a frequency equal to 48 MHz to work correctly
mbed_official	376:cb4d9db17537	180	This clock is derived from the main PLL or HSI48 RC oscillator.
mbed_official	376:cb4d9db17537	181	(+@) IWDG clock which is always the LSI clock.
mbed_official	376:cb4d9db17537	182
mbed_official	376:cb4d9db17537	183	(#) For the STM32L0xx devices, the maximum
mbed_official	376:cb4d9db17537	184	frequency of the SYSCLK ,HCLK, APB1 and APB2 is 32 MHz.
mbed_official	376:cb4d9db17537	185	Depending on the device voltage range, the maximum frequency should
mbed_official	376:cb4d9db17537	186	be adapted accordingly:
mbed_official	376:cb4d9db17537	187	----------------------------------------------------------------
mbed_official	376:cb4d9db17537	188	\| Wait states \| HCLK clock frequency (MHz) \|
mbed_official	376:cb4d9db17537	189	\| \|------------------------------------------------\|
mbed_official	376:cb4d9db17537	190	\| (Latency) \| voltage range \| voltage range \|
mbed_official	376:cb4d9db17537	191	\| \| 1.65 V - 3.6 V \| 2.0 V - 3.6 V \|
mbed_official	376:cb4d9db17537	192	\| \|----------------\|---------------\|---------------\|
mbed_official	376:cb4d9db17537	193	\| \| VCORE = 1.2 V \| VCORE = 1.5 V \| VCORE = 1.8 V \|
mbed_official	376:cb4d9db17537	194	\|-------------- \|----------------\|---------------\|---------------\|
mbed_official	376:cb4d9db17537	195	\|0WS(1CPU cycle)\|0 < HCLK <= 2 \|0 < HCLK <= 8 \|0 < HCLK <= 16 \|
mbed_official	376:cb4d9db17537	196	\|---------------\|----------------\|---------------\|---------------\|
mbed_official	376:cb4d9db17537	197	\|1WS(2CPU cycle)\|2 < HCLK <= 4 \|8 < HCLK <= 16 \|16 < HCLK <= 32\|
mbed_official	376:cb4d9db17537	198	----------------------------------------------------------------
mbed_official	376:cb4d9db17537	199	@endverbatim
mbed_official	376:cb4d9db17537	200	* @{
mbed_official	376:cb4d9db17537	201	*/
mbed_official	376:cb4d9db17537	202
mbed_official	376:cb4d9db17537	203	/**
mbed_official	376:cb4d9db17537	204	* @brief Resets the RCC clock configuration to the default reset state.
mbed_official	376:cb4d9db17537	205	* @note The default reset state of the clock configuration is given below:
mbed_official	376:cb4d9db17537	206	* - MSI ON and used as system clock source (MSI range is not modified
mbed_official	376:cb4d9db17537	207	* - by this function, it keep the value configured by user application)
mbed_official	376:cb4d9db17537	208	* - HSI, HSE and PLL OFF
mbed_official	376:cb4d9db17537	209	* - AHB, APB1 and APB2 prescaler set to 1.
mbed_official	376:cb4d9db17537	210	* - CSS and MCO OFF
mbed_official	376:cb4d9db17537	211	* - All interrupts disabled
mbed_official	489:119543c9f674	212	* @note This function does not modify the configuration of the
mbed_official	376:cb4d9db17537	213	* @note -Peripheral clocks
mbed_official	376:cb4d9db17537	214	* @note -HSI48, LSI, LSE and RTC clocks
mbed_official	376:cb4d9db17537	215	* @param None
mbed_official	376:cb4d9db17537	216	* @retval None
mbed_official	376:cb4d9db17537	217	*/
mbed_official	489:119543c9f674	218	__weak void HAL_RCC_DeInit(void)
mbed_official	376:cb4d9db17537	219	{
mbed_official	489:119543c9f674	220	/* This function is now defined in the file stm32L0xx_rcc_ex.c */
mbed_official	376:cb4d9db17537	221	}
mbed_official	376:cb4d9db17537	222
mbed_official	376:cb4d9db17537	223	/**
mbed_official	376:cb4d9db17537	224	* @brief Initializes the RCC Oscillators according to the specified parameters in the
mbed_official	376:cb4d9db17537	225	* RCC_OscInitTypeDef.
mbed_official	376:cb4d9db17537	226	* @param RCC_OscInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official	376:cb4d9db17537	227	* contains the configuration information for the RCC Oscillators.
mbed_official	376:cb4d9db17537	228	* @note The PLL is not disabled when used as system clock.
mbed_official	376:cb4d9db17537	229	* @retval HAL status
mbed_official	376:cb4d9db17537	230	*/
mbed_official	376:cb4d9db17537	231	HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
mbed_official	376:cb4d9db17537	232	{
mbed_official	376:cb4d9db17537	233
mbed_official	376:cb4d9db17537	234	uint32_t tickstart = 0;
mbed_official	376:cb4d9db17537	235
mbed_official	376:cb4d9db17537	236	/* Check the parameters */
mbed_official	376:cb4d9db17537	237	assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
mbed_official	376:cb4d9db17537	238	/------------------------------- HSE Configuration ------------------------/
mbed_official	376:cb4d9db17537	239	if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
mbed_official	376:cb4d9db17537	240	{
mbed_official	376:cb4d9db17537	241	/* Check the parameters */
mbed_official	376:cb4d9db17537	242	assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
mbed_official	376:cb4d9db17537	243	/* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
mbed_official	489:119543c9f674	244	if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) \|\| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->CFGR & RCC_CFGR_PLLSRC) == RCC_CFGR_PLLSRC_HSE)))
mbed_official	376:cb4d9db17537	245	{
mbed_official	489:119543c9f674	246	if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
mbed_official	376:cb4d9db17537	247	{
mbed_official	376:cb4d9db17537	248	return HAL_ERROR;
mbed_official	376:cb4d9db17537	249	}
mbed_official	376:cb4d9db17537	250	}
mbed_official	376:cb4d9db17537	251	else
mbed_official	376:cb4d9db17537	252	{
mbed_official	376:cb4d9db17537	253	/* Reset HSEON and HSEBYP bits before configuring the HSE --------------*/
mbed_official	376:cb4d9db17537	254	__HAL_RCC_HSE_CONFIG(RCC_HSE_OFF);
mbed_official	376:cb4d9db17537	255
mbed_official	376:cb4d9db17537	256	/* Get timeout */
mbed_official	376:cb4d9db17537	257	tickstart = HAL_GetTick();
mbed_official	376:cb4d9db17537	258
mbed_official	376:cb4d9db17537	259	/* Wait till HSE is disabled */
mbed_official	376:cb4d9db17537	260	while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
mbed_official	376:cb4d9db17537	261	{
mbed_official	489:119543c9f674	262	if((HAL_GetTick() - tickstart ) > RCC_HSE_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	263	{
mbed_official	376:cb4d9db17537	264	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	265	}
mbed_official	376:cb4d9db17537	266	}
mbed_official	376:cb4d9db17537	267
mbed_official	376:cb4d9db17537	268	/* Set the new HSE configuration ---------------------------------------*/
mbed_official	376:cb4d9db17537	269	__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
mbed_official	376:cb4d9db17537	270
mbed_official	376:cb4d9db17537	271	/* Check the HSE State */
mbed_official	489:119543c9f674	272	if((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF)
mbed_official	376:cb4d9db17537	273	{
mbed_official	376:cb4d9db17537	274	/* Get timeout */
mbed_official	376:cb4d9db17537	275	tickstart = HAL_GetTick();
mbed_official	376:cb4d9db17537	276
mbed_official	376:cb4d9db17537	277	/* Wait till HSE is ready */
mbed_official	376:cb4d9db17537	278	while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official	376:cb4d9db17537	279	{
mbed_official	489:119543c9f674	280	if((HAL_GetTick() - tickstart ) > RCC_HSE_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	281	{
mbed_official	376:cb4d9db17537	282	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	283	}
mbed_official	376:cb4d9db17537	284	}
mbed_official	376:cb4d9db17537	285	}
mbed_official	376:cb4d9db17537	286	else
mbed_official	376:cb4d9db17537	287	{
mbed_official	376:cb4d9db17537	288	/* Get timeout */
mbed_official	376:cb4d9db17537	289	tickstart = HAL_GetTick();
mbed_official	376:cb4d9db17537	290
mbed_official	489:119543c9f674	291	/* Wait till HSE is disabled */
mbed_official	376:cb4d9db17537	292	while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
mbed_official	376:cb4d9db17537	293	{
mbed_official	489:119543c9f674	294	if((HAL_GetTick() - tickstart ) > RCC_HSE_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	295	{
mbed_official	376:cb4d9db17537	296	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	297	}
mbed_official	376:cb4d9db17537	298	}
mbed_official	376:cb4d9db17537	299	}
mbed_official	376:cb4d9db17537	300	}
mbed_official	376:cb4d9db17537	301	}
mbed_official	376:cb4d9db17537	302	/----------------------------- HSI Configuration --------------------------/
mbed_official	376:cb4d9db17537	303	if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
mbed_official	376:cb4d9db17537	304	{
mbed_official	376:cb4d9db17537	305	/* Check the parameters */
mbed_official	376:cb4d9db17537	306	assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
mbed_official	376:cb4d9db17537	307	assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
mbed_official	376:cb4d9db17537	308
mbed_official	376:cb4d9db17537	309	/* When the HSI is used as system clock it will not disabled */
mbed_official	489:119543c9f674	310	if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) \|\| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->CFGR & RCC_CFGR_PLLSRC) == RCC_CFGR_PLLSRC_HSI)))
mbed_official	376:cb4d9db17537	311	{
mbed_official	376:cb4d9db17537	312	/* When HSI is used as system clock it will not disabled */
mbed_official	376:cb4d9db17537	313	if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
mbed_official	376:cb4d9db17537	314	{
mbed_official	376:cb4d9db17537	315	return HAL_ERROR;
mbed_official	376:cb4d9db17537	316	}
mbed_official	376:cb4d9db17537	317	/* Otherwise, just the calibration is allowed */
mbed_official	376:cb4d9db17537	318	else
mbed_official	376:cb4d9db17537	319	{
mbed_official	376:cb4d9db17537	320	/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
mbed_official	376:cb4d9db17537	321	__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
mbed_official	376:cb4d9db17537	322	}
mbed_official	376:cb4d9db17537	323	}
mbed_official	376:cb4d9db17537	324	else
mbed_official	376:cb4d9db17537	325	{
mbed_official	376:cb4d9db17537	326	/* Check the HSI State */
mbed_official	376:cb4d9db17537	327	if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
mbed_official	376:cb4d9db17537	328	{
mbed_official	376:cb4d9db17537	329	/* Enable the Internal High Speed oscillator (HSI or HSIdiv4 */
mbed_official	376:cb4d9db17537	330	__HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIState);
mbed_official	376:cb4d9db17537	331
mbed_official	376:cb4d9db17537	332	/* Get Start Tick*/
mbed_official	376:cb4d9db17537	333	tickstart = HAL_GetTick();
mbed_official	376:cb4d9db17537	334
mbed_official	376:cb4d9db17537	335	/* Wait till HSI is ready */
mbed_official	376:cb4d9db17537	336	while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official	376:cb4d9db17537	337	{
mbed_official	489:119543c9f674	338	if((HAL_GetTick() - tickstart ) > RCC_HSI_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	339	{
mbed_official	376:cb4d9db17537	340	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	341	}
mbed_official	376:cb4d9db17537	342	}
mbed_official	376:cb4d9db17537	343
mbed_official	376:cb4d9db17537	344	/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
mbed_official	376:cb4d9db17537	345	__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
mbed_official	376:cb4d9db17537	346	}
mbed_official	376:cb4d9db17537	347	else
mbed_official	376:cb4d9db17537	348	{
mbed_official	376:cb4d9db17537	349	/* Disable the Internal High Speed oscillator (HSI). */
mbed_official	376:cb4d9db17537	350	__HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIState);
mbed_official	376:cb4d9db17537	351
mbed_official	376:cb4d9db17537	352	/* Get Start Tick*/
mbed_official	376:cb4d9db17537	353	tickstart = HAL_GetTick();
mbed_official	376:cb4d9db17537	354
mbed_official	376:cb4d9db17537	355	/* Wait till HSI is ready */
mbed_official	376:cb4d9db17537	356	while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
mbed_official	376:cb4d9db17537	357	{
mbed_official	489:119543c9f674	358	if((HAL_GetTick() - tickstart ) > RCC_HSI_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	359	{
mbed_official	376:cb4d9db17537	360	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	361	}
mbed_official	376:cb4d9db17537	362	}
mbed_official	376:cb4d9db17537	363	}
mbed_official	376:cb4d9db17537	364	}
mbed_official	376:cb4d9db17537	365	}
mbed_official	376:cb4d9db17537	366	/----------------------------- MSI Configuration --------------------------/
mbed_official	376:cb4d9db17537	367	if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_MSI) == RCC_OSCILLATORTYPE_MSI)
mbed_official	376:cb4d9db17537	368	{
mbed_official	376:cb4d9db17537	369	/* Check the parameters */
mbed_official	376:cb4d9db17537	370	assert_param(IS_RCC_MSI(RCC_OscInitStruct->MSIState));
mbed_official	376:cb4d9db17537	371	assert_param(IS_RCC_MSICALIBRATION_VALUE(RCC_OscInitStruct->MSICalibrationValue));
mbed_official	376:cb4d9db17537	372
mbed_official	376:cb4d9db17537	373
mbed_official	376:cb4d9db17537	374	/* When the MSI is used as system clock it will not disabled */
mbed_official	376:cb4d9db17537	375	if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_MSI) )
mbed_official	376:cb4d9db17537	376	{
mbed_official	376:cb4d9db17537	377	if((__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != RESET) && (RCC_OscInitStruct->MSIState != RCC_MSI_ON))
mbed_official	376:cb4d9db17537	378	{
mbed_official	376:cb4d9db17537	379	return HAL_ERROR;
mbed_official	376:cb4d9db17537	380	}
mbed_official	376:cb4d9db17537	381
mbed_official	376:cb4d9db17537	382	/* Otherwise, just the calibration and MSI range change are allowed */
mbed_official	376:cb4d9db17537	383	else
mbed_official	376:cb4d9db17537	384	{
mbed_official	376:cb4d9db17537	385	/* Selects the Multiple Speed oscillator (MSI) clock range .*/
mbed_official	376:cb4d9db17537	386	__HAL_RCC_MSI_RANGE_CONFIG (RCC_OscInitStruct->MSIClockRange);
mbed_official	376:cb4d9db17537	387	/* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/
mbed_official	376:cb4d9db17537	388	__HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue);
mbed_official	376:cb4d9db17537	389	}
mbed_official	376:cb4d9db17537	390	}
mbed_official	376:cb4d9db17537	391	else
mbed_official	376:cb4d9db17537	392	{
mbed_official	376:cb4d9db17537	393	/* Check the MSI State */
mbed_official	376:cb4d9db17537	394	if((RCC_OscInitStruct->MSIState)!= RCC_MSI_OFF)
mbed_official	376:cb4d9db17537	395	{
mbed_official	376:cb4d9db17537	396	/* Enable the Internal High Speed oscillator (MSI). */
mbed_official	376:cb4d9db17537	397	__HAL_RCC_MSI_ENABLE();
mbed_official	376:cb4d9db17537	398
mbed_official	376:cb4d9db17537	399	/* Get timeout */
mbed_official	376:cb4d9db17537	400	tickstart = HAL_GetTick();
mbed_official	376:cb4d9db17537	401
mbed_official	376:cb4d9db17537	402	/* Wait till MSI is ready */
mbed_official	376:cb4d9db17537	403	while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == RESET)
mbed_official	376:cb4d9db17537	404	{
mbed_official	489:119543c9f674	405	if((HAL_GetTick() - tickstart ) > RCC_MSI_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	406	{
mbed_official	376:cb4d9db17537	407	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	408	}
mbed_official	376:cb4d9db17537	409	}
mbed_official	376:cb4d9db17537	410	/* Selects the Multiple Speed oscillator (MSI) clock range .*/
mbed_official	376:cb4d9db17537	411	__HAL_RCC_MSI_RANGE_CONFIG (RCC_OscInitStruct->MSIClockRange);
mbed_official	376:cb4d9db17537	412	/* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/
mbed_official	376:cb4d9db17537	413	__HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue);
mbed_official	376:cb4d9db17537	414
mbed_official	376:cb4d9db17537	415	}
mbed_official	376:cb4d9db17537	416	else
mbed_official	376:cb4d9db17537	417	{
mbed_official	376:cb4d9db17537	418	/* Disable the Internal High Speed oscillator (MSI). */
mbed_official	376:cb4d9db17537	419	__HAL_RCC_MSI_DISABLE();
mbed_official	376:cb4d9db17537	420
mbed_official	376:cb4d9db17537	421	/* Get timeout */
mbed_official	376:cb4d9db17537	422	tickstart = HAL_GetTick();
mbed_official	376:cb4d9db17537	423
mbed_official	376:cb4d9db17537	424	/* Wait till MSI is ready */
mbed_official	376:cb4d9db17537	425	while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != RESET)
mbed_official	376:cb4d9db17537	426	{
mbed_official	489:119543c9f674	427	if((HAL_GetTick() - tickstart ) > RCC_MSI_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	428	{
mbed_official	376:cb4d9db17537	429	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	430	}
mbed_official	376:cb4d9db17537	431	}
mbed_official	376:cb4d9db17537	432	}
mbed_official	376:cb4d9db17537	433	}
mbed_official	376:cb4d9db17537	434	}
mbed_official	376:cb4d9db17537	435	/------------------------------ LSI Configuration -------------------------/
mbed_official	376:cb4d9db17537	436	if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
mbed_official	376:cb4d9db17537	437	{
mbed_official	376:cb4d9db17537	438	/* Check the parameters */
mbed_official	376:cb4d9db17537	439	assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
mbed_official	376:cb4d9db17537	440
mbed_official	376:cb4d9db17537	441	/* Check the LSI State */
mbed_official	376:cb4d9db17537	442	if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
mbed_official	376:cb4d9db17537	443	{
mbed_official	376:cb4d9db17537	444	/* Enable the Internal Low Speed oscillator (LSI). */
mbed_official	376:cb4d9db17537	445	__HAL_RCC_LSI_ENABLE();
mbed_official	376:cb4d9db17537	446
mbed_official	376:cb4d9db17537	447	/* Get timeout */
mbed_official	376:cb4d9db17537	448	tickstart = HAL_GetTick();
mbed_official	376:cb4d9db17537	449
mbed_official	376:cb4d9db17537	450	/* Wait till LSI is ready */
mbed_official	376:cb4d9db17537	451	while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
mbed_official	376:cb4d9db17537	452	{
mbed_official	489:119543c9f674	453	if((HAL_GetTick() - tickstart ) > RCC_LSI_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	454	{
mbed_official	376:cb4d9db17537	455	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	456	}
mbed_official	376:cb4d9db17537	457	}
mbed_official	376:cb4d9db17537	458	}
mbed_official	376:cb4d9db17537	459	else
mbed_official	376:cb4d9db17537	460	{
mbed_official	376:cb4d9db17537	461	/* Disable the Internal Low Speed oscillator (LSI). */
mbed_official	376:cb4d9db17537	462	__HAL_RCC_LSI_DISABLE();
mbed_official	376:cb4d9db17537	463
mbed_official	376:cb4d9db17537	464	/* Get timeout */
mbed_official	376:cb4d9db17537	465	tickstart = HAL_GetTick();
mbed_official	376:cb4d9db17537	466
mbed_official	376:cb4d9db17537	467	/* Wait till LSI is ready */
mbed_official	376:cb4d9db17537	468	while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
mbed_official	376:cb4d9db17537	469	{
mbed_official	489:119543c9f674	470	if((HAL_GetTick() - tickstart ) > RCC_LSI_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	471	{
mbed_official	376:cb4d9db17537	472	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	473	}
mbed_official	376:cb4d9db17537	474	}
mbed_official	376:cb4d9db17537	475	}
mbed_official	376:cb4d9db17537	476	}
mbed_official	376:cb4d9db17537	477
mbed_official	489:119543c9f674	478	#if !defined (STM32L031xx) && !defined (STM32L041xx) && !defined(STM32L051xx) && !defined(STM32L061xx) && !defined(STM32L071xx) && !defined(STM32L081xx)
mbed_official	376:cb4d9db17537	479	/------------------------------ HSI48 Configuration -------------------------/
mbed_official	376:cb4d9db17537	480	if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48)
mbed_official	376:cb4d9db17537	481	{
mbed_official	376:cb4d9db17537	482	/* Check the parameters */
mbed_official	376:cb4d9db17537	483	assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State));
mbed_official	376:cb4d9db17537	484
mbed_official	376:cb4d9db17537	485	/* Check the HSI48 State */
mbed_official	376:cb4d9db17537	486	if((RCC_OscInitStruct->HSI48State)!= RCC_HSI48_OFF)
mbed_official	376:cb4d9db17537	487	{
mbed_official	376:cb4d9db17537	488	/* Enable the Internal Low Speed oscillator (HSI48). */
mbed_official	376:cb4d9db17537	489	__HAL_RCC_HSI48_ENABLE();
mbed_official	376:cb4d9db17537	490
mbed_official	376:cb4d9db17537	491	/* Get timeout */
mbed_official	376:cb4d9db17537	492	tickstart = HAL_GetTick();
mbed_official	376:cb4d9db17537	493
mbed_official	376:cb4d9db17537	494	/* Wait till HSI48 is ready */
mbed_official	376:cb4d9db17537	495	while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET)
mbed_official	376:cb4d9db17537	496	{
mbed_official	489:119543c9f674	497	if((HAL_GetTick() - tickstart ) > RCC_HSI48_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	498	{
mbed_official	376:cb4d9db17537	499	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	500	}
mbed_official	376:cb4d9db17537	501	}
mbed_official	376:cb4d9db17537	502	}
mbed_official	376:cb4d9db17537	503	else
mbed_official	376:cb4d9db17537	504	{
mbed_official	376:cb4d9db17537	505	/* Disable the Internal Low Speed oscillator (HSI48). */
mbed_official	376:cb4d9db17537	506	__HAL_RCC_HSI48_DISABLE();
mbed_official	376:cb4d9db17537	507
mbed_official	376:cb4d9db17537	508	/* Get timeout */
mbed_official	376:cb4d9db17537	509	tickstart = HAL_GetTick();
mbed_official	376:cb4d9db17537	510
mbed_official	376:cb4d9db17537	511	/* Wait till HSI48 is ready */
mbed_official	376:cb4d9db17537	512	while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET)
mbed_official	376:cb4d9db17537	513	{
mbed_official	489:119543c9f674	514	if((HAL_GetTick() - tickstart ) > RCC_HSI48_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	515	{
mbed_official	376:cb4d9db17537	516	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	517	}
mbed_official	376:cb4d9db17537	518	}
mbed_official	376:cb4d9db17537	519	}
mbed_official	376:cb4d9db17537	520	}
mbed_official	489:119543c9f674	521	#endif /* !(STM32L031xx) && !(STM32L041xx) && !defined(STM32L051xx) && !defined(STM32L061xx) && !defined(STM32L071xx) && !defined(STM32L081xx)*/
mbed_official	489:119543c9f674	522
mbed_official	376:cb4d9db17537	523	/------------------------------ LSE Configuration -------------------------/
mbed_official	376:cb4d9db17537	524	if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
mbed_official	376:cb4d9db17537	525	{
mbed_official	376:cb4d9db17537	526	/* Check the parameters */
mbed_official	376:cb4d9db17537	527	assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
mbed_official	376:cb4d9db17537	528
mbed_official	376:cb4d9db17537	529	/* Enable Power Clock*/
mbed_official	489:119543c9f674	530	__HAL_RCC_PWR_CLK_ENABLE();
mbed_official	376:cb4d9db17537	531
mbed_official	376:cb4d9db17537	532	/* Enable write access to Backup domain */
mbed_official	376:cb4d9db17537	533	PWR->CR \|= PWR_CR_DBP;
mbed_official	376:cb4d9db17537	534
mbed_official	376:cb4d9db17537	535	/* Wait for Backup domain Write protection disable */
mbed_official	376:cb4d9db17537	536	tickstart = HAL_GetTick();
mbed_official	376:cb4d9db17537	537
mbed_official	376:cb4d9db17537	538	while((PWR->CR & PWR_CR_DBP) == RESET)
mbed_official	376:cb4d9db17537	539	{
mbed_official	489:119543c9f674	540	if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	541	{
mbed_official	376:cb4d9db17537	542	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	543	}
mbed_official	376:cb4d9db17537	544	}
mbed_official	376:cb4d9db17537	545
mbed_official	376:cb4d9db17537	546	/* Reset LSEON and LSEBYP bits before configuring the LSE ----------------*/
mbed_official	376:cb4d9db17537	547	__HAL_RCC_LSE_CONFIG(RCC_LSE_OFF);
mbed_official	376:cb4d9db17537	548
mbed_official	376:cb4d9db17537	549	/* Get timeout */
mbed_official	376:cb4d9db17537	550	tickstart = HAL_GetTick();
mbed_official	376:cb4d9db17537	551
mbed_official	376:cb4d9db17537	552	/* Wait till LSE is ready */
mbed_official	376:cb4d9db17537	553	while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
mbed_official	376:cb4d9db17537	554	{
mbed_official	489:119543c9f674	555	if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	556	{
mbed_official	376:cb4d9db17537	557	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	558	}
mbed_official	376:cb4d9db17537	559	}
mbed_official	376:cb4d9db17537	560
mbed_official	376:cb4d9db17537	561	/* Set the new LSE configuration -----------------------------------------*/
mbed_official	376:cb4d9db17537	562	__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
mbed_official	376:cb4d9db17537	563	/* Check the LSE State */
mbed_official	489:119543c9f674	564	if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
mbed_official	376:cb4d9db17537	565	{
mbed_official	376:cb4d9db17537	566	/* Get timeout */
mbed_official	376:cb4d9db17537	567	tickstart = HAL_GetTick();
mbed_official	376:cb4d9db17537	568
mbed_official	376:cb4d9db17537	569	/* Wait till LSE is ready */
mbed_official	376:cb4d9db17537	570	while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
mbed_official	376:cb4d9db17537	571	{
mbed_official	489:119543c9f674	572	if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	573	{
mbed_official	376:cb4d9db17537	574	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	575	}
mbed_official	376:cb4d9db17537	576	}
mbed_official	376:cb4d9db17537	577	}
mbed_official	376:cb4d9db17537	578	else
mbed_official	376:cb4d9db17537	579	{
mbed_official	376:cb4d9db17537	580	/* Get timeout */
mbed_official	376:cb4d9db17537	581	tickstart = HAL_GetTick();
mbed_official	376:cb4d9db17537	582
mbed_official	376:cb4d9db17537	583	/* Wait till LSE is ready */
mbed_official	376:cb4d9db17537	584	while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
mbed_official	376:cb4d9db17537	585	{
mbed_official	489:119543c9f674	586	if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	587	{
mbed_official	376:cb4d9db17537	588	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	589	}
mbed_official	376:cb4d9db17537	590	}
mbed_official	376:cb4d9db17537	591	}
mbed_official	376:cb4d9db17537	592	}
mbed_official	376:cb4d9db17537	593	/-------------------------------- PLL Configuration -----------------------/
mbed_official	376:cb4d9db17537	594	/* Check the parameters */
mbed_official	376:cb4d9db17537	595	assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
mbed_official	376:cb4d9db17537	596	if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
mbed_official	376:cb4d9db17537	597	{
mbed_official	376:cb4d9db17537	598	/* Check if the PLL is used as system clock or not */
mbed_official	489:119543c9f674	599	if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
mbed_official	376:cb4d9db17537	600	{
mbed_official	376:cb4d9db17537	601	if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
mbed_official	376:cb4d9db17537	602	{
mbed_official	376:cb4d9db17537	603	/* Check the parameters */
mbed_official	376:cb4d9db17537	604	assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
mbed_official	376:cb4d9db17537	605	assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
mbed_official	376:cb4d9db17537	606	assert_param(IS_RCC_PLL_DIV(RCC_OscInitStruct->PLL.PLLDIV));
mbed_official	376:cb4d9db17537	607
mbed_official	376:cb4d9db17537	608
mbed_official	376:cb4d9db17537	609	/* Disable the main PLL. */
mbed_official	376:cb4d9db17537	610	__HAL_RCC_PLL_DISABLE();
mbed_official	376:cb4d9db17537	611
mbed_official	376:cb4d9db17537	612	/* Get timeout */
mbed_official	376:cb4d9db17537	613	tickstart = HAL_GetTick();
mbed_official	376:cb4d9db17537	614
mbed_official	376:cb4d9db17537	615	/* Wait till PLL is ready */
mbed_official	376:cb4d9db17537	616	while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
mbed_official	376:cb4d9db17537	617	{
mbed_official	489:119543c9f674	618	if((HAL_GetTick() - tickstart ) > RCC_PLL_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	619	{
mbed_official	376:cb4d9db17537	620	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	621	}
mbed_official	376:cb4d9db17537	622	}
mbed_official	376:cb4d9db17537	623
mbed_official	376:cb4d9db17537	624	/* Configure the main PLL clock source, multiplication and division factors. */
mbed_official	376:cb4d9db17537	625	__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
mbed_official	376:cb4d9db17537	626	RCC_OscInitStruct->PLL.PLLMUL,
mbed_official	376:cb4d9db17537	627	RCC_OscInitStruct->PLL.PLLDIV);
mbed_official	376:cb4d9db17537	628	/* Enable the main PLL. */
mbed_official	376:cb4d9db17537	629	__HAL_RCC_PLL_ENABLE();
mbed_official	376:cb4d9db17537	630
mbed_official	376:cb4d9db17537	631	/* Get timeout */
mbed_official	376:cb4d9db17537	632	tickstart = HAL_GetTick();
mbed_official	376:cb4d9db17537	633
mbed_official	376:cb4d9db17537	634	/* Wait till PLL is ready */
mbed_official	376:cb4d9db17537	635	while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official	376:cb4d9db17537	636	{
mbed_official	489:119543c9f674	637	if((HAL_GetTick() - tickstart ) > RCC_PLL_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	638	{
mbed_official	376:cb4d9db17537	639	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	640	}
mbed_official	376:cb4d9db17537	641	}
mbed_official	376:cb4d9db17537	642	}
mbed_official	376:cb4d9db17537	643	else
mbed_official	376:cb4d9db17537	644	{
mbed_official	376:cb4d9db17537	645	/* Disable the main PLL. */
mbed_official	376:cb4d9db17537	646	__HAL_RCC_PLL_DISABLE();
mbed_official	376:cb4d9db17537	647	/* Get timeout */
mbed_official	376:cb4d9db17537	648	tickstart = HAL_GetTick();
mbed_official	376:cb4d9db17537	649
mbed_official	376:cb4d9db17537	650	/* Wait till PLL is ready */
mbed_official	376:cb4d9db17537	651	while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
mbed_official	376:cb4d9db17537	652	{
mbed_official	489:119543c9f674	653	if((HAL_GetTick() - tickstart ) > RCC_PLL_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	654	{
mbed_official	376:cb4d9db17537	655	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	656	}
mbed_official	376:cb4d9db17537	657	}
mbed_official	376:cb4d9db17537	658	}
mbed_official	376:cb4d9db17537	659	}
mbed_official	376:cb4d9db17537	660	else
mbed_official	376:cb4d9db17537	661	{
mbed_official	376:cb4d9db17537	662	return HAL_ERROR;
mbed_official	376:cb4d9db17537	663	}
mbed_official	376:cb4d9db17537	664	}
mbed_official	376:cb4d9db17537	665	return HAL_OK;
mbed_official	376:cb4d9db17537	666	}
mbed_official	376:cb4d9db17537	667
mbed_official	376:cb4d9db17537	668	/**
mbed_official	376:cb4d9db17537	669	* @brief Initializes the CPU, AHB and APB busses clocks according to the specified
mbed_official	376:cb4d9db17537	670	* parameters in the RCC_ClkInitStruct.
mbed_official	376:cb4d9db17537	671	* @param RCC_ClkInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official	376:cb4d9db17537	672	* contains the configuration information for the RCC peripheral.
mbed_official	376:cb4d9db17537	673	* @param FLatency: FLASH Latency, this parameter depends on System Clock Frequency
mbed_official	376:cb4d9db17537	674	*
mbed_official	376:cb4d9db17537	675	* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
mbed_official	376:cb4d9db17537	676	* and updated by HAL_RCC_GetHCLKFreq() function called within this function
mbed_official	376:cb4d9db17537	677	*
mbed_official	376:cb4d9db17537	678	* @note The MSI is used (enabled by hardware) as system clock source after
mbed_official	376:cb4d9db17537	679	* startup from Reset, wake-up from STOP and STANDBY mode, or in case
mbed_official	376:cb4d9db17537	680	* of failure of the HSE used directly or indirectly as system clock
mbed_official	376:cb4d9db17537	681	* (if the Clock Security System CSS is enabled).
mbed_official	376:cb4d9db17537	682	*
mbed_official	376:cb4d9db17537	683	* @note A switch from one clock source to another occurs only if the target
mbed_official	376:cb4d9db17537	684	* clock source is ready (clock stable after startup delay or PLL locked).
mbed_official	376:cb4d9db17537	685	* If a clock source which is not yet ready is selected, the switch will
mbed_official	376:cb4d9db17537	686	* occur when the clock source will be ready.
mbed_official	376:cb4d9db17537	687	* @retval None
mbed_official	376:cb4d9db17537	688	*/
mbed_official	376:cb4d9db17537	689	HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
mbed_official	376:cb4d9db17537	690	{
mbed_official	376:cb4d9db17537	691
mbed_official	376:cb4d9db17537	692	uint32_t tickstart = 0;
mbed_official	376:cb4d9db17537	693
mbed_official	376:cb4d9db17537	694	/* Check the parameters */
mbed_official	376:cb4d9db17537	695	assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType));
mbed_official	376:cb4d9db17537	696	assert_param(IS_FLASH_LATENCY(FLatency));
mbed_official	376:cb4d9db17537	697
mbed_official	376:cb4d9db17537	698	/* To correctly read data from FLASH memory, the number of wait states (LATENCY)
mbed_official	376:cb4d9db17537	699	must be correctly programmed according to the frequency of the CPU clock
mbed_official	376:cb4d9db17537	700	(HCLK) and the supply voltage of the device. */
mbed_official	376:cb4d9db17537	701
mbed_official	376:cb4d9db17537	702	/* Increasing the CPU frequency */
mbed_official	376:cb4d9db17537	703	if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
mbed_official	376:cb4d9db17537	704	{
mbed_official	376:cb4d9db17537	705	/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
mbed_official	376:cb4d9db17537	706	__HAL_FLASH_SET_LATENCY(FLatency);
mbed_official	376:cb4d9db17537	707
mbed_official	376:cb4d9db17537	708	/* Check that the new number of wait states is taken into account to access the Flash
mbed_official	376:cb4d9db17537	709	memory by reading the FLASH_ACR register */
mbed_official	376:cb4d9db17537	710	if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
mbed_official	376:cb4d9db17537	711	{
mbed_official	376:cb4d9db17537	712	return HAL_ERROR;
mbed_official	376:cb4d9db17537	713	}
mbed_official	376:cb4d9db17537	714
mbed_official	376:cb4d9db17537	715	/-------------------------- HCLK Configuration --------------------------/
mbed_official	376:cb4d9db17537	716	if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
mbed_official	376:cb4d9db17537	717	{
mbed_official	376:cb4d9db17537	718	assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
mbed_official	376:cb4d9db17537	719	MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
mbed_official	376:cb4d9db17537	720	}
mbed_official	376:cb4d9db17537	721
mbed_official	376:cb4d9db17537	722	/------------------------- SYSCLK Configuration ---------------------------/
mbed_official	376:cb4d9db17537	723	if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
mbed_official	376:cb4d9db17537	724	{
mbed_official	376:cb4d9db17537	725	assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
mbed_official	376:cb4d9db17537	726
mbed_official	376:cb4d9db17537	727	/* HSE is selected as System Clock Source */
mbed_official	376:cb4d9db17537	728	if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official	376:cb4d9db17537	729	{
mbed_official	376:cb4d9db17537	730	/* Check the HSE ready flag */
mbed_official	376:cb4d9db17537	731	if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official	376:cb4d9db17537	732	{
mbed_official	376:cb4d9db17537	733	return HAL_ERROR;
mbed_official	376:cb4d9db17537	734	}
mbed_official	376:cb4d9db17537	735	}
mbed_official	376:cb4d9db17537	736
mbed_official	376:cb4d9db17537	737	/* MSI is selected as System Clock Source */
mbed_official	376:cb4d9db17537	738	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_MSI)
mbed_official	376:cb4d9db17537	739	{
mbed_official	376:cb4d9db17537	740	/* Check the MSI ready flag */
mbed_official	376:cb4d9db17537	741	if(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == RESET)
mbed_official	376:cb4d9db17537	742	{
mbed_official	376:cb4d9db17537	743	return HAL_ERROR;
mbed_official	376:cb4d9db17537	744	}
mbed_official	376:cb4d9db17537	745	}
mbed_official	376:cb4d9db17537	746	/* PLL is selected as System Clock Source */
mbed_official	376:cb4d9db17537	747	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official	376:cb4d9db17537	748	{
mbed_official	376:cb4d9db17537	749	/* Check the PLL ready flag */
mbed_official	376:cb4d9db17537	750	if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official	376:cb4d9db17537	751	{
mbed_official	376:cb4d9db17537	752	return HAL_ERROR;
mbed_official	376:cb4d9db17537	753	}
mbed_official	376:cb4d9db17537	754	}
mbed_official	376:cb4d9db17537	755	/* HSI is selected as System Clock Source */
mbed_official	376:cb4d9db17537	756	else
mbed_official	376:cb4d9db17537	757	{
mbed_official	376:cb4d9db17537	758	/* Check the HSI ready flag */
mbed_official	376:cb4d9db17537	759	if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official	376:cb4d9db17537	760	{
mbed_official	376:cb4d9db17537	761	return HAL_ERROR;
mbed_official	376:cb4d9db17537	762	}
mbed_official	376:cb4d9db17537	763	}
mbed_official	376:cb4d9db17537	764	MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource);
mbed_official	376:cb4d9db17537	765
mbed_official	376:cb4d9db17537	766	/* Get timeout */
mbed_official	376:cb4d9db17537	767	tickstart = HAL_GetTick();
mbed_official	376:cb4d9db17537	768
mbed_official	376:cb4d9db17537	769	if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official	376:cb4d9db17537	770	{
mbed_official	489:119543c9f674	771	while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
mbed_official	376:cb4d9db17537	772	{
mbed_official	489:119543c9f674	773	if((HAL_GetTick() - tickstart ) > RCC_CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	774	{
mbed_official	376:cb4d9db17537	775	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	776	}
mbed_official	376:cb4d9db17537	777	}
mbed_official	376:cb4d9db17537	778	}
mbed_official	376:cb4d9db17537	779	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official	376:cb4d9db17537	780	{
mbed_official	489:119543c9f674	781	while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
mbed_official	376:cb4d9db17537	782	{
mbed_official	489:119543c9f674	783	if((HAL_GetTick() - tickstart ) > RCC_CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	784	{
mbed_official	376:cb4d9db17537	785	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	786	}
mbed_official	376:cb4d9db17537	787	}
mbed_official	376:cb4d9db17537	788	}
mbed_official	376:cb4d9db17537	789	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_MSI)
mbed_official	376:cb4d9db17537	790	{
mbed_official	376:cb4d9db17537	791	while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_MSI)
mbed_official	376:cb4d9db17537	792	{
mbed_official	489:119543c9f674	793	if((HAL_GetTick() - tickstart ) > RCC_CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	794	{
mbed_official	376:cb4d9db17537	795	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	796	}
mbed_official	376:cb4d9db17537	797	}
mbed_official	376:cb4d9db17537	798	}
mbed_official	376:cb4d9db17537	799	else
mbed_official	376:cb4d9db17537	800	{
mbed_official	489:119543c9f674	801	while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
mbed_official	376:cb4d9db17537	802	{
mbed_official	489:119543c9f674	803	if((HAL_GetTick() - tickstart ) > RCC_CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	804	{
mbed_official	376:cb4d9db17537	805	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	806	}
mbed_official	376:cb4d9db17537	807	}
mbed_official	376:cb4d9db17537	808	}
mbed_official	376:cb4d9db17537	809	}
mbed_official	376:cb4d9db17537	810	}
mbed_official	376:cb4d9db17537	811	/* Decreasing the CPU frequency */
mbed_official	376:cb4d9db17537	812	else
mbed_official	376:cb4d9db17537	813	{
mbed_official	376:cb4d9db17537	814	/-------------------------- HCLK Configuration --------------------------/
mbed_official	376:cb4d9db17537	815	if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
mbed_official	376:cb4d9db17537	816	{
mbed_official	376:cb4d9db17537	817	assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
mbed_official	376:cb4d9db17537	818	MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
mbed_official	376:cb4d9db17537	819	}
mbed_official	376:cb4d9db17537	820
mbed_official	376:cb4d9db17537	821	/------------------------- SYSCLK Configuration -------------------------/
mbed_official	376:cb4d9db17537	822	if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
mbed_official	376:cb4d9db17537	823	{
mbed_official	376:cb4d9db17537	824	assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
mbed_official	376:cb4d9db17537	825
mbed_official	376:cb4d9db17537	826	/* HSE is selected as System Clock Source */
mbed_official	376:cb4d9db17537	827	if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official	376:cb4d9db17537	828	{
mbed_official	376:cb4d9db17537	829	/* Check the HSE ready flag */
mbed_official	376:cb4d9db17537	830	if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official	376:cb4d9db17537	831	{
mbed_official	376:cb4d9db17537	832	return HAL_ERROR;
mbed_official	376:cb4d9db17537	833	}
mbed_official	376:cb4d9db17537	834	}
mbed_official	376:cb4d9db17537	835
mbed_official	376:cb4d9db17537	836	/* MSI is selected as System Clock Source */
mbed_official	376:cb4d9db17537	837	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_MSI)
mbed_official	376:cb4d9db17537	838	{
mbed_official	376:cb4d9db17537	839	/* Check the MSI ready flag */
mbed_official	376:cb4d9db17537	840	if(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == RESET)
mbed_official	376:cb4d9db17537	841	{
mbed_official	376:cb4d9db17537	842	return HAL_ERROR;
mbed_official	376:cb4d9db17537	843	}
mbed_official	376:cb4d9db17537	844	}
mbed_official	376:cb4d9db17537	845	/* PLL is selected as System Clock Source */
mbed_official	376:cb4d9db17537	846	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official	376:cb4d9db17537	847	{
mbed_official	376:cb4d9db17537	848	/* Check the PLL ready flag */
mbed_official	376:cb4d9db17537	849	if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official	376:cb4d9db17537	850	{
mbed_official	376:cb4d9db17537	851	return HAL_ERROR;
mbed_official	376:cb4d9db17537	852	}
mbed_official	376:cb4d9db17537	853	}
mbed_official	376:cb4d9db17537	854	/* HSI is selected as System Clock Source */
mbed_official	376:cb4d9db17537	855	else
mbed_official	376:cb4d9db17537	856	{
mbed_official	376:cb4d9db17537	857	/* Check the HSI ready flag */
mbed_official	376:cb4d9db17537	858	if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official	376:cb4d9db17537	859	{
mbed_official	376:cb4d9db17537	860	return HAL_ERROR;
mbed_official	376:cb4d9db17537	861	}
mbed_official	376:cb4d9db17537	862	}
mbed_official	376:cb4d9db17537	863	MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource);
mbed_official	376:cb4d9db17537	864
mbed_official	376:cb4d9db17537	865	/* Get timeout */
mbed_official	376:cb4d9db17537	866	tickstart = HAL_GetTick();
mbed_official	376:cb4d9db17537	867
mbed_official	376:cb4d9db17537	868	if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official	376:cb4d9db17537	869	{
mbed_official	489:119543c9f674	870	while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
mbed_official	376:cb4d9db17537	871	{
mbed_official	489:119543c9f674	872	if((HAL_GetTick() - tickstart ) > RCC_CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	873	{
mbed_official	376:cb4d9db17537	874	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	875	}
mbed_official	376:cb4d9db17537	876	}
mbed_official	376:cb4d9db17537	877	}
mbed_official	376:cb4d9db17537	878	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official	376:cb4d9db17537	879	{
mbed_official	489:119543c9f674	880	while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
mbed_official	376:cb4d9db17537	881	{
mbed_official	489:119543c9f674	882	if((HAL_GetTick() - tickstart ) > RCC_CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	883	{
mbed_official	376:cb4d9db17537	884	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	885	}
mbed_official	376:cb4d9db17537	886	}
mbed_official	376:cb4d9db17537	887	}
mbed_official	376:cb4d9db17537	888	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_MSI)
mbed_official	376:cb4d9db17537	889	{
mbed_official	376:cb4d9db17537	890	while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_MSI)
mbed_official	376:cb4d9db17537	891	{
mbed_official	489:119543c9f674	892	if((HAL_GetTick() - tickstart ) > RCC_CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	893	{
mbed_official	376:cb4d9db17537	894	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	895	}
mbed_official	376:cb4d9db17537	896	}
mbed_official	376:cb4d9db17537	897	}
mbed_official	376:cb4d9db17537	898	else
mbed_official	376:cb4d9db17537	899	{
mbed_official	489:119543c9f674	900	while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
mbed_official	376:cb4d9db17537	901	{
mbed_official	489:119543c9f674	902	if((HAL_GetTick() - tickstart ) > RCC_CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	376:cb4d9db17537	903	{
mbed_official	376:cb4d9db17537	904	return HAL_TIMEOUT;
mbed_official	376:cb4d9db17537	905	}
mbed_official	376:cb4d9db17537	906	}
mbed_official	376:cb4d9db17537	907	}
mbed_official	376:cb4d9db17537	908	}
mbed_official	376:cb4d9db17537	909
mbed_official	376:cb4d9db17537	910	/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
mbed_official	376:cb4d9db17537	911	__HAL_FLASH_SET_LATENCY(FLatency);
mbed_official	376:cb4d9db17537	912
mbed_official	376:cb4d9db17537	913	/* Check that the new number of wait states is taken into account to access the Flash
mbed_official	376:cb4d9db17537	914	memory by reading the FLASH_ACR register */
mbed_official	376:cb4d9db17537	915	if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
mbed_official	376:cb4d9db17537	916	{
mbed_official	376:cb4d9db17537	917	return HAL_ERROR;
mbed_official	376:cb4d9db17537	918	}
mbed_official	376:cb4d9db17537	919	}
mbed_official	376:cb4d9db17537	920
mbed_official	376:cb4d9db17537	921	/-------------------------- PCLK1 Configuration ---------------------------/
mbed_official	376:cb4d9db17537	922	if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
mbed_official	376:cb4d9db17537	923	{
mbed_official	376:cb4d9db17537	924	assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
mbed_official	376:cb4d9db17537	925	MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
mbed_official	376:cb4d9db17537	926	}
mbed_official	376:cb4d9db17537	927
mbed_official	376:cb4d9db17537	928	/-------------------------- PCLK2 Configuration ---------------------------/
mbed_official	376:cb4d9db17537	929	if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
mbed_official	376:cb4d9db17537	930	{
mbed_official	376:cb4d9db17537	931	assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
mbed_official	376:cb4d9db17537	932	MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
mbed_official	376:cb4d9db17537	933	}
mbed_official	376:cb4d9db17537	934
mbed_official	376:cb4d9db17537	935	/* Configure the source of time base considering new system clocks settings*/
mbed_official	376:cb4d9db17537	936	HAL_InitTick (TICK_INT_PRIORITY);
mbed_official	376:cb4d9db17537	937
mbed_official	376:cb4d9db17537	938	return HAL_OK;
mbed_official	376:cb4d9db17537	939	}
mbed_official	376:cb4d9db17537	940
mbed_official	376:cb4d9db17537	941	/**
mbed_official	376:cb4d9db17537	942	* @}
mbed_official	376:cb4d9db17537	943	*/
mbed_official	376:cb4d9db17537	944
mbed_official	489:119543c9f674	945	/** @addtogroup RCC_Exported_Functions_Group2 Peripheral Control functions
mbed_official	376:cb4d9db17537	946	* @brief RCC clocks control functions
mbed_official	376:cb4d9db17537	947	*
mbed_official	376:cb4d9db17537	948	@verbatim
mbed_official	376:cb4d9db17537	949	===============================================================================
mbed_official	376:cb4d9db17537	950	##### Peripheral Control functions #####
mbed_official	376:cb4d9db17537	951	===============================================================================
mbed_official	376:cb4d9db17537	952	[..]
mbed_official	376:cb4d9db17537	953	This subsection provides a set of functions allowing to control the RCC Clocks
mbed_official	376:cb4d9db17537	954	frequencies.
mbed_official	376:cb4d9db17537	955
mbed_official	376:cb4d9db17537	956	@endverbatim
mbed_official	376:cb4d9db17537	957	* @{
mbed_official	376:cb4d9db17537	958	*/
mbed_official	376:cb4d9db17537	959
mbed_official	376:cb4d9db17537	960	/**
mbed_official	376:cb4d9db17537	961	* @brief Selects the clock source to output on MCO pin.
mbed_official	376:cb4d9db17537	962	* @note MCO pin should be configured in alternate function mode.
mbed_official	376:cb4d9db17537	963	* @param RCC_MCOx: specifies the output direction for the clock source.
mbed_official	376:cb4d9db17537	964	* For STM32L0xx family this parameter can have only one value:
mbed_official	376:cb4d9db17537	965	* @arg RCC_MCO1: Clock source to output on MCO pin(PA8).
mbed_official	376:cb4d9db17537	966	* @arg RCC_MCO2: Clock source to output on MCO pin(PA9).
mbed_official	376:cb4d9db17537	967	* @param RCC_MCOSource: specifies the clock source to output.
mbed_official	376:cb4d9db17537	968	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	969	* @arg RCC_MCO1SOURCE_NOCLOCK: No clock selected
mbed_official	376:cb4d9db17537	970	* @arg RCC_MCO1SOURCE_SYSCLK: System clock selected
mbed_official	376:cb4d9db17537	971	* @arg RCC_MCO1SOURCE_HSI: HSI oscillator clock selected
mbed_official	376:cb4d9db17537	972	* @arg RCC_MCO1SOURCE_MSI: MSI oscillator clock selected
mbed_official	376:cb4d9db17537	973	* @arg RCC_MCO1SOURCE_HSE: HSE oscillator clock selected
mbed_official	376:cb4d9db17537	974	* @arg RCC_MCO1SOURCE_PLLCLK: PLL clock selected
mbed_official	376:cb4d9db17537	975	* @arg RCC_MCO1SOURCE_LSI: LSI clock selected
mbed_official	489:119543c9f674	976	* @arg RCC_MCO1SOURCE_LSE: LSE clock selected
mbed_official	489:119543c9f674	977	* and in STM32L052xx,STM32L053xx,STM32L062xx, STM32L063xx
mbed_official	489:119543c9f674	978	* STM32L072xx,STM32L073xx,STM32L082xx, STM32L083xx
mbed_official	376:cb4d9db17537	979	* @arg RCC_MCO1SOURCE_HSI48: HSI48 clock selected
mbed_official	376:cb4d9db17537	980	* @param RCC_MCODIV: specifies the MCO DIV.
mbed_official	376:cb4d9db17537	981	* This parameter can be one of the following values:
mbed_official	376:cb4d9db17537	982	* @arg RCC_MCODIV_1: no division applied to MCO clock
mbed_official	376:cb4d9db17537	983	* @arg RCC_MCODIV_2: division by 2 applied to MCO clock
mbed_official	376:cb4d9db17537	984	* @arg RCC_MCODIV_4: division by 4 applied to MCO clock
mbed_official	376:cb4d9db17537	985	* @arg RCC_MCODIV_8: division by 8 applied to MCO clock
mbed_official	376:cb4d9db17537	986	* @arg RCC_MCODIV_16: division by 16 applied to MCO clock
mbed_official	376:cb4d9db17537	987	* @retval None
mbed_official	376:cb4d9db17537	988	*/
mbed_official	376:cb4d9db17537	989	void HAL_RCC_MCOConfig( uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv)
mbed_official	376:cb4d9db17537	990	{
mbed_official	376:cb4d9db17537	991	GPIO_InitTypeDef GPIO_InitStruct;
mbed_official	376:cb4d9db17537	992	/* Check the parameters */
mbed_official	376:cb4d9db17537	993	assert_param(IS_RCC_MCO(RCC_MCOx));
mbed_official	376:cb4d9db17537	994	assert_param(IS_RCC_MCODIV(RCC_MCODiv));
mbed_official	376:cb4d9db17537	995	assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource));
mbed_official	376:cb4d9db17537	996
mbed_official	376:cb4d9db17537	997	/* MCO Clock Enable */
mbed_official	376:cb4d9db17537	998	__MCO1_CLK_ENABLE();
mbed_official	376:cb4d9db17537	999
mbed_official	376:cb4d9db17537	1000	/* Configure the MCO1 pin in alternate function mode */
mbed_official	376:cb4d9db17537	1001	if(RCC_MCOx == RCC_MCO1)
mbed_official	376:cb4d9db17537	1002	{
mbed_official	376:cb4d9db17537	1003	GPIO_InitStruct.Pin = MCO1_PIN;
mbed_official	376:cb4d9db17537	1004	}
mbed_official	376:cb4d9db17537	1005	else
mbed_official	376:cb4d9db17537	1006	{
mbed_official	376:cb4d9db17537	1007	GPIO_InitStruct.Pin = MCO2_PIN;
mbed_official	376:cb4d9db17537	1008	}
mbed_official	376:cb4d9db17537	1009	GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
mbed_official	376:cb4d9db17537	1010	GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
mbed_official	376:cb4d9db17537	1011	GPIO_InitStruct.Pull = GPIO_NOPULL;
mbed_official	376:cb4d9db17537	1012	GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
mbed_official	376:cb4d9db17537	1013	HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct);
mbed_official	376:cb4d9db17537	1014
mbed_official	376:cb4d9db17537	1015	/* Mask MCO1 and MCO1PRE[2:0] bits then Select MCO1 clock source and prescaler */
mbed_official	489:119543c9f674	1016	MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCOSEL \| RCC_CFGR_MCO_PRE), ((RCC_MCOSource \| RCC_MCODiv )));
mbed_official	376:cb4d9db17537	1017	}
mbed_official	376:cb4d9db17537	1018
mbed_official	376:cb4d9db17537	1019	/**
mbed_official	376:cb4d9db17537	1020	* @brief Enables the Clock Security System.
mbed_official	376:cb4d9db17537	1021	* @note If a failure is detected on the HSE oscillator clock, this oscillator
mbed_official	376:cb4d9db17537	1022	* is automatically disabled and an interrupt is generated to inform the
mbed_official	376:cb4d9db17537	1023	* software about the failure (Clock Security System Interrupt, CSSI),
mbed_official	376:cb4d9db17537	1024	* allowing the MCU to perform rescue operations. The CSSI is linked to
mbed_official	376:cb4d9db17537	1025	* the Cortex-M0+ NMI (Non-Maskable Interrupt) exception vector.
mbed_official	376:cb4d9db17537	1026	* @param None
mbed_official	376:cb4d9db17537	1027	* @retval None
mbed_official	376:cb4d9db17537	1028	*/
mbed_official	376:cb4d9db17537	1029	void HAL_RCC_EnableCSS(void)
mbed_official	376:cb4d9db17537	1030	{
mbed_official	376:cb4d9db17537	1031	SET_BIT(RCC->CR, RCC_CR_CSSHSEON) ;
mbed_official	376:cb4d9db17537	1032	}
mbed_official	376:cb4d9db17537	1033
mbed_official	376:cb4d9db17537	1034
mbed_official	376:cb4d9db17537	1035	/**
mbed_official	376:cb4d9db17537	1036	* @brief Returns the SYSCLK frequency
mbed_official	376:cb4d9db17537	1037	*
mbed_official	376:cb4d9db17537	1038	* @note The system frequency computed by this function is not the real
mbed_official	376:cb4d9db17537	1039	* frequency in the chip. It is calculated based on the predefined
mbed_official	376:cb4d9db17537	1040	* constant and the selected clock source:
mbed_official	376:cb4d9db17537	1041	* @note If SYSCLK source is MSI, function returns values based on MSI
mbed_official	376:cb4d9db17537	1042	* Value as defined by the MSI range.
mbed_official	376:cb4d9db17537	1043	* @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*)
mbed_official	376:cb4d9db17537	1044	* @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(**)
mbed_official	376:cb4d9db17537	1045	* @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(**)
mbed_official	376:cb4d9db17537	1046	* or HSI_VALUE(*) multiplied/divided by the PLL factors.
mbed_official	376:cb4d9db17537	1047	* @note (*) HSI_VALUE is a constant defined in stm32l0xx_hal_conf.h file (default value
mbed_official	376:cb4d9db17537	1048	* 16 MHz) but the real value may vary depending on the variations
mbed_official	376:cb4d9db17537	1049	* in voltage and temperature.
mbed_official	376:cb4d9db17537	1050	* @note (**) HSE_VALUE is a constant defined in stm32l0xx_hal_conf.h file (default value
mbed_official	376:cb4d9db17537	1051	* 8 MHz), user has to ensure that HSE_VALUE is same as the real
mbed_official	376:cb4d9db17537	1052	* frequency of the crystal used. Otherwise, this function may
mbed_official	376:cb4d9db17537	1053	* have wrong result.
mbed_official	376:cb4d9db17537	1054	*
mbed_official	376:cb4d9db17537	1055	* @note The result of this function could be not correct when using fractional
mbed_official	376:cb4d9db17537	1056	* value for HSE crystal.
mbed_official	376:cb4d9db17537	1057	*
mbed_official	376:cb4d9db17537	1058	* @note This function can be used by the user application to compute the
mbed_official	376:cb4d9db17537	1059	* baudrate for the communication peripherals or configure other parameters.
mbed_official	376:cb4d9db17537	1060	*
mbed_official	376:cb4d9db17537	1061	* @note Each time SYSCLK changes, this function must be called to update the
mbed_official	376:cb4d9db17537	1062	* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
mbed_official	376:cb4d9db17537	1063	*
mbed_official	376:cb4d9db17537	1064	*
mbed_official	376:cb4d9db17537	1065	* @param None
mbed_official	376:cb4d9db17537	1066	* @retval SYSCLK frequency
mbed_official	376:cb4d9db17537	1067	*/
mbed_official	376:cb4d9db17537	1068	uint32_t HAL_RCC_GetSysClockFreq(void)
mbed_official	376:cb4d9db17537	1069	{
mbed_official	376:cb4d9db17537	1070	uint32_t pllmul = 0, plldiv = 0, pllsource = 0, msirange = 0;
mbed_official	376:cb4d9db17537	1071	uint32_t sysclockfreq = 0;
mbed_official	376:cb4d9db17537	1072
mbed_official	376:cb4d9db17537	1073	/* Get SYSCLK source -------------------------------------------------------*/
mbed_official	376:cb4d9db17537	1074
mbed_official	376:cb4d9db17537	1075	/MSI frequency range in HZ/
mbed_official	376:cb4d9db17537	1076	msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;
mbed_official	376:cb4d9db17537	1077
mbed_official	376:cb4d9db17537	1078	switch (RCC->CFGR & RCC_CFGR_SWS)
mbed_official	376:cb4d9db17537	1079	{
mbed_official	376:cb4d9db17537	1080	case RCC_CFGR_SWS_MSI: /* MSI used as system clock */
mbed_official	376:cb4d9db17537	1081	{
mbed_official	489:119543c9f674	1082	sysclockfreq = (32768 * (1 << (msirange + 1)));
mbed_official	376:cb4d9db17537	1083	break;
mbed_official	376:cb4d9db17537	1084	}
mbed_official	489:119543c9f674	1085	case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock */
mbed_official	376:cb4d9db17537	1086	{
mbed_official	376:cb4d9db17537	1087	if ((RCC->CR & RCC_CR_HSIDIVF) != 0)
mbed_official	376:cb4d9db17537	1088	{
mbed_official	376:cb4d9db17537	1089	sysclockfreq = (HSI_VALUE >> 2);
mbed_official	376:cb4d9db17537	1090	}
mbed_official	376:cb4d9db17537	1091	else
mbed_official	376:cb4d9db17537	1092	{
mbed_official	376:cb4d9db17537	1093	sysclockfreq = HSI_VALUE;
mbed_official	376:cb4d9db17537	1094	}
mbed_official	376:cb4d9db17537	1095	break;
mbed_official	376:cb4d9db17537	1096	}
mbed_official	489:119543c9f674	1097	case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
mbed_official	376:cb4d9db17537	1098	{
mbed_official	376:cb4d9db17537	1099	sysclockfreq = HSE_VALUE;
mbed_official	376:cb4d9db17537	1100	break;
mbed_official	376:cb4d9db17537	1101	}
mbed_official	489:119543c9f674	1102	case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
mbed_official	376:cb4d9db17537	1103	{
mbed_official	376:cb4d9db17537	1104	/* Get PLL clock source and multiplication factor ----------------------*/
mbed_official	376:cb4d9db17537	1105	pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
mbed_official	376:cb4d9db17537	1106	plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
mbed_official	376:cb4d9db17537	1107	pllmul = PLLMulTable[(pllmul >> 18)];
mbed_official	376:cb4d9db17537	1108	plldiv = (plldiv >> 22) + 1;
mbed_official	376:cb4d9db17537	1109
mbed_official	376:cb4d9db17537	1110	pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
mbed_official	376:cb4d9db17537	1111
mbed_official	376:cb4d9db17537	1112	if (pllsource == RCC_CFGR_PLLSRC_HSI)
mbed_official	376:cb4d9db17537	1113	{
mbed_official	376:cb4d9db17537	1114	/* HSI oscillator clock selected as PLL clock source */
mbed_official	489:119543c9f674	1115	if ((RCC->CR & RCC_CR_HSIDIVF) != 0)
mbed_official	489:119543c9f674	1116	{
mbed_official	489:119543c9f674	1117	sysclockfreq = (HSI_VALUE >> 2) * (pllmul / plldiv);
mbed_official	489:119543c9f674	1118	}
mbed_official	489:119543c9f674	1119	else
mbed_official	489:119543c9f674	1120	{
mbed_official	489:119543c9f674	1121	sysclockfreq =(((HSI_VALUE) * pllmul) / plldiv);
mbed_official	489:119543c9f674	1122	}
mbed_official	376:cb4d9db17537	1123	}
mbed_official	376:cb4d9db17537	1124	else
mbed_official	376:cb4d9db17537	1125	{
mbed_official	376:cb4d9db17537	1126	/* HSE selected as PLL clock source */
mbed_official	376:cb4d9db17537	1127	sysclockfreq = (((HSE_VALUE) * pllmul) / plldiv);
mbed_official	376:cb4d9db17537	1128	}
mbed_official	376:cb4d9db17537	1129	break;
mbed_official	376:cb4d9db17537	1130	}
mbed_official	376:cb4d9db17537	1131	default: /* MSI used as system clock */
mbed_official	376:cb4d9db17537	1132	{
mbed_official	489:119543c9f674	1133	sysclockfreq = (32768 * (1 << (msirange + 1)));
mbed_official	376:cb4d9db17537	1134	break;
mbed_official	376:cb4d9db17537	1135	}
mbed_official	376:cb4d9db17537	1136	}
mbed_official	376:cb4d9db17537	1137	return sysclockfreq;
mbed_official	376:cb4d9db17537	1138	}
mbed_official	376:cb4d9db17537	1139
mbed_official	376:cb4d9db17537	1140	/**
mbed_official	376:cb4d9db17537	1141	* @brief Returns the HCLK frequency
mbed_official	376:cb4d9db17537	1142	* @note Each time HCLK changes, this function must be called to update the
mbed_official	376:cb4d9db17537	1143	* right HCLK value. Otherwise, any configuration based on this function will be incorrect.
mbed_official	376:cb4d9db17537	1144	*
mbed_official	376:cb4d9db17537	1145	* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
mbed_official	376:cb4d9db17537	1146	* and updated within this function
mbed_official	376:cb4d9db17537	1147	* @param None
mbed_official	376:cb4d9db17537	1148	* @retval HCLK frequency
mbed_official	376:cb4d9db17537	1149	*/
mbed_official	376:cb4d9db17537	1150	uint32_t HAL_RCC_GetHCLKFreq(void)
mbed_official	376:cb4d9db17537	1151	{
mbed_official	376:cb4d9db17537	1152	SystemCoreClock = HAL_RCC_GetSysClockFreq() >> APBAHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
mbed_official	376:cb4d9db17537	1153
mbed_official	376:cb4d9db17537	1154	return (SystemCoreClock);
mbed_official	376:cb4d9db17537	1155
mbed_official	376:cb4d9db17537	1156	}
mbed_official	376:cb4d9db17537	1157
mbed_official	376:cb4d9db17537	1158	/**
mbed_official	376:cb4d9db17537	1159	* @brief Returns the PCLK1 frequency
mbed_official	376:cb4d9db17537	1160	* @note Each time PCLK1 changes, this function must be called to update the
mbed_official	376:cb4d9db17537	1161	* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
mbed_official	376:cb4d9db17537	1162	* @param None
mbed_official	376:cb4d9db17537	1163	* @retval PCLK1 frequency
mbed_official	376:cb4d9db17537	1164	*/
mbed_official	376:cb4d9db17537	1165	uint32_t HAL_RCC_GetPCLK1Freq(void)
mbed_official	376:cb4d9db17537	1166	{
mbed_official	376:cb4d9db17537	1167
mbed_official	376:cb4d9db17537	1168	return ( HAL_RCC_GetHCLKFreq() >> APBAHBPrescTable[((RCC->CFGR & RCC_CFGR_PPRE1) >> 8)]);
mbed_official	376:cb4d9db17537	1169
mbed_official	376:cb4d9db17537	1170	}
mbed_official	376:cb4d9db17537	1171
mbed_official	376:cb4d9db17537	1172	/**
mbed_official	376:cb4d9db17537	1173	* @brief Returns the PCLK2 frequency
mbed_official	376:cb4d9db17537	1174	* @note Each time PCLK2 changes, this function must be called to update the
mbed_official	376:cb4d9db17537	1175	* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
mbed_official	376:cb4d9db17537	1176	* @param None
mbed_official	376:cb4d9db17537	1177	* @retval PCLK2 frequency
mbed_official	376:cb4d9db17537	1178	*/
mbed_official	376:cb4d9db17537	1179	uint32_t HAL_RCC_GetPCLK2Freq(void)
mbed_official	376:cb4d9db17537	1180	{
mbed_official	376:cb4d9db17537	1181
mbed_official	376:cb4d9db17537	1182	return ( HAL_RCC_GetHCLKFreq() >> APBAHBPrescTable[((RCC->CFGR & RCC_CFGR_PPRE2) >> 11)]);
mbed_official	376:cb4d9db17537	1183
mbed_official	376:cb4d9db17537	1184	}
mbed_official	376:cb4d9db17537	1185
mbed_official	376:cb4d9db17537	1186	/**
mbed_official	376:cb4d9db17537	1187	* @brief Configures the RCC_OscInitStruct according to the internal
mbed_official	376:cb4d9db17537	1188	* RCC configuration registers.
mbed_official	376:cb4d9db17537	1189	* @param RCC_OscInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official	376:cb4d9db17537	1190	* will be configured.
mbed_official	376:cb4d9db17537	1191	* @retval None
mbed_official	376:cb4d9db17537	1192	*/
mbed_official	376:cb4d9db17537	1193	void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
mbed_official	376:cb4d9db17537	1194	{
mbed_official	376:cb4d9db17537	1195	/* Set all possible values for the Oscillator type parameter ---------------*/
mbed_official	376:cb4d9db17537	1196	RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE \| RCC_OSCILLATORTYPE_MSI \| RCC_OSCILLATORTYPE_HSI \| \
mbed_official	489:119543c9f674	1197	RCC_OSCILLATORTYPE_LSE \| RCC_OSCILLATORTYPE_LSI;
mbed_official	489:119543c9f674	1198	#if !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined(STM32L051xx) && !defined(STM32L061xx) && !defined(STM32L071xx) && !defined(STM32L081xx)
mbed_official	489:119543c9f674	1199	RCC_OscInitStruct->OscillatorType \|= RCC_OSCILLATORTYPE_HSI48;
mbed_official	489:119543c9f674	1200	#endif
mbed_official	489:119543c9f674	1201
mbed_official	376:cb4d9db17537	1202	/* Get the HSE configuration -----------------------------------------------*/
mbed_official	376:cb4d9db17537	1203	if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP)
mbed_official	376:cb4d9db17537	1204	{
mbed_official	376:cb4d9db17537	1205	RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS;
mbed_official	376:cb4d9db17537	1206	}
mbed_official	376:cb4d9db17537	1207	else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON)
mbed_official	376:cb4d9db17537	1208	{
mbed_official	376:cb4d9db17537	1209	RCC_OscInitStruct->HSEState = RCC_HSE_ON;
mbed_official	376:cb4d9db17537	1210	}
mbed_official	376:cb4d9db17537	1211	else
mbed_official	376:cb4d9db17537	1212	{
mbed_official	376:cb4d9db17537	1213	RCC_OscInitStruct->HSEState = RCC_HSE_OFF;
mbed_official	376:cb4d9db17537	1214	}
mbed_official	376:cb4d9db17537	1215
mbed_official	376:cb4d9db17537	1216	/* Get the MSI configuration -----------------------------------------------*/
mbed_official	376:cb4d9db17537	1217	if((RCC->CR &RCC_CR_MSION) == RCC_CR_MSION)
mbed_official	376:cb4d9db17537	1218	{
mbed_official	376:cb4d9db17537	1219	RCC_OscInitStruct->MSIState = RCC_MSI_ON;
mbed_official	376:cb4d9db17537	1220	}
mbed_official	376:cb4d9db17537	1221	else
mbed_official	376:cb4d9db17537	1222	{
mbed_official	376:cb4d9db17537	1223	RCC_OscInitStruct->MSIState = RCC_MSI_OFF;
mbed_official	376:cb4d9db17537	1224	}
mbed_official	376:cb4d9db17537	1225
mbed_official	376:cb4d9db17537	1226	RCC_OscInitStruct->MSICalibrationValue = (uint32_t)((RCC->CR &RCC_ICSCR_MSITRIM) >> 24);
mbed_official	376:cb4d9db17537	1227	RCC_OscInitStruct->MSIClockRange = (uint32_t)((RCC->ICSCR &RCC_ICSCR_MSIRANGE) >> 13);
mbed_official	489:119543c9f674	1228
mbed_official	489:119543c9f674	1229	#if !defined (STM32L031xx) && !defined (STM32L041xx) && !defined(STM32L051xx) && !defined(STM32L061xx) && !defined(STM32L071xx) && !defined(STM32L081xx)
mbed_official	376:cb4d9db17537	1230	/* Get the HSI48 configuration -----------------------------------------------*/
mbed_official	376:cb4d9db17537	1231	if((RCC->CRRCR &RCC_CRRCR_HSI48ON) == RCC_CRRCR_HSI48ON)
mbed_official	376:cb4d9db17537	1232	{
mbed_official	376:cb4d9db17537	1233	RCC_OscInitStruct->HSI48State = RCC_HSI48_ON;
mbed_official	376:cb4d9db17537	1234	}
mbed_official	376:cb4d9db17537	1235	else
mbed_official	376:cb4d9db17537	1236	{
mbed_official	376:cb4d9db17537	1237	RCC_OscInitStruct->HSI48State = RCC_HSI48_OFF;
mbed_official	376:cb4d9db17537	1238	}
mbed_official	489:119543c9f674	1239	#endif
mbed_official	376:cb4d9db17537	1240
mbed_official	376:cb4d9db17537	1241	/* Get the HSI configuration -----------------------------------------------*/
mbed_official	376:cb4d9db17537	1242	if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION)
mbed_official	376:cb4d9db17537	1243	{
mbed_official	376:cb4d9db17537	1244	RCC_OscInitStruct->HSIState = RCC_HSI_ON;
mbed_official	376:cb4d9db17537	1245	}
mbed_official	376:cb4d9db17537	1246	else
mbed_official	376:cb4d9db17537	1247	{
mbed_official	376:cb4d9db17537	1248	RCC_OscInitStruct->HSIState = RCC_HSI_OFF;
mbed_official	376:cb4d9db17537	1249	}
mbed_official	376:cb4d9db17537	1250
mbed_official	376:cb4d9db17537	1251	RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->ICSCR &RCC_ICSCR_HSITRIM) >> 8);
mbed_official	376:cb4d9db17537	1252
mbed_official	376:cb4d9db17537	1253	/* Get the LSE configuration -----------------------------------------------*/
mbed_official	376:cb4d9db17537	1254	if((RCC->CSR &RCC_CSR_LSEBYP) == RCC_CSR_LSEBYP)
mbed_official	376:cb4d9db17537	1255	{
mbed_official	376:cb4d9db17537	1256	RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS;
mbed_official	376:cb4d9db17537	1257	}
mbed_official	376:cb4d9db17537	1258	else if((RCC->CSR &RCC_CSR_LSEON) == RCC_CSR_LSEON)
mbed_official	376:cb4d9db17537	1259	{
mbed_official	376:cb4d9db17537	1260	RCC_OscInitStruct->LSEState = RCC_LSE_ON;
mbed_official	376:cb4d9db17537	1261	}
mbed_official	376:cb4d9db17537	1262	else
mbed_official	376:cb4d9db17537	1263	{
mbed_official	376:cb4d9db17537	1264	RCC_OscInitStruct->LSEState = RCC_LSE_OFF;
mbed_official	376:cb4d9db17537	1265	}
mbed_official	376:cb4d9db17537	1266
mbed_official	376:cb4d9db17537	1267	/* Get the LSI configuration -----------------------------------------------*/
mbed_official	376:cb4d9db17537	1268	if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION)
mbed_official	376:cb4d9db17537	1269	{
mbed_official	376:cb4d9db17537	1270	RCC_OscInitStruct->LSIState = RCC_LSI_ON;
mbed_official	376:cb4d9db17537	1271	}
mbed_official	376:cb4d9db17537	1272	else
mbed_official	376:cb4d9db17537	1273	{
mbed_official	376:cb4d9db17537	1274	RCC_OscInitStruct->LSIState = RCC_LSI_OFF;
mbed_official	376:cb4d9db17537	1275	}
mbed_official	376:cb4d9db17537	1276
mbed_official	376:cb4d9db17537	1277	/* Get the PLL configuration -----------------------------------------------*/
mbed_official	376:cb4d9db17537	1278	if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON)
mbed_official	376:cb4d9db17537	1279	{
mbed_official	376:cb4d9db17537	1280	RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON;
mbed_official	376:cb4d9db17537	1281	}
mbed_official	376:cb4d9db17537	1282	else
mbed_official	376:cb4d9db17537	1283	{
mbed_official	376:cb4d9db17537	1284	RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF;
mbed_official	376:cb4d9db17537	1285	}
mbed_official	376:cb4d9db17537	1286	RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLSRC);
mbed_official	376:cb4d9db17537	1287	RCC_OscInitStruct->PLL.PLLMUL = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLMUL) >> 18;
mbed_official	376:cb4d9db17537	1288	RCC_OscInitStruct->PLL.PLLDIV = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLDIV) >> 22;
mbed_official	376:cb4d9db17537	1289
mbed_official	376:cb4d9db17537	1290	}
mbed_official	376:cb4d9db17537	1291
mbed_official	376:cb4d9db17537	1292	/**
mbed_official	376:cb4d9db17537	1293	* @brief Configures the RCC_ClkInitStruct according to the internal
mbed_official	376:cb4d9db17537	1294	* RCC configuration registers.
mbed_official	376:cb4d9db17537	1295	* @param RCC_OscInitStruct: pointer to an RCC_ClkInitTypeDef structure that
mbed_official	376:cb4d9db17537	1296	* will be configured.
mbed_official	376:cb4d9db17537	1297	* @param pFLatency: Pointer on the Flash Latency.
mbed_official	376:cb4d9db17537	1298	* @retval None
mbed_official	376:cb4d9db17537	1299	*/
mbed_official	376:cb4d9db17537	1300	void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef RCC_ClkInitStruct, uint32_t pFLatency)
mbed_official	376:cb4d9db17537	1301	{
mbed_official	376:cb4d9db17537	1302	/* Set all possible values for the Clock type parameter --------------------*/
mbed_official	376:cb4d9db17537	1303	RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK \| RCC_CLOCKTYPE_HCLK \| RCC_CLOCKTYPE_PCLK1 \| RCC_CLOCKTYPE_PCLK2;
mbed_official	376:cb4d9db17537	1304
mbed_official	376:cb4d9db17537	1305	/* Get the SYSCLK configuration --------------------------------------------*/
mbed_official	376:cb4d9db17537	1306	RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
mbed_official	376:cb4d9db17537	1307
mbed_official	376:cb4d9db17537	1308	/* Get the HCLK configuration ----------------------------------------------*/
mbed_official	376:cb4d9db17537	1309	RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE);
mbed_official	376:cb4d9db17537	1310
mbed_official	376:cb4d9db17537	1311	/* Get the APB1 configuration ----------------------------------------------*/
mbed_official	376:cb4d9db17537	1312	RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1);
mbed_official	376:cb4d9db17537	1313
mbed_official	376:cb4d9db17537	1314	/* Get the APB2 configuration ----------------------------------------------*/
mbed_official	376:cb4d9db17537	1315	RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3);
mbed_official	376:cb4d9db17537	1316
mbed_official	376:cb4d9db17537	1317	/* Get the Flash Wait State (Latency) configuration ------------------------*/
mbed_official	376:cb4d9db17537	1318	*pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
mbed_official	376:cb4d9db17537	1319	}
mbed_official	376:cb4d9db17537	1320
mbed_official	376:cb4d9db17537	1321	/**
mbed_official	376:cb4d9db17537	1322	* @brief This function handles the RCC CSS interrupt request.
mbed_official	376:cb4d9db17537	1323	* @note This API should be called under the NMI_Handler().
mbed_official	376:cb4d9db17537	1324	* @param None
mbed_official	376:cb4d9db17537	1325	* @retval None
mbed_official	376:cb4d9db17537	1326	*/
mbed_official	376:cb4d9db17537	1327	void HAL_RCC_NMI_IRQHandler(void)
mbed_official	376:cb4d9db17537	1328	{
mbed_official	376:cb4d9db17537	1329	/* Check RCC CSSF flag */
mbed_official	489:119543c9f674	1330	if(__HAL_RCC_GET_IT_SOURCE(RCC_IT_CSS))
mbed_official	376:cb4d9db17537	1331	{
mbed_official	376:cb4d9db17537	1332	/* RCC Clock Security System interrupt user callback */
mbed_official	489:119543c9f674	1333	HAL_RCC_CSSCallback();
mbed_official	376:cb4d9db17537	1334
mbed_official	376:cb4d9db17537	1335	/* Clear RCC CSS pending bit */
mbed_official	376:cb4d9db17537	1336	__HAL_RCC_CLEAR_IT(RCC_IT_CSS);
mbed_official	376:cb4d9db17537	1337	}
mbed_official	376:cb4d9db17537	1338	}
mbed_official	376:cb4d9db17537	1339
mbed_official	376:cb4d9db17537	1340	/**
mbed_official	376:cb4d9db17537	1341	* @brief RCC Clock Security System interrupt callback
mbed_official	376:cb4d9db17537	1342	* @param none
mbed_official	376:cb4d9db17537	1343	* @retval none
mbed_official	376:cb4d9db17537	1344	*/
mbed_official	489:119543c9f674	1345	__weak void HAL_RCC_CSSCallback(void)
mbed_official	376:cb4d9db17537	1346	{
mbed_official	376:cb4d9db17537	1347	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	489:119543c9f674	1348	the HAL_RCC_CSSCallback could be implemented in the user file
mbed_official	376:cb4d9db17537	1349	*/
mbed_official	376:cb4d9db17537	1350	}
mbed_official	376:cb4d9db17537	1351
mbed_official	376:cb4d9db17537	1352	/**
mbed_official	376:cb4d9db17537	1353	* @}
mbed_official	376:cb4d9db17537	1354	*/
mbed_official	376:cb4d9db17537	1355
mbed_official	376:cb4d9db17537	1356	/**
mbed_official	376:cb4d9db17537	1357	* @}
mbed_official	376:cb4d9db17537	1358	*/
mbed_official	376:cb4d9db17537	1359
mbed_official	376:cb4d9db17537	1360	#endif /* HAL_RCC_MODULE_ENABLED */
mbed_official	376:cb4d9db17537	1361	/**
mbed_official	376:cb4d9db17537	1362	* @}
mbed_official	376:cb4d9db17537	1363	*/
mbed_official	376:cb4d9db17537	1364
mbed_official	376:cb4d9db17537	1365	/**
mbed_official	376:cb4d9db17537	1366	* @}
mbed_official	376:cb4d9db17537	1367	*/
mbed_official	376:cb4d9db17537	1368
mbed_official	376:cb4d9db17537	1369	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
mbed_official	489:119543c9f674	1370