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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_adc.h@579:53297373a894, 2015-07-01 (annotated)

Committer:
mbed_official
Date:
Wed Jul 01 09:45:11 2015 +0100
Revision:
579:53297373a894
Parent:
489:119543c9f674 
Synchronized with git revision d5b4d2ab9c47edb4dc5776e7177b0c2263459081



Full URL: https://github.com/mbedmicro/mbed/commit/d5b4d2ab9c47edb4dc5776e7177b0c2263459081/



Initial version of drivers for SAMR21

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 376:cb4d9db17537 1 /**
mbed_official 376:cb4d9db17537 2 ******************************************************************************
mbed_official 376:cb4d9db17537 3 * @file stm32l0xx_hal_adc.h
mbed_official 376:cb4d9db17537 4 * @author MCD Application Team
mbed_official 489:119543c9f674 5 * @version V1.2.0
mbed_official 489:119543c9f674 6 * @date 06-February-2015
mbed_official 376:cb4d9db17537 7 * @brief This file contains all the functions prototypes for the ADC firmware
mbed_official 376:cb4d9db17537 8 * library.
mbed_official 376:cb4d9db17537 9 ******************************************************************************
mbed_official 376:cb4d9db17537 10 * @attention
mbed_official 376:cb4d9db17537 11 *
mbed_official 489:119543c9f674 12 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 376:cb4d9db17537 13 *
mbed_official 376:cb4d9db17537 14 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 376:cb4d9db17537 15 * are permitted provided that the following conditions are met:
mbed_official 376:cb4d9db17537 16 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 376:cb4d9db17537 17 * this list of conditions and the following disclaimer.
mbed_official 376:cb4d9db17537 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 376:cb4d9db17537 19 * this list of conditions and the following disclaimer in the documentation
mbed_official 376:cb4d9db17537 20 * and/or other materials provided with the distribution.
mbed_official 376:cb4d9db17537 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 376:cb4d9db17537 22 * may be used to endorse or promote products derived from this software
mbed_official 376:cb4d9db17537 23 * without specific prior written permission.
mbed_official 376:cb4d9db17537 24 *
mbed_official 376:cb4d9db17537 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 376:cb4d9db17537 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 376:cb4d9db17537 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 376:cb4d9db17537 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 376:cb4d9db17537 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 376:cb4d9db17537 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 376:cb4d9db17537 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 376:cb4d9db17537 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 376:cb4d9db17537 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 376:cb4d9db17537 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 376:cb4d9db17537 35 *
mbed_official 376:cb4d9db17537 36 ******************************************************************************
mbed_official 376:cb4d9db17537 37 */
mbed_official 376:cb4d9db17537 38
mbed_official 376:cb4d9db17537 39 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 376:cb4d9db17537 40 #ifndef __STM32L0xx_ADC_H
mbed_official 376:cb4d9db17537 41 #define __STM32L0xx_ADC_H
mbed_official 376:cb4d9db17537 42
mbed_official 376:cb4d9db17537 43 #ifdef __cplusplus
mbed_official 376:cb4d9db17537 44 extern "C" {
mbed_official 376:cb4d9db17537 45 #endif
mbed_official 376:cb4d9db17537 46
mbed_official 376:cb4d9db17537 47 /* Includes ------------------------------------------------------------------*/
mbed_official 376:cb4d9db17537 48 #include "stm32l0xx_hal_def.h"
mbed_official 376:cb4d9db17537 49
mbed_official 376:cb4d9db17537 50 /** @addtogroup STM32L0xx_HAL_Driver
mbed_official 376:cb4d9db17537 51 * @{
mbed_official 376:cb4d9db17537 52 */
mbed_official 376:cb4d9db17537 53
mbed_official 376:cb4d9db17537 54 /** @addtogroup ADC
mbed_official 376:cb4d9db17537 55 * @{
mbed_official 376:cb4d9db17537 56 */
mbed_official 376:cb4d9db17537 57
mbed_official 376:cb4d9db17537 58 /* Exported types ------------------------------------------------------------*/
mbed_official 376:cb4d9db17537 59 /**
mbed_official 376:cb4d9db17537 60 * @brief HAL State structures definition
mbed_official 376:cb4d9db17537 61 */
mbed_official 376:cb4d9db17537 62 typedef enum
mbed_official 376:cb4d9db17537 63 {
mbed_official 376:cb4d9db17537 64 HAL_ADC_STATE_RESET = 0x00, /*!< ADC not yet initialized or disabled */
mbed_official 376:cb4d9db17537 65 HAL_ADC_STATE_READY = 0x01, /*!< ADC peripheral ready for use */
mbed_official 376:cb4d9db17537 66 HAL_ADC_STATE_BUSY = 0x02, /*!< An internal process is ongoing */
mbed_official 376:cb4d9db17537 67 HAL_ADC_STATE_BUSY_REG = 0x12, /*!< Regular conversion is ongoing */
mbed_official 376:cb4d9db17537 68 HAL_ADC_STATE_TIMEOUT = 0x03, /*!< Timeout state */
mbed_official 376:cb4d9db17537 69 HAL_ADC_STATE_ERROR = 0x04, /*!< ADC state error */
mbed_official 376:cb4d9db17537 70 HAL_ADC_STATE_EOC = 0x05, /*!< Conversion is completed */
mbed_official 376:cb4d9db17537 71 HAL_ADC_STATE_AWD = 0x06, /*!< ADC state analog watchdog */
mbed_official 376:cb4d9db17537 72 }HAL_ADC_StateTypeDef;
mbed_official 376:cb4d9db17537 73
mbed_official 376:cb4d9db17537 74
mbed_official 376:cb4d9db17537 75 /**
mbed_official 376:cb4d9db17537 76 * @brief ADC Oversampler structure definition
mbed_official 376:cb4d9db17537 77 */
mbed_official 376:cb4d9db17537 78 typedef struct
mbed_official 376:cb4d9db17537 79 {
mbed_official 376:cb4d9db17537 80 uint32_t Ratio; /*!< Configures the oversampling ratio.
mbed_official 376:cb4d9db17537 81 This parameter can be a value of @ref ADC_Oversampling_Ratio */
mbed_official 376:cb4d9db17537 82 uint32_t RightBitShift; /*!< Configures the division coefficient for the Oversampler.
mbed_official 376:cb4d9db17537 83 This parameter can be a value of @ref ADC_Right_Bit_Shift */
mbed_official 376:cb4d9db17537 84 uint32_t TriggeredMode; /*!< Selects the regular triggered oversampling mode
mbed_official 376:cb4d9db17537 85 This parameter can be a value of @ref ADC_Triggered_Oversampling_Mode */
mbed_official 376:cb4d9db17537 86
mbed_official 376:cb4d9db17537 87 }ADC_OversamplingTypeDef;
mbed_official 376:cb4d9db17537 88
mbed_official 376:cb4d9db17537 89 /**
mbed_official 376:cb4d9db17537 90 * @brief ADC Init structure definition
mbed_official 376:cb4d9db17537 91 * @note The setting of these parameters with function HAL_ADC_Init() is conditioned by the ADC state.
mbed_official 376:cb4d9db17537 92 * If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed
mbed_official 376:cb4d9db17537 93 * without error reporting (as it can be the expected behaviour in case of intended action to update antother parameter (which fullfills the ADC state condition) on the fly).
mbed_official 376:cb4d9db17537 94 */
mbed_official 376:cb4d9db17537 95 typedef struct
mbed_official 376:cb4d9db17537 96 {
mbed_official 376:cb4d9db17537 97 uint32_t OversamplingMode; /*!< Specifies whether the oversampling feature is enabled or disabled
mbed_official 376:cb4d9db17537 98 This parameter can be set to ENABLE or DISABLE.
mbed_official 376:cb4d9db17537 99 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 376:cb4d9db17537 100 ADC_OversamplingTypeDef Oversample; /*!< Specifies the Oversampling parameters
mbed_official 376:cb4d9db17537 101 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 376:cb4d9db17537 102 uint32_t ClockPrescaler; /*!< Selects the ADC clock frequency.
mbed_official 376:cb4d9db17537 103 This parameter can be a value of @ref ADC_ClockPrescaler
mbed_official 376:cb4d9db17537 104 Note: This parameter can be modified only if ADC is disabled. */
mbed_official 376:cb4d9db17537 105 uint32_t Resolution; /*!< Configures the ADC resolution mode.
mbed_official 376:cb4d9db17537 106 This parameter can be a value of @ref ADC_Resolution
mbed_official 376:cb4d9db17537 107 Note: This parameter can be modified only if ADC is disabled. */
mbed_official 376:cb4d9db17537 108 uint32_t SamplingTime; /*!< The sample time value to be set for all channels.
mbed_official 376:cb4d9db17537 109 This parameter can be a value of @ref ADC_sampling_times
mbed_official 376:cb4d9db17537 110 Note: This parameter can be modified only if there is no conversion ongoing. */
mbed_official 489:119543c9f674 111 uint32_t ScanConvMode; /*!< The scan sequence direction.
mbed_official 489:119543c9f674 112 This parameter can be a value of @ref ADC_Scan_mode
mbed_official 376:cb4d9db17537 113 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 376:cb4d9db17537 114 uint32_t DataAlign; /*!< Specifies whether the ADC data alignment is left or right.
mbed_official 376:cb4d9db17537 115 This parameter can be a value of @ref ADC_data_align
mbed_official 376:cb4d9db17537 116 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 376:cb4d9db17537 117 uint32_t ContinuousConvMode; /*!< Specifies whether the conversion is performed in Continuous or Single mode.
mbed_official 376:cb4d9db17537 118 This parameter can be set to ENABLE or DISABLE.
mbed_official 376:cb4d9db17537 119 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 376:cb4d9db17537 120 uint32_t DiscontinuousConvMode; /*!< Specifies whether the conversion is performed
mbed_official 376:cb4d9db17537 121 in Complete-sequence/Discontinuous-sequence.
mbed_official 376:cb4d9db17537 122 Discontinuous mode can be enabled only if continuous mode is disabled.
mbed_official 376:cb4d9db17537 123 This parameter can be set to ENABLE or DISABLE.
mbed_official 376:cb4d9db17537 124 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 376:cb4d9db17537 125 uint32_t ExternalTrigConvEdge; /*!< Select the external trigger edge and enable the trigger.
mbed_official 489:119543c9f674 126 This parameter can be a value of @ref ADC_Regular_External_Trigger_Source_Edge
mbed_official 376:cb4d9db17537 127 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 376:cb4d9db17537 128 uint32_t ExternalTrigConv; /*!< Select the external event used to trigger the start of conversion.
mbed_official 376:cb4d9db17537 129 This parameter can be a value of @ref ADC_External_trigger_Source
mbed_official 376:cb4d9db17537 130 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 376:cb4d9db17537 131 uint32_t DMAContinuousRequests; /*!< Specifies whether the DMA requests are performed in one shot mode (DMA transfer stop when number of conversions is reached)
mbed_official 376:cb4d9db17537 132 or in Continuous mode (DMA transfer unlimited, whatever number of conversions).
mbed_official 376:cb4d9db17537 133 Note: In continuous mode, DMA must be configured in circular mode. Otherwise an overrun will be triggered when DMA buffer max pointer is reached.
mbed_official 376:cb4d9db17537 134 This parameter can be set to ENABLE or DISABLE.
mbed_official 376:cb4d9db17537 135 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 376:cb4d9db17537 136 uint32_t EOCSelection; /*!< Specifies what EOC (End Of Conversion) flag is used for conversion polling and interruption:
mbed_official 376:cb4d9db17537 137 end of single channel conversion or end of channels conversions sequence.
mbed_official 376:cb4d9db17537 138 This parameter can be a value of @ref ADC_EOCSelection */
mbed_official 376:cb4d9db17537 139 uint32_t Overrun; /*!< Select the behaviour in case of overrun: data preserved or overwritten
mbed_official 376:cb4d9db17537 140 This parameter has an effect on regular channels only, including in DMA mode.
mbed_official 376:cb4d9db17537 141 This parameter can be a value of @ref ADC_Overrun
mbed_official 376:cb4d9db17537 142 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 376:cb4d9db17537 143 uint32_t LowPowerAutoWait; /*!< Specifies the usage of dynamic low power Auto Delay: new conversion start only
mbed_official 376:cb4d9db17537 144 when the previous conversion (for regular channel) is completed.
mbed_official 376:cb4d9db17537 145 This avoids risk of overrun for low frequency application.
mbed_official 376:cb4d9db17537 146 This parameter can be set to ENABLE or DISABLE.
mbed_official 376:cb4d9db17537 147 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 376:cb4d9db17537 148 uint32_t LowPowerFrequencyMode; /*!< When selecting an analog ADC clock frequency lower than 2.8MHz,
mbed_official 376:cb4d9db17537 149 it is mandatory to first enable the Low Frequency Mode.
mbed_official 376:cb4d9db17537 150 This parameter can be set to ENABLE or DISABLE.
mbed_official 376:cb4d9db17537 151 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 489:119543c9f674 152 uint32_t LowPowerAutoPowerOff; /*!< When setting the AutoOff feature, the ADC is always powered off when not converting and automatically
mbed_official 376:cb4d9db17537 153 wakes-up when a conversion is started (by software or hardware trigger).
mbed_official 376:cb4d9db17537 154 This parameter can be set to ENABLE or DISABLE.
mbed_official 376:cb4d9db17537 155 Note: This parameter can be modified only if there is no conversion is ongoing. */
mbed_official 376:cb4d9db17537 156 }ADC_InitTypeDef;
mbed_official 376:cb4d9db17537 157
mbed_official 376:cb4d9db17537 158 /**
mbed_official 376:cb4d9db17537 159 * @brief ADC handle Structure definition
mbed_official 376:cb4d9db17537 160 */
mbed_official 376:cb4d9db17537 161 typedef struct __ADC_HandleTypeDef
mbed_official 376:cb4d9db17537 162 {
mbed_official 376:cb4d9db17537 163 ADC_TypeDef *Instance; /*!< Register base address */
mbed_official 376:cb4d9db17537 164
mbed_official 376:cb4d9db17537 165 ADC_InitTypeDef Init; /*!< ADC required parameters */
mbed_official 376:cb4d9db17537 166
mbed_official 376:cb4d9db17537 167 DMA_HandleTypeDef *DMA_Handle; /*!< Pointer DMA Handler */
mbed_official 376:cb4d9db17537 168
mbed_official 376:cb4d9db17537 169 HAL_LockTypeDef Lock; /*!< ADC locking object */
mbed_official 376:cb4d9db17537 170
mbed_official 376:cb4d9db17537 171 __IO HAL_ADC_StateTypeDef State; /*!< ADC communication state */
mbed_official 376:cb4d9db17537 172
mbed_official 376:cb4d9db17537 173 __IO uint32_t ErrorCode; /*!< ADC Error code */
mbed_official 376:cb4d9db17537 174 }ADC_HandleTypeDef;
mbed_official 376:cb4d9db17537 175
mbed_official 376:cb4d9db17537 176 /**
mbed_official 376:cb4d9db17537 177 * @brief ADC Configuration regular Channel structure definition
mbed_official 376:cb4d9db17537 178 */
mbed_official 376:cb4d9db17537 179 typedef struct
mbed_official 376:cb4d9db17537 180 {
mbed_official 376:cb4d9db17537 181 uint32_t Channel; /*!< the ADC channel to configure
mbed_official 376:cb4d9db17537 182 This parameter can be a value of @ref ADC_channels */
mbed_official 376:cb4d9db17537 183 }ADC_ChannelConfTypeDef;
mbed_official 376:cb4d9db17537 184
mbed_official 376:cb4d9db17537 185
mbed_official 376:cb4d9db17537 186 /**
mbed_official 376:cb4d9db17537 187 * @brief ADC Configuration analog watchdog definition
mbed_official 376:cb4d9db17537 188 */
mbed_official 376:cb4d9db17537 189 typedef struct
mbed_official 376:cb4d9db17537 190 {
mbed_official 376:cb4d9db17537 191 uint32_t WatchdogMode; /*!< Configures the ADC analog watchdog mode: single/all channels.
mbed_official 376:cb4d9db17537 192 This parameter can be a value of @ref ADC_analog_watchdog_mode */
mbed_official 376:cb4d9db17537 193 uint32_t Channel; /*!< Selects which ADC channel to monitor by analog watchdog.
mbed_official 376:cb4d9db17537 194 This parameter has an effect only if watchdog mode is configured on single channel (parameter WatchdogMode)
mbed_official 376:cb4d9db17537 195 This parameter can be a value of @ref ADC_channels */
mbed_official 376:cb4d9db17537 196 uint32_t ITMode; /*!< Specifies whether the analog watchdog is configured in interrupt or polling mode.
mbed_official 376:cb4d9db17537 197 This parameter can be set to ENABLE or DISABLE */
mbed_official 376:cb4d9db17537 198 uint32_t HighThreshold; /*!< Configures the ADC analog watchdog High threshold value.
mbed_official 376:cb4d9db17537 199 Depending of ADC resolution selected (12, 10, 8 or 6 bits),
mbed_official 376:cb4d9db17537 200 this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
mbed_official 376:cb4d9db17537 201 uint32_t LowThreshold; /*!< Configures the ADC analog watchdog High threshold value.
mbed_official 376:cb4d9db17537 202 Depending of ADC resolution selected (12, 10, 8 or 6 bits),
mbed_official 376:cb4d9db17537 203 this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
mbed_official 376:cb4d9db17537 204 }ADC_AnalogWDGConfTypeDef;
mbed_official 376:cb4d9db17537 205
mbed_official 376:cb4d9db17537 206
mbed_official 376:cb4d9db17537 207 /* Exported constants --------------------------------------------------------*/
mbed_official 376:cb4d9db17537 208
mbed_official 376:cb4d9db17537 209 /** @defgroup ADC_Exported_Constants
mbed_official 376:cb4d9db17537 210 * @{
mbed_official 376:cb4d9db17537 211 */
mbed_official 376:cb4d9db17537 212
mbed_official 376:cb4d9db17537 213 /** @defgroup ADC_Error_Code
mbed_official 376:cb4d9db17537 214 * @{
mbed_official 376:cb4d9db17537 215 */
mbed_official 376:cb4d9db17537 216 #define HAL_ADC_ERROR_NONE ((uint32_t)0x00) /*!< No error */
mbed_official 376:cb4d9db17537 217 #define HAL_ADC_ERROR_INTERNAL ((uint32_t)0x01) /*!< ADC IP internal error: if problem of clocking,
mbed_official 376:cb4d9db17537 218 enable/disable, erroneous state */
mbed_official 489:119543c9f674 219 #define HAL_ADC_ERROR_OVR ((uint32_t)0x02) /*!< OVR error */
mbed_official 489:119543c9f674 220 #define HAL_ADC_ERROR_DMA ((uint32_t)0x03) /*!< DMA transfer error */
mbed_official 376:cb4d9db17537 221 /**
mbed_official 376:cb4d9db17537 222 * @}
mbed_official 376:cb4d9db17537 223 */
mbed_official 376:cb4d9db17537 224
mbed_official 376:cb4d9db17537 225 /** @defgroup ADC_TimeOut_Values
mbed_official 376:cb4d9db17537 226 * @{
mbed_official 376:cb4d9db17537 227 */
mbed_official 376:cb4d9db17537 228
mbed_official 376:cb4d9db17537 229 /* Fixed timeout values for ADC calibration, enable settling time, disable */
mbed_official 376:cb4d9db17537 230 /* settling time. */
mbed_official 376:cb4d9db17537 231 /* Values defined to be higher than worst cases: low clocks freq, */
mbed_official 376:cb4d9db17537 232 /* maximum prescalers. */
mbed_official 376:cb4d9db17537 233 /* Unit: ms */
mbed_official 376:cb4d9db17537 234 #define ADC_ENABLE_TIMEOUT 10
mbed_official 376:cb4d9db17537 235 #define ADC_DISABLE_TIMEOUT 10
mbed_official 376:cb4d9db17537 236 #define ADC_STOP_CONVERSION_TIMEOUT 10
mbed_official 376:cb4d9db17537 237
mbed_official 376:cb4d9db17537 238 /* Delay of 10us fixed to worst case: maximum CPU frequency 180MHz to have */
mbed_official 376:cb4d9db17537 239 /* the minimum number of CPU cycles to fulfill this delay */
mbed_official 376:cb4d9db17537 240 #define ADC_DELAY_10US_MIN_CPU_CYCLES 1800
mbed_official 376:cb4d9db17537 241 /**
mbed_official 376:cb4d9db17537 242 * @}
mbed_official 376:cb4d9db17537 243 */
mbed_official 376:cb4d9db17537 244
mbed_official 376:cb4d9db17537 245 /** @defgroup ADC_ClockPrescaler
mbed_official 376:cb4d9db17537 246 * @{
mbed_official 376:cb4d9db17537 247 */
mbed_official 376:cb4d9db17537 248 #define ADC_CLOCK_ASYNC_DIV1 ((uint32_t)0x00000000) /*!< ADC Asynchronous clock mode divided by 1 */
mbed_official 376:cb4d9db17537 249 #define ADC_CLOCK_ASYNC_DIV2 (ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
mbed_official 376:cb4d9db17537 250 #define ADC_CLOCK_ASYNC_DIV4 (ADC_CCR_PRESC_1) /*!< ADC Asynchronous clock mode divided by 2 */
mbed_official 376:cb4d9db17537 251 #define ADC_CLOCK_ASYNC_DIV6 (ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
mbed_official 376:cb4d9db17537 252 #define ADC_CLOCK_ASYNC_DIV8 (ADC_CCR_PRESC_2) /*!< ADC Asynchronous clock mode divided by 2 */
mbed_official 376:cb4d9db17537 253 #define ADC_CLOCK_ASYNC_DIV10 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
mbed_official 376:cb4d9db17537 254 #define ADC_CLOCK_ASYNC_DIV12 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1) /*!< ADC Asynchronous clock mode divided by 2 */
mbed_official 376:cb4d9db17537 255 #define ADC_CLOCK_ASYNC_DIV16 (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
mbed_official 376:cb4d9db17537 256 #define ADC_CLOCK_ASYNC_DIV32 (ADC_CCR_PRESC_3) /*!< ADC Asynchronous clock mode divided by 2 */
mbed_official 376:cb4d9db17537 257 #define ADC_CLOCK_ASYNC_DIV64 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
mbed_official 376:cb4d9db17537 258 #define ADC_CLOCK_ASYNC_DIV128 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1) /*!< ADC Asynchronous clock mode divided by 2 */
mbed_official 376:cb4d9db17537 259 #define ADC_CLOCK_ASYNC_DIV256 (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*!< ADC Asynchronous clock mode divided by 2 */
mbed_official 376:cb4d9db17537 260
mbed_official 489:119543c9f674 261 #define ADC_CLOCK_SYNC_PCLK_DIV1 ((uint32_t)ADC_CFGR2_CKMODE_0) /*!< Synchronous clock mode divided by 1
mbed_official 489:119543c9f674 262 This configuration must be enabled only if PCLK has a 50%
mbed_official 489:119543c9f674 263 duty clock cycle (APB prescaler configured inside the RCC must be bypassed and the system clock
mbed_official 489:119543c9f674 264 must by 50% duty cycle)*/
mbed_official 489:119543c9f674 265 #define ADC_CLOCK_SYNC_PCLK_DIV2 ((uint32_t)ADC_CFGR2_CKMODE_1) /*!< Synchronous clock mode divided by 2 */
mbed_official 489:119543c9f674 266 #define ADC_CLOCK_SYNC_PCLK_DIV4 ((uint32_t)ADC_CFGR2_CKMODE) /*!< Synchronous clock mode divided by 4 */
mbed_official 376:cb4d9db17537 267
mbed_official 376:cb4d9db17537 268 #define IS_ADC_CLOCKPRESCALER(ADC_CLOCK) (((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV1) ||\
mbed_official 489:119543c9f674 269 ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV1) ||\
mbed_official 489:119543c9f674 270 ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV2) ||\
mbed_official 489:119543c9f674 271 ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV4) ||\
mbed_official 376:cb4d9db17537 272 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV1 ) ||\
mbed_official 376:cb4d9db17537 273 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV2 ) ||\
mbed_official 376:cb4d9db17537 274 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV4 ) ||\
mbed_official 376:cb4d9db17537 275 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV6 ) ||\
mbed_official 376:cb4d9db17537 276 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV8 ) ||\
mbed_official 376:cb4d9db17537 277 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV10 ) ||\
mbed_official 376:cb4d9db17537 278 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV12 ) ||\
mbed_official 376:cb4d9db17537 279 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV16 ) ||\
mbed_official 376:cb4d9db17537 280 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV32 ) ||\
mbed_official 376:cb4d9db17537 281 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV64 ) ||\
mbed_official 376:cb4d9db17537 282 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV128 ) ||\
mbed_official 376:cb4d9db17537 283 ((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV256))
mbed_official 376:cb4d9db17537 284 /**
mbed_official 376:cb4d9db17537 285 * @}
mbed_official 376:cb4d9db17537 286 */
mbed_official 376:cb4d9db17537 287
mbed_official 376:cb4d9db17537 288 /** @defgroup ADC_Resolution
mbed_official 376:cb4d9db17537 289 * @{
mbed_official 376:cb4d9db17537 290 */
mbed_official 489:119543c9f674 291 #define ADC_RESOLUTION_12B ((uint32_t)0x00000000) /*!< ADC 12-bit resolution */
mbed_official 489:119543c9f674 292 #define ADC_RESOLUTION_10B ((uint32_t)ADC_CFGR1_RES_0) /*!< ADC 10-bit resolution */
mbed_official 489:119543c9f674 293 #define ADC_RESOLUTION_8B ((uint32_t)ADC_CFGR1_RES_1) /*!< ADC 8-bit resolution */
mbed_official 489:119543c9f674 294 #define ADC_RESOLUTION_6B ((uint32_t)ADC_CFGR1_RES) /*!< ADC 6-bit resolution */
mbed_official 376:cb4d9db17537 295
mbed_official 489:119543c9f674 296 #define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_RESOLUTION_12B) || \
mbed_official 489:119543c9f674 297 ((RESOLUTION) == ADC_RESOLUTION_10B) || \
mbed_official 489:119543c9f674 298 ((RESOLUTION) == ADC_RESOLUTION_8B) || \
mbed_official 489:119543c9f674 299 ((RESOLUTION) == ADC_RESOLUTION_6B))
mbed_official 376:cb4d9db17537 300
mbed_official 489:119543c9f674 301 #define IS_ADC_RESOLUTION_8_6_BITS(RESOLUTION) (((RESOLUTION) == ADC_RESOLUTION_8B) || \
mbed_official 489:119543c9f674 302 ((RESOLUTION) == ADC_RESOLUTION_6B))
mbed_official 376:cb4d9db17537 303 /**
mbed_official 376:cb4d9db17537 304 * @}
mbed_official 376:cb4d9db17537 305 */
mbed_official 376:cb4d9db17537 306
mbed_official 376:cb4d9db17537 307 /** @defgroup ADC_data_align
mbed_official 376:cb4d9db17537 308 * @{
mbed_official 376:cb4d9db17537 309 */
mbed_official 376:cb4d9db17537 310 #define ADC_DATAALIGN_RIGHT ((uint32_t)0x00000000)
mbed_official 376:cb4d9db17537 311 #define ADC_DATAALIGN_LEFT ((uint32_t)ADC_CFGR1_ALIGN)
mbed_official 376:cb4d9db17537 312
mbed_official 376:cb4d9db17537 313 #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DATAALIGN_RIGHT) || \
mbed_official 376:cb4d9db17537 314 ((ALIGN) == ADC_DATAALIGN_LEFT))
mbed_official 376:cb4d9db17537 315 /**
mbed_official 376:cb4d9db17537 316 * @}
mbed_official 376:cb4d9db17537 317 */
mbed_official 376:cb4d9db17537 318
mbed_official 489:119543c9f674 319 /** @defgroup ADC_Regular_External_Trigger_Source_Edge ADC External Trigger Source Edge for Regular Group
mbed_official 376:cb4d9db17537 320 * @{
mbed_official 376:cb4d9db17537 321 */
mbed_official 489:119543c9f674 322 #define ADC_EXTERNALTRIGCONVEDGE_NONE ((uint32_t)0x00000000)
mbed_official 489:119543c9f674 323 #define ADC_EXTERNALTRIGCONVEDGE_RISING ((uint32_t)ADC_CFGR1_EXTEN_0)
mbed_official 489:119543c9f674 324 #define ADC_EXTERNALTRIGCONVEDGE_FALLING ((uint32_t)ADC_CFGR1_EXTEN_1)
mbed_official 489:119543c9f674 325 #define ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING ((uint32_t)ADC_CFGR1_EXTEN)
mbed_official 376:cb4d9db17537 326
mbed_official 489:119543c9f674 327 #define IS_ADC_EXTTRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGCONVEDGE_NONE) || \
mbed_official 489:119543c9f674 328 ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISING) || \
mbed_official 489:119543c9f674 329 ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_FALLING) || \
mbed_official 489:119543c9f674 330 ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING))
mbed_official 376:cb4d9db17537 331 /**
mbed_official 376:cb4d9db17537 332 * @}
mbed_official 376:cb4d9db17537 333 */
mbed_official 376:cb4d9db17537 334
mbed_official 376:cb4d9db17537 335 /** @defgroup ADC_External_trigger_Source
mbed_official 376:cb4d9db17537 336 * @{
mbed_official 376:cb4d9db17537 337 */
mbed_official 489:119543c9f674 338 #define ADC_EXTERNALTRIGCONV_T6_TRGO ((uint32_t)0x00000000)
mbed_official 489:119543c9f674 339 #define ADC_EXTERNALTRIGCONV_T21_CC2 ADC_CFGR1_EXTSEL_0
mbed_official 489:119543c9f674 340 #define ADC_EXTERNALTRIGCONV_T2_TRGO ADC_CFGR1_EXTSEL_1
mbed_official 489:119543c9f674 341 #define ADC_EXTERNALTRIGCONV_T2_CC4 ((uint32_t)0x000000C0)
mbed_official 489:119543c9f674 342 #define ADC_EXTERNALTRIGCONV_T22_TRGO ADC_CFGR1_EXTSEL_2
mbed_official 489:119543c9f674 343 #define ADC_EXTERNALTRIGCONV_EXT_IT11 ADC_CFGR1_EXTSEL
mbed_official 376:cb4d9db17537 344
mbed_official 489:119543c9f674 345 #define IS_ADC_EXTERNAL_TRIG_CONV(CONV) (((CONV) == ADC_EXTERNALTRIGCONV_T6_TRGO ) || \
mbed_official 489:119543c9f674 346 ((CONV) == ADC_EXTERNALTRIGCONV_T21_CC2 ) || \
mbed_official 489:119543c9f674 347 ((CONV) == ADC_EXTERNALTRIGCONV_T2_TRGO ) || \
mbed_official 489:119543c9f674 348 ((CONV) == ADC_EXTERNALTRIGCONV_T2_CC4 ) || \
mbed_official 489:119543c9f674 349 ((CONV) == ADC_EXTERNALTRIGCONV_T22_TRGO ) || \
mbed_official 489:119543c9f674 350 ((CONV) == ADC_EXTERNALTRIGCONV_EXT_IT11 ))
mbed_official 376:cb4d9db17537 351
mbed_official 376:cb4d9db17537 352 /**
mbed_official 376:cb4d9db17537 353 * @}
mbed_official 376:cb4d9db17537 354 */
mbed_official 376:cb4d9db17537 355
mbed_official 376:cb4d9db17537 356 /** @defgroup ADC_EOCSelection
mbed_official 376:cb4d9db17537 357 * @{
mbed_official 376:cb4d9db17537 358 */
mbed_official 489:119543c9f674 359 #define ADC_EOC_SINGLE_CONV ((uint32_t) ADC_ISR_EOC)
mbed_official 489:119543c9f674 360 #define ADC_EOC_SEQ_CONV ((uint32_t) ADC_ISR_EOS)
mbed_official 489:119543c9f674 361 #define ADC_EOC_SINGLE_SEQ_CONV ((uint32_t)(ADC_ISR_EOC | ADC_ISR_EOS)) /*!< reserved for future use */
mbed_official 376:cb4d9db17537 362
mbed_official 489:119543c9f674 363 #define IS_ADC_EOC_SELECTION(EOC_SELECTION) (((EOC_SELECTION) == ADC_EOC_SINGLE_CONV) || \
mbed_official 489:119543c9f674 364 ((EOC_SELECTION) == ADC_EOC_SEQ_CONV) || \
mbed_official 489:119543c9f674 365 ((EOC_SELECTION) == ADC_EOC_SINGLE_SEQ_CONV))
mbed_official 376:cb4d9db17537 366 /**
mbed_official 376:cb4d9db17537 367 * @}
mbed_official 376:cb4d9db17537 368 */
mbed_official 376:cb4d9db17537 369
mbed_official 376:cb4d9db17537 370 /** @defgroup ADC_Overrun
mbed_official 376:cb4d9db17537 371 * @{
mbed_official 376:cb4d9db17537 372 */
mbed_official 489:119543c9f674 373 #define ADC_OVR_DATA_PRESERVED ((uint32_t)0x00000000)
mbed_official 489:119543c9f674 374 #define ADC_OVR_DATA_OVERWRITTEN ((uint32_t)ADC_CFGR1_OVRMOD)
mbed_official 376:cb4d9db17537 375
mbed_official 489:119543c9f674 376 #define IS_ADC_OVERRUN(OVR) (((OVR) == ADC_OVR_DATA_PRESERVED) || \
mbed_official 489:119543c9f674 377 ((OVR) == ADC_OVR_DATA_OVERWRITTEN))
mbed_official 376:cb4d9db17537 378 /**
mbed_official 376:cb4d9db17537 379 * @}
mbed_official 376:cb4d9db17537 380 */
mbed_official 376:cb4d9db17537 381
mbed_official 376:cb4d9db17537 382 /** @defgroup ADC_channels
mbed_official 376:cb4d9db17537 383 * @{
mbed_official 376:cb4d9db17537 384 */
mbed_official 376:cb4d9db17537 385 #define ADC_CHANNEL_0 ((uint32_t)(ADC_CHSELR_CHSEL0))
mbed_official 376:cb4d9db17537 386 #define ADC_CHANNEL_1 ((uint32_t)(ADC_CHSELR_CHSEL1) | ADC_CFGR1_AWDCH_0)
mbed_official 376:cb4d9db17537 387 #define ADC_CHANNEL_2 ((uint32_t)(ADC_CHSELR_CHSEL2) | ADC_CFGR1_AWDCH_1)
mbed_official 376:cb4d9db17537 388 #define ADC_CHANNEL_3 ((uint32_t)(ADC_CHSELR_CHSEL3)| ADC_CFGR1_AWDCH_1 | ADC_CFGR1_AWDCH_0)
mbed_official 376:cb4d9db17537 389 #define ADC_CHANNEL_4 ((uint32_t)(ADC_CHSELR_CHSEL4)| ADC_CFGR1_AWDCH_2)
mbed_official 376:cb4d9db17537 390 #define ADC_CHANNEL_5 ((uint32_t)(ADC_CHSELR_CHSEL5)| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_0)
mbed_official 376:cb4d9db17537 391 #define ADC_CHANNEL_6 ((uint32_t)(ADC_CHSELR_CHSEL6)| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1)
mbed_official 376:cb4d9db17537 392 #define ADC_CHANNEL_7 ((uint32_t)(ADC_CHSELR_CHSEL7)| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1 | ADC_CFGR1_AWDCH_0)
mbed_official 376:cb4d9db17537 393 #define ADC_CHANNEL_8 ((uint32_t)(ADC_CHSELR_CHSEL8)| ADC_CFGR1_AWDCH_3)
mbed_official 376:cb4d9db17537 394 #define ADC_CHANNEL_9 ((uint32_t)(ADC_CHSELR_CHSEL9)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_0)
mbed_official 376:cb4d9db17537 395 #define ADC_CHANNEL_10 ((uint32_t)(ADC_CHSELR_CHSEL10)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_1)
mbed_official 376:cb4d9db17537 396 #define ADC_CHANNEL_11 ((uint32_t)(ADC_CHSELR_CHSEL11)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_1| ADC_CFGR1_AWDCH_0)
mbed_official 376:cb4d9db17537 397 #define ADC_CHANNEL_12 ((uint32_t)(ADC_CHSELR_CHSEL12)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2)
mbed_official 376:cb4d9db17537 398 #define ADC_CHANNEL_13 ((uint32_t)(ADC_CHSELR_CHSEL13)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_0)
mbed_official 376:cb4d9db17537 399 #define ADC_CHANNEL_14 ((uint32_t)(ADC_CHSELR_CHSEL14)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1)
mbed_official 376:cb4d9db17537 400 #define ADC_CHANNEL_15 ((uint32_t)(ADC_CHSELR_CHSEL15)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_1| ADC_CFGR1_AWDCH_0)
mbed_official 376:cb4d9db17537 401 #define ADC_CHANNEL_16 ((uint32_t)(ADC_CHSELR_CHSEL16)| ADC_CFGR1_AWDCH_4)
mbed_official 376:cb4d9db17537 402 #define ADC_CHANNEL_17 ((uint32_t)(ADC_CHSELR_CHSEL17)| ADC_CFGR1_AWDCH_4| ADC_CFGR1_AWDCH_0)
mbed_official 376:cb4d9db17537 403 #define ADC_CHANNEL_18 ((uint32_t)(ADC_CHSELR_CHSEL18)| ADC_CFGR1_AWDCH_4| ADC_CFGR1_AWDCH_1)
mbed_official 376:cb4d9db17537 404
mbed_official 376:cb4d9db17537 405 /* Internal channels */
mbed_official 376:cb4d9db17537 406 #define ADC_CHANNEL_VLCD ADC_CHANNEL_16
mbed_official 376:cb4d9db17537 407 #define ADC_CHANNEL_VREFINT ADC_CHANNEL_17
mbed_official 376:cb4d9db17537 408 #define ADC_CHANNEL_TEMPSENSOR ADC_CHANNEL_18
mbed_official 376:cb4d9db17537 409
mbed_official 376:cb4d9db17537 410
mbed_official 376:cb4d9db17537 411 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_CHANNEL_0) || \
mbed_official 376:cb4d9db17537 412 ((CHANNEL) == ADC_CHANNEL_1) || \
mbed_official 376:cb4d9db17537 413 ((CHANNEL) == ADC_CHANNEL_2) || \
mbed_official 376:cb4d9db17537 414 ((CHANNEL) == ADC_CHANNEL_3) || \
mbed_official 376:cb4d9db17537 415 ((CHANNEL) == ADC_CHANNEL_4) || \
mbed_official 376:cb4d9db17537 416 ((CHANNEL) == ADC_CHANNEL_5) || \
mbed_official 376:cb4d9db17537 417 ((CHANNEL) == ADC_CHANNEL_6) || \
mbed_official 376:cb4d9db17537 418 ((CHANNEL) == ADC_CHANNEL_7) || \
mbed_official 376:cb4d9db17537 419 ((CHANNEL) == ADC_CHANNEL_8) || \
mbed_official 376:cb4d9db17537 420 ((CHANNEL) == ADC_CHANNEL_9) || \
mbed_official 376:cb4d9db17537 421 ((CHANNEL) == ADC_CHANNEL_10) || \
mbed_official 376:cb4d9db17537 422 ((CHANNEL) == ADC_CHANNEL_11) || \
mbed_official 376:cb4d9db17537 423 ((CHANNEL) == ADC_CHANNEL_12) || \
mbed_official 376:cb4d9db17537 424 ((CHANNEL) == ADC_CHANNEL_13) || \
mbed_official 376:cb4d9db17537 425 ((CHANNEL) == ADC_CHANNEL_14) || \
mbed_official 376:cb4d9db17537 426 ((CHANNEL) == ADC_CHANNEL_15) || \
mbed_official 376:cb4d9db17537 427 ((CHANNEL) == ADC_CHANNEL_TEMPSENSOR) || \
mbed_official 376:cb4d9db17537 428 ((CHANNEL) == ADC_CHANNEL_VREFINT) || \
mbed_official 376:cb4d9db17537 429 ((CHANNEL) == ADC_CHANNEL_VLCD))
mbed_official 376:cb4d9db17537 430
mbed_official 376:cb4d9db17537 431 /**
mbed_official 376:cb4d9db17537 432 * @}
mbed_official 376:cb4d9db17537 433 */
mbed_official 376:cb4d9db17537 434
mbed_official 376:cb4d9db17537 435 /** @defgroup ADC_Channel_AWD_Masks
mbed_official 376:cb4d9db17537 436 * @{
mbed_official 376:cb4d9db17537 437 */
mbed_official 376:cb4d9db17537 438 #define ADC_CHANNEL_MASK ((uint32_t)0x0007FFFF)
mbed_official 376:cb4d9db17537 439 #define ADC_CHANNEL_AWD_MASK ((uint32_t)0x7C000000)
mbed_official 376:cb4d9db17537 440 /**
mbed_official 376:cb4d9db17537 441 * @}
mbed_official 376:cb4d9db17537 442 */
mbed_official 376:cb4d9db17537 443
mbed_official 376:cb4d9db17537 444
mbed_official 376:cb4d9db17537 445 /** @defgroup ADC_sampling_times
mbed_official 376:cb4d9db17537 446 * @{
mbed_official 376:cb4d9db17537 447 */
mbed_official 376:cb4d9db17537 448
mbed_official 376:cb4d9db17537 449 #define ADC_SAMPLETIME_1CYCLE_5 ((uint32_t)0x00000000) /*!< ADC sampling time 1.5 cycle */
mbed_official 376:cb4d9db17537 450 #define ADC_SAMPLETIME_7CYCLES_5 ((uint32_t)ADC_SMPR_SMPR_0) /*!< ADC sampling time 7.5 CYCLES */
mbed_official 376:cb4d9db17537 451 #define ADC_SAMPLETIME_13CYCLES_5 ((uint32_t)ADC_SMPR_SMPR_1) /*!< ADC sampling time 13.5 CYCLES */
mbed_official 376:cb4d9db17537 452 #define ADC_SAMPLETIME_28CYCLES_5 ((uint32_t)(ADC_SMPR_SMPR_1 | ADC_SMPR_SMPR_0)) /*!< ADC sampling time 28.5 CYCLES */
mbed_official 376:cb4d9db17537 453 #define ADC_SAMPLETIME_41CYCLES_5 ((uint32_t)ADC_SMPR_SMPR_2) /*!< ADC sampling time 41.5 CYCLES */
mbed_official 376:cb4d9db17537 454 #define ADC_SAMPLETIME_55CYCLES_5 ((uint32_t)(ADC_SMPR_SMPR_2 | ADC_SMPR_SMPR_0)) /*!< ADC sampling time 55.5 CYCLES */
mbed_official 376:cb4d9db17537 455 #define ADC_SAMPLETIME_71CYCLES_5 ((uint32_t)(ADC_SMPR_SMPR_2 | ADC_SMPR_SMPR_1)) /*!< ADC sampling time 71.5 CYCLES */
mbed_official 376:cb4d9db17537 456 #define ADC_SAMPLETIME_239CYCLES_5 ((uint32_t)ADC_SMPR_SMPR) /*!< ADC sampling time 239.5 CYCLES */
mbed_official 376:cb4d9db17537 457
mbed_official 376:cb4d9db17537 458 #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SAMPLETIME_1CYCLE_5 ) || \
mbed_official 376:cb4d9db17537 459 ((TIME) == ADC_SAMPLETIME_7CYCLES_5 ) || \
mbed_official 376:cb4d9db17537 460 ((TIME) == ADC_SAMPLETIME_13CYCLES_5 ) || \
mbed_official 376:cb4d9db17537 461 ((TIME) == ADC_SAMPLETIME_28CYCLES_5 ) || \
mbed_official 376:cb4d9db17537 462 ((TIME) == ADC_SAMPLETIME_41CYCLES_5 ) || \
mbed_official 376:cb4d9db17537 463 ((TIME) == ADC_SAMPLETIME_55CYCLES_5 ) || \
mbed_official 376:cb4d9db17537 464 ((TIME) == ADC_SAMPLETIME_71CYCLES_5 ) || \
mbed_official 376:cb4d9db17537 465 ((TIME) == ADC_SAMPLETIME_239CYCLES_5))
mbed_official 376:cb4d9db17537 466 /**
mbed_official 376:cb4d9db17537 467 * @}
mbed_official 376:cb4d9db17537 468 */
mbed_official 376:cb4d9db17537 469
mbed_official 489:119543c9f674 470
mbed_official 489:119543c9f674 471 /** @defgroup ADC_Scan_mode ADC Scan mode
mbed_official 376:cb4d9db17537 472 * @{
mbed_official 489:119543c9f674 473 */
mbed_official 489:119543c9f674 474 /* Note: Scan mode values must be compatible with other STM32 devices having */
mbed_official 489:119543c9f674 475 /* a configurable sequencer. */
mbed_official 489:119543c9f674 476 /* Scan direction setting values are defined by taking in account */
mbed_official 489:119543c9f674 477 /* already defined values for other STM32 devices: */
mbed_official 489:119543c9f674 478 /* ADC_SCAN_DISABLE ((uint32_t)0x00000000) */
mbed_official 489:119543c9f674 479 /* ADC_SCAN_ENABLE ((uint32_t)0x00000001) */
mbed_official 489:119543c9f674 480 /* Scan direction forward is considered as default setting equivalent */
mbed_official 489:119543c9f674 481 /* to scan enable. */
mbed_official 489:119543c9f674 482 /* Scan direction backward is considered as additional setting. */
mbed_official 489:119543c9f674 483 /* In case of migration from another STM32 device, the user will be */
mbed_official 489:119543c9f674 484 /* warned of change of setting choices with assert check. */
mbed_official 489:119543c9f674 485 #define ADC_SCAN_DIRECTION_FORWARD ((uint32_t)0x00000001) /*!< Scan direction forward: from channel 0 to channel 18 */
mbed_official 489:119543c9f674 486 #define ADC_SCAN_DIRECTION_BACKWARD ((uint32_t)0x00000002) /*!< Scan direction backward: from channel 18 to channel 0 */
mbed_official 376:cb4d9db17537 487
mbed_official 489:119543c9f674 488 #define ADC_SCAN_ENABLE ADC_SCAN_DIRECTION_FORWARD /* For compatibility with other STM32 devices */
mbed_official 376:cb4d9db17537 489
mbed_official 489:119543c9f674 490 #define IS_ADC_SCAN_MODE(SCAN_MODE) (((SCAN_MODE) == ADC_SCAN_DIRECTION_FORWARD) || \
mbed_official 489:119543c9f674 491 ((SCAN_MODE) == ADC_SCAN_DIRECTION_BACKWARD))
mbed_official 489:119543c9f674 492
mbed_official 376:cb4d9db17537 493 /**
mbed_official 376:cb4d9db17537 494 * @}
mbed_official 376:cb4d9db17537 495 */
mbed_official 376:cb4d9db17537 496
mbed_official 376:cb4d9db17537 497 /** @defgroup ADC_Oversampling_Ratio
mbed_official 376:cb4d9db17537 498 * @{
mbed_official 376:cb4d9db17537 499 */
mbed_official 376:cb4d9db17537 500
mbed_official 376:cb4d9db17537 501 #define ADC_OVERSAMPLING_RATIO_2 ((uint32_t)0x00000000) /*!< ADC Oversampling ratio 2x */
mbed_official 376:cb4d9db17537 502 #define ADC_OVERSAMPLING_RATIO_4 ((uint32_t)0x00000004) /*!< ADC Oversampling ratio 4x */
mbed_official 376:cb4d9db17537 503 #define ADC_OVERSAMPLING_RATIO_8 ((uint32_t)0x00000008) /*!< ADC Oversampling ratio 8x */
mbed_official 376:cb4d9db17537 504 #define ADC_OVERSAMPLING_RATIO_16 ((uint32_t)0x0000000C) /*!< ADC Oversampling ratio 16x */
mbed_official 376:cb4d9db17537 505 #define ADC_OVERSAMPLING_RATIO_32 ((uint32_t)0x00000010) /*!< ADC Oversampling ratio 32x */
mbed_official 376:cb4d9db17537 506 #define ADC_OVERSAMPLING_RATIO_64 ((uint32_t)0x00000014) /*!< ADC Oversampling ratio 64x */
mbed_official 376:cb4d9db17537 507 #define ADC_OVERSAMPLING_RATIO_128 ((uint32_t)0x00000018) /*!< ADC Oversampling ratio 128x */
mbed_official 376:cb4d9db17537 508 #define ADC_OVERSAMPLING_RATIO_256 ((uint32_t)0x0000001C) /*!< ADC Oversampling ratio 256x */
mbed_official 376:cb4d9db17537 509 #define IS_ADC_OVERSAMPLING_RATIO(RATIO) (((RATIO) == ADC_OVERSAMPLING_RATIO_2 ) || \
mbed_official 376:cb4d9db17537 510 ((RATIO) == ADC_OVERSAMPLING_RATIO_4 ) || \
mbed_official 376:cb4d9db17537 511 ((RATIO) == ADC_OVERSAMPLING_RATIO_8 ) || \
mbed_official 376:cb4d9db17537 512 ((RATIO) == ADC_OVERSAMPLING_RATIO_16 ) || \
mbed_official 376:cb4d9db17537 513 ((RATIO) == ADC_OVERSAMPLING_RATIO_32 ) || \
mbed_official 376:cb4d9db17537 514 ((RATIO) == ADC_OVERSAMPLING_RATIO_64 ) || \
mbed_official 376:cb4d9db17537 515 ((RATIO) == ADC_OVERSAMPLING_RATIO_128 ) || \
mbed_official 376:cb4d9db17537 516 ((RATIO) == ADC_OVERSAMPLING_RATIO_256 ))
mbed_official 376:cb4d9db17537 517 /**
mbed_official 376:cb4d9db17537 518 * @}
mbed_official 376:cb4d9db17537 519 */
mbed_official 376:cb4d9db17537 520
mbed_official 376:cb4d9db17537 521 /** @defgroup ADC_Right_Bit_Shift
mbed_official 376:cb4d9db17537 522 * @{
mbed_official 376:cb4d9db17537 523 */
mbed_official 376:cb4d9db17537 524 #define ADC_RIGHTBITSHIFT_NONE ((uint32_t)0x00000000) /*!< ADC No bit shift for oversampling */
mbed_official 376:cb4d9db17537 525 #define ADC_RIGHTBITSHIFT_1 ((uint32_t)0x00000020) /*!< ADC 1 bit shift for oversampling */
mbed_official 376:cb4d9db17537 526 #define ADC_RIGHTBITSHIFT_2 ((uint32_t)0x00000040) /*!< ADC 2 bits shift for oversampling */
mbed_official 376:cb4d9db17537 527 #define ADC_RIGHTBITSHIFT_3 ((uint32_t)0x00000060) /*!< ADC 3 bits shift for oversampling */
mbed_official 376:cb4d9db17537 528 #define ADC_RIGHTBITSHIFT_4 ((uint32_t)0x00000080) /*!< ADC 4 bits shift for oversampling */
mbed_official 376:cb4d9db17537 529 #define ADC_RIGHTBITSHIFT_5 ((uint32_t)0x000000A0) /*!< ADC 5 bits shift for oversampling */
mbed_official 376:cb4d9db17537 530 #define ADC_RIGHTBITSHIFT_6 ((uint32_t)0x000000C0) /*!< ADC 6 bits shift for oversampling */
mbed_official 376:cb4d9db17537 531 #define ADC_RIGHTBITSHIFT_7 ((uint32_t)0x000000E0) /*!< ADC 7 bits shift for oversampling */
mbed_official 376:cb4d9db17537 532 #define ADC_RIGHTBITSHIFT_8 ((uint32_t)0x00000100) /*!< ADC 8 bits shift for oversampling */
mbed_official 376:cb4d9db17537 533 #define IS_ADC_RIGHT_BIT_SHIFT(SHIFT) (((SHIFT) == ADC_RIGHTBITSHIFT_NONE) || \
mbed_official 376:cb4d9db17537 534 ((SHIFT) == ADC_RIGHTBITSHIFT_1 ) || \
mbed_official 376:cb4d9db17537 535 ((SHIFT) == ADC_RIGHTBITSHIFT_2 ) || \
mbed_official 376:cb4d9db17537 536 ((SHIFT) == ADC_RIGHTBITSHIFT_3 ) || \
mbed_official 376:cb4d9db17537 537 ((SHIFT) == ADC_RIGHTBITSHIFT_4 ) || \
mbed_official 376:cb4d9db17537 538 ((SHIFT) == ADC_RIGHTBITSHIFT_5 ) || \
mbed_official 376:cb4d9db17537 539 ((SHIFT) == ADC_RIGHTBITSHIFT_6 ) || \
mbed_official 376:cb4d9db17537 540 ((SHIFT) == ADC_RIGHTBITSHIFT_7 ) || \
mbed_official 376:cb4d9db17537 541 ((SHIFT) == ADC_RIGHTBITSHIFT_8 ))
mbed_official 376:cb4d9db17537 542 /**
mbed_official 376:cb4d9db17537 543 * @}
mbed_official 376:cb4d9db17537 544 */
mbed_official 376:cb4d9db17537 545
mbed_official 376:cb4d9db17537 546 /** @defgroup ADC_Triggered_Oversampling_Mode
mbed_official 376:cb4d9db17537 547 * @{
mbed_official 376:cb4d9db17537 548 */
mbed_official 376:cb4d9db17537 549 #define ADC_TRIGGEREDMODE_SINGLE_TRIGGER ((uint32_t)0x00000000) /*!< ADC No bit shift for oversampling */
mbed_official 376:cb4d9db17537 550 #define ADC_TRIGGEREDMODE_MULTI_TRIGGER ((uint32_t)0x00000200) /*!< ADC No bit shift for oversampling */
mbed_official 376:cb4d9db17537 551 #define IS_ADC_TRIGGERED_OVERSAMPLING_MODE(MODE) (((MODE) == ADC_TRIGGEREDMODE_SINGLE_TRIGGER) || \
mbed_official 376:cb4d9db17537 552 ((MODE) == ADC_TRIGGEREDMODE_MULTI_TRIGGER) )
mbed_official 376:cb4d9db17537 553 /**
mbed_official 376:cb4d9db17537 554 * @}
mbed_official 376:cb4d9db17537 555 */
mbed_official 376:cb4d9db17537 556
mbed_official 376:cb4d9db17537 557 /** @defgroup ADC_analog_watchdog_mode
mbed_official 376:cb4d9db17537 558 * @{
mbed_official 376:cb4d9db17537 559 */
mbed_official 376:cb4d9db17537 560 #define ADC_ANALOGWATCHDOG_NONE ((uint32_t) 0x00000000)
mbed_official 376:cb4d9db17537 561 #define ADC_ANALOGWATCHDOG_SINGLE_REG ((uint32_t)(ADC_CFGR1_AWDSGL | ADC_CFGR1_AWDEN))
mbed_official 376:cb4d9db17537 562 #define ADC_ANALOGWATCHDOG_ALL_REG ((uint32_t) ADC_CFGR1_AWDEN)
mbed_official 376:cb4d9db17537 563
mbed_official 376:cb4d9db17537 564
mbed_official 376:cb4d9db17537 565 #define IS_ADC_ANALOG_WATCHDOG_MODE(WATCHDOG) (((WATCHDOG) == ADC_ANALOGWATCHDOG_NONE ) || \
mbed_official 376:cb4d9db17537 566 ((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_REG) || \
mbed_official 376:cb4d9db17537 567 ((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_REG ))
mbed_official 376:cb4d9db17537 568 /**
mbed_official 376:cb4d9db17537 569 * @}
mbed_official 376:cb4d9db17537 570 */
mbed_official 376:cb4d9db17537 571
mbed_official 376:cb4d9db17537 572 /** @defgroup ADC_conversion_type
mbed_official 376:cb4d9db17537 573 * @{
mbed_official 376:cb4d9db17537 574 */
mbed_official 489:119543c9f674 575 #define ADC_REGULAR_GROUP ((uint32_t)(ADC_FLAG_EOC | ADC_FLAG_EOS))
mbed_official 489:119543c9f674 576 #define IS_ADC_CONVERSION_GROUP(CONVERSION) ((CONVERSION) == ADC_REGULAR_GROUP)
mbed_official 376:cb4d9db17537 577 /**
mbed_official 376:cb4d9db17537 578 * @}
mbed_official 376:cb4d9db17537 579 */
mbed_official 376:cb4d9db17537 580
mbed_official 376:cb4d9db17537 581 /** @defgroup ADC_Event_type
mbed_official 376:cb4d9db17537 582 * @{
mbed_official 376:cb4d9db17537 583 */
mbed_official 489:119543c9f674 584 #define ADC_AWD_EVENT ((uint32_t)ADC_FLAG_AWD)
mbed_official 489:119543c9f674 585 #define ADC_OVR_EVENT ((uint32_t)ADC_FLAG_OVR)
mbed_official 376:cb4d9db17537 586
mbed_official 489:119543c9f674 587 #define IS_ADC_EVENT_TYPE(EVENT) (((EVENT) == ADC_AWD_EVENT) || \
mbed_official 489:119543c9f674 588 ((EVENT) == ADC_OVR_EVENT))
mbed_official 376:cb4d9db17537 589 /**
mbed_official 376:cb4d9db17537 590 * @}
mbed_official 376:cb4d9db17537 591 */
mbed_official 376:cb4d9db17537 592
mbed_official 376:cb4d9db17537 593 /** @defgroup ADC_interrupts_definition
mbed_official 376:cb4d9db17537 594 * @{
mbed_official 376:cb4d9db17537 595 */
mbed_official 376:cb4d9db17537 596 #define ADC_IT_RDY ADC_IER_ADRDYIE /*!< ADC Ready (ADRDY) interrupt source */
mbed_official 376:cb4d9db17537 597 #define ADC_IT_EOSMP ADC_IER_EOSMPIE /*!< ADC End of Sampling interrupt source */
mbed_official 376:cb4d9db17537 598 #define ADC_IT_EOC ADC_IER_EOCIE /*!< ADC End of Regular Conversion interrupt source */
mbed_official 376:cb4d9db17537 599 #define ADC_IT_EOS ADC_IER_EOSEQIE /*!< ADC End of Regular sequence of Conversions interrupt source */
mbed_official 376:cb4d9db17537 600 #define ADC_IT_OVR ADC_IER_OVRIE /*!< ADC overrun interrupt source */
mbed_official 376:cb4d9db17537 601 #define ADC_IT_AWD ADC_IER_AWDIE /*!< ADC Analog watchdog 1 interrupt source */
mbed_official 376:cb4d9db17537 602 #define ADC_IT_EOCAL ADC_IER_EOCALIE /*!< ADC End of Calibration interrupt source */
mbed_official 376:cb4d9db17537 603
mbed_official 376:cb4d9db17537 604 /* Check of single flag */
mbed_official 376:cb4d9db17537 605 #define IS_ADC_IT(IT) (((IT) == ADC_IT_AWD) || ((IT) == ADC_IT_RDY) || \
mbed_official 376:cb4d9db17537 606 ((IT) == ADC_IT_EOSMP) || ((IT) == ADC_IT_EOC) || \
mbed_official 376:cb4d9db17537 607 ((IT) == ADC_IT_EOS) || ((IT) == ADC_IT_OVR))
mbed_official 376:cb4d9db17537 608 /**
mbed_official 376:cb4d9db17537 609 * @}
mbed_official 376:cb4d9db17537 610 */
mbed_official 376:cb4d9db17537 611
mbed_official 376:cb4d9db17537 612
mbed_official 376:cb4d9db17537 613
mbed_official 376:cb4d9db17537 614 /** @defgroup ADC_flags_definition
mbed_official 376:cb4d9db17537 615 * @{
mbed_official 376:cb4d9db17537 616 */
mbed_official 376:cb4d9db17537 617 #define ADC_FLAG_RDY ADC_ISR_ADRDY /*!< ADC Ready (ADRDY) flag */
mbed_official 376:cb4d9db17537 618 #define ADC_FLAG_EOSMP ADC_ISR_EOSMP /*!< ADC End of Sampling flag */
mbed_official 376:cb4d9db17537 619 #define ADC_FLAG_EOC ADC_ISR_EOC /*!< ADC End of Regular Conversion flag */
mbed_official 376:cb4d9db17537 620 #define ADC_FLAG_EOS ADC_ISR_EOSEQ /*!< ADC End of Regular sequence of Conversions flag */
mbed_official 376:cb4d9db17537 621 #define ADC_FLAG_OVR ADC_ISR_OVR /*!< ADC overrun flag */
mbed_official 376:cb4d9db17537 622 #define ADC_FLAG_AWD ADC_ISR_AWD /*!< ADC Analog watchdog flag */
mbed_official 376:cb4d9db17537 623 #define ADC_FLAG_EOCAL ADC_ISR_EOCAL /*!< ADC Enf Of Calibration flag */
mbed_official 376:cb4d9db17537 624
mbed_official 376:cb4d9db17537 625
mbed_official 376:cb4d9db17537 626 #define ADC_FLAG_ALL (ADC_FLAG_RDY | ADC_FLAG_EOSMP | ADC_FLAG_EOC | ADC_FLAG_EOS | \
mbed_official 376:cb4d9db17537 627 ADC_FLAG_OVR | ADC_FLAG_AWD | ADC_FLAG_EOCAL)
mbed_official 376:cb4d9db17537 628
mbed_official 376:cb4d9db17537 629 /* Check of single flag */
mbed_official 376:cb4d9db17537 630 #define IS_ADC_FLAG(FLAG) (((FLAG) == ADC_FLAG_RDY) || ((FLAG) == ADC_FLAG_EOSMP) || \
mbed_official 376:cb4d9db17537 631 ((FLAG) == ADC_FLAG_EOC) || ((FLAG) == ADC_FLAG_EOS) || \
mbed_official 376:cb4d9db17537 632 ((FLAG) == ADC_FLAG_OVR) || ((FLAG) == ADC_FLAG_AWD) || \
mbed_official 376:cb4d9db17537 633 ((FLAG) == ADC_FLAG_EOCAL))
mbed_official 376:cb4d9db17537 634 /**
mbed_official 376:cb4d9db17537 635 * @}
mbed_official 376:cb4d9db17537 636 */
mbed_official 376:cb4d9db17537 637
mbed_official 376:cb4d9db17537 638
mbed_official 376:cb4d9db17537 639 /** @defgroup ADC_range_verification
mbed_official 376:cb4d9db17537 640 * in function of ADC resolution selected (12, 10, 8 or 6 bits)
mbed_official 376:cb4d9db17537 641 * @{
mbed_official 376:cb4d9db17537 642 */
mbed_official 376:cb4d9db17537 643 #define IS_ADC_RANGE(RESOLUTION, ADC_VALUE) \
mbed_official 489:119543c9f674 644 ((((RESOLUTION) == ADC_RESOLUTION_12B) && ((ADC_VALUE) <= ((uint32_t)0x0FFF))) || \
mbed_official 489:119543c9f674 645 (((RESOLUTION) == ADC_RESOLUTION_10B) && ((ADC_VALUE) <= ((uint32_t)0x03FF))) || \
mbed_official 489:119543c9f674 646 (((RESOLUTION) == ADC_RESOLUTION_8B) && ((ADC_VALUE) <= ((uint32_t)0x00FF))) || \
mbed_official 489:119543c9f674 647 (((RESOLUTION) == ADC_RESOLUTION_6B) && ((ADC_VALUE) <= ((uint32_t)0x003F))))
mbed_official 376:cb4d9db17537 648 /**
mbed_official 376:cb4d9db17537 649 * @}
mbed_official 376:cb4d9db17537 650 */
mbed_official 376:cb4d9db17537 651
mbed_official 376:cb4d9db17537 652 /** @defgroup ADC_regular_nb_conv_verification
mbed_official 376:cb4d9db17537 653 * @{
mbed_official 376:cb4d9db17537 654 */
mbed_official 376:cb4d9db17537 655 #define IS_ADC_REGULAR_NB_CONV(LENGTH) (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)16)))
mbed_official 376:cb4d9db17537 656 /**
mbed_official 376:cb4d9db17537 657 * @}
mbed_official 376:cb4d9db17537 658 */
mbed_official 376:cb4d9db17537 659
mbed_official 376:cb4d9db17537 660 /**
mbed_official 376:cb4d9db17537 661 * @}
mbed_official 376:cb4d9db17537 662 */
mbed_official 376:cb4d9db17537 663 /* Exported macro ------------------------------------------------------------*/
mbed_official 376:cb4d9db17537 664
mbed_official 376:cb4d9db17537 665 /** @defgroup ADC_Exported_Macro
mbed_official 376:cb4d9db17537 666 * @{
mbed_official 376:cb4d9db17537 667 */
mbed_official 376:cb4d9db17537 668 /** @brief Reset ADC handle state
mbed_official 376:cb4d9db17537 669 * @param __HANDLE__: ADC handle
mbed_official 376:cb4d9db17537 670 * @retval None
mbed_official 376:cb4d9db17537 671 */
mbed_official 376:cb4d9db17537 672 #define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_ADC_STATE_RESET)
mbed_official 376:cb4d9db17537 673
mbed_official 376:cb4d9db17537 674 /**
mbed_official 376:cb4d9db17537 675 * @brief Enable the ADC peripheral
mbed_official 376:cb4d9db17537 676 * @param __HANDLE__: ADC handle
mbed_official 376:cb4d9db17537 677 * @retval None
mbed_official 376:cb4d9db17537 678 */
mbed_official 376:cb4d9db17537 679 #define __HAL_ADC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= ADC_CR_ADEN)
mbed_official 376:cb4d9db17537 680
mbed_official 376:cb4d9db17537 681 /**
mbed_official 376:cb4d9db17537 682 * @brief Verification of hardware constraints before ADC can be enabled
mbed_official 376:cb4d9db17537 683 * @param __HANDLE__: ADC handle
mbed_official 376:cb4d9db17537 684 * @retval SET (ADC can be enabled) or RESET (ADC cannot be enabled)
mbed_official 376:cb4d9db17537 685 */
mbed_official 489:119543c9f674 686 #define ADC_ENABLING_CONDITIONS(__HANDLE__) \
mbed_official 376:cb4d9db17537 687 (( ( ((__HANDLE__)->Instance->CR) & \
mbed_official 376:cb4d9db17537 688 (ADC_CR_ADCAL | ADC_CR_ADSTP | ADC_CR_ADSTART | \
mbed_official 376:cb4d9db17537 689 ADC_CR_ADDIS | ADC_CR_ADEN ) \
mbed_official 376:cb4d9db17537 690 ) == RESET \
mbed_official 376:cb4d9db17537 691 ) ? SET : RESET)
mbed_official 376:cb4d9db17537 692
mbed_official 376:cb4d9db17537 693 /**
mbed_official 376:cb4d9db17537 694 * @brief Disable the ADC peripheral
mbed_official 376:cb4d9db17537 695 * @param __HANDLE__: ADC handle
mbed_official 376:cb4d9db17537 696 * @retval None
mbed_official 376:cb4d9db17537 697 */
mbed_official 376:cb4d9db17537 698 #define __HAL_ADC_DISABLE(__HANDLE__) \
mbed_official 376:cb4d9db17537 699 do{ \
mbed_official 376:cb4d9db17537 700 (__HANDLE__)->Instance->CR |= ADC_CR_ADDIS; \
mbed_official 376:cb4d9db17537 701 __HAL_ADC_CLEAR_FLAG((__HANDLE__), (ADC_FLAG_EOSMP | ADC_FLAG_RDY)); \
mbed_official 376:cb4d9db17537 702 } while(0)
mbed_official 376:cb4d9db17537 703
mbed_official 376:cb4d9db17537 704 /**
mbed_official 376:cb4d9db17537 705 * @brief Verification of hardware constraints before ADC can be disabled
mbed_official 376:cb4d9db17537 706 * @param __HANDLE__: ADC handle
mbed_official 376:cb4d9db17537 707 * @retval SET (ADC can be disabled) or RESET (ADC cannot be disabled)
mbed_official 376:cb4d9db17537 708 */
mbed_official 489:119543c9f674 709 #define ADC_DISABLING_CONDITIONS(__HANDLE__) \
mbed_official 376:cb4d9db17537 710 (( ( ((__HANDLE__)->Instance->CR) & \
mbed_official 376:cb4d9db17537 711 (ADC_CR_ADSTART | ADC_CR_ADEN)) == ADC_CR_ADEN \
mbed_official 376:cb4d9db17537 712 ) ? SET : RESET)
mbed_official 376:cb4d9db17537 713
mbed_official 376:cb4d9db17537 714 /**
mbed_official 376:cb4d9db17537 715 * @brief Verification of ADC state: enabled or disabled
mbed_official 376:cb4d9db17537 716 * @param __HANDLE__: ADC handle
mbed_official 376:cb4d9db17537 717 * @retval SET (ADC enabled) or RESET (ADC disabled)
mbed_official 376:cb4d9db17537 718 */
mbed_official 489:119543c9f674 719 #define ADC_IS_ENABLE(__HANDLE__) \
mbed_official 376:cb4d9db17537 720 (( ((((__HANDLE__)->Instance->CR) & (ADC_CR_ADEN | ADC_CR_ADDIS)) == ADC_CR_ADEN) && \
mbed_official 376:cb4d9db17537 721 ((((__HANDLE__)->Instance->ISR) & ADC_FLAG_RDY) == ADC_FLAG_RDY) \
mbed_official 376:cb4d9db17537 722 ) ? SET : RESET)
mbed_official 376:cb4d9db17537 723
mbed_official 376:cb4d9db17537 724 /**
mbed_official 376:cb4d9db17537 725 * @brief Returns resolution bits in CFGR register: RES[1:0]. Return value among parameter to @ref ADC_Resolution.
mbed_official 376:cb4d9db17537 726 * @param __HANDLE__: ADC handle
mbed_official 376:cb4d9db17537 727 * @retval None
mbed_official 376:cb4d9db17537 728 */
mbed_official 489:119543c9f674 729 #define ADC_GET_RESOLUTION(__HANDLE__) (((__HANDLE__)->Instance->CFGR1) & ADC_CFGR1_RES)
mbed_official 376:cb4d9db17537 730
mbed_official 376:cb4d9db17537 731 /**
mbed_official 376:cb4d9db17537 732 * @brief Check if no conversion is ongoing on regular groups
mbed_official 376:cb4d9db17537 733 * @param __HANDLE__: ADC handle
mbed_official 376:cb4d9db17537 734 * @retval SET (conversion is on going) or RESET (no conversion is on going)
mbed_official 376:cb4d9db17537 735 */
mbed_official 489:119543c9f674 736 #define ADC_IS_CONVERSION_ONGOING(__HANDLE__) \
mbed_official 376:cb4d9db17537 737 (( (((__HANDLE__)->Instance->CR) & (ADC_CR_ADSTART)) == RESET ) ? RESET : SET)
mbed_official 376:cb4d9db17537 738
mbed_official 376:cb4d9db17537 739 /**
mbed_official 376:cb4d9db17537 740 * @brief Enable ADC continuous conversion mode.
mbed_official 376:cb4d9db17537 741 * @param _CONTINUOUS_MODE_: Continuous mode.
mbed_official 376:cb4d9db17537 742 * @retval None
mbed_official 376:cb4d9db17537 743 */
mbed_official 489:119543c9f674 744 #define ADC_CONTINUOUS(_CONTINUOUS_MODE_) ((_CONTINUOUS_MODE_) << 13)
mbed_official 489:119543c9f674 745
mbed_official 489:119543c9f674 746 /**
mbed_official 489:119543c9f674 747 * @brief Enable ADC scan mode to convert multiple ranks with sequencer.
mbed_official 489:119543c9f674 748 * @param _SCAN_MODE_: Scan conversion mode.
mbed_official 489:119543c9f674 749 * @retval None
mbed_official 489:119543c9f674 750 */
mbed_official 489:119543c9f674 751 #define ADC_SCANDIR(_SCAN_MODE_) \
mbed_official 489:119543c9f674 752 ( ( (_SCAN_MODE_) == (ADC_SCAN_DIRECTION_BACKWARD) \
mbed_official 489:119543c9f674 753 )? (ADC_CFGR1_SCANDIR) : (0x00000000) \
mbed_official 489:119543c9f674 754 )
mbed_official 376:cb4d9db17537 755
mbed_official 376:cb4d9db17537 756 /**
mbed_official 376:cb4d9db17537 757 * @brief Configures the number of discontinuous conversions for the regular group channels.
mbed_official 376:cb4d9db17537 758 * @param _NBR_DISCONTINUOUS_CONV_: Number of discontinuous conversions.
mbed_official 376:cb4d9db17537 759 * @retval None
mbed_official 376:cb4d9db17537 760 */
mbed_official 376:cb4d9db17537 761 #define __HAL_ADC_CFGR1_DISCONTINUOUS_NUM(_NBR_DISCONTINUOUS_CONV_) (((_NBR_DISCONTINUOUS_CONV_) - 1) << 17)
mbed_official 376:cb4d9db17537 762
mbed_official 376:cb4d9db17537 763 /**
mbed_official 376:cb4d9db17537 764 * @brief Enable the ADC DMA continuous request.
mbed_official 376:cb4d9db17537 765 * @param _DMAContReq_MODE_: DMA continuous request mode.
mbed_official 376:cb4d9db17537 766 * @retval None
mbed_official 376:cb4d9db17537 767 */
mbed_official 489:119543c9f674 768 #define ADC_DMACONTREQ(_DMAContReq_MODE_) ((_DMAContReq_MODE_) << 1)
mbed_official 376:cb4d9db17537 769
mbed_official 376:cb4d9db17537 770 /**
mbed_official 376:cb4d9db17537 771 * @brief Enable the ADC Auto Delay.
mbed_official 376:cb4d9db17537 772 * @param _AutoDelay_: Auto delay bit enable or disable.
mbed_official 376:cb4d9db17537 773 * @retval None
mbed_official 376:cb4d9db17537 774 */
mbed_official 376:cb4d9db17537 775 #define __HAL_ADC_CFGR1_AutoDelay(_AutoDelay_) ((_AutoDelay_) << 14)
mbed_official 376:cb4d9db17537 776
mbed_official 376:cb4d9db17537 777 /**
mbed_official 489:119543c9f674 778 * @brief Enable the ADC LowPowerAutoPowerOff.
mbed_official 376:cb4d9db17537 779 * @param _AUTOFF_: AutoOff bit enable or disable.
mbed_official 376:cb4d9db17537 780 * @retval None
mbed_official 376:cb4d9db17537 781 */
mbed_official 376:cb4d9db17537 782 #define __HAL_ADC_CFGR1_AUTOFF(_AUTOFF_) ((_AUTOFF_) << 15)
mbed_official 376:cb4d9db17537 783
mbed_official 376:cb4d9db17537 784 /**
mbed_official 376:cb4d9db17537 785 * @brief Configure the analog watchdog high threshold into registers TR1, TR2 or TR3.
mbed_official 376:cb4d9db17537 786 * @param _Threshold_: Threshold value
mbed_official 376:cb4d9db17537 787 * @retval None
mbed_official 376:cb4d9db17537 788 */
mbed_official 489:119543c9f674 789 #define ADC_TRX_HIGHTHRESHOLD(_Threshold_) ((_Threshold_) << 16)
mbed_official 376:cb4d9db17537 790
mbed_official 376:cb4d9db17537 791 /**
mbed_official 376:cb4d9db17537 792 * @brief Enable the ADC Low Frequency mode.
mbed_official 376:cb4d9db17537 793 * @param _LOW_FREQUENCY_MODE_: Low Frequency mode.
mbed_official 376:cb4d9db17537 794 * @retval None
mbed_official 376:cb4d9db17537 795 */
mbed_official 376:cb4d9db17537 796 #define __HAL_ADC_CCR_LOWFREQUENCY(_LOW_FREQUENCY_MODE_) ((_LOW_FREQUENCY_MODE_) << 25)
mbed_official 376:cb4d9db17537 797
mbed_official 376:cb4d9db17537 798 /**
mbed_official 376:cb4d9db17537 799 * @brief Shift the offset in function of the selected ADC resolution.
mbed_official 376:cb4d9db17537 800 * Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0
mbed_official 376:cb4d9db17537 801 * If resolution 12 bits, no shift.
mbed_official 376:cb4d9db17537 802 * If resolution 10 bits, shift of 2 ranks on the right.
mbed_official 376:cb4d9db17537 803 * If resolution 8 bits, shift of 4 ranks on the right.
mbed_official 376:cb4d9db17537 804 * If resolution 6 bits, shift of 6 ranks on the right.
mbed_official 376:cb4d9db17537 805 * therefore, shift = (12 - resolution) = 12 - (12- (((RES[1:0]) >> 3)*2))
mbed_official 376:cb4d9db17537 806 * @param __HANDLE__: ADC handle.
mbed_official 376:cb4d9db17537 807 * @param _Offset_: Value to be shifted
mbed_official 376:cb4d9db17537 808 * @retval None
mbed_official 376:cb4d9db17537 809 */
mbed_official 489:119543c9f674 810 #define ADC_OFFSET_SHIFT_RESOLUTION(__HANDLE__, _Offset_) \
mbed_official 376:cb4d9db17537 811 ((_Offset_) << ((((__HANDLE__)->Instance->CFGR & ADC_CFGR1_RES) >> 3)*2))
mbed_official 376:cb4d9db17537 812
mbed_official 376:cb4d9db17537 813 /**
mbed_official 376:cb4d9db17537 814 * @brief Shift the AWD1 threshold in function of the selected ADC resolution.
mbed_official 376:cb4d9db17537 815 * Thresholds have to be left-aligned on bit 11, the LSB (right bits) are set to 0
mbed_official 376:cb4d9db17537 816 * If resolution 12 bits, no shift.
mbed_official 376:cb4d9db17537 817 * If resolution 10 bits, shift of 2 ranks on the right.
mbed_official 376:cb4d9db17537 818 * If resolution 8 bits, shift of 4 ranks on the right.
mbed_official 376:cb4d9db17537 819 * If resolution 6 bits, shift of 6 ranks on the right.
mbed_official 376:cb4d9db17537 820 * therefore, shift = (12 - resolution) = 12 - (12- (((RES[1:0]) >> 3)*2))
mbed_official 376:cb4d9db17537 821 * @param __HANDLE__: ADC handle.
mbed_official 376:cb4d9db17537 822 * @param _Threshold_: Value to be shifted
mbed_official 376:cb4d9db17537 823 * @retval None
mbed_official 376:cb4d9db17537 824 */
mbed_official 489:119543c9f674 825 #define ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(__HANDLE__, _Threshold_) \
mbed_official 376:cb4d9db17537 826 ((_Threshold_) << ((((__HANDLE__)->Instance->CFGR1 & ADC_CFGR1_RES) >> 3)*2))
mbed_official 376:cb4d9db17537 827
mbed_official 376:cb4d9db17537 828 /**
mbed_official 376:cb4d9db17537 829 * @brief Shift the value on the left, less significant are set to 0.
mbed_official 376:cb4d9db17537 830 * @param _Value_: Value to be shifted
mbed_official 376:cb4d9db17537 831 * @param _Shift_: Number of shift to be done
mbed_official 376:cb4d9db17537 832 * @retval None
mbed_official 376:cb4d9db17537 833 */
mbed_official 376:cb4d9db17537 834 #define __HAL_ADC_Value_Shift_left(_Value_, _Shift_) ((_Value_) << (_Shift_))
mbed_official 376:cb4d9db17537 835
mbed_official 376:cb4d9db17537 836
mbed_official 376:cb4d9db17537 837 /**
mbed_official 376:cb4d9db17537 838 * @brief Enable the ADC end of conversion interrupt.
mbed_official 376:cb4d9db17537 839 * @param __HANDLE__: ADC handle.
mbed_official 376:cb4d9db17537 840 * @param __INTERRUPT__: ADC Interrupt.
mbed_official 376:cb4d9db17537 841 * @retval None
mbed_official 376:cb4d9db17537 842 */
mbed_official 376:cb4d9db17537 843 #define __HAL_ADC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
mbed_official 376:cb4d9db17537 844
mbed_official 376:cb4d9db17537 845 /**
mbed_official 376:cb4d9db17537 846 * @brief Disable the ADC end of conversion interrupt.
mbed_official 376:cb4d9db17537 847 * @param __HANDLE__: ADC handle.
mbed_official 376:cb4d9db17537 848 * @param __INTERRUPT__: ADC interrupt.
mbed_official 376:cb4d9db17537 849 * @retval None
mbed_official 376:cb4d9db17537 850 */
mbed_official 376:cb4d9db17537 851 #define __HAL_ADC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
mbed_official 376:cb4d9db17537 852
mbed_official 376:cb4d9db17537 853 /** @brief Checks if the specified ADC interrupt source is enabled or disabled.
mbed_official 376:cb4d9db17537 854 * @param __HANDLE__: specifies the ADC Handle.
mbed_official 376:cb4d9db17537 855 * @param __INTERRUPT__: specifies the ADC interrupt source to check.
mbed_official 376:cb4d9db17537 856 * @retval The new state of __IT__ (TRUE or FALSE).
mbed_official 376:cb4d9db17537 857 */
mbed_official 376:cb4d9db17537 858 #define __HAL_ADC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
mbed_official 376:cb4d9db17537 859
mbed_official 376:cb4d9db17537 860 /**
mbed_official 376:cb4d9db17537 861 * @brief Clear the ADC's pending flags
mbed_official 376:cb4d9db17537 862 * @param __HANDLE__: ADC handle.
mbed_official 376:cb4d9db17537 863 * @param __FLAG__: ADC flag.
mbed_official 376:cb4d9db17537 864 * @retval None
mbed_official 376:cb4d9db17537 865 */
mbed_official 376:cb4d9db17537 866 /* Note: bit cleared bit by writing 1 */
mbed_official 376:cb4d9db17537 867 #define __HAL_ADC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR) = (__FLAG__))
mbed_official 376:cb4d9db17537 868
mbed_official 376:cb4d9db17537 869 /**
mbed_official 376:cb4d9db17537 870 * @brief Get the selected ADC's flag status.
mbed_official 376:cb4d9db17537 871 * @param __HANDLE__: ADC handle.
mbed_official 376:cb4d9db17537 872 * @param __FLAG__: ADC flag.
mbed_official 376:cb4d9db17537 873 * @retval None
mbed_official 376:cb4d9db17537 874 */
mbed_official 376:cb4d9db17537 875 #define __HAL_ADC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__))
mbed_official 376:cb4d9db17537 876
mbed_official 376:cb4d9db17537 877
mbed_official 376:cb4d9db17537 878
mbed_official 376:cb4d9db17537 879 /**
mbed_official 376:cb4d9db17537 880 * @brief Configuration of ADC clock & prescaler: clock source PCLK or Asynchronous with selectable prescaler
mbed_official 376:cb4d9db17537 881 * @param __HANDLE__: ADC handle
mbed_official 376:cb4d9db17537 882 * @retval None
mbed_official 376:cb4d9db17537 883 */
mbed_official 376:cb4d9db17537 884
mbed_official 376:cb4d9db17537 885 #define __HAL_ADC_CLOCK_PRESCALER(__HANDLE__) \
mbed_official 376:cb4d9db17537 886 do{ \
mbed_official 489:119543c9f674 887 if ((((__HANDLE__)->Init.ClockPrescaler) == ADC_CLOCK_SYNC_PCLK_DIV1) || \
mbed_official 489:119543c9f674 888 (((__HANDLE__)->Init.ClockPrescaler) == ADC_CLOCK_SYNC_PCLK_DIV2) || \
mbed_official 489:119543c9f674 889 (((__HANDLE__)->Init.ClockPrescaler) == ADC_CLOCK_SYNC_PCLK_DIV4)) \
mbed_official 376:cb4d9db17537 890 { \
mbed_official 376:cb4d9db17537 891 (__HANDLE__)->Instance->CFGR2 &= ~(ADC_CFGR2_CKMODE); \
mbed_official 376:cb4d9db17537 892 (__HANDLE__)->Instance->CFGR2 |= (__HANDLE__)->Init.ClockPrescaler; \
mbed_official 376:cb4d9db17537 893 } \
mbed_official 376:cb4d9db17537 894 else \
mbed_official 376:cb4d9db17537 895 { \
mbed_official 376:cb4d9db17537 896 /* CKMOD bits must be reset */ \
mbed_official 376:cb4d9db17537 897 (__HANDLE__)->Instance->CFGR2 &= ~(ADC_CFGR2_CKMODE); \
mbed_official 376:cb4d9db17537 898 ADC->CCR &= ~(ADC_CCR_PRESC); \
mbed_official 376:cb4d9db17537 899 ADC->CCR |= (__HANDLE__)->Init.ClockPrescaler; \
mbed_official 376:cb4d9db17537 900 } \
mbed_official 376:cb4d9db17537 901 } while(0)
mbed_official 376:cb4d9db17537 902
mbed_official 376:cb4d9db17537 903 /**
mbed_official 376:cb4d9db17537 904 * @}
mbed_official 376:cb4d9db17537 905 */
mbed_official 376:cb4d9db17537 906
mbed_official 376:cb4d9db17537 907 /* Include ADC HAL Extension module */
mbed_official 376:cb4d9db17537 908 #include "stm32l0xx_hal_adc_ex.h"
mbed_official 376:cb4d9db17537 909
mbed_official 376:cb4d9db17537 910 /* Exported functions --------------------------------------------------------*/
mbed_official 376:cb4d9db17537 911 /* Initialization and de-initialization functions **********************************/
mbed_official 376:cb4d9db17537 912 HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc);
mbed_official 376:cb4d9db17537 913 HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc);
mbed_official 376:cb4d9db17537 914 void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc);
mbed_official 376:cb4d9db17537 915 void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc);
mbed_official 376:cb4d9db17537 916
mbed_official 376:cb4d9db17537 917 /* IO operation functions *****************************************************/
mbed_official 376:cb4d9db17537 918 /* Blocking mode: Polling */
mbed_official 376:cb4d9db17537 919 HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc);
mbed_official 376:cb4d9db17537 920 HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc);
mbed_official 376:cb4d9db17537 921 HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
mbed_official 376:cb4d9db17537 922 HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout);
mbed_official 376:cb4d9db17537 923
mbed_official 376:cb4d9db17537 924 /* Non-blocking mode: Interruption */
mbed_official 376:cb4d9db17537 925 HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc);
mbed_official 376:cb4d9db17537 926 HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc);
mbed_official 376:cb4d9db17537 927
mbed_official 376:cb4d9db17537 928 /* Non-blocking mode: DMA */
mbed_official 376:cb4d9db17537 929 HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
mbed_official 376:cb4d9db17537 930 HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc);
mbed_official 376:cb4d9db17537 931
mbed_official 376:cb4d9db17537 932 /* ADC retrieve conversion value intended to be used with polling or interruption */
mbed_official 376:cb4d9db17537 933 uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc);
mbed_official 376:cb4d9db17537 934
mbed_official 376:cb4d9db17537 935 /* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption and DMA) */
mbed_official 376:cb4d9db17537 936 void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc);
mbed_official 376:cb4d9db17537 937 void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc);
mbed_official 376:cb4d9db17537 938 void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc);
mbed_official 376:cb4d9db17537 939 void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc);
mbed_official 376:cb4d9db17537 940 void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc);
mbed_official 376:cb4d9db17537 941
mbed_official 376:cb4d9db17537 942 /* Peripheral Control functions ***********************************************/
mbed_official 376:cb4d9db17537 943 HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig);
mbed_official 376:cb4d9db17537 944 HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig);
mbed_official 376:cb4d9db17537 945
mbed_official 376:cb4d9db17537 946 /* Peripheral State functions *************************************************/
mbed_official 376:cb4d9db17537 947 HAL_ADC_StateTypeDef HAL_ADC_GetState(ADC_HandleTypeDef* hadc);
mbed_official 376:cb4d9db17537 948 uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
mbed_official 376:cb4d9db17537 949
mbed_official 376:cb4d9db17537 950
mbed_official 376:cb4d9db17537 951 /**
mbed_official 376:cb4d9db17537 952 * @}
mbed_official 376:cb4d9db17537 953 */
mbed_official 376:cb4d9db17537 954
mbed_official 376:cb4d9db17537 955 /**
mbed_official 376:cb4d9db17537 956 * @}
mbed_official 376:cb4d9db17537 957 */
mbed_official 376:cb4d9db17537 958
mbed_official 376:cb4d9db17537 959 #ifdef __cplusplus
mbed_official 376:cb4d9db17537 960 }
mbed_official 376:cb4d9db17537 961 #endif
mbed_official 376:cb4d9db17537 962
mbed_official 376:cb4d9db17537 963 #endif /*__STM32L0xx_ADC_H */
mbed_official 376:cb4d9db17537 964
mbed_official 376:cb4d9db17537 965
mbed_official 376:cb4d9db17537 966 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/