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Superseded

This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

Import librarymbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Committer:
mbed_official
Date:
Wed Jul 01 09:45:11 2015 +0100
Revision:
579:53297373a894
Parent:
489:119543c9f674
Synchronized with git revision d5b4d2ab9c47edb4dc5776e7177b0c2263459081

Full URL: https://github.com/mbedmicro/mbed/commit/d5b4d2ab9c47edb4dc5776e7177b0c2263459081/

Initial version of drivers for SAMR21

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 489:119543c9f674 1 /**
mbed_official 489:119543c9f674 2 ******************************************************************************
mbed_official 489:119543c9f674 3 * @file stm32_hal_legacy.h
mbed_official 489:119543c9f674 4 * @author MCD Application Team
mbed_official 489:119543c9f674 5 * @version V1.2.0RC4
mbed_official 489:119543c9f674 6 * @date 23-January-2015
mbed_official 489:119543c9f674 7 * @brief This file contains aliases definition for the STM32Cube HAL constants
mbed_official 489:119543c9f674 8 * macros and functions maintained for legacy purpose.
mbed_official 489:119543c9f674 9 ******************************************************************************
mbed_official 489:119543c9f674 10 * @attention
mbed_official 489:119543c9f674 11 *
mbed_official 489:119543c9f674 12 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 489:119543c9f674 13 *
mbed_official 489:119543c9f674 14 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 489:119543c9f674 15 * are permitted provided that the following conditions are met:
mbed_official 489:119543c9f674 16 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 489:119543c9f674 17 * this list of conditions and the following disclaimer.
mbed_official 489:119543c9f674 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 489:119543c9f674 19 * this list of conditions and the following disclaimer in the documentation
mbed_official 489:119543c9f674 20 * and/or other materials provided with the distribution.
mbed_official 489:119543c9f674 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 489:119543c9f674 22 * may be used to endorse or promote products derived from this software
mbed_official 489:119543c9f674 23 * without specific prior written permission.
mbed_official 489:119543c9f674 24 *
mbed_official 489:119543c9f674 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 489:119543c9f674 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 489:119543c9f674 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 489:119543c9f674 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 489:119543c9f674 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 489:119543c9f674 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 489:119543c9f674 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 489:119543c9f674 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 489:119543c9f674 33 UART * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 489:119543c9f674 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 489:119543c9f674 35 *
mbed_official 489:119543c9f674 36 ******************************************************************************
mbed_official 489:119543c9f674 37 */
mbed_official 489:119543c9f674 38
mbed_official 489:119543c9f674 39 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 489:119543c9f674 40 #ifndef __STM32_HAL_LEGACY
mbed_official 489:119543c9f674 41 #define __STM32_HAL_LEGACY
mbed_official 489:119543c9f674 42
mbed_official 489:119543c9f674 43 #ifdef __cplusplus
mbed_official 489:119543c9f674 44 extern "C" {
mbed_official 489:119543c9f674 45 #endif
mbed_official 489:119543c9f674 46
mbed_official 489:119543c9f674 47 /* Includes ------------------------------------------------------------------*/
mbed_official 489:119543c9f674 48 /* Exported types ------------------------------------------------------------*/
mbed_official 489:119543c9f674 49 /* Exported constants --------------------------------------------------------*/
mbed_official 489:119543c9f674 50
mbed_official 489:119543c9f674 51 /** @defgroup HAL_AES_Aliased_Defines HAL CRYP Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 52 * @{
mbed_official 489:119543c9f674 53 */
mbed_official 489:119543c9f674 54 #define AES_FLAG_RDERR CRYP_FLAG_RDERR
mbed_official 489:119543c9f674 55 #define AES_FLAG_WRERR CRYP_FLAG_WRERR
mbed_official 489:119543c9f674 56 #define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF
mbed_official 489:119543c9f674 57 #define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR
mbed_official 489:119543c9f674 58 #define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR
mbed_official 489:119543c9f674 59
mbed_official 489:119543c9f674 60 /**
mbed_official 489:119543c9f674 61 * @}
mbed_official 489:119543c9f674 62 */
mbed_official 489:119543c9f674 63
mbed_official 489:119543c9f674 64 /** @defgroup HAL_ADC_Aliased_Defines HAL ADC Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 65 * @{
mbed_official 489:119543c9f674 66 */
mbed_official 489:119543c9f674 67 #define ADC_RESOLUTION12b ADC_RESOLUTION_12B
mbed_official 489:119543c9f674 68 #define ADC_RESOLUTION10b ADC_RESOLUTION_10B
mbed_official 489:119543c9f674 69 #define ADC_RESOLUTION8b ADC_RESOLUTION_8B
mbed_official 489:119543c9f674 70 #define ADC_RESOLUTION6b ADC_RESOLUTION_6B
mbed_official 489:119543c9f674 71 #define OVR_DATA_OVERWRITTEN ADC_OVR_DATA_OVERWRITTEN
mbed_official 489:119543c9f674 72 #define OVR_DATA_PRESERVED ADC_OVR_DATA_PRESERVED
mbed_official 489:119543c9f674 73 #define EOC_SINGLE_CONV ADC_EOC_SINGLE_CONV
mbed_official 489:119543c9f674 74 #define EOC_SEQ_CONV ADC_EOC_SEQ_CONV
mbed_official 489:119543c9f674 75 #define EOC_SINGLE_SEQ_CONV ADC_EOC_SINGLE_SEQ_CONV
mbed_official 489:119543c9f674 76 #define REGULAR_GROUP ADC_REGULAR_GROUP
mbed_official 489:119543c9f674 77 #define INJECTED_GROUP ADC_INJECTED_GROUP
mbed_official 489:119543c9f674 78 #define REGULAR_INJECTED_GROUP ADC_REGULAR_INJECTED_GROUP
mbed_official 489:119543c9f674 79 #define AWD_EVENT ADC_AWD_EVENT
mbed_official 489:119543c9f674 80 #define AWD1_EVENT ADC_AWD1_EVENT
mbed_official 489:119543c9f674 81 #define AWD2_EVENT ADC_AWD2_EVENT
mbed_official 489:119543c9f674 82 #define AWD3_EVENT ADC_AWD3_EVENT
mbed_official 489:119543c9f674 83 #define OVR_EVENT ADC_OVR_EVENT
mbed_official 489:119543c9f674 84 #define JQOVF_EVENT ADC_JQOVF_EVENT
mbed_official 489:119543c9f674 85 #define ALL_CHANNELS ADC_ALL_CHANNELS
mbed_official 489:119543c9f674 86 #define REGULAR_CHANNELS ADC_REGULAR_CHANNELS
mbed_official 489:119543c9f674 87 #define INJECTED_CHANNELS ADC_INJECTED_CHANNELS
mbed_official 489:119543c9f674 88 #define SYSCFG_FLAG_SENSOR_ADC ADC_FLAG_SENSOR
mbed_official 489:119543c9f674 89 #define SYSCFG_FLAG_VREF_ADC ADC_FLAG_VREFINT
mbed_official 489:119543c9f674 90 #define ADC_CLOCKPRESCALER_PCLK_DIV1 ADC_CLOCK_SYNC_PCLK_DIV1
mbed_official 489:119543c9f674 91 #define ADC_CLOCKPRESCALER_PCLK_DIV2 ADC_CLOCK_SYNC_PCLK_DIV2
mbed_official 489:119543c9f674 92 #define ADC_CLOCKPRESCALER_PCLK_DIV4 ADC_CLOCK_SYNC_PCLK_DIV4
mbed_official 489:119543c9f674 93 #define ADC_EXTERNALTRIG0_T6_TRGO ADC_EXTERNALTRIGCONV_T6_TRGO
mbed_official 489:119543c9f674 94 #define ADC_EXTERNALTRIG1_T21_CC2 ADC_EXTERNALTRIGCONV_T21_CC2
mbed_official 489:119543c9f674 95 #define ADC_EXTERNALTRIG2_T2_TRGO ADC_EXTERNALTRIGCONV_T2_TRGO
mbed_official 489:119543c9f674 96 #define ADC_EXTERNALTRIG3_T2_CC4 ADC_EXTERNALTRIGCONV_T2_CC4
mbed_official 489:119543c9f674 97 #define ADC_EXTERNALTRIG4_T22_TRGO ADC_EXTERNALTRIGCONV_T22_TRGO
mbed_official 489:119543c9f674 98 #define ADC_EXTERNALTRIG7_EXT_IT11 ADC_EXTERNALTRIGCONV_EXT_IT11
mbed_official 489:119543c9f674 99 #define ADC_CLOCK_ASYNC ADC_CLOCK_ASYNC_DIV1
mbed_official 489:119543c9f674 100 #define ADC_EXTERNALTRIG_EDGE_NONE ADC_EXTERNALTRIGCONVEDGE_NONE
mbed_official 489:119543c9f674 101 #define ADC_EXTERNALTRIG_EDGE_RISING ADC_EXTERNALTRIGCONVEDGE_RISING
mbed_official 489:119543c9f674 102 #define ADC_EXTERNALTRIG_EDGE_FALLING ADC_EXTERNALTRIGCONVEDGE_FALLING
mbed_official 489:119543c9f674 103 #define ADC_EXTERNALTRIG_EDGE_RISINGFALLING ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING
mbed_official 489:119543c9f674 104 /**
mbed_official 489:119543c9f674 105 * @}
mbed_official 489:119543c9f674 106 */
mbed_official 489:119543c9f674 107
mbed_official 489:119543c9f674 108 /** @defgroup HAL_CEC_Aliased_Defines HAL CEC Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 109 * @{
mbed_official 489:119543c9f674 110 */
mbed_official 489:119543c9f674 111
mbed_official 489:119543c9f674 112 #define __HAL_CEC_GET_IT __HAL_CEC_GET_FLAG
mbed_official 489:119543c9f674 113
mbed_official 489:119543c9f674 114 /**
mbed_official 489:119543c9f674 115 * @}
mbed_official 489:119543c9f674 116 */
mbed_official 489:119543c9f674 117
mbed_official 489:119543c9f674 118 /** @defgroup HAL_COMP_Aliased_Defines HAL COMP Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 119 * @{
mbed_official 489:119543c9f674 120 */
mbed_official 489:119543c9f674 121
mbed_official 489:119543c9f674 122 #define COMP_WINDOWMODE_DISABLED COMP_WINDOWMODE_DISABLE
mbed_official 489:119543c9f674 123 #define COMP_WINDOWMODE_ENABLED COMP_WINDOWMODE_ENABLE
mbed_official 489:119543c9f674 124 #define COMP_EXTI_LINE_COMP1_EVENT COMP_EXTI_LINE_COMP1
mbed_official 489:119543c9f674 125 #define COMP_EXTI_LINE_COMP2_EVENT COMP_EXTI_LINE_COMP2
mbed_official 489:119543c9f674 126
mbed_official 489:119543c9f674 127 /**
mbed_official 489:119543c9f674 128 * @}
mbed_official 489:119543c9f674 129 */
mbed_official 489:119543c9f674 130
mbed_official 489:119543c9f674 131 /** @defgroup HAL_CRC_Aliased_Defines HAL CRC Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 132 * @{
mbed_official 489:119543c9f674 133 */
mbed_official 489:119543c9f674 134
mbed_official 489:119543c9f674 135 #define CRC_OUTPUTDATA_INVERSION_DISABLED CRC_OUTPUTDATA_INVERSION_DISABLE
mbed_official 489:119543c9f674 136 #define CRC_OUTPUTDATA_INVERSION_ENABLED CRC_OUTPUTDATA_INVERSION_ENABLE
mbed_official 489:119543c9f674 137
mbed_official 489:119543c9f674 138 /**
mbed_official 489:119543c9f674 139 * @}
mbed_official 489:119543c9f674 140 */
mbed_official 489:119543c9f674 141
mbed_official 489:119543c9f674 142 /** @defgroup HAL_DAC_Aliased_Defines HAL DAC Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 143 * @{
mbed_official 489:119543c9f674 144 */
mbed_official 489:119543c9f674 145
mbed_official 489:119543c9f674 146 #define DAC1_CHANNEL_1 DAC_CHANNEL_1
mbed_official 489:119543c9f674 147 #define DAC1_CHANNEL_2 DAC_CHANNEL_2
mbed_official 489:119543c9f674 148 #define DAC2_CHANNEL_1 DAC_CHANNEL_1
mbed_official 489:119543c9f674 149 #define DAC_WAVE_NONE ((uint32_t)0x00000000)
mbed_official 489:119543c9f674 150 #define DAC_WAVE_NOISE ((uint32_t)DAC_CR_WAVE1_0)
mbed_official 489:119543c9f674 151 #define DAC_WAVE_TRIANGLE ((uint32_t)DAC_CR_WAVE1_1)
mbed_official 489:119543c9f674 152 #define DAC_WAVEGENERATION_NONE DAC_WAVE_NONE
mbed_official 489:119543c9f674 153 #define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE
mbed_official 489:119543c9f674 154 #define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE
mbed_official 489:119543c9f674 155
mbed_official 489:119543c9f674 156 /**
mbed_official 489:119543c9f674 157 * @}
mbed_official 489:119543c9f674 158 */
mbed_official 489:119543c9f674 159
mbed_official 489:119543c9f674 160
mbed_official 489:119543c9f674 161 /** @defgroup HAL_FLASH_Aliased_Defines HAL FLASH Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 162 * @{
mbed_official 489:119543c9f674 163 */
mbed_official 489:119543c9f674 164
mbed_official 489:119543c9f674 165 #define TYPEPROGRAM_BYTE FLASH_TYPEPROGRAM_BYTE
mbed_official 489:119543c9f674 166 #define TYPEPROGRAM_HALFWORD FLASH_TYPEPROGRAM_HALFWORD
mbed_official 489:119543c9f674 167 #define TYPEPROGRAM_WORD FLASH_TYPEPROGRAM_WORD
mbed_official 489:119543c9f674 168 #define TYPEPROGRAM_DOUBLEWORD FLASH_TYPEPROGRAM_DOUBLEWORD
mbed_official 489:119543c9f674 169 #define TYPEERASE_SECTORS FLASH_TYPEERASE_SECTORS
mbed_official 489:119543c9f674 170 #define TYPEERASE_PAGES FLASH_TYPEERASE_PAGES
mbed_official 489:119543c9f674 171 #define TYPEERASE_PAGEERASE FLASH_TYPEERASE_PAGES
mbed_official 489:119543c9f674 172 #define TYPEERASE_MASSERASE FLASH_TYPEERASE_MASSERASE
mbed_official 489:119543c9f674 173 #define WRPSTATE_DISABLE OB_WRPSTATE_DISABLE
mbed_official 489:119543c9f674 174 #define WRPSTATE_ENABLE OB_WRPSTATE_ENABLE
mbed_official 489:119543c9f674 175 #define HAL_FLASH_TIMEOUT_VALUE FLASH_TIMEOUT_VALUE
mbed_official 489:119543c9f674 176 #define OBEX_PCROP OPTIONBYTE_PCROP
mbed_official 489:119543c9f674 177 #define OBEX_BOOTCONFIG OPTIONBYTE_BOOTCONFIG
mbed_official 489:119543c9f674 178 #define PCROPSTATE_DISABLE OB_PCROP_STATE_DISABLE
mbed_official 489:119543c9f674 179 #define PCROPSTATE_ENABLE OB_PCROP_STATE_ENABLE
mbed_official 489:119543c9f674 180 #define TYPEERASEDATA_BYTE FLASH_TYPEERASEDATA_BYTE
mbed_official 489:119543c9f674 181 #define TYPEERASEDATA_HALFWORD FLASH_TYPEERASEDATA_HALFWORD
mbed_official 489:119543c9f674 182 #define TYPEERASEDATA_WORD FLASH_TYPEERASEDATA_WORD
mbed_official 489:119543c9f674 183 #define TYPEPROGRAMDATA_BYTE FLASH_TYPEPROGRAMDATA_BYTE
mbed_official 489:119543c9f674 184 #define TYPEPROGRAMDATA_HALFWORD FLASH_TYPEPROGRAMDATA_HALFWORD
mbed_official 489:119543c9f674 185 #define TYPEPROGRAMDATA_WORD FLASH_TYPEPROGRAMDATA_WORD
mbed_official 489:119543c9f674 186 #define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE
mbed_official 489:119543c9f674 187 #define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD
mbed_official 489:119543c9f674 188 #define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD
mbed_official 489:119543c9f674 189 #define PAGESIZE FLASH_PAGE_SIZE
mbed_official 489:119543c9f674 190 #define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE
mbed_official 489:119543c9f674 191 #define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD
mbed_official 489:119543c9f674 192 #define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD
mbed_official 489:119543c9f674 193 #define VOLTAGE_RANGE_1 FLASH_VOLTAGE_RANGE_1
mbed_official 489:119543c9f674 194 #define VOLTAGE_RANGE_2 FLASH_VOLTAGE_RANGE_2
mbed_official 489:119543c9f674 195 #define VOLTAGE_RANGE_3 FLASH_VOLTAGE_RANGE_3
mbed_official 489:119543c9f674 196 #define VOLTAGE_RANGE_4 FLASH_VOLTAGE_RANGE_4
mbed_official 489:119543c9f674 197 #define TYPEPROGRAM_FAST FLASH_TYPEPROGRAM_FAST
mbed_official 489:119543c9f674 198 #define TYPEPROGRAM_FAST_AND_LAST FLASH_TYPEPROGRAM_FAST_AND_LAST
mbed_official 489:119543c9f674 199 #define WRPAREA_BANK1_AREAA OB_WRPAREA_BANK1_AREAA
mbed_official 489:119543c9f674 200 #define WRPAREA_BANK1_AREAB OB_WRPAREA_BANK1_AREAB
mbed_official 489:119543c9f674 201 #define WRPAREA_BANK2_AREAA OB_WRPAREA_BANK2_AREAA
mbed_official 489:119543c9f674 202 #define WRPAREA_BANK2_AREAB OB_WRPAREA_BANK2_AREAB
mbed_official 489:119543c9f674 203 #define IWDG_STDBY_FREEZE OB_IWDG_STDBY_FREEZE
mbed_official 489:119543c9f674 204 #define IWDG_STDBY_ACTIVE OB_IWDG_STDBY_RUN
mbed_official 489:119543c9f674 205 #define IWDG_STOP_FREEZE OB_IWDG_STOP_FREEZE
mbed_official 489:119543c9f674 206 #define IWDG_STOP_ACTIVE OB_IWDG_STOP_RUN
mbed_official 489:119543c9f674 207 #define IS_NBSECTORS IS_FLASH_NBSECTORS
mbed_official 489:119543c9f674 208 #define FLASH_ERROR_NONE HAL_FLASH_ERROR_NONE
mbed_official 489:119543c9f674 209 #define FLASH_ERROR_RD HAL_FLASH_ERROR_RD
mbed_official 489:119543c9f674 210 #define FLASH_ERROR_PG HAL_FLASH_ERROR_PROG
mbed_official 489:119543c9f674 211 #define FLASH_ERROR_PGP HAL_FLASH_ERROR_PGS
mbed_official 489:119543c9f674 212 #define FLASH_ERROR_WRP HAL_FLASH_ERROR_WRP
mbed_official 489:119543c9f674 213 #define FLASH_ERROR_OPTV HAL_FLASH_ERROR_OPTV
mbed_official 489:119543c9f674 214 #define FLASH_ERROR_OPTVUSR HAL_FLASH_ERROR_OPTVUSR
mbed_official 489:119543c9f674 215 #define FLASH_ERROR_PROG HAL_FLASH_ERROR_PROG
mbed_official 489:119543c9f674 216 #define FLASH_ERROR_OP HAL_FLASH_ERROR_OPERATION
mbed_official 489:119543c9f674 217 #define FLASH_ERROR_PGA HAL_FLASH_ERROR_PGA
mbed_official 489:119543c9f674 218 #define FLASH_ERROR_SIZE HAL_FLASH_ERROR_SIZE
mbed_official 489:119543c9f674 219 #define FLASH_ERROR_SIZ HAL_FLASH_ERROR_SIZE
mbed_official 489:119543c9f674 220 #define FLASH_ERROR_PGS HAL_FLASH_ERROR_PGS
mbed_official 489:119543c9f674 221 #define FLASH_ERROR_MIS HAL_FLASH_ERROR_MIS
mbed_official 489:119543c9f674 222 #define FLASH_ERROR_FAST HAL_FLASH_ERROR_FAST
mbed_official 489:119543c9f674 223 #define FLASH_ERROR_FWWERR HAL_FLASH_ERROR_FWWERR
mbed_official 489:119543c9f674 224 #define FLASH_ERROR_NOTZERO HAL_FLASH_ERROR_NOTZERO
mbed_official 489:119543c9f674 225 #define FLASH_ERROR_OPERATION HAL_FLASH_ERROR_OPERATION
mbed_official 489:119543c9f674 226 #define FLASH_ERROR_ERS HAL_FLASH_ERROR_ERS
mbed_official 489:119543c9f674 227
mbed_official 489:119543c9f674 228 /**
mbed_official 489:119543c9f674 229 * @}
mbed_official 489:119543c9f674 230 */
mbed_official 489:119543c9f674 231
mbed_official 489:119543c9f674 232 /** @defgroup HAL_SYSCFG_Aliased_Defines HAL SYSCFG Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 233 * @{
mbed_official 489:119543c9f674 234 */
mbed_official 489:119543c9f674 235
mbed_official 489:119543c9f674 236 #define SYSCFG_FASTMODEPLUS_I2C_PB6 I2C_FASTMODEPLUS_PB6
mbed_official 489:119543c9f674 237 #define SYSCFG_FASTMODEPLUS_I2C_PB7 I2C_FASTMODEPLUS_PB7
mbed_official 489:119543c9f674 238 #define SYSCFG_FASTMODEPLUS_I2C_PB8 I2C_FASTMODEPLUS_PB8
mbed_official 489:119543c9f674 239 #define SYSCFG_FASTMODEPLUS_I2C_PB9 I2C_FASTMODEPLUS_PB9
mbed_official 489:119543c9f674 240 #define SYSCFG_FASTMODEPLUS_I2C1 I2C_FASTMODEPLUS_I2C1
mbed_official 489:119543c9f674 241 #define SYSCFG_FASTMODEPLUS_I2C2 I2C_FASTMODEPLUS_I2C2
mbed_official 489:119543c9f674 242 #define SYSCFG_FASTMODEPLUS_I2C3 I2C_FASTMODEPLUS_I2C3
mbed_official 489:119543c9f674 243
mbed_official 489:119543c9f674 244 /**
mbed_official 489:119543c9f674 245 * @}
mbed_official 489:119543c9f674 246 */
mbed_official 489:119543c9f674 247
mbed_official 489:119543c9f674 248
mbed_official 489:119543c9f674 249 /** @defgroup LL_FSMC_Aliased_Defines LL FSMC Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 250 * @{
mbed_official 489:119543c9f674 251 */
mbed_official 489:119543c9f674 252
mbed_official 489:119543c9f674 253 #define FSMC_NORSRAM_TYPEDEF FSMC_NORSRAM_TypeDef
mbed_official 489:119543c9f674 254 #define FSMC_NORSRAM_EXTENDED_TYPEDEF FSMC_NORSRAM_EXTENDED_TypeDef
mbed_official 489:119543c9f674 255 /**
mbed_official 489:119543c9f674 256 * @}
mbed_official 489:119543c9f674 257 */
mbed_official 489:119543c9f674 258
mbed_official 489:119543c9f674 259 /** @defgroup HAL_GPIO_Aliased_Macros HAL GPIO Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 260 * @{
mbed_official 489:119543c9f674 261 */
mbed_official 489:119543c9f674 262 #define GET_GPIO_SOURCE GPIO_GET_INDEX
mbed_official 489:119543c9f674 263 #define GET_GPIO_INDEX GPIO_GET_INDEX
mbed_official 489:119543c9f674 264 /**
mbed_official 489:119543c9f674 265 * @}
mbed_official 489:119543c9f674 266 */
mbed_official 489:119543c9f674 267
mbed_official 489:119543c9f674 268
mbed_official 489:119543c9f674 269 /** @defgroup HAL_I2C_Aliased_Defines HAL I2C Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 270 * @{
mbed_official 489:119543c9f674 271 */
mbed_official 489:119543c9f674 272 #define I2C_DUALADDRESS_DISABLED I2C_DUALADDRESS_DISABLE
mbed_official 489:119543c9f674 273 #define I2C_DUALADDRESS_ENABLED I2C_DUALADDRESS_ENABLE
mbed_official 489:119543c9f674 274 #define I2C_GENERALCALL_DISABLED I2C_GENERALCALL_DISABLE
mbed_official 489:119543c9f674 275 #define I2C_GENERALCALL_ENABLED I2C_GENERALCALL_ENABLE
mbed_official 489:119543c9f674 276 #define I2C_NOSTRETCH_DISABLED I2C_NOSTRETCH_DISABLE
mbed_official 489:119543c9f674 277 #define I2C_NOSTRETCH_ENABLED I2C_NOSTRETCH_ENABLE
mbed_official 489:119543c9f674 278 #define I2C_ANALOGFILTER_ENABLED I2C_ANALOGFILTER_ENABLE
mbed_official 489:119543c9f674 279 #define I2C_ANALOGFILTER_DISABLED I2C_ANALOGFILTER_DISABLE
mbed_official 489:119543c9f674 280 /**
mbed_official 489:119543c9f674 281 * @}
mbed_official 489:119543c9f674 282 */
mbed_official 489:119543c9f674 283
mbed_official 489:119543c9f674 284 /** @defgroup HAL_IRDA_Aliased_Defines HAL IRDA Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 285 * @{
mbed_official 489:119543c9f674 286 */
mbed_official 489:119543c9f674 287 #define IRDA_ONE_BIT_SAMPLE_DISABLED IRDA_ONE_BIT_SAMPLE_DISABLE
mbed_official 489:119543c9f674 288 #define IRDA_ONE_BIT_SAMPLE_ENABLED IRDA_ONE_BIT_SAMPLE_ENABLE
mbed_official 489:119543c9f674 289
mbed_official 489:119543c9f674 290 /**
mbed_official 489:119543c9f674 291 * @}
mbed_official 489:119543c9f674 292 */
mbed_official 489:119543c9f674 293
mbed_official 489:119543c9f674 294 /** @defgroup HAL_IWDG_Aliased_Defines HAL IWDG Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 295 * @{
mbed_official 489:119543c9f674 296 */
mbed_official 489:119543c9f674 297 #define KR_KEY_RELOAD IWDG_KEY_RELOAD
mbed_official 489:119543c9f674 298 #define KR_KEY_ENABLE IWDG_KEY_ENABLE
mbed_official 489:119543c9f674 299 #define KR_KEY_EWA IWDG_KEY_WRITE_ACCESS_ENABLE
mbed_official 489:119543c9f674 300 #define KR_KEY_DWA IWDG_KEY_WRITE_ACCESS_DISABLE
mbed_official 489:119543c9f674 301 /**
mbed_official 489:119543c9f674 302 * @}
mbed_official 489:119543c9f674 303 */
mbed_official 489:119543c9f674 304
mbed_official 489:119543c9f674 305 /** @defgroup HAL_LPTIM_Aliased_Defines HAL LPTIM Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 306 * @{
mbed_official 489:119543c9f674 307 */
mbed_official 489:119543c9f674 308
mbed_official 489:119543c9f674 309 #define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSISTION LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION
mbed_official 489:119543c9f674 310 #define LPTIM_CLOCKSAMPLETIME_2TRANSISTIONS LPTIM_CLOCKSAMPLETIME_2TRANSITIONS
mbed_official 489:119543c9f674 311 #define LPTIM_CLOCKSAMPLETIME_4TRANSISTIONS LPTIM_CLOCKSAMPLETIME_4TRANSITIONS
mbed_official 489:119543c9f674 312 #define LPTIM_CLOCKSAMPLETIME_8TRANSISTIONS LPTIM_CLOCKSAMPLETIME_8TRANSITIONS
mbed_official 489:119543c9f674 313
mbed_official 489:119543c9f674 314 #define LPTIM_CLOCKPOLARITY_RISINGEDGE LPTIM_CLOCKPOLARITY_RISING
mbed_official 489:119543c9f674 315 #define LPTIM_CLOCKPOLARITY_FALLINGEDGE LPTIM_CLOCKPOLARITY_FALLING
mbed_official 489:119543c9f674 316 #define LPTIM_CLOCKPOLARITY_BOTHEDGES LPTIM_CLOCKPOLARITY_RISING_FALLING
mbed_official 489:119543c9f674 317 /**
mbed_official 489:119543c9f674 318 * @}
mbed_official 489:119543c9f674 319 */
mbed_official 489:119543c9f674 320
mbed_official 489:119543c9f674 321 /** @defgroup HAL_NAND_Aliased_Defines HAL NAND Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 322 * @{
mbed_official 489:119543c9f674 323 */
mbed_official 489:119543c9f674 324 #define NAND_AddressTypedef NAND_AddressTypeDef
mbed_official 489:119543c9f674 325
mbed_official 489:119543c9f674 326 /**
mbed_official 489:119543c9f674 327 * @}
mbed_official 489:119543c9f674 328 */
mbed_official 489:119543c9f674 329
mbed_official 489:119543c9f674 330 /** @defgroup HAL_NOR_Aliased_Defines HAL NOR Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 331 * @{
mbed_official 489:119543c9f674 332 */
mbed_official 489:119543c9f674 333 #define NOR_StatusTypedef HAL_NOR_StatusTypeDef
mbed_official 489:119543c9f674 334 #define NOR_SUCCESS HAL_NOR_STATUS_SUCCESS
mbed_official 489:119543c9f674 335 #define NOR_ONGOING HAL_NOR_STATUS_ONGOING
mbed_official 489:119543c9f674 336 #define NOR_ERROR HAL_NOR_STATUS_ERROR
mbed_official 489:119543c9f674 337 #define NOR_TIMEOUT HAL_NOR_STATUS_TIMEOUT
mbed_official 489:119543c9f674 338
mbed_official 489:119543c9f674 339 /**
mbed_official 489:119543c9f674 340 * @}
mbed_official 489:119543c9f674 341 */
mbed_official 489:119543c9f674 342
mbed_official 489:119543c9f674 343 /** @defgroup HAL_OPAMP_Aliased_Defines HAL OPAMP Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 344 * @{
mbed_official 489:119543c9f674 345 */
mbed_official 489:119543c9f674 346
mbed_official 489:119543c9f674 347 #define OPAMP_NONINVERTINGINPUT_VP0 OPAMP_NONINVERTINGINPUT_IO0
mbed_official 489:119543c9f674 348 #define OPAMP_NONINVERTINGINPUT_VP1 OPAMP_NONINVERTINGINPUT_IO1
mbed_official 489:119543c9f674 349 #define OPAMP_NONINVERTINGINPUT_VP2 OPAMP_NONINVERTINGINPUT_IO2
mbed_official 489:119543c9f674 350 #define OPAMP_NONINVERTINGINPUT_VP3 OPAMP_NONINVERTINGINPUT_IO3
mbed_official 489:119543c9f674 351
mbed_official 489:119543c9f674 352 #define OPAMP_SEC_NONINVERTINGINPUT_VP0 OPAMP_SEC_NONINVERTINGINPUT_IO0
mbed_official 489:119543c9f674 353 #define OPAMP_SEC_NONINVERTINGINPUT_VP1 OPAMP_SEC_NONINVERTINGINPUT_IO1
mbed_official 489:119543c9f674 354 #define OPAMP_SEC_NONINVERTINGINPUT_VP2 OPAMP_SEC_NONINVERTINGINPUT_IO2
mbed_official 489:119543c9f674 355 #define OPAMP_SEC_NONINVERTINGINPUT_VP3 OPAMP_SEC_NONINVERTINGINPUT_IO3
mbed_official 489:119543c9f674 356
mbed_official 489:119543c9f674 357 #define OPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0
mbed_official 489:119543c9f674 358 #define OPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1
mbed_official 489:119543c9f674 359
mbed_official 489:119543c9f674 360 #define IOPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0
mbed_official 489:119543c9f674 361 #define IOPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1
mbed_official 489:119543c9f674 362
mbed_official 489:119543c9f674 363 #define OPAMP_SEC_INVERTINGINPUT_VM0 OPAMP_SEC_INVERTINGINPUT_IO0
mbed_official 489:119543c9f674 364 #define OPAMP_SEC_INVERTINGINPUT_VM1 OPAMP_SEC_INVERTINGINPUT_IO1
mbed_official 489:119543c9f674 365
mbed_official 489:119543c9f674 366 #define OPAMP_INVERTINGINPUT_VINM OPAMP_SEC_INVERTINGINPUT_IO1
mbed_official 489:119543c9f674 367
mbed_official 489:119543c9f674 368 #define OPAMP_PGACONNECT_NO OPAMP_PGA_CONNECT_INVERTINGINPUT_NO
mbed_official 489:119543c9f674 369 #define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0
mbed_official 489:119543c9f674 370 #define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1
mbed_official 489:119543c9f674 371
mbed_official 489:119543c9f674 372 /**
mbed_official 489:119543c9f674 373 * @}
mbed_official 489:119543c9f674 374 */
mbed_official 489:119543c9f674 375
mbed_official 489:119543c9f674 376 /** @defgroup HAL_I2S_Aliased_Defines HAL I2S Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 377 * @{
mbed_official 489:119543c9f674 378 */
mbed_official 489:119543c9f674 379 #define I2S_STANDARD_PHILLIPS I2S_STANDARD_PHILIPS
mbed_official 489:119543c9f674 380 /**
mbed_official 489:119543c9f674 381 * @}
mbed_official 489:119543c9f674 382 */
mbed_official 489:119543c9f674 383
mbed_official 489:119543c9f674 384 /** @defgroup HAL_PCCARD_Aliased_Defines HAL PCCARD Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 385 * @{
mbed_official 489:119543c9f674 386 */
mbed_official 489:119543c9f674 387
mbed_official 489:119543c9f674 388 /* Compact Flash-ATA registers description */
mbed_official 489:119543c9f674 389 #define CF_DATA ATA_DATA
mbed_official 489:119543c9f674 390 #define CF_SECTOR_COUNT ATA_SECTOR_COUNT
mbed_official 489:119543c9f674 391 #define CF_SECTOR_NUMBER ATA_SECTOR_NUMBER
mbed_official 489:119543c9f674 392 #define CF_CYLINDER_LOW ATA_CYLINDER_LOW
mbed_official 489:119543c9f674 393 #define CF_CYLINDER_HIGH ATA_CYLINDER_HIGH
mbed_official 489:119543c9f674 394 #define CF_CARD_HEAD ATA_CARD_HEAD
mbed_official 489:119543c9f674 395 #define CF_STATUS_CMD ATA_STATUS_CMD
mbed_official 489:119543c9f674 396 #define CF_STATUS_CMD_ALTERNATE ATA_STATUS_CMD_ALTERNATE
mbed_official 489:119543c9f674 397 #define CF_COMMON_DATA_AREA ATA_COMMON_DATA_AREA
mbed_official 489:119543c9f674 398
mbed_official 489:119543c9f674 399 /* Compact Flash-ATA commands */
mbed_official 489:119543c9f674 400 #define CF_READ_SECTOR_CMD ATA_READ_SECTOR_CMD
mbed_official 489:119543c9f674 401 #define CF_WRITE_SECTOR_CMD ATA_WRITE_SECTOR_CMD
mbed_official 489:119543c9f674 402 #define CF_ERASE_SECTOR_CMD ATA_ERASE_SECTOR_CMD
mbed_official 489:119543c9f674 403 #define CF_IDENTIFY_CMD ATA_IDENTIFY_CMD
mbed_official 489:119543c9f674 404
mbed_official 489:119543c9f674 405 #define PCCARD_StatusTypedef HAL_PCCARD_StatusTypeDef
mbed_official 489:119543c9f674 406 #define PCCARD_SUCCESS HAL_PCCARD_STATUS_SUCCESS
mbed_official 489:119543c9f674 407 #define PCCARD_ONGOING HAL_PCCARD_STATUS_ONGOING
mbed_official 489:119543c9f674 408 #define PCCARD_ERROR HAL_PCCARD_STATUS_ERROR
mbed_official 489:119543c9f674 409 #define PCCARD_TIMEOUT HAL_PCCARD_STATUS_TIMEOUT
mbed_official 489:119543c9f674 410 /**
mbed_official 489:119543c9f674 411 * @}
mbed_official 489:119543c9f674 412 */
mbed_official 489:119543c9f674 413
mbed_official 489:119543c9f674 414 /** @defgroup HAL_RTC_Aliased_Defines HAL RTC Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 415 * @{
mbed_official 489:119543c9f674 416 */
mbed_official 489:119543c9f674 417
mbed_official 489:119543c9f674 418 #define FORMAT_BIN RTC_FORMAT_BIN
mbed_official 489:119543c9f674 419 #define FORMAT_BCD RTC_FORMAT_BCD
mbed_official 489:119543c9f674 420
mbed_official 489:119543c9f674 421 #define RTC_ALARMSUBSECONDMASK_None RTC_ALARMSUBSECONDMASK_NONE
mbed_official 489:119543c9f674 422 #define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE
mbed_official 489:119543c9f674 423 #define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE
mbed_official 489:119543c9f674 424 #define RTC_TAMPERMASK_FLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
mbed_official 489:119543c9f674 425 #define RTC_TAMPERMASK_FLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
mbed_official 489:119543c9f674 426
mbed_official 489:119543c9f674 427 #define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
mbed_official 489:119543c9f674 428 #define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
mbed_official 489:119543c9f674 429 #define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE
mbed_official 489:119543c9f674 430 #define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE
mbed_official 489:119543c9f674 431 #define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
mbed_official 489:119543c9f674 432 #define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
mbed_official 489:119543c9f674 433 #define RTC_TAMPER1_2_INTERRUPT RTC_ALL_TAMPER_INTERRUPT
mbed_official 489:119543c9f674 434 #define RTC_TAMPER1_2_3_INTERRUPT RTC_ALL_TAMPER_INTERRUPT
mbed_official 489:119543c9f674 435
mbed_official 489:119543c9f674 436 /**
mbed_official 489:119543c9f674 437 * @}
mbed_official 489:119543c9f674 438 */
mbed_official 489:119543c9f674 439
mbed_official 489:119543c9f674 440
mbed_official 489:119543c9f674 441 /** @defgroup HAL_SMARTCARD_Aliased_Defines HAL SMARTCARD Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 442 * @{
mbed_official 489:119543c9f674 443 */
mbed_official 489:119543c9f674 444 #define SMARTCARD_NACK_ENABLED SMARTCARD_NACK_ENABLE
mbed_official 489:119543c9f674 445 #define SMARTCARD_NACK_DISABLED SMARTCARD_NACK_DISABLE
mbed_official 489:119543c9f674 446
mbed_official 489:119543c9f674 447 #define SMARTCARD_ONEBIT_SAMPLING_DISABLED SMARTCARD_ONE_BIT_SAMPLE_DISABLE
mbed_official 489:119543c9f674 448 #define SMARTCARD_ONEBIT_SAMPLING_ENABLED SMARTCARD_ONE_BIT_SAMPLE_ENABLE
mbed_official 489:119543c9f674 449 #define SMARTCARD_ONEBIT_SAMPLING_DISABLE SMARTCARD_ONE_BIT_SAMPLE_DISABLE
mbed_official 489:119543c9f674 450 #define SMARTCARD_ONEBIT_SAMPLING_ENABLE SMARTCARD_ONE_BIT_SAMPLE_ENABLE
mbed_official 489:119543c9f674 451
mbed_official 489:119543c9f674 452 #define SMARTCARD_TIMEOUT_DISABLED SMARTCARD_TIMEOUT_DISABLE
mbed_official 489:119543c9f674 453 #define SMARTCARD_TIMEOUT_ENABLED SMARTCARD_TIMEOUT_ENABLE
mbed_official 489:119543c9f674 454
mbed_official 489:119543c9f674 455 #define SMARTCARD_LASTBIT_DISABLED SMARTCARD_LASTBIT_DISABLE
mbed_official 489:119543c9f674 456 #define SMARTCARD_LASTBIT_ENABLED SMARTCARD_LASTBIT_ENABLE
mbed_official 489:119543c9f674 457 /**
mbed_official 489:119543c9f674 458 * @}
mbed_official 489:119543c9f674 459 */
mbed_official 489:119543c9f674 460
mbed_official 489:119543c9f674 461
mbed_official 489:119543c9f674 462 /** @defgroup HAL_SMBUS_Aliased_Defines HAL SMBUS Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 463 * @{
mbed_official 489:119543c9f674 464 */
mbed_official 489:119543c9f674 465 #define SMBUS_DUALADDRESS_DISABLED SMBUS_DUALADDRESS_DISABLE
mbed_official 489:119543c9f674 466 #define SMBUS_DUALADDRESS_ENABLED SMBUS_DUALADDRESS_ENABLE
mbed_official 489:119543c9f674 467 #define SMBUS_GENERALCALL_DISABLED SMBUS_GENERALCALL_DISABLE
mbed_official 489:119543c9f674 468 #define SMBUS_GENERALCALL_ENABLED SMBUS_GENERALCALL_ENABLE
mbed_official 489:119543c9f674 469 #define SMBUS_NOSTRETCH_DISABLED SMBUS_NOSTRETCH_DISABLE
mbed_official 489:119543c9f674 470 #define SMBUS_NOSTRETCH_ENABLED SMBUS_NOSTRETCH_ENABLE
mbed_official 489:119543c9f674 471 #define SMBUS_ANALOGFILTER_ENABLED SMBUS_ANALOGFILTER_ENABLE
mbed_official 489:119543c9f674 472 #define SMBUS_ANALOGFILTER_DISABLED SMBUS_ANALOGFILTER_DISABLE
mbed_official 489:119543c9f674 473 #define HAL_SMBUS_STATE_SLAVE_LISTEN HAL_SMBUS_STATE_LISTEN
mbed_official 489:119543c9f674 474 /**
mbed_official 489:119543c9f674 475 * @}
mbed_official 489:119543c9f674 476 */
mbed_official 489:119543c9f674 477
mbed_official 489:119543c9f674 478 /** @defgroup HAL_SPI_Aliased_Defines HAL SPI Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 479 * @{
mbed_official 489:119543c9f674 480 */
mbed_official 489:119543c9f674 481 #define SPI_TIMODE_DISABLED SPI_TIMODE_DISABLE
mbed_official 489:119543c9f674 482 #define SPI_TIMODE_ENABLED SPI_TIMODE_ENABLE
mbed_official 489:119543c9f674 483
mbed_official 489:119543c9f674 484 #define SPI_CRCCALCULATION_DISABLED SPI_CRCCALCULATION_DISABLE
mbed_official 489:119543c9f674 485 #define SPI_CRCCALCULATION_ENABLED SPI_CRCCALCULATION_ENABLE
mbed_official 489:119543c9f674 486
mbed_official 489:119543c9f674 487 #define SPI_NSS_PULSE_DISABLED SPI_NSS_PULSE_DISABLE
mbed_official 489:119543c9f674 488 #define SPI_NSS_PULSE_ENABLED SPI_NSS_PULSE_ENABLE
mbed_official 489:119543c9f674 489
mbed_official 489:119543c9f674 490 /**
mbed_official 489:119543c9f674 491 * @}
mbed_official 489:119543c9f674 492 */
mbed_official 489:119543c9f674 493
mbed_official 489:119543c9f674 494 /** @defgroup HAL_TIM_Aliased_Defines HAL TIM Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 495 * @{
mbed_official 489:119543c9f674 496 */
mbed_official 489:119543c9f674 497 #define CCER_CCxE_MASK TIM_CCER_CCxE_MASK
mbed_official 489:119543c9f674 498 #define CCER_CCxNE_MASK TIM_CCER_CCxNE_MASK
mbed_official 489:119543c9f674 499
mbed_official 489:119543c9f674 500 #define TIM_DMABase_CR1 TIM_DMABASE_CR1
mbed_official 489:119543c9f674 501 #define TIM_DMABase_CR2 TIM_DMABASE_CR2
mbed_official 489:119543c9f674 502 #define TIM_DMABase_SMCR TIM_DMABASE_SMCR
mbed_official 489:119543c9f674 503 #define TIM_DMABase_DIER TIM_DMABASE_DIER
mbed_official 489:119543c9f674 504 #define TIM_DMABase_SR TIM_DMABASE_SR
mbed_official 489:119543c9f674 505 #define TIM_DMABase_EGR TIM_DMABASE_EGR
mbed_official 489:119543c9f674 506 #define TIM_DMABase_CCMR1 TIM_DMABASE_CCMR1
mbed_official 489:119543c9f674 507 #define TIM_DMABase_CCMR2 TIM_DMABASE_CCMR2
mbed_official 489:119543c9f674 508 #define TIM_DMABase_CCER TIM_DMABASE_CCER
mbed_official 489:119543c9f674 509 #define TIM_DMABase_CNT TIM_DMABASE_CNT
mbed_official 489:119543c9f674 510 #define TIM_DMABase_PSC TIM_DMABASE_PSC
mbed_official 489:119543c9f674 511 #define TIM_DMABase_ARR TIM_DMABASE_ARR
mbed_official 489:119543c9f674 512 #define TIM_DMABase_RCR TIM_DMABASE_RCR
mbed_official 489:119543c9f674 513 #define TIM_DMABase_CCR1 TIM_DMABASE_CCR1
mbed_official 489:119543c9f674 514 #define TIM_DMABase_CCR2 TIM_DMABASE_CCR2
mbed_official 489:119543c9f674 515 #define TIM_DMABase_CCR3 TIM_DMABASE_CCR3
mbed_official 489:119543c9f674 516 #define TIM_DMABase_CCR4 TIM_DMABASE_CCR4
mbed_official 489:119543c9f674 517 #define TIM_DMABase_BDTR TIM_DMABASE_BDTR
mbed_official 489:119543c9f674 518 #define TIM_DMABase_DCR TIM_DMABASE_DCR
mbed_official 489:119543c9f674 519 #define TIM_DMABase_DMAR TIM_DMABASE_DMAR
mbed_official 489:119543c9f674 520 #define TIM_DMABase_OR1 TIM_DMABASE_OR1
mbed_official 489:119543c9f674 521 #define TIM_DMABase_CCMR3 TIM_DMABASE_CCMR3
mbed_official 489:119543c9f674 522 #define TIM_DMABase_CCR5 TIM_DMABASE_CCR5
mbed_official 489:119543c9f674 523 #define TIM_DMABase_CCR6 TIM_DMABASE_CCR6
mbed_official 489:119543c9f674 524 #define TIM_DMABase_OR2 TIM_DMABASE_OR2
mbed_official 489:119543c9f674 525 #define TIM_DMABase_OR3 TIM_DMABASE_OR3
mbed_official 489:119543c9f674 526
mbed_official 489:119543c9f674 527 #define TIM_EventSource_Update TIM_EVENTSOURCE_UPDATE
mbed_official 489:119543c9f674 528 #define TIM_EventSource_CC1 TIM_EVENTSOURCE_CC1
mbed_official 489:119543c9f674 529 #define TIM_EventSource_CC2 TIM_EVENTSOURCE_CC2
mbed_official 489:119543c9f674 530 #define TIM_EventSource_CC3 TIM_EVENTSOURCE_CC3
mbed_official 489:119543c9f674 531 #define TIM_EventSource_CC4 TIM_EVENTSOURCE_CC4
mbed_official 489:119543c9f674 532 #define TIM_EventSource_COM TIM_EVENTSOURCE_COM
mbed_official 489:119543c9f674 533 #define TIM_EventSource_Trigger TIM_EVENTSOURCE_TRIGGER
mbed_official 489:119543c9f674 534 #define TIM_EventSource_Break TIM_EVENTSOURCE_BREAK
mbed_official 489:119543c9f674 535 #define TIM_EventSource_Break2 TIM_EVENTSOURCE_BREAK2
mbed_official 489:119543c9f674 536
mbed_official 489:119543c9f674 537 #define TIM_DMABurstLength_1Transfer TIM_DMABURSTLENGTH_1TRANSFER
mbed_official 489:119543c9f674 538 #define TIM_DMABurstLength_2Transfers TIM_DMABURSTLENGTH_2TRANSFERS
mbed_official 489:119543c9f674 539 #define TIM_DMABurstLength_3Transfers TIM_DMABURSTLENGTH_3TRANSFERS
mbed_official 489:119543c9f674 540 #define TIM_DMABurstLength_4Transfers TIM_DMABURSTLENGTH_4TRANSFERS
mbed_official 489:119543c9f674 541 #define TIM_DMABurstLength_5Transfers TIM_DMABURSTLENGTH_5TRANSFERS
mbed_official 489:119543c9f674 542 #define TIM_DMABurstLength_6Transfers TIM_DMABURSTLENGTH_6TRANSFERS
mbed_official 489:119543c9f674 543 #define TIM_DMABurstLength_7Transfers TIM_DMABURSTLENGTH_7TRANSFERS
mbed_official 489:119543c9f674 544 #define TIM_DMABurstLength_8Transfers TIM_DMABURSTLENGTH_8TRANSFERS
mbed_official 489:119543c9f674 545 #define TIM_DMABurstLength_9Transfers TIM_DMABURSTLENGTH_9TRANSFERS
mbed_official 489:119543c9f674 546 #define TIM_DMABurstLength_10Transfers TIM_DMABURSTLENGTH_10TRANSFERS
mbed_official 489:119543c9f674 547 #define TIM_DMABurstLength_11Transfers TIM_DMABURSTLENGTH_11TRANSFERS
mbed_official 489:119543c9f674 548 #define TIM_DMABurstLength_12Transfers TIM_DMABURSTLENGTH_12TRANSFERS
mbed_official 489:119543c9f674 549 #define TIM_DMABurstLength_13Transfers TIM_DMABURSTLENGTH_13TRANSFERS
mbed_official 489:119543c9f674 550 #define TIM_DMABurstLength_14Transfers TIM_DMABURSTLENGTH_14TRANSFERS
mbed_official 489:119543c9f674 551 #define TIM_DMABurstLength_15Transfers TIM_DMABURSTLENGTH_15TRANSFERS
mbed_official 489:119543c9f674 552 #define TIM_DMABurstLength_16Transfers TIM_DMABURSTLENGTH_16TRANSFERS
mbed_official 489:119543c9f674 553 #define TIM_DMABurstLength_17Transfers TIM_DMABURSTLENGTH_17TRANSFERS
mbed_official 489:119543c9f674 554 #define TIM_DMABurstLength_18Transfers TIM_DMABURSTLENGTH_18TRANSFERS
mbed_official 489:119543c9f674 555
mbed_official 489:119543c9f674 556 /**
mbed_official 489:119543c9f674 557 * @}
mbed_official 489:119543c9f674 558 */
mbed_official 489:119543c9f674 559
mbed_official 489:119543c9f674 560 /** @defgroup HAL_UART_Aliased_Defines HAL UART Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 561 * @{
mbed_official 489:119543c9f674 562 */
mbed_official 489:119543c9f674 563 #define UART_ONEBIT_SAMPLING_DISABLED UART_ONE_BIT_SAMPLE_DISABLE
mbed_official 489:119543c9f674 564 #define UART_ONEBIT_SAMPLING_ENABLED UART_ONE_BIT_SAMPLE_ENABLE
mbed_official 489:119543c9f674 565 #define UART_ONE_BIT_SAMPLE_DISABLED UART_ONE_BIT_SAMPLE_DISABLE
mbed_official 489:119543c9f674 566 #define UART_ONE_BIT_SAMPLE_ENABLED UART_ONE_BIT_SAMPLE_ENABLE
mbed_official 489:119543c9f674 567
mbed_official 489:119543c9f674 568 #define __HAL_UART_ONEBIT_ENABLE __HAL_UART_ONE_BIT_SAMPLE_ENABLE
mbed_official 489:119543c9f674 569 #define __HAL_UART_ONEBIT_DISABLE __HAL_UART_ONE_BIT_SAMPLE_DISABLE
mbed_official 489:119543c9f674 570
mbed_official 489:119543c9f674 571 #define __DIV_SAMPLING16 UART_DIV_SAMPLING16
mbed_official 489:119543c9f674 572 #define __DIVMANT_SAMPLING16 UART_DIVMANT_SAMPLING16
mbed_official 489:119543c9f674 573 #define __DIVFRAQ_SAMPLING16 UART_DIVFRAQ_SAMPLING16
mbed_official 489:119543c9f674 574 #define __UART_BRR_SAMPLING16 UART_BRR_SAMPLING16
mbed_official 489:119543c9f674 575
mbed_official 489:119543c9f674 576 #define __DIV_SAMPLING8 UART_DIV_SAMPLING8
mbed_official 489:119543c9f674 577 #define __DIVMANT_SAMPLING8 UART_DIVMANT_SAMPLING8
mbed_official 489:119543c9f674 578 #define __DIVFRAQ_SAMPLING8 UART_DIVFRAQ_SAMPLING8
mbed_official 489:119543c9f674 579 #define __UART_BRR_SAMPLING8 UART_BRR_SAMPLING8
mbed_official 489:119543c9f674 580
mbed_official 489:119543c9f674 581 #define UART_WAKEUPMETHODE_IDLELINE UART_WAKEUPMETHOD_IDLELINE
mbed_official 489:119543c9f674 582 #define UART_WAKEUPMETHODE_ADDRESSMARK UART_WAKEUPMETHOD_ADDRESSMARK
mbed_official 489:119543c9f674 583
mbed_official 489:119543c9f674 584 /**
mbed_official 489:119543c9f674 585 * @}
mbed_official 489:119543c9f674 586 */
mbed_official 489:119543c9f674 587
mbed_official 489:119543c9f674 588
mbed_official 489:119543c9f674 589 /** @defgroup HAL_USART_Aliased_Defines HAL USART Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 590 * @{
mbed_official 489:119543c9f674 591 */
mbed_official 489:119543c9f674 592
mbed_official 489:119543c9f674 593 #define USART_CLOCK_DISABLED USART_CLOCK_DISABLE
mbed_official 489:119543c9f674 594 #define USART_CLOCK_ENABLED USART_CLOCK_ENABLE
mbed_official 489:119543c9f674 595
mbed_official 489:119543c9f674 596 #define USARTNACK_ENABLED USART_NACK_ENABLE
mbed_official 489:119543c9f674 597 #define USARTNACK_DISABLED USART_NACK_DISABLE
mbed_official 489:119543c9f674 598 /**
mbed_official 489:119543c9f674 599 * @}
mbed_official 489:119543c9f674 600 */
mbed_official 489:119543c9f674 601
mbed_official 489:119543c9f674 602 /** @defgroup HAL_WWDG_Aliased_Defines HAL WWDG Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 603 * @{
mbed_official 489:119543c9f674 604 */
mbed_official 489:119543c9f674 605 #define CFR_BASE WWDG_CFR_BASE
mbed_official 489:119543c9f674 606
mbed_official 489:119543c9f674 607 /**
mbed_official 489:119543c9f674 608 * @}
mbed_official 489:119543c9f674 609 */
mbed_official 489:119543c9f674 610
mbed_official 489:119543c9f674 611 /** @defgroup HAL_CAN_Aliased_Defines HAL CAN Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 612 * @{
mbed_official 489:119543c9f674 613 */
mbed_official 489:119543c9f674 614 #define CAN_FilterFIFO0 CAN_FILTER_FIFO0
mbed_official 489:119543c9f674 615 #define CAN_FilterFIFO1 CAN_FILTER_FIFO1
mbed_official 489:119543c9f674 616 #define CAN_IT_RQCP0 CAN_IT_TME
mbed_official 489:119543c9f674 617 #define CAN_IT_RQCP1 CAN_IT_TME
mbed_official 489:119543c9f674 618 #define CAN_IT_RQCP2 CAN_IT_TME
mbed_official 489:119543c9f674 619 #define INAK_TIMEOUT CAN_TIMEOUT_VALUE
mbed_official 489:119543c9f674 620 #define SLAK_TIMEOUT CAN_TIMEOUT_VALUE
mbed_official 489:119543c9f674 621 #define CAN_TXSTATUS_FAILED ((uint8_t)0x00)
mbed_official 489:119543c9f674 622 #define CAN_TXSTATUS_OK ((uint8_t)0x01)
mbed_official 489:119543c9f674 623 #define CAN_TXSTATUS_PENDING ((uint8_t)0x02)
mbed_official 489:119543c9f674 624
mbed_official 489:119543c9f674 625 /**
mbed_official 489:119543c9f674 626 * @}
mbed_official 489:119543c9f674 627 */
mbed_official 489:119543c9f674 628
mbed_official 489:119543c9f674 629 /** @defgroup HAL_ETH_Aliased_Defines HAL ETH Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 630 * @{
mbed_official 489:119543c9f674 631 */
mbed_official 489:119543c9f674 632
mbed_official 489:119543c9f674 633 #define VLAN_TAG ETH_VLAN_TAG
mbed_official 489:119543c9f674 634 #define MIN_ETH_PAYLOAD ETH_MIN_ETH_PAYLOAD
mbed_official 489:119543c9f674 635 #define MAX_ETH_PAYLOAD ETH_MAX_ETH_PAYLOAD
mbed_official 489:119543c9f674 636 #define JUMBO_FRAME_PAYLOAD ETH_JUMBO_FRAME_PAYLOAD
mbed_official 489:119543c9f674 637 #define MACMIIAR_CR_MASK ETH_MACMIIAR_CR_MASK
mbed_official 489:119543c9f674 638 #define MACCR_CLEAR_MASK ETH_MACCR_CLEAR_MASK
mbed_official 489:119543c9f674 639 #define MACFCR_CLEAR_MASK ETH_MACFCR_CLEAR_MASK
mbed_official 489:119543c9f674 640 #define DMAOMR_CLEAR_MASK ETH_DMAOMR_CLEAR_MASK
mbed_official 489:119543c9f674 641
mbed_official 489:119543c9f674 642 #define ETH_MMCCR ((uint32_t)0x00000100)
mbed_official 489:119543c9f674 643 #define ETH_MMCRIR ((uint32_t)0x00000104)
mbed_official 489:119543c9f674 644 #define ETH_MMCTIR ((uint32_t)0x00000108)
mbed_official 489:119543c9f674 645 #define ETH_MMCRIMR ((uint32_t)0x0000010C)
mbed_official 489:119543c9f674 646 #define ETH_MMCTIMR ((uint32_t)0x00000110)
mbed_official 489:119543c9f674 647 #define ETH_MMCTGFSCCR ((uint32_t)0x0000014C)
mbed_official 489:119543c9f674 648 #define ETH_MMCTGFMSCCR ((uint32_t)0x00000150)
mbed_official 489:119543c9f674 649 #define ETH_MMCTGFCR ((uint32_t)0x00000168)
mbed_official 489:119543c9f674 650 #define ETH_MMCRFCECR ((uint32_t)0x00000194)
mbed_official 489:119543c9f674 651 #define ETH_MMCRFAECR ((uint32_t)0x00000198)
mbed_official 489:119543c9f674 652 #define ETH_MMCRGUFCR ((uint32_t)0x000001C4)
mbed_official 489:119543c9f674 653
mbed_official 489:119543c9f674 654 /**
mbed_official 489:119543c9f674 655 * @}
mbed_official 489:119543c9f674 656 */
mbed_official 489:119543c9f674 657
mbed_official 489:119543c9f674 658 /** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose
mbed_official 489:119543c9f674 659 * @{
mbed_official 489:119543c9f674 660 */
mbed_official 489:119543c9f674 661
mbed_official 489:119543c9f674 662 /**
mbed_official 489:119543c9f674 663 * @}
mbed_official 489:119543c9f674 664 */
mbed_official 489:119543c9f674 665
mbed_official 489:119543c9f674 666 /* Exported functions --------------------------------------------------------*/
mbed_official 489:119543c9f674 667
mbed_official 489:119543c9f674 668 /** @defgroup HAL_CRYP_Aliased_Functions HAL CRYP Aliased Functions maintained for legacy purpose
mbed_official 489:119543c9f674 669 * @{
mbed_official 489:119543c9f674 670 */
mbed_official 489:119543c9f674 671 #define HAL_CRYP_ComputationCpltCallback HAL_CRYPEx_ComputationCpltCallback
mbed_official 489:119543c9f674 672 /**
mbed_official 489:119543c9f674 673 * @}
mbed_official 489:119543c9f674 674 */
mbed_official 489:119543c9f674 675
mbed_official 489:119543c9f674 676 /** @defgroup HAL_HASH_Aliased_Functions HAL HASH Aliased Functions maintained for legacy purpose
mbed_official 489:119543c9f674 677 * @{
mbed_official 489:119543c9f674 678 */
mbed_official 489:119543c9f674 679
mbed_official 489:119543c9f674 680 #define HAL_HMAC_MD5_Finish HAL_HASH_MD5_Finish
mbed_official 489:119543c9f674 681 #define HAL_HMAC_SHA1_Finish HAL_HASH_SHA1_Finish
mbed_official 489:119543c9f674 682 #define HAL_HMAC_SHA224_Finish HAL_HASH_SHA224_Finish
mbed_official 489:119543c9f674 683 #define HAL_HMAC_SHA256_Finish HAL_HASH_SHA256_Finish
mbed_official 489:119543c9f674 684
mbed_official 489:119543c9f674 685 /*HASH Algorithm Selection*/
mbed_official 489:119543c9f674 686
mbed_official 489:119543c9f674 687 #define HASH_AlgoSelection_SHA1 HASH_ALGOSELECTION_SHA1
mbed_official 489:119543c9f674 688 #define HASH_AlgoSelection_SHA224 HASH_ALGOSELECTION_SHA224
mbed_official 489:119543c9f674 689 #define HASH_AlgoSelection_SHA256 HASH_ALGOSELECTION_SHA256
mbed_official 489:119543c9f674 690 #define HASH_AlgoSelection_MD5 HASH_ALGOSELECTION_MD5
mbed_official 489:119543c9f674 691
mbed_official 489:119543c9f674 692 #define HASH_AlgoMode_HASH HASH_ALGOMODE_HASH
mbed_official 489:119543c9f674 693 #define HASH_AlgoMode_HMAC HASH_ALGOMODE_HMAC
mbed_official 489:119543c9f674 694
mbed_official 489:119543c9f674 695 #define HASH_HMACKeyType_ShortKey HASH_HMAC_KEYTYPE_SHORTKEY
mbed_official 489:119543c9f674 696 #define HASH_HMACKeyType_LongKey HASH_HMAC_KEYTYPE_LONGKEY
mbed_official 489:119543c9f674 697 /**
mbed_official 489:119543c9f674 698 * @}
mbed_official 489:119543c9f674 699 */
mbed_official 489:119543c9f674 700
mbed_official 489:119543c9f674 701 /** @defgroup HAL_Aliased_Functions HAL Generic Aliased Functions maintained for legacy purpose
mbed_official 489:119543c9f674 702 * @{
mbed_official 489:119543c9f674 703 */
mbed_official 489:119543c9f674 704 #define HAL_EnableDBGSleepMode HAL_DBGMCU_EnableDBGSleepMode
mbed_official 489:119543c9f674 705 #define HAL_DisableDBGSleepMode HAL_DBGMCU_DisableDBGSleepMode
mbed_official 489:119543c9f674 706 #define HAL_EnableDBGStopMode HAL_DBGMCU_EnableDBGStopMode
mbed_official 489:119543c9f674 707 #define HAL_DisableDBGStopMode HAL_DBGMCU_DisableDBGStopMode
mbed_official 489:119543c9f674 708 #define HAL_EnableDBGStandbyMode HAL_DBGMCU_EnableDBGStandbyMode
mbed_official 489:119543c9f674 709 #define HAL_DisableDBGStandbyMode HAL_DBGMCU_DisableDBGStandbyMode
mbed_official 489:119543c9f674 710 #define HAL_DBG_LowPowerConfig(Periph, cmd) (((cmd)==ENABLE)? HAL_DBGMCU_DBG_EnableLowPowerConfig(Periph) : HAL_DBGMCU_DBG_DisableLowPowerConfig(Periph))
mbed_official 489:119543c9f674 711 #define HAL_VREFINT_OutputSelect HAL_SYSCFG_VREFINT_OutputSelect
mbed_official 489:119543c9f674 712 #define HAL_Lock_Cmd(cmd) (((cmd)==ENABLE) ? HAL_SYSCFG_Enable_Lock_VREFINT() : HAL_SYSCFG_Disable_Lock_VREFINT())
mbed_official 489:119543c9f674 713 #define HAL_VREFINT_Cmd(cmd) (((cmd)==ENABLE)? HAL_SYSCFG_EnableVREFINT() : HAL_SYSCFG_DisableVREFINT())
mbed_official 489:119543c9f674 714 #define HAL_ADC_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT())
mbed_official 489:119543c9f674 715 #define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor())
mbed_official 489:119543c9f674 716 /**
mbed_official 489:119543c9f674 717 * @}
mbed_official 489:119543c9f674 718 */
mbed_official 489:119543c9f674 719
mbed_official 489:119543c9f674 720 /** @defgroup HAL_FLASH_Aliased_Functions HAL FLASH Aliased Functions maintained for legacy purpose
mbed_official 489:119543c9f674 721 * @{
mbed_official 489:119543c9f674 722 */
mbed_official 489:119543c9f674 723 #define FLASH_HalfPageProgram HAL_FLASHEx_HalfPageProgram
mbed_official 489:119543c9f674 724 #define FLASH_EnableRunPowerDown HAL_FLASHEx_EnableRunPowerDown
mbed_official 489:119543c9f674 725 #define FLASH_DisableRunPowerDown HAL_FLASHEx_DisableRunPowerDown
mbed_official 489:119543c9f674 726 #define HAL_DATA_EEPROMEx_Unlock HAL_FLASHEx_DATAEEPROM_Unlock
mbed_official 489:119543c9f674 727 #define HAL_DATA_EEPROMEx_Lock HAL_FLASHEx_DATAEEPROM_Lock
mbed_official 489:119543c9f674 728 #define HAL_DATA_EEPROMEx_Erase HAL_FLASHEx_DATAEEPROM_Erase
mbed_official 489:119543c9f674 729 #define HAL_DATA_EEPROMEx_Program HAL_FLASHEx_DATAEEPROM_Program
mbed_official 489:119543c9f674 730
mbed_official 489:119543c9f674 731 /**
mbed_official 489:119543c9f674 732 * @}
mbed_official 489:119543c9f674 733 */
mbed_official 489:119543c9f674 734
mbed_official 489:119543c9f674 735 /** @defgroup HAL_I2C_Aliased_Functions HAL I2C Aliased Functions maintained for legacy purpose
mbed_official 489:119543c9f674 736 * @{
mbed_official 489:119543c9f674 737 */
mbed_official 489:119543c9f674 738 #define HAL_I2CEx_AnalogFilter_Config HAL_I2CEx_ConfigAnalogFilter
mbed_official 489:119543c9f674 739 #define HAL_I2CEx_DigitalFilter_Config HAL_I2CEx_ConfigDigitalFilter
mbed_official 489:119543c9f674 740
mbed_official 489:119543c9f674 741 #define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
mbed_official 489:119543c9f674 742 /**
mbed_official 489:119543c9f674 743 * @}
mbed_official 489:119543c9f674 744 */
mbed_official 489:119543c9f674 745
mbed_official 489:119543c9f674 746 /** @defgroup HAL_PWR_Aliased HAL PWR Aliased maintained for legacy purpose
mbed_official 489:119543c9f674 747 * @{
mbed_official 489:119543c9f674 748 */
mbed_official 489:119543c9f674 749 #define HAL_PWR_PVDConfig HAL_PWR_ConfigPVD
mbed_official 489:119543c9f674 750 #define HAL_PWR_DisableBkUpReg HAL_PWREx_DisableBkUpReg
mbed_official 489:119543c9f674 751 #define HAL_PWR_DisableFlashPowerDown HAL_PWREx_DisableFlashPowerDown
mbed_official 489:119543c9f674 752 #define HAL_PWR_DisableVddio2Monitor HAL_PWREx_DisableVddio2Monitor
mbed_official 489:119543c9f674 753 #define HAL_PWR_EnableBkUpReg HAL_PWREx_EnableBkUpReg
mbed_official 489:119543c9f674 754 #define HAL_PWR_EnableFlashPowerDown HAL_PWREx_EnableFlashPowerDown
mbed_official 489:119543c9f674 755 #define HAL_PWR_EnableVddio2Monitor HAL_PWREx_EnableVddio2Monitor
mbed_official 489:119543c9f674 756 #define HAL_PWR_PVD_PVM_IRQHandler HAL_PWREx_PVD_PVM_IRQHandler
mbed_official 489:119543c9f674 757 #define HAL_PWR_PVDLevelConfig HAL_PWR_ConfigPVD
mbed_official 489:119543c9f674 758 #define HAL_PWR_Vddio2Monitor_IRQHandler HAL_PWREx_Vddio2Monitor_IRQHandler
mbed_official 489:119543c9f674 759 #define HAL_PWR_Vddio2MonitorCallback HAL_PWREx_Vddio2MonitorCallback
mbed_official 489:119543c9f674 760 #define HAL_PWREx_ActivateOverDrive HAL_PWREx_EnableOverDrive
mbed_official 489:119543c9f674 761 #define HAL_PWREx_DeactivateOverDrive HAL_PWREx_DisableOverDrive
mbed_official 489:119543c9f674 762 #define HAL_PWREx_DisableSDADCAnalog HAL_PWREx_DisableSDADC
mbed_official 489:119543c9f674 763 #define HAL_PWREx_EnableSDADCAnalog HAL_PWREx_EnableSDADC
mbed_official 489:119543c9f674 764 #define HAL_PWREx_PVMConfig HAL_PWREx_ConfigPVM
mbed_official 489:119543c9f674 765
mbed_official 489:119543c9f674 766 #define PWR_MODE_NORMAL PWR_PVD_MODE_NORMAL
mbed_official 489:119543c9f674 767 #define PWR_MODE_IT_RISING PWR_PVD_MODE_IT_RISING
mbed_official 489:119543c9f674 768 #define PWR_MODE_IT_FALLING PWR_PVD_MODE_IT_FALLING
mbed_official 489:119543c9f674 769 #define PWR_MODE_IT_RISING_FALLING PWR_PVD_MODE_IT_RISING_FALLING
mbed_official 489:119543c9f674 770 #define PWR_MODE_EVENT_RISING PWR_PVD_MODE_EVENT_RISING
mbed_official 489:119543c9f674 771 #define PWR_MODE_EVENT_FALLING PWR_PVD_MODE_EVENT_FALLING
mbed_official 489:119543c9f674 772 #define PWR_MODE_EVENT_RISING_FALLING PWR_PVD_MODE_EVENT_RISING_FALLING
mbed_official 489:119543c9f674 773
mbed_official 489:119543c9f674 774 #define CR_OFFSET_BB PWR_CR_OFFSET_BB
mbed_official 489:119543c9f674 775 #define CSR_OFFSET_BB PWR_CSR_OFFSET_BB
mbed_official 489:119543c9f674 776
mbed_official 489:119543c9f674 777 #define DBP_BitNumber DBP_BIT_NUMBER
mbed_official 489:119543c9f674 778 #define PVDE_BitNumber PVDE_BIT_NUMBER
mbed_official 489:119543c9f674 779 #define PMODE_BitNumber PMODE_BIT_NUMBER
mbed_official 489:119543c9f674 780 #define EWUP_BitNumber EWUP_BIT_NUMBER
mbed_official 489:119543c9f674 781 #define FPDS_BitNumber FPDS_BIT_NUMBER
mbed_official 489:119543c9f674 782 #define ODEN_BitNumber ODEN_BIT_NUMBER
mbed_official 489:119543c9f674 783 #define ODSWEN_BitNumber ODSWEN_BIT_NUMBER
mbed_official 489:119543c9f674 784 #define MRLVDS_BitNumber MRLVDS_BIT_NUMBER
mbed_official 489:119543c9f674 785 #define LPLVDS_BitNumber LPLVDS_BIT_NUMBER
mbed_official 489:119543c9f674 786 #define BRE_BitNumber BRE_BIT_NUMBER
mbed_official 489:119543c9f674 787
mbed_official 489:119543c9f674 788 #define PWR_MODE_EVT PWR_PVD_MODE_NORMAL
mbed_official 489:119543c9f674 789
mbed_official 489:119543c9f674 790 /**
mbed_official 489:119543c9f674 791 * @}
mbed_official 489:119543c9f674 792 */
mbed_official 489:119543c9f674 793
mbed_official 489:119543c9f674 794 /** @defgroup HAL_SMBUS_Aliased_Functions HAL SMBUS Aliased Functions maintained for legacy purpose
mbed_official 489:119543c9f674 795 * @{
mbed_official 489:119543c9f674 796 */
mbed_official 489:119543c9f674 797 #define HAL_SMBUS_Slave_Listen_IT HAL_SMBUS_EnableListen_IT
mbed_official 489:119543c9f674 798 #define HAL_SMBUS_SlaveAddrCallback HAL_SMBUS_AddrCallback
mbed_official 489:119543c9f674 799 #define HAL_SMBUS_SlaveListenCpltCallback HAL_SMBUS_ListenCpltCallback
mbed_official 489:119543c9f674 800 /**
mbed_official 489:119543c9f674 801 * @}
mbed_official 489:119543c9f674 802 */
mbed_official 489:119543c9f674 803
mbed_official 489:119543c9f674 804 /** @defgroup HAL_SPI_Aliased_Functions HAL SPI Aliased Functions maintained for legacy purpose
mbed_official 489:119543c9f674 805 * @{
mbed_official 489:119543c9f674 806 */
mbed_official 489:119543c9f674 807 #define HAL_SPI_FlushRxFifo HAL_SPIEx_FlushRxFifo
mbed_official 489:119543c9f674 808 /**
mbed_official 489:119543c9f674 809 * @}
mbed_official 489:119543c9f674 810 */
mbed_official 489:119543c9f674 811
mbed_official 489:119543c9f674 812 /** @defgroup HAL_TIM_Aliased_Functions HAL TIM Aliased Functions maintained for legacy purpose
mbed_official 489:119543c9f674 813 * @{
mbed_official 489:119543c9f674 814 */
mbed_official 489:119543c9f674 815 #define HAL_TIM_DMADelayPulseCplt TIM_DMADelayPulseCplt
mbed_official 489:119543c9f674 816 #define HAL_TIM_DMAError TIM_DMAError
mbed_official 489:119543c9f674 817 #define HAL_TIM_DMACaptureCplt TIM_DMACaptureCplt
mbed_official 489:119543c9f674 818 #define HAL_TIMEx_DMACommutationCplt TIMEx_DMACommutationCplt
mbed_official 489:119543c9f674 819 /**
mbed_official 489:119543c9f674 820 * @}
mbed_official 489:119543c9f674 821 */
mbed_official 489:119543c9f674 822
mbed_official 489:119543c9f674 823 /** @defgroup HAL_UART_Aliased_Functions HAL UART Aliased Functions maintained for legacy purpose
mbed_official 489:119543c9f674 824 * @{
mbed_official 489:119543c9f674 825 */
mbed_official 489:119543c9f674 826 #define HAL_UART_WakeupCallback HAL_UARTEx_WakeupCallback
mbed_official 489:119543c9f674 827 /**
mbed_official 489:119543c9f674 828 * @}
mbed_official 489:119543c9f674 829 */
mbed_official 489:119543c9f674 830
mbed_official 489:119543c9f674 831
mbed_official 489:119543c9f674 832 /** @defgroup HAL_PPP_Aliased_Functions HAL PPP Aliased Functions maintained for legacy purpose
mbed_official 489:119543c9f674 833 * @{
mbed_official 489:119543c9f674 834 */
mbed_official 489:119543c9f674 835
mbed_official 489:119543c9f674 836 /**
mbed_official 489:119543c9f674 837 * @}
mbed_official 489:119543c9f674 838 */
mbed_official 489:119543c9f674 839
mbed_official 489:119543c9f674 840 /* Exported macros ------------------------------------------------------------*/
mbed_official 489:119543c9f674 841
mbed_official 489:119543c9f674 842 /** @defgroup HAL_AES_Aliased_Macros HAL CRYP Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 843 * @{
mbed_official 489:119543c9f674 844 */
mbed_official 489:119543c9f674 845 #define AES_IT_CC CRYP_IT_CC
mbed_official 489:119543c9f674 846 #define AES_IT_ERR CRYP_IT_ERR
mbed_official 489:119543c9f674 847 #define AES_FLAG_CCF CRYP_FLAG_CCF
mbed_official 489:119543c9f674 848 /**
mbed_official 489:119543c9f674 849 * @}
mbed_official 489:119543c9f674 850 */
mbed_official 489:119543c9f674 851
mbed_official 489:119543c9f674 852 /** @defgroup HAL_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 853 * @{
mbed_official 489:119543c9f674 854 */
mbed_official 489:119543c9f674 855 #define __HAL_GET_BOOT_MODE __HAL_SYSCFG_GET_BOOT_MODE
mbed_official 489:119543c9f674 856 #define __HAL_REMAPMEMORY_FLASH __HAL_SYSCFG_REMAPMEMORY_FLASH
mbed_official 489:119543c9f674 857 #define __HAL_REMAPMEMORY_SYSTEMFLASH __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH
mbed_official 489:119543c9f674 858 #define __HAL_REMAPMEMORY_SRAM __HAL_SYSCFG_REMAPMEMORY_SRAM
mbed_official 489:119543c9f674 859 #define __HAL_REMAPMEMORY_FMC __HAL_SYSCFG_REMAPMEMORY_FMC
mbed_official 489:119543c9f674 860 #define __HAL_REMAPMEMORY_FMC_SDRAM __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM
mbed_official 489:119543c9f674 861 #define __HAL_REMAPMEMORY_FSMC __HAL_SYSCFG_REMAPMEMORY_FSMC
mbed_official 489:119543c9f674 862 #define __HAL_REMAPMEMORY_QUADSPI __HAL_SYSCFG_REMAPMEMORY_QUADSPI
mbed_official 489:119543c9f674 863 #define __HAL_FMC_BANK __HAL_SYSCFG_FMC_BANK
mbed_official 489:119543c9f674 864 #define __HAL_GET_FLAG __HAL_SYSCFG_GET_FLAG
mbed_official 489:119543c9f674 865 #define __HAL_CLEAR_FLAG __HAL_SYSCFG_CLEAR_FLAG
mbed_official 489:119543c9f674 866 #define __HAL_VREFINT_OUT_ENABLE __HAL_SYSCFG_VREFINT_OUT_ENABLE
mbed_official 489:119543c9f674 867 #define __HAL_VREFINT_OUT_DISABLE __HAL_SYSCFG_VREFINT_OUT_DISABLE
mbed_official 489:119543c9f674 868
mbed_official 489:119543c9f674 869 #define SYSCFG_FLAG_VREF_READY SYSCFG_FLAG_VREFINT_READY
mbed_official 489:119543c9f674 870 #define SYSCFG_FLAG_RC48 RCC_FLAG_HSI48
mbed_official 489:119543c9f674 871 #define IS_SYSCFG_FASTMODEPLUS_CONFIG IS_I2C_FASTMODEPLUS
mbed_official 489:119543c9f674 872 #define UFB_MODE_BitNumber UFB_MODE_BIT_NUMBER
mbed_official 489:119543c9f674 873 #define CMP_PD_BitNumber CMP_PD_BIT_NUMBER
mbed_official 489:119543c9f674 874
mbed_official 489:119543c9f674 875 /**
mbed_official 489:119543c9f674 876 * @}
mbed_official 489:119543c9f674 877 */
mbed_official 489:119543c9f674 878
mbed_official 489:119543c9f674 879
mbed_official 489:119543c9f674 880 /** @defgroup HAL_ADC_Aliased_Macros HAL ADC Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 881 * @{
mbed_official 489:119543c9f674 882 */
mbed_official 489:119543c9f674 883 #define __ADC_ENABLE __HAL_ADC_ENABLE
mbed_official 489:119543c9f674 884 #define __ADC_DISABLE __HAL_ADC_DISABLE
mbed_official 489:119543c9f674 885 #define __HAL_ADC_ENABLING_CONDITIONS ADC_ENABLING_CONDITIONS
mbed_official 489:119543c9f674 886 #define __HAL_ADC_DISABLING_CONDITIONS ADC_DISABLING_CONDITIONS
mbed_official 489:119543c9f674 887 #define __HAL_ADC_IS_ENABLED ADC_IS_ENABLE
mbed_official 489:119543c9f674 888 #define __ADC_IS_ENABLED ADC_IS_ENABLE
mbed_official 489:119543c9f674 889 #define __HAL_ADC_IS_SOFTWARE_START_REGULAR ADC_IS_SOFTWARE_START_REGULAR
mbed_official 489:119543c9f674 890 #define __HAL_ADC_IS_SOFTWARE_START_INJECTED ADC_IS_SOFTWARE_START_INJECTED
mbed_official 489:119543c9f674 891 #define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED
mbed_official 489:119543c9f674 892 #define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR ADC_IS_CONVERSION_ONGOING_REGULAR
mbed_official 489:119543c9f674 893 #define __HAL_ADC_IS_CONVERSION_ONGOING_INJECTED ADC_IS_CONVERSION_ONGOING_INJECTED
mbed_official 489:119543c9f674 894 #define __HAL_ADC_IS_CONVERSION_ONGOING ADC_IS_CONVERSION_ONGOING
mbed_official 489:119543c9f674 895 #define __HAL_ADC_CLEAR_ERRORCODE ADC_CLEAR_ERRORCODE
mbed_official 489:119543c9f674 896
mbed_official 489:119543c9f674 897 #define __HAL_ADC_GET_RESOLUTION ADC_GET_RESOLUTION
mbed_official 489:119543c9f674 898 #define __HAL_ADC_JSQR_RK ADC_JSQR_RK
mbed_official 489:119543c9f674 899 #define __HAL_ADC_CFGR_AWD1CH ADC_CFGR_AWD1CH_SHIFT
mbed_official 489:119543c9f674 900 #define __HAL_ADC_CFGR_AWD23CR ADC_CFGR_AWD23CR
mbed_official 489:119543c9f674 901 #define __HAL_ADC_CFGR_INJECT_AUTO_CONVERSION ADC_CFGR_INJECT_AUTO_CONVERSION
mbed_official 489:119543c9f674 902 #define __HAL_ADC_CFGR_INJECT_CONTEXT_QUEUE ADC_CFGR_INJECT_CONTEXT_QUEUE
mbed_official 489:119543c9f674 903 #define __HAL_ADC_CFGR_INJECT_DISCCONTINUOUS ADC_CFGR_INJECT_DISCCONTINUOUS
mbed_official 489:119543c9f674 904 #define __HAL_ADC_CFGR_REG_DISCCONTINUOUS ADC_CFGR_REG_DISCCONTINUOUS
mbed_official 489:119543c9f674 905 #define __HAL_ADC_CFGR_DISCONTINUOUS_NUM ADC_CFGR_DISCONTINUOUS_NUM
mbed_official 489:119543c9f674 906 #define __HAL_ADC_CFGR_AUTOWAIT ADC_CFGR_AUTOWAIT
mbed_official 489:119543c9f674 907 #define __HAL_ADC_CFGR_CONTINUOUS ADC_CFGR_CONTINUOUS
mbed_official 489:119543c9f674 908 #define __HAL_ADC_CFGR_OVERRUN ADC_CFGR_OVERRUN
mbed_official 489:119543c9f674 909 #define __HAL_ADC_CFGR_DMACONTREQ ADC_CFGR_DMACONTREQ
mbed_official 489:119543c9f674 910 #define __HAL_ADC_CFGR_EXTSEL ADC_CFGR_EXTSEL_SET
mbed_official 489:119543c9f674 911 #define __HAL_ADC_JSQR_JEXTSEL ADC_JSQR_JEXTSEL_SET
mbed_official 489:119543c9f674 912 #define __HAL_ADC_OFR_CHANNEL ADC_OFR_CHANNEL
mbed_official 489:119543c9f674 913 #define __HAL_ADC_DIFSEL_CHANNEL ADC_DIFSEL_CHANNEL
mbed_official 489:119543c9f674 914 #define __HAL_ADC_CALFACT_DIFF_SET ADC_CALFACT_DIFF_SET
mbed_official 489:119543c9f674 915 #define __HAL_ADC_CALFACT_DIFF_GET ADC_CALFACT_DIFF_GET
mbed_official 489:119543c9f674 916 #define __HAL_ADC_TRX_HIGHTHRESHOLD ADC_TRX_HIGHTHRESHOLD
mbed_official 489:119543c9f674 917
mbed_official 489:119543c9f674 918 #define __HAL_ADC_OFFSET_SHIFT_RESOLUTION ADC_OFFSET_SHIFT_RESOLUTION
mbed_official 489:119543c9f674 919 #define __HAL_ADC_AWD1THRESHOLD_SHIFT_RESOLUTION ADC_AWD1THRESHOLD_SHIFT_RESOLUTION
mbed_official 489:119543c9f674 920 #define __HAL_ADC_AWD23THRESHOLD_SHIFT_RESOLUTION ADC_AWD23THRESHOLD_SHIFT_RESOLUTION
mbed_official 489:119543c9f674 921 #define __HAL_ADC_COMMON_REGISTER ADC_COMMON_REGISTER
mbed_official 489:119543c9f674 922 #define __HAL_ADC_COMMON_CCR_MULTI ADC_COMMON_CCR_MULTI
mbed_official 489:119543c9f674 923 #define __HAL_ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE
mbed_official 489:119543c9f674 924 #define __ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE
mbed_official 489:119543c9f674 925 #define __HAL_ADC_NONMULTIMODE_OR_MULTIMODEMASTER ADC_NONMULTIMODE_OR_MULTIMODEMASTER
mbed_official 489:119543c9f674 926 #define __HAL_ADC_COMMON_ADC_OTHER ADC_COMMON_ADC_OTHER
mbed_official 489:119543c9f674 927 #define __HAL_ADC_MULTI_SLAVE ADC_MULTI_SLAVE
mbed_official 489:119543c9f674 928
mbed_official 489:119543c9f674 929 #define __HAL_ADC_SQR1_L ADC_SQR1_L_SHIFT
mbed_official 489:119543c9f674 930 #define __HAL_ADC_JSQR_JL ADC_JSQR_JL_SHIFT
mbed_official 489:119543c9f674 931 #define __HAL_ADC_JSQR_RK_JL ADC_JSQR_RK_JL
mbed_official 489:119543c9f674 932 #define __HAL_ADC_CR1_DISCONTINUOUS_NUM ADC_CR1_DISCONTINUOUS_NUM
mbed_official 489:119543c9f674 933 #define __HAL_ADC_CR1_SCAN ADC_CR1_SCAN_SET
mbed_official 489:119543c9f674 934 #define __HAL_ADC_CONVCYCLES_MAX_RANGE ADC_CONVCYCLES_MAX_RANGE
mbed_official 489:119543c9f674 935 #define __HAL_ADC_CLOCK_PRESCALER_RANGE ADC_CLOCK_PRESCALER_RANGE
mbed_official 489:119543c9f674 936 #define __HAL_ADC_GET_CLOCK_PRESCALER ADC_GET_CLOCK_PRESCALER
mbed_official 489:119543c9f674 937
mbed_official 489:119543c9f674 938 #define __HAL_ADC_SQR1 ADC_SQR1
mbed_official 489:119543c9f674 939 #define __HAL_ADC_SMPR1 ADC_SMPR1
mbed_official 489:119543c9f674 940 #define __HAL_ADC_SMPR2 ADC_SMPR2
mbed_official 489:119543c9f674 941 #define __HAL_ADC_SQR3_RK ADC_SQR3_RK
mbed_official 489:119543c9f674 942 #define __HAL_ADC_SQR2_RK ADC_SQR2_RK
mbed_official 489:119543c9f674 943 #define __HAL_ADC_SQR1_RK ADC_SQR1_RK
mbed_official 489:119543c9f674 944 #define __HAL_ADC_CR2_CONTINUOUS ADC_CR2_CONTINUOUS
mbed_official 489:119543c9f674 945 #define __HAL_ADC_CR1_DISCONTINUOUS ADC_CR1_DISCONTINUOUS
mbed_official 489:119543c9f674 946 #define __HAL_ADC_CR1_SCANCONV ADC_CR1_SCANCONV
mbed_official 489:119543c9f674 947 #define __HAL_ADC_CR2_EOCSelection ADC_CR2_EOCSelection
mbed_official 489:119543c9f674 948 #define __HAL_ADC_CR2_DMAContReq ADC_CR2_DMAContReq
mbed_official 489:119543c9f674 949 #define __HAL_ADC_GET_RESOLUTION ADC_GET_RESOLUTION
mbed_official 489:119543c9f674 950 #define __HAL_ADC_JSQR ADC_JSQR
mbed_official 489:119543c9f674 951
mbed_official 489:119543c9f674 952 #define __HAL_ADC_CHSELR_CHANNEL ADC_CHSELR_CHANNEL
mbed_official 489:119543c9f674 953 #define __HAL_ADC_CFGR1_REG_DISCCONTINUOUS ADC_CFGR1_REG_DISCCONTINUOUS
mbed_official 489:119543c9f674 954 #define __HAL_ADC_CFGR1_AUTOOFF ADC_CFGR1_AUTOOFF
mbed_official 489:119543c9f674 955 #define __HAL_ADC_CFGR1_AUTOWAIT ADC_CFGR1_AUTOWAIT
mbed_official 489:119543c9f674 956 #define __HAL_ADC_CFGR1_CONTINUOUS ADC_CFGR1_CONTINUOUS
mbed_official 489:119543c9f674 957 #define __HAL_ADC_CFGR1_OVERRUN ADC_CFGR1_OVERRUN
mbed_official 489:119543c9f674 958 #define __HAL_ADC_CFGR1_SCANDIR ADC_CFGR1_SCANDIR
mbed_official 489:119543c9f674 959 #define __HAL_ADC_CFGR1_DMACONTREQ ADC_CFGR1_DMACONTREQ
mbed_official 489:119543c9f674 960
mbed_official 489:119543c9f674 961 /**
mbed_official 489:119543c9f674 962 * @}
mbed_official 489:119543c9f674 963 */
mbed_official 489:119543c9f674 964
mbed_official 489:119543c9f674 965 /** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 966 * @{
mbed_official 489:119543c9f674 967 */
mbed_official 489:119543c9f674 968 #define __HAL_DHR12R1_ALIGNEMENT DAC_DHR12R1_ALIGNMENT
mbed_official 489:119543c9f674 969 #define __HAL_DHR12R2_ALIGNEMENT DAC_DHR12R2_ALIGNMENT
mbed_official 489:119543c9f674 970 #define __HAL_DHR12RD_ALIGNEMENT DAC_DHR12RD_ALIGNMENT
mbed_official 489:119543c9f674 971 #define IS_DAC_GENERATE_WAVE IS_DAC_WAVE
mbed_official 489:119543c9f674 972
mbed_official 489:119543c9f674 973 /**
mbed_official 489:119543c9f674 974 * @}
mbed_official 489:119543c9f674 975 */
mbed_official 489:119543c9f674 976
mbed_official 489:119543c9f674 977 /** @defgroup HAL_DBGMCU_Aliased_Macros HAL DBGMCU Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 978 * @{
mbed_official 489:119543c9f674 979 */
mbed_official 489:119543c9f674 980 #define __HAL_FREEZE_TIM1_DBGMCU __HAL_DBGMCU_FREEZE_TIM1
mbed_official 489:119543c9f674 981 #define __HAL_UNFREEZE_TIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM1
mbed_official 489:119543c9f674 982 #define __HAL_FREEZE_TIM2_DBGMCU __HAL_DBGMCU_FREEZE_TIM2
mbed_official 489:119543c9f674 983 #define __HAL_UNFREEZE_TIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM2
mbed_official 489:119543c9f674 984 #define __HAL_FREEZE_TIM3_DBGMCU __HAL_DBGMCU_FREEZE_TIM3
mbed_official 489:119543c9f674 985 #define __HAL_UNFREEZE_TIM3_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM3
mbed_official 489:119543c9f674 986 #define __HAL_FREEZE_TIM4_DBGMCU __HAL_DBGMCU_FREEZE_TIM4
mbed_official 489:119543c9f674 987 #define __HAL_UNFREEZE_TIM4_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM4
mbed_official 489:119543c9f674 988 #define __HAL_FREEZE_TIM5_DBGMCU __HAL_DBGMCU_FREEZE_TIM5
mbed_official 489:119543c9f674 989 #define __HAL_UNFREEZE_TIM5_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM5
mbed_official 489:119543c9f674 990 #define __HAL_FREEZE_TIM6_DBGMCU __HAL_DBGMCU_FREEZE_TIM6
mbed_official 489:119543c9f674 991 #define __HAL_UNFREEZE_TIM6_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM6
mbed_official 489:119543c9f674 992 #define __HAL_FREEZE_TIM7_DBGMCU __HAL_DBGMCU_FREEZE_TIM7
mbed_official 489:119543c9f674 993 #define __HAL_UNFREEZE_TIM7_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM7
mbed_official 489:119543c9f674 994 #define __HAL_FREEZE_TIM8_DBGMCU __HAL_DBGMCU_FREEZE_TIM8
mbed_official 489:119543c9f674 995 #define __HAL_UNFREEZE_TIM8_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM8
mbed_official 489:119543c9f674 996
mbed_official 489:119543c9f674 997 #define __HAL_FREEZE_TIM9_DBGMCU __HAL_DBGMCU_FREEZE_TIM9
mbed_official 489:119543c9f674 998 #define __HAL_UNFREEZE_TIM9_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM9
mbed_official 489:119543c9f674 999 #define __HAL_FREEZE_TIM10_DBGMCU __HAL_DBGMCU_FREEZE_TIM10
mbed_official 489:119543c9f674 1000 #define __HAL_UNFREEZE_TIM10_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM10
mbed_official 489:119543c9f674 1001 #define __HAL_FREEZE_TIM11_DBGMCU __HAL_DBGMCU_FREEZE_TIM11
mbed_official 489:119543c9f674 1002 #define __HAL_UNFREEZE_TIM11_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM11
mbed_official 489:119543c9f674 1003 #define __HAL_FREEZE_TIM12_DBGMCU __HAL_DBGMCU_FREEZE_TIM12
mbed_official 489:119543c9f674 1004 #define __HAL_UNFREEZE_TIM12_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM12
mbed_official 489:119543c9f674 1005 #define __HAL_FREEZE_TIM13_DBGMCU __HAL_DBGMCU_FREEZE_TIM13
mbed_official 489:119543c9f674 1006 #define __HAL_UNFREEZE_TIM13_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM13
mbed_official 489:119543c9f674 1007 #define __HAL_FREEZE_TIM14_DBGMCU __HAL_DBGMCU_FREEZE_TIM14
mbed_official 489:119543c9f674 1008 #define __HAL_UNFREEZE_TIM14_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM14
mbed_official 489:119543c9f674 1009 #define __HAL_FREEZE_CAN2_DBGMCU __HAL_DBGMCU_FREEZE_CAN2
mbed_official 489:119543c9f674 1010 #define __HAL_UNFREEZE_CAN2_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN2
mbed_official 489:119543c9f674 1011
mbed_official 489:119543c9f674 1012
mbed_official 489:119543c9f674 1013 #define __HAL_FREEZE_TIM15_DBGMCU __HAL_DBGMCU_FREEZE_TIM15
mbed_official 489:119543c9f674 1014 #define __HAL_UNFREEZE_TIM15_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM15
mbed_official 489:119543c9f674 1015 #define __HAL_FREEZE_TIM16_DBGMCU __HAL_DBGMCU_FREEZE_TIM16
mbed_official 489:119543c9f674 1016 #define __HAL_UNFREEZE_TIM16_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM16
mbed_official 489:119543c9f674 1017 #define __HAL_FREEZE_TIM17_DBGMCU __HAL_DBGMCU_FREEZE_TIM17
mbed_official 489:119543c9f674 1018 #define __HAL_UNFREEZE_TIM17_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM17
mbed_official 489:119543c9f674 1019 #define __HAL_FREEZE_RTC_DBGMCU __HAL_DBGMCU_FREEZE_RTC
mbed_official 489:119543c9f674 1020 #define __HAL_UNFREEZE_RTC_DBGMCU __HAL_DBGMCU_UNFREEZE_RTC
mbed_official 489:119543c9f674 1021 #define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG
mbed_official 489:119543c9f674 1022 #define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_WWDG
mbed_official 489:119543c9f674 1023 #define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG
mbed_official 489:119543c9f674 1024 #define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_IWDG
mbed_official 489:119543c9f674 1025 #define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT
mbed_official 489:119543c9f674 1026 #define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT
mbed_official 489:119543c9f674 1027 #define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT
mbed_official 489:119543c9f674 1028 #define __HAL_UNFREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT
mbed_official 489:119543c9f674 1029 #define __HAL_FREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT
mbed_official 489:119543c9f674 1030 #define __HAL_UNFREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT
mbed_official 489:119543c9f674 1031 #define __HAL_FREEZE_CAN1_DBGMCU __HAL_DBGMCU_FREEZE_CAN1
mbed_official 489:119543c9f674 1032 #define __HAL_UNFREEZE_CAN1_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN1
mbed_official 489:119543c9f674 1033 #define __HAL_FREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM1
mbed_official 489:119543c9f674 1034 #define __HAL_UNFREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM1
mbed_official 489:119543c9f674 1035 #define __HAL_FREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM2
mbed_official 489:119543c9f674 1036 #define __HAL_UNFREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM2
mbed_official 489:119543c9f674 1037
mbed_official 489:119543c9f674 1038 /**
mbed_official 489:119543c9f674 1039 * @}
mbed_official 489:119543c9f674 1040 */
mbed_official 489:119543c9f674 1041
mbed_official 489:119543c9f674 1042 /** @defgroup HAL_COMP_Aliased_Macros HAL COMP Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 1043 * @{
mbed_official 489:119543c9f674 1044 */
mbed_official 489:119543c9f674 1045
mbed_official 489:119543c9f674 1046 #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
mbed_official 489:119543c9f674 1047 __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
mbed_official 489:119543c9f674 1048 #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
mbed_official 489:119543c9f674 1049 __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE())
mbed_official 489:119543c9f674 1050 #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
mbed_official 489:119543c9f674 1051 __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE())
mbed_official 489:119543c9f674 1052 #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
mbed_official 489:119543c9f674 1053 __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE())
mbed_official 489:119543c9f674 1054 #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
mbed_official 489:119543c9f674 1055 __HAL_COMP_COMP2_EXTI_ENABLE_IT())
mbed_official 489:119543c9f674 1056 #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
mbed_official 489:119543c9f674 1057 __HAL_COMP_COMP2_EXTI_DISABLE_IT())
mbed_official 489:119543c9f674 1058 #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
mbed_official 489:119543c9f674 1059 __HAL_COMP_COMP2_EXTI_GET_FLAG())
mbed_official 489:119543c9f674 1060 #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
mbed_official 489:119543c9f674 1061 __HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
mbed_official 489:119543c9f674 1062 #define __HAL_COMP_GET_EXTI_LINE COMP_GET_EXTI_LINE
mbed_official 489:119543c9f674 1063
mbed_official 489:119543c9f674 1064 /**
mbed_official 489:119543c9f674 1065 * @}
mbed_official 489:119543c9f674 1066 */
mbed_official 489:119543c9f674 1067
mbed_official 489:119543c9f674 1068 /** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 1069 * @{
mbed_official 489:119543c9f674 1070 */
mbed_official 489:119543c9f674 1071
mbed_official 489:119543c9f674 1072 #define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_WAVE_NONE) || \
mbed_official 489:119543c9f674 1073 ((WAVE) == DAC_WAVE_NOISE)|| \
mbed_official 489:119543c9f674 1074 ((WAVE) == DAC_WAVE_TRIANGLE))
mbed_official 489:119543c9f674 1075
mbed_official 489:119543c9f674 1076 /**
mbed_official 489:119543c9f674 1077 * @}
mbed_official 489:119543c9f674 1078 */
mbed_official 489:119543c9f674 1079
mbed_official 489:119543c9f674 1080 /** @defgroup HAL_FLASH_Aliased_Macros HAL FLASH Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 1081 * @{
mbed_official 489:119543c9f674 1082 */
mbed_official 489:119543c9f674 1083
mbed_official 489:119543c9f674 1084 #define IS_WRPAREA IS_OB_WRPAREA
mbed_official 489:119543c9f674 1085 #define IS_TYPEPROGRAM IS_FLASH_TYPEPROGRAM
mbed_official 489:119543c9f674 1086 #define IS_TYPEPROGRAMFLASH IS_FLASH_TYPEPROGRAM
mbed_official 489:119543c9f674 1087 #define IS_TYPEERASE IS_FLASH_TYPEERASE
mbed_official 489:119543c9f674 1088
mbed_official 489:119543c9f674 1089 /**
mbed_official 489:119543c9f674 1090 * @}
mbed_official 489:119543c9f674 1091 */
mbed_official 489:119543c9f674 1092
mbed_official 489:119543c9f674 1093 /** @defgroup HAL_I2C_Aliased_Macros HAL I2C Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 1094 * @{
mbed_official 489:119543c9f674 1095 */
mbed_official 489:119543c9f674 1096
mbed_official 489:119543c9f674 1097 #define __HAL_I2C_RESET_CR2 I2C_RESET_CR2
mbed_official 489:119543c9f674 1098 #define __HAL_I2C_GENERATE_START I2C_GENERATE_START
mbed_official 489:119543c9f674 1099 #define __HAL_I2C_FREQ_RANGE I2C_FREQ_RANGE
mbed_official 489:119543c9f674 1100 #define __HAL_I2C_RISE_TIME I2C_RISE_TIME
mbed_official 489:119543c9f674 1101 #define __HAL_I2C_SPEED_STANDARD I2C_SPEED_STANDARD
mbed_official 489:119543c9f674 1102 #define __HAL_I2C_SPEED_FAST I2C_SPEED_FAST
mbed_official 489:119543c9f674 1103 #define __HAL_I2C_SPEED I2C_SPEED
mbed_official 489:119543c9f674 1104 #define __HAL_I2C_7BIT_ADD_WRITE I2C_7BIT_ADD_WRITE
mbed_official 489:119543c9f674 1105 #define __HAL_I2C_7BIT_ADD_READ I2C_7BIT_ADD_READ
mbed_official 489:119543c9f674 1106 #define __HAL_I2C_10BIT_ADDRESS I2C_10BIT_ADDRESS
mbed_official 489:119543c9f674 1107 #define __HAL_I2C_10BIT_HEADER_WRITE I2C_10BIT_HEADER_WRITE
mbed_official 489:119543c9f674 1108 #define __HAL_I2C_10BIT_HEADER_READ I2C_10BIT_HEADER_READ
mbed_official 489:119543c9f674 1109 #define __HAL_I2C_MEM_ADD_MSB I2C_MEM_ADD_MSB
mbed_official 489:119543c9f674 1110 #define __HAL_I2C_MEM_ADD_LSB I2C_MEM_ADD_LSB
mbed_official 489:119543c9f674 1111 #define __HAL_I2C_FREQRANGE I2C_FREQRANGE
mbed_official 489:119543c9f674 1112 /**
mbed_official 489:119543c9f674 1113 * @}
mbed_official 489:119543c9f674 1114 */
mbed_official 489:119543c9f674 1115
mbed_official 489:119543c9f674 1116 /** @defgroup HAL_I2S_Aliased_Macros HAL I2S Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 1117 * @{
mbed_official 489:119543c9f674 1118 */
mbed_official 489:119543c9f674 1119
mbed_official 489:119543c9f674 1120 #define IS_I2S_INSTANCE IS_I2S_ALL_INSTANCE
mbed_official 489:119543c9f674 1121 #define IS_I2S_INSTANCE_EXT IS_I2S_ALL_INSTANCE_EXT
mbed_official 489:119543c9f674 1122
mbed_official 489:119543c9f674 1123 /**
mbed_official 489:119543c9f674 1124 * @}
mbed_official 489:119543c9f674 1125 */
mbed_official 489:119543c9f674 1126
mbed_official 489:119543c9f674 1127 /** @defgroup HAL_IRDA_Aliased_Macros HAL IRDA Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 1128 * @{
mbed_official 489:119543c9f674 1129 */
mbed_official 489:119543c9f674 1130
mbed_official 489:119543c9f674 1131 #define __IRDA_DISABLE __HAL_IRDA_DISABLE
mbed_official 489:119543c9f674 1132 #define __IRDA_ENABLE __HAL_IRDA_ENABLE
mbed_official 489:119543c9f674 1133
mbed_official 489:119543c9f674 1134 #define __HAL_IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE
mbed_official 489:119543c9f674 1135 #define __HAL_IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION
mbed_official 489:119543c9f674 1136 #define __IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE
mbed_official 489:119543c9f674 1137 #define __IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION
mbed_official 489:119543c9f674 1138
mbed_official 489:119543c9f674 1139 #define IS_IRDA_ONEBIT_SAMPLE IS_IRDA_ONE_BIT_SAMPLE
mbed_official 489:119543c9f674 1140
mbed_official 489:119543c9f674 1141
mbed_official 489:119543c9f674 1142 /**
mbed_official 489:119543c9f674 1143 * @}
mbed_official 489:119543c9f674 1144 */
mbed_official 489:119543c9f674 1145
mbed_official 489:119543c9f674 1146
mbed_official 489:119543c9f674 1147 /** @defgroup HAL_IWDG_Aliased_Macros HAL IWDG Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 1148 * @{
mbed_official 489:119543c9f674 1149 */
mbed_official 489:119543c9f674 1150 #define __HAL_IWDG_ENABLE_WRITE_ACCESS IWDG_ENABLE_WRITE_ACCESS
mbed_official 489:119543c9f674 1151 #define __HAL_IWDG_DISABLE_WRITE_ACCESS IWDG_DISABLE_WRITE_ACCESS
mbed_official 489:119543c9f674 1152 /**
mbed_official 489:119543c9f674 1153 * @}
mbed_official 489:119543c9f674 1154 */
mbed_official 489:119543c9f674 1155
mbed_official 489:119543c9f674 1156
mbed_official 489:119543c9f674 1157 /** @defgroup HAL_LPTIM_Aliased_Macros HAL LPTIM Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 1158 * @{
mbed_official 489:119543c9f674 1159 */
mbed_official 489:119543c9f674 1160
mbed_official 489:119543c9f674 1161 #define __HAL_LPTIM_ENABLE_INTERRUPT __HAL_LPTIM_ENABLE_IT
mbed_official 489:119543c9f674 1162 #define __HAL_LPTIM_DISABLE_INTERRUPT __HAL_LPTIM_DISABLE_IT
mbed_official 489:119543c9f674 1163 #define __HAL_LPTIM_GET_ITSTATUS __HAL_LPTIM_GET_IT_SOURCE
mbed_official 489:119543c9f674 1164
mbed_official 489:119543c9f674 1165 /**
mbed_official 489:119543c9f674 1166 * @}
mbed_official 489:119543c9f674 1167 */
mbed_official 489:119543c9f674 1168
mbed_official 489:119543c9f674 1169
mbed_official 489:119543c9f674 1170 /** @defgroup HAL_OPAMP_Aliased_Macros HAL OPAMP Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 1171 * @{
mbed_official 489:119543c9f674 1172 */
mbed_official 489:119543c9f674 1173 #define __OPAMP_CSR_OPAXPD OPAMP_CSR_OPAXPD
mbed_official 489:119543c9f674 1174 #define __OPAMP_CSR_S3SELX OPAMP_CSR_S3SELX
mbed_official 489:119543c9f674 1175 #define __OPAMP_CSR_S4SELX OPAMP_CSR_S4SELX
mbed_official 489:119543c9f674 1176 #define __OPAMP_CSR_S5SELX OPAMP_CSR_S5SELX
mbed_official 489:119543c9f674 1177 #define __OPAMP_CSR_S6SELX OPAMP_CSR_S6SELX
mbed_official 489:119543c9f674 1178 #define __OPAMP_CSR_OPAXCAL_L OPAMP_CSR_OPAXCAL_L
mbed_official 489:119543c9f674 1179 #define __OPAMP_CSR_OPAXCAL_H OPAMP_CSR_OPAXCAL_H
mbed_official 489:119543c9f674 1180 #define __OPAMP_CSR_OPAXLPM OPAMP_CSR_OPAXLPM
mbed_official 489:119543c9f674 1181 #define __OPAMP_CSR_ALL_SWITCHES OPAMP_CSR_ALL_SWITCHES
mbed_official 489:119543c9f674 1182 #define __OPAMP_CSR_ANAWSELX OPAMP_CSR_ANAWSELX
mbed_official 489:119543c9f674 1183 #define __OPAMP_CSR_OPAXCALOUT OPAMP_CSR_OPAXCALOUT
mbed_official 489:119543c9f674 1184 #define __OPAMP_OFFSET_TRIM_BITSPOSITION OPAMP_OFFSET_TRIM_BITSPOSITION
mbed_official 489:119543c9f674 1185 #define __OPAMP_OFFSET_TRIM_SET OPAMP_OFFSET_TRIM_SET
mbed_official 489:119543c9f674 1186
mbed_official 489:119543c9f674 1187 /**
mbed_official 489:119543c9f674 1188 * @}
mbed_official 489:119543c9f674 1189 */
mbed_official 489:119543c9f674 1190
mbed_official 489:119543c9f674 1191
mbed_official 489:119543c9f674 1192 /** @defgroup HAL_PWR_Aliased_Macros HAL PWR Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 1193 * @{
mbed_official 489:119543c9f674 1194 */
mbed_official 489:119543c9f674 1195 #define __HAL_PVD_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT
mbed_official 489:119543c9f674 1196 #define __HAL_PVD_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT
mbed_official 489:119543c9f674 1197 #define __HAL_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
mbed_official 489:119543c9f674 1198 #define __HAL_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
mbed_official 489:119543c9f674 1199 #define __HAL_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
mbed_official 489:119543c9f674 1200 #define __HAL_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
mbed_official 489:119543c9f674 1201 #define __HAL_PVM_EVENT_DISABLE __HAL_PWR_PVM_EVENT_DISABLE
mbed_official 489:119543c9f674 1202 #define __HAL_PVM_EVENT_ENABLE __HAL_PWR_PVM_EVENT_ENABLE
mbed_official 489:119543c9f674 1203 #define __HAL_PVM_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_DISABLE
mbed_official 489:119543c9f674 1204 #define __HAL_PVM_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_ENABLE
mbed_official 489:119543c9f674 1205 #define __HAL_PVM_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_DISABLE
mbed_official 489:119543c9f674 1206 #define __HAL_PVM_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_ENABLE
mbed_official 489:119543c9f674 1207 #define __HAL_PWR_INTERNALWAKEUP_DISABLE HAL_PWREx_DisableInternalWakeUpLine
mbed_official 489:119543c9f674 1208 #define __HAL_PWR_INTERNALWAKEUP_ENABLE HAL_PWREx_EnableInternalWakeUpLine
mbed_official 489:119543c9f674 1209 #define __HAL_PWR_PULL_UP_DOWN_CONFIG_DISABLE HAL_PWREx_DisablePullUpPullDownConfig
mbed_official 489:119543c9f674 1210 #define __HAL_PWR_PULL_UP_DOWN_CONFIG_ENABLE HAL_PWREx_EnablePullUpPullDownConfig
mbed_official 489:119543c9f674 1211 #define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE()
mbed_official 489:119543c9f674 1212 #define __HAL_PWR_PVD_EXTI_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT
mbed_official 489:119543c9f674 1213 #define __HAL_PWR_PVD_EXTI_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT
mbed_official 489:119543c9f674 1214 #define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
mbed_official 489:119543c9f674 1215 #define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
mbed_official 489:119543c9f674 1216 #define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
mbed_official 489:119543c9f674 1217 #define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
mbed_official 489:119543c9f674 1218 #define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
mbed_official 489:119543c9f674 1219 #define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
mbed_official 489:119543c9f674 1220 #define __HAL_PWR_PVM_DISABLE() HAL_PWREx_DisablePVM1();HAL_PWREx_DisablePVM2();HAL_PWREx_DisablePVM3();HAL_PWREx_DisablePVM4()
mbed_official 489:119543c9f674 1221 #define __HAL_PWR_PVM_ENABLE() HAL_PWREx_EnablePVM1();HAL_PWREx_EnablePVM2();HAL_PWREx_EnablePVM3();HAL_PWREx_EnablePVM4()
mbed_official 489:119543c9f674 1222 #define __HAL_PWR_SRAM2CONTENT_PRESERVE_DISABLE HAL_PWREx_DisableSRAM2ContentRetention
mbed_official 489:119543c9f674 1223 #define __HAL_PWR_SRAM2CONTENT_PRESERVE_ENABLE HAL_PWREx_EnableSRAM2ContentRetention
mbed_official 489:119543c9f674 1224 #define __HAL_PWR_VDDIO2_DISABLE HAL_PWREx_DisableVddIO2
mbed_official 489:119543c9f674 1225 #define __HAL_PWR_VDDIO2_ENABLE HAL_PWREx_EnableVddIO2
mbed_official 489:119543c9f674 1226 #define __HAL_PWR_VDDIO2_EXTI_CLEAR_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE
mbed_official 489:119543c9f674 1227 #define __HAL_PWR_VDDIO2_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE
mbed_official 489:119543c9f674 1228 #define __HAL_PWR_VDDUSB_DISABLE HAL_PWREx_DisableVddUSB
mbed_official 489:119543c9f674 1229 #define __HAL_PWR_VDDUSB_ENABLE HAL_PWREx_EnableVddUSB
mbed_official 489:119543c9f674 1230
mbed_official 489:119543c9f674 1231 #if defined (STM32F4)
mbed_official 489:119543c9f674 1232 #define __HAL_PVD_EXTI_ENABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_ENABLE_IT()
mbed_official 489:119543c9f674 1233 #define __HAL_PVD_EXTI_DISABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_DISABLE_IT()
mbed_official 489:119543c9f674 1234 #define __HAL_PVD_EXTI_GET_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GET_FLAG()
mbed_official 489:119543c9f674 1235 #define __HAL_PVD_EXTI_CLEAR_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_CLEAR_FLAG()
mbed_official 489:119543c9f674 1236 #define __HAL_PVD_EXTI_GENERATE_SWIT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GENERATE_SWIT()
mbed_official 489:119543c9f674 1237 #else
mbed_official 489:119543c9f674 1238 #define __HAL_PVD_EXTI_CLEAR_FLAG __HAL_PWR_PVD_EXTI_CLEAR_FLAG
mbed_official 489:119543c9f674 1239 #define __HAL_PVD_EXTI_DISABLE_IT __HAL_PWR_PVD_EXTI_DISABLE_IT
mbed_official 489:119543c9f674 1240 #define __HAL_PVD_EXTI_ENABLE_IT __HAL_PWR_PVD_EXTI_ENABLE_IT
mbed_official 489:119543c9f674 1241 #define __HAL_PVD_EXTI_GENERATE_SWIT __HAL_PWR_PVD_EXTI_GENERATE_SWIT
mbed_official 489:119543c9f674 1242 #define __HAL_PVD_EXTI_GET_FLAG __HAL_PWR_PVD_EXTI_GET_FLAG
mbed_official 489:119543c9f674 1243 #endif /* STM32F4 */
mbed_official 489:119543c9f674 1244 /**
mbed_official 489:119543c9f674 1245 * @}
mbed_official 489:119543c9f674 1246 */
mbed_official 489:119543c9f674 1247
mbed_official 489:119543c9f674 1248
mbed_official 489:119543c9f674 1249 /** @defgroup HAL_RCC_Aliased HAL RCC Aliased maintained for legacy purpose
mbed_official 489:119543c9f674 1250 * @{
mbed_official 489:119543c9f674 1251 */
mbed_official 489:119543c9f674 1252
mbed_official 489:119543c9f674 1253 #define RCC_StopWakeUpClock_MSI RCC_STOP_WAKEUPCLOCK_MSI
mbed_official 489:119543c9f674 1254 #define RCC_StopWakeUpClock_HSI RCC_STOP_WAKEUPCLOCK_HSI
mbed_official 489:119543c9f674 1255
mbed_official 489:119543c9f674 1256 #define HAL_RCC_CCSCallback HAL_RCC_CSSCallback
mbed_official 489:119543c9f674 1257 #define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT())
mbed_official 489:119543c9f674 1258
mbed_official 489:119543c9f674 1259 #define __ADC_CLK_DISABLE __HAL_RCC_ADC_CLK_DISABLE
mbed_official 489:119543c9f674 1260 #define __ADC_CLK_ENABLE __HAL_RCC_ADC_CLK_ENABLE
mbed_official 489:119543c9f674 1261 #define __ADC_CLK_SLEEP_DISABLE __HAL_RCC_ADC_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1262 #define __ADC_CLK_SLEEP_ENABLE __HAL_RCC_ADC_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1263 #define __ADC_FORCE_RESET __HAL_RCC_ADC_FORCE_RESET
mbed_official 489:119543c9f674 1264 #define __ADC_RELEASE_RESET __HAL_RCC_ADC_RELEASE_RESET
mbed_official 489:119543c9f674 1265 #define __ADC1_CLK_DISABLE __HAL_RCC_ADC1_CLK_DISABLE
mbed_official 489:119543c9f674 1266 #define __ADC1_CLK_ENABLE __HAL_RCC_ADC1_CLK_ENABLE
mbed_official 489:119543c9f674 1267 #define __ADC1_FORCE_RESET __HAL_RCC_ADC1_FORCE_RESET
mbed_official 489:119543c9f674 1268 #define __ADC1_RELEASE_RESET __HAL_RCC_ADC1_RELEASE_RESET
mbed_official 489:119543c9f674 1269 #define __ADC1_CLK_SLEEP_ENABLE __HAL_RCC_ADC1_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1270 #define __ADC1_CLK_SLEEP_DISABLE __HAL_RCC_ADC1_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1271 #define __ADC2_CLK_DISABLE __HAL_RCC_ADC2_CLK_DISABLE
mbed_official 489:119543c9f674 1272 #define __ADC2_CLK_ENABLE __HAL_RCC_ADC2_CLK_ENABLE
mbed_official 489:119543c9f674 1273 #define __ADC2_FORCE_RESET __HAL_RCC_ADC2_FORCE_RESET
mbed_official 489:119543c9f674 1274 #define __ADC2_RELEASE_RESET __HAL_RCC_ADC2_RELEASE_RESET
mbed_official 489:119543c9f674 1275 #define __ADC3_CLK_DISABLE __HAL_RCC_ADC3_CLK_DISABLE
mbed_official 489:119543c9f674 1276 #define __ADC3_CLK_ENABLE __HAL_RCC_ADC3_CLK_ENABLE
mbed_official 489:119543c9f674 1277 #define __ADC3_FORCE_RESET __HAL_RCC_ADC3_FORCE_RESET
mbed_official 489:119543c9f674 1278 #define __ADC3_RELEASE_RESET __HAL_RCC_ADC3_RELEASE_RESET
mbed_official 489:119543c9f674 1279 #define __AES_CLK_DISABLE __HAL_RCC_AES_CLK_DISABLE
mbed_official 489:119543c9f674 1280 #define __AES_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE
mbed_official 489:119543c9f674 1281 #define __AES_CLK_SLEEP_DISABLE __HAL_RCC_AES_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1282 #define __AES_CLK_SLEEP_ENABLE __HAL_RCC_AES_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1283 #define __AES_FORCE_RESET __HAL_RCC_AES_FORCE_RESET
mbed_official 489:119543c9f674 1284 #define __AES_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET
mbed_official 489:119543c9f674 1285 #define __CRYP_CLK_SLEEP_ENABLE __HAL_RCC_CRYP_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1286 #define __CRYP_CLK_SLEEP_DISABLE __HAL_RCC_CRYP_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1287 #define __CRYP_CLK_ENABLE __HAL_RCC_CRYP_CLK_ENABLE
mbed_official 489:119543c9f674 1288 #define __CRYP_CLK_DISABLE __HAL_RCC_CRYP_CLK_DISABLE
mbed_official 489:119543c9f674 1289 #define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET
mbed_official 489:119543c9f674 1290 #define __CRYP_RELEASE_RESET __HAL_RCC_CRYP_RELEASE_RESET
mbed_official 489:119543c9f674 1291 #define __AFIO_CLK_DISABLE __HAL_RCC_AFIO_CLK_DISABLE
mbed_official 489:119543c9f674 1292 #define __AFIO_CLK_ENABLE __HAL_RCC_AFIO_CLK_ENABLE
mbed_official 489:119543c9f674 1293 #define __AFIO_FORCE_RESET __HAL_RCC_AFIO_FORCE_RESET
mbed_official 489:119543c9f674 1294 #define __AFIO_RELEASE_RESET __HAL_RCC_AFIO_RELEASE_RESET
mbed_official 489:119543c9f674 1295 #define __AHB_FORCE_RESET __HAL_RCC_AHB_FORCE_RESET
mbed_official 489:119543c9f674 1296 #define __AHB_RELEASE_RESET __HAL_RCC_AHB_RELEASE_RESET
mbed_official 489:119543c9f674 1297 #define __AHB1_FORCE_RESET __HAL_RCC_AHB1_FORCE_RESET
mbed_official 489:119543c9f674 1298 #define __AHB1_RELEASE_RESET __HAL_RCC_AHB1_RELEASE_RESET
mbed_official 489:119543c9f674 1299 #define __AHB2_FORCE_RESET __HAL_RCC_AHB2_FORCE_RESET
mbed_official 489:119543c9f674 1300 #define __AHB2_RELEASE_RESET __HAL_RCC_AHB2_RELEASE_RESET
mbed_official 489:119543c9f674 1301 #define __AHB3_FORCE_RESET __HAL_RCC_AHB3_FORCE_RESET
mbed_official 489:119543c9f674 1302 #define __AHB3_RELEASE_RESET __HAL_RCC_AHB3_RELEASE_RESET
mbed_official 489:119543c9f674 1303 #define __APB1_FORCE_RESET __HAL_RCC_APB1_FORCE_RESET
mbed_official 489:119543c9f674 1304 #define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET
mbed_official 489:119543c9f674 1305 #define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET
mbed_official 489:119543c9f674 1306 #define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET
mbed_official 489:119543c9f674 1307 #define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE
mbed_official 489:119543c9f674 1308 #define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE
mbed_official 489:119543c9f674 1309 #define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET
mbed_official 489:119543c9f674 1310 #define __BKP_RELEASE_RESET __HAL_RCC_BKP_RELEASE_RESET
mbed_official 489:119543c9f674 1311 #define __CAN1_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE
mbed_official 489:119543c9f674 1312 #define __CAN1_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE
mbed_official 489:119543c9f674 1313 #define __CAN1_CLK_SLEEP_DISABLE __HAL_RCC_CAN1_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1314 #define __CAN1_CLK_SLEEP_ENABLE __HAL_RCC_CAN1_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1315 #define __CAN1_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET
mbed_official 489:119543c9f674 1316 #define __CAN1_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET
mbed_official 489:119543c9f674 1317 #define __CAN2_CLK_DISABLE __HAL_RCC_CAN2_CLK_DISABLE
mbed_official 489:119543c9f674 1318 #define __CAN2_CLK_ENABLE __HAL_RCC_CAN2_CLK_ENABLE
mbed_official 489:119543c9f674 1319 #define __CAN2_FORCE_RESET __HAL_RCC_CAN2_FORCE_RESET
mbed_official 489:119543c9f674 1320 #define __CAN2_RELEASE_RESET __HAL_RCC_CAN2_RELEASE_RESET
mbed_official 489:119543c9f674 1321 #define __CEC_CLK_DISABLE __HAL_RCC_CEC_CLK_DISABLE
mbed_official 489:119543c9f674 1322 #define __CEC_CLK_ENABLE __HAL_RCC_CEC_CLK_ENABLE
mbed_official 489:119543c9f674 1323 #define __COMP_CLK_DISABLE __HAL_RCC_COMP_CLK_DISABLE
mbed_official 489:119543c9f674 1324 #define __COMP_CLK_ENABLE __HAL_RCC_COMP_CLK_ENABLE
mbed_official 489:119543c9f674 1325 #define __COMP_FORCE_RESET __HAL_RCC_COMP_FORCE_RESET
mbed_official 489:119543c9f674 1326 #define __COMP_RELEASE_RESET __HAL_RCC_COMP_RELEASE_RESET
mbed_official 489:119543c9f674 1327 #define __COMP_CLK_SLEEP_ENABLE __HAL_RCC_COMP_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1328 #define __COMP_CLK_SLEEP_DISABLE __HAL_RCC_COMP_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1329 #define __CEC_FORCE_RESET __HAL_RCC_CEC_FORCE_RESET
mbed_official 489:119543c9f674 1330 #define __CEC_RELEASE_RESET __HAL_RCC_CEC_RELEASE_RESET
mbed_official 489:119543c9f674 1331 #define __CRC_CLK_DISABLE __HAL_RCC_CRC_CLK_DISABLE
mbed_official 489:119543c9f674 1332 #define __CRC_CLK_ENABLE __HAL_RCC_CRC_CLK_ENABLE
mbed_official 489:119543c9f674 1333 #define __CRC_CLK_SLEEP_DISABLE __HAL_RCC_CRC_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1334 #define __CRC_CLK_SLEEP_ENABLE __HAL_RCC_CRC_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1335 #define __CRC_FORCE_RESET __HAL_RCC_CRC_FORCE_RESET
mbed_official 489:119543c9f674 1336 #define __CRC_RELEASE_RESET __HAL_RCC_CRC_RELEASE_RESET
mbed_official 489:119543c9f674 1337 #define __DAC_CLK_DISABLE __HAL_RCC_DAC_CLK_DISABLE
mbed_official 489:119543c9f674 1338 #define __DAC_CLK_ENABLE __HAL_RCC_DAC_CLK_ENABLE
mbed_official 489:119543c9f674 1339 #define __DAC_FORCE_RESET __HAL_RCC_DAC_FORCE_RESET
mbed_official 489:119543c9f674 1340 #define __DAC_RELEASE_RESET __HAL_RCC_DAC_RELEASE_RESET
mbed_official 489:119543c9f674 1341 #define __DAC1_CLK_DISABLE __HAL_RCC_DAC1_CLK_DISABLE
mbed_official 489:119543c9f674 1342 #define __DAC1_CLK_ENABLE __HAL_RCC_DAC1_CLK_ENABLE
mbed_official 489:119543c9f674 1343 #define __DAC1_CLK_SLEEP_DISABLE __HAL_RCC_DAC1_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1344 #define __DAC1_CLK_SLEEP_ENABLE __HAL_RCC_DAC1_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1345 #define __DAC1_FORCE_RESET __HAL_RCC_DAC1_FORCE_RESET
mbed_official 489:119543c9f674 1346 #define __DAC1_RELEASE_RESET __HAL_RCC_DAC1_RELEASE_RESET
mbed_official 489:119543c9f674 1347 #define __DFSDM_CLK_DISABLE __HAL_RCC_DFSDM_CLK_DISABLE
mbed_official 489:119543c9f674 1348 #define __DFSDM_CLK_ENABLE __HAL_RCC_DFSDM_CLK_ENABLE
mbed_official 489:119543c9f674 1349 #define __DFSDM_CLK_SLEEP_DISABLE __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1350 #define __DFSDM_CLK_SLEEP_ENABLE __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1351 #define __DFSDM_FORCE_RESET __HAL_RCC_DFSDM_FORCE_RESET
mbed_official 489:119543c9f674 1352 #define __DFSDM_RELEASE_RESET __HAL_RCC_DFSDM_RELEASE_RESET
mbed_official 489:119543c9f674 1353 #define __DMA1_CLK_DISABLE __HAL_RCC_DMA1_CLK_DISABLE
mbed_official 489:119543c9f674 1354 #define __DMA1_CLK_ENABLE __HAL_RCC_DMA1_CLK_ENABLE
mbed_official 489:119543c9f674 1355 #define __DMA1_CLK_SLEEP_DISABLE __HAL_RCC_DMA1_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1356 #define __DMA1_CLK_SLEEP_ENABLE __HAL_RCC_DMA1_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1357 #define __DMA1_FORCE_RESET __HAL_RCC_DMA1_FORCE_RESET
mbed_official 489:119543c9f674 1358 #define __DMA1_RELEASE_RESET __HAL_RCC_DMA1_RELEASE_RESET
mbed_official 489:119543c9f674 1359 #define __DMA2_CLK_DISABLE __HAL_RCC_DMA2_CLK_DISABLE
mbed_official 489:119543c9f674 1360 #define __DMA2_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE
mbed_official 489:119543c9f674 1361 #define __DMA2_CLK_SLEEP_DISABLE __HAL_RCC_DMA2_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1362 #define __DMA2_CLK_SLEEP_ENABLE __HAL_RCC_DMA2_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1363 #define __DMA2_FORCE_RESET __HAL_RCC_DMA2_FORCE_RESET
mbed_official 489:119543c9f674 1364 #define __DMA2_RELEASE_RESET __HAL_RCC_DMA2_RELEASE_RESET
mbed_official 489:119543c9f674 1365 #define __ETHMAC_CLK_DISABLE __HAL_RCC_ETHMAC_CLK_DISABLE
mbed_official 489:119543c9f674 1366 #define __ETHMAC_CLK_ENABLE __HAL_RCC_ETHMAC_CLK_ENABLE
mbed_official 489:119543c9f674 1367 #define __ETHMAC_FORCE_RESET __HAL_RCC_ETHMAC_FORCE_RESET
mbed_official 489:119543c9f674 1368 #define __ETHMAC_RELEASE_RESET __HAL_RCC_ETHMAC_RELEASE_RESET
mbed_official 489:119543c9f674 1369 #define __ETHMACRX_CLK_DISABLE __HAL_RCC_ETHMACRX_CLK_DISABLE
mbed_official 489:119543c9f674 1370 #define __ETHMACRX_CLK_ENABLE __HAL_RCC_ETHMACRX_CLK_ENABLE
mbed_official 489:119543c9f674 1371 #define __ETHMACTX_CLK_DISABLE __HAL_RCC_ETHMACTX_CLK_DISABLE
mbed_official 489:119543c9f674 1372 #define __ETHMACTX_CLK_ENABLE __HAL_RCC_ETHMACTX_CLK_ENABLE
mbed_official 489:119543c9f674 1373 #define __FIREWALL_CLK_DISABLE __HAL_RCC_FIREWALL_CLK_DISABLE
mbed_official 489:119543c9f674 1374 #define __FIREWALL_CLK_ENABLE __HAL_RCC_FIREWALL_CLK_ENABLE
mbed_official 489:119543c9f674 1375 #define __FLASH_CLK_DISABLE __HAL_RCC_FLASH_CLK_DISABLE
mbed_official 489:119543c9f674 1376 #define __FLASH_CLK_ENABLE __HAL_RCC_FLASH_CLK_ENABLE
mbed_official 489:119543c9f674 1377 #define __FLASH_CLK_SLEEP_DISABLE __HAL_RCC_FLASH_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1378 #define __FLASH_CLK_SLEEP_ENABLE __HAL_RCC_FLASH_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1379 #define __FLASH_FORCE_RESET __HAL_RCC_FLASH_FORCE_RESET
mbed_official 489:119543c9f674 1380 #define __FLASH_RELEASE_RESET __HAL_RCC_FLASH_RELEASE_RESET
mbed_official 489:119543c9f674 1381 #define __FLITF_CLK_DISABLE __HAL_RCC_FLITF_CLK_DISABLE
mbed_official 489:119543c9f674 1382 #define __FLITF_CLK_ENABLE __HAL_RCC_FLITF_CLK_ENABLE
mbed_official 489:119543c9f674 1383 #define __FLITF_FORCE_RESET __HAL_RCC_FLITF_FORCE_RESET
mbed_official 489:119543c9f674 1384 #define __FLITF_RELEASE_RESET __HAL_RCC_FLITF_RELEASE_RESET
mbed_official 489:119543c9f674 1385 #define __FLITF_CLK_SLEEP_ENABLE __HAL_RCC_FLITF_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1386 #define __FLITF_CLK_SLEEP_DISABLE __HAL_RCC_FLITF_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1387 #define __FMC_CLK_DISABLE __HAL_RCC_FMC_CLK_DISABLE
mbed_official 489:119543c9f674 1388 #define __FMC_CLK_ENABLE __HAL_RCC_FMC_CLK_ENABLE
mbed_official 489:119543c9f674 1389 #define __FMC_CLK_SLEEP_DISABLE __HAL_RCC_FMC_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1390 #define __FMC_CLK_SLEEP_ENABLE __HAL_RCC_FMC_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1391 #define __FMC_FORCE_RESET __HAL_RCC_FMC_FORCE_RESET
mbed_official 489:119543c9f674 1392 #define __FMC_RELEASE_RESET __HAL_RCC_FMC_RELEASE_RESET
mbed_official 489:119543c9f674 1393 #define __FSMC_CLK_DISABLE __HAL_RCC_FSMC_CLK_DISABLE
mbed_official 489:119543c9f674 1394 #define __FSMC_CLK_ENABLE __HAL_RCC_FSMC_CLK_ENABLE
mbed_official 489:119543c9f674 1395 #define __GPIOA_CLK_DISABLE __HAL_RCC_GPIOA_CLK_DISABLE
mbed_official 489:119543c9f674 1396 #define __GPIOA_CLK_ENABLE __HAL_RCC_GPIOA_CLK_ENABLE
mbed_official 489:119543c9f674 1397 #define __GPIOA_CLK_SLEEP_DISABLE __HAL_RCC_GPIOA_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1398 #define __GPIOA_CLK_SLEEP_ENABLE __HAL_RCC_GPIOA_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1399 #define __GPIOA_FORCE_RESET __HAL_RCC_GPIOA_FORCE_RESET
mbed_official 489:119543c9f674 1400 #define __GPIOA_RELEASE_RESET __HAL_RCC_GPIOA_RELEASE_RESET
mbed_official 489:119543c9f674 1401 #define __GPIOB_CLK_DISABLE __HAL_RCC_GPIOB_CLK_DISABLE
mbed_official 489:119543c9f674 1402 #define __GPIOB_CLK_ENABLE __HAL_RCC_GPIOB_CLK_ENABLE
mbed_official 489:119543c9f674 1403 #define __GPIOB_CLK_SLEEP_DISABLE __HAL_RCC_GPIOB_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1404 #define __GPIOB_CLK_SLEEP_ENABLE __HAL_RCC_GPIOB_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1405 #define __GPIOB_FORCE_RESET __HAL_RCC_GPIOB_FORCE_RESET
mbed_official 489:119543c9f674 1406 #define __GPIOB_RELEASE_RESET __HAL_RCC_GPIOB_RELEASE_RESET
mbed_official 489:119543c9f674 1407 #define __GPIOC_CLK_DISABLE __HAL_RCC_GPIOC_CLK_DISABLE
mbed_official 489:119543c9f674 1408 #define __GPIOC_CLK_ENABLE __HAL_RCC_GPIOC_CLK_ENABLE
mbed_official 489:119543c9f674 1409 #define __GPIOC_CLK_SLEEP_DISABLE __HAL_RCC_GPIOC_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1410 #define __GPIOC_CLK_SLEEP_ENABLE __HAL_RCC_GPIOC_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1411 #define __GPIOC_FORCE_RESET __HAL_RCC_GPIOC_FORCE_RESET
mbed_official 489:119543c9f674 1412 #define __GPIOC_RELEASE_RESET __HAL_RCC_GPIOC_RELEASE_RESET
mbed_official 489:119543c9f674 1413 #define __GPIOD_CLK_DISABLE __HAL_RCC_GPIOD_CLK_DISABLE
mbed_official 489:119543c9f674 1414 #define __GPIOD_CLK_ENABLE __HAL_RCC_GPIOD_CLK_ENABLE
mbed_official 489:119543c9f674 1415 #define __GPIOD_CLK_SLEEP_DISABLE __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1416 #define __GPIOD_CLK_SLEEP_ENABLE __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1417 #define __GPIOD_FORCE_RESET __HAL_RCC_GPIOD_FORCE_RESET
mbed_official 489:119543c9f674 1418 #define __GPIOD_RELEASE_RESET __HAL_RCC_GPIOD_RELEASE_RESET
mbed_official 489:119543c9f674 1419 #define __GPIOE_CLK_DISABLE __HAL_RCC_GPIOE_CLK_DISABLE
mbed_official 489:119543c9f674 1420 #define __GPIOE_CLK_ENABLE __HAL_RCC_GPIOE_CLK_ENABLE
mbed_official 489:119543c9f674 1421 #define __GPIOE_CLK_SLEEP_DISABLE __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1422 #define __GPIOE_CLK_SLEEP_ENABLE __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1423 #define __GPIOE_FORCE_RESET __HAL_RCC_GPIOE_FORCE_RESET
mbed_official 489:119543c9f674 1424 #define __GPIOE_RELEASE_RESET __HAL_RCC_GPIOE_RELEASE_RESET
mbed_official 489:119543c9f674 1425 #define __GPIOF_CLK_DISABLE __HAL_RCC_GPIOF_CLK_DISABLE
mbed_official 489:119543c9f674 1426 #define __GPIOF_CLK_ENABLE __HAL_RCC_GPIOF_CLK_ENABLE
mbed_official 489:119543c9f674 1427 #define __GPIOF_CLK_SLEEP_DISABLE __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1428 #define __GPIOF_CLK_SLEEP_ENABLE __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1429 #define __GPIOF_FORCE_RESET __HAL_RCC_GPIOF_FORCE_RESET
mbed_official 489:119543c9f674 1430 #define __GPIOF_RELEASE_RESET __HAL_RCC_GPIOF_RELEASE_RESET
mbed_official 489:119543c9f674 1431 #define __GPIOG_CLK_DISABLE __HAL_RCC_GPIOG_CLK_DISABLE
mbed_official 489:119543c9f674 1432 #define __GPIOG_CLK_ENABLE __HAL_RCC_GPIOG_CLK_ENABLE
mbed_official 489:119543c9f674 1433 #define __GPIOG_CLK_SLEEP_DISABLE __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1434 #define __GPIOG_CLK_SLEEP_ENABLE __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1435 #define __GPIOG_FORCE_RESET __HAL_RCC_GPIOG_FORCE_RESET
mbed_official 489:119543c9f674 1436 #define __GPIOG_RELEASE_RESET __HAL_RCC_GPIOG_RELEASE_RESET
mbed_official 489:119543c9f674 1437 #define __GPIOH_CLK_DISABLE __HAL_RCC_GPIOH_CLK_DISABLE
mbed_official 489:119543c9f674 1438 #define __GPIOH_CLK_ENABLE __HAL_RCC_GPIOH_CLK_ENABLE
mbed_official 489:119543c9f674 1439 #define __GPIOH_CLK_SLEEP_DISABLE __HAL_RCC_GPIOH_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1440 #define __GPIOH_CLK_SLEEP_ENABLE __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1441 #define __GPIOH_FORCE_RESET __HAL_RCC_GPIOH_FORCE_RESET
mbed_official 489:119543c9f674 1442 #define __GPIOH_RELEASE_RESET __HAL_RCC_GPIOH_RELEASE_RESET
mbed_official 489:119543c9f674 1443 #define __I2C1_CLK_DISABLE __HAL_RCC_I2C1_CLK_DISABLE
mbed_official 489:119543c9f674 1444 #define __I2C1_CLK_ENABLE __HAL_RCC_I2C1_CLK_ENABLE
mbed_official 489:119543c9f674 1445 #define __I2C1_CLK_SLEEP_DISABLE __HAL_RCC_I2C1_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1446 #define __I2C1_CLK_SLEEP_ENABLE __HAL_RCC_I2C1_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1447 #define __I2C1_FORCE_RESET __HAL_RCC_I2C1_FORCE_RESET
mbed_official 489:119543c9f674 1448 #define __I2C1_RELEASE_RESET __HAL_RCC_I2C1_RELEASE_RESET
mbed_official 489:119543c9f674 1449 #define __I2C2_CLK_DISABLE __HAL_RCC_I2C2_CLK_DISABLE
mbed_official 489:119543c9f674 1450 #define __I2C2_CLK_ENABLE __HAL_RCC_I2C2_CLK_ENABLE
mbed_official 489:119543c9f674 1451 #define __I2C2_CLK_SLEEP_DISABLE __HAL_RCC_I2C2_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1452 #define __I2C2_CLK_SLEEP_ENABLE __HAL_RCC_I2C2_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1453 #define __I2C2_FORCE_RESET __HAL_RCC_I2C2_FORCE_RESET
mbed_official 489:119543c9f674 1454 #define __I2C2_RELEASE_RESET __HAL_RCC_I2C2_RELEASE_RESET
mbed_official 489:119543c9f674 1455 #define __I2C3_CLK_DISABLE __HAL_RCC_I2C3_CLK_DISABLE
mbed_official 489:119543c9f674 1456 #define __I2C3_CLK_ENABLE __HAL_RCC_I2C3_CLK_ENABLE
mbed_official 489:119543c9f674 1457 #define __I2C3_CLK_SLEEP_DISABLE __HAL_RCC_I2C3_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1458 #define __I2C3_CLK_SLEEP_ENABLE __HAL_RCC_I2C3_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1459 #define __I2C3_FORCE_RESET __HAL_RCC_I2C3_FORCE_RESET
mbed_official 489:119543c9f674 1460 #define __I2C3_RELEASE_RESET __HAL_RCC_I2C3_RELEASE_RESET
mbed_official 489:119543c9f674 1461 #define __LCD_CLK_DISABLE __HAL_RCC_LCD_CLK_DISABLE
mbed_official 489:119543c9f674 1462 #define __LCD_CLK_ENABLE __HAL_RCC_LCD_CLK_ENABLE
mbed_official 489:119543c9f674 1463 #define __LCD_CLK_SLEEP_DISABLE __HAL_RCC_LCD_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1464 #define __LCD_CLK_SLEEP_ENABLE __HAL_RCC_LCD_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1465 #define __LCD_FORCE_RESET __HAL_RCC_LCD_FORCE_RESET
mbed_official 489:119543c9f674 1466 #define __LCD_RELEASE_RESET __HAL_RCC_LCD_RELEASE_RESET
mbed_official 489:119543c9f674 1467 #define __LPTIM1_CLK_DISABLE __HAL_RCC_LPTIM1_CLK_DISABLE
mbed_official 489:119543c9f674 1468 #define __LPTIM1_CLK_ENABLE __HAL_RCC_LPTIM1_CLK_ENABLE
mbed_official 489:119543c9f674 1469 #define __LPTIM1_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1470 #define __LPTIM1_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1471 #define __LPTIM1_FORCE_RESET __HAL_RCC_LPTIM1_FORCE_RESET
mbed_official 489:119543c9f674 1472 #define __LPTIM1_RELEASE_RESET __HAL_RCC_LPTIM1_RELEASE_RESET
mbed_official 489:119543c9f674 1473 #define __LPTIM2_CLK_DISABLE __HAL_RCC_LPTIM2_CLK_DISABLE
mbed_official 489:119543c9f674 1474 #define __LPTIM2_CLK_ENABLE __HAL_RCC_LPTIM2_CLK_ENABLE
mbed_official 489:119543c9f674 1475 #define __LPTIM2_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM2_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1476 #define __LPTIM2_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM2_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1477 #define __LPTIM2_FORCE_RESET __HAL_RCC_LPTIM2_FORCE_RESET
mbed_official 489:119543c9f674 1478 #define __LPTIM2_RELEASE_RESET __HAL_RCC_LPTIM2_RELEASE_RESET
mbed_official 489:119543c9f674 1479 #define __LPUART1_CLK_DISABLE __HAL_RCC_LPUART1_CLK_DISABLE
mbed_official 489:119543c9f674 1480 #define __LPUART1_CLK_ENABLE __HAL_RCC_LPUART1_CLK_ENABLE
mbed_official 489:119543c9f674 1481 #define __LPUART1_CLK_SLEEP_DISABLE __HAL_RCC_LPUART1_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1482 #define __LPUART1_CLK_SLEEP_ENABLE __HAL_RCC_LPUART1_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1483 #define __LPUART1_FORCE_RESET __HAL_RCC_LPUART1_FORCE_RESET
mbed_official 489:119543c9f674 1484 #define __LPUART1_RELEASE_RESET __HAL_RCC_LPUART1_RELEASE_RESET
mbed_official 489:119543c9f674 1485 #define __OPAMP_CLK_DISABLE __HAL_RCC_OPAMP_CLK_DISABLE
mbed_official 489:119543c9f674 1486 #define __OPAMP_CLK_ENABLE __HAL_RCC_OPAMP_CLK_ENABLE
mbed_official 489:119543c9f674 1487 #define __OPAMP_CLK_SLEEP_DISABLE __HAL_RCC_OPAMP_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1488 #define __OPAMP_CLK_SLEEP_ENABLE __HAL_RCC_OPAMP_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1489 #define __OPAMP_FORCE_RESET __HAL_RCC_OPAMP_FORCE_RESET
mbed_official 489:119543c9f674 1490 #define __OPAMP_RELEASE_RESET __HAL_RCC_OPAMP_RELEASE_RESET
mbed_official 489:119543c9f674 1491 #define __OTGFS_CLK_DISABLE __HAL_RCC_OTGFS_CLK_DISABLE
mbed_official 489:119543c9f674 1492 #define __OTGFS_CLK_ENABLE __HAL_RCC_OTGFS_CLK_ENABLE
mbed_official 489:119543c9f674 1493 #define __OTGFS_CLK_SLEEP_DISABLE __HAL_RCC_OTGFS_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1494 #define __OTGFS_CLK_SLEEP_ENABLE __HAL_RCC_OTGFS_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1495 #define __OTGFS_FORCE_RESET __HAL_RCC_OTGFS_FORCE_RESET
mbed_official 489:119543c9f674 1496 #define __OTGFS_RELEASE_RESET __HAL_RCC_OTGFS_RELEASE_RESET
mbed_official 489:119543c9f674 1497 #define __PWR_CLK_DISABLE __HAL_RCC_PWR_CLK_DISABLE
mbed_official 489:119543c9f674 1498 #define __PWR_CLK_ENABLE __HAL_RCC_PWR_CLK_ENABLE
mbed_official 489:119543c9f674 1499 #define __PWR_CLK_SLEEP_DISABLE __HAL_RCC_PWR_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1500 #define __PWR_CLK_SLEEP_ENABLE __HAL_RCC_PWR_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1501 #define __PWR_FORCE_RESET __HAL_RCC_PWR_FORCE_RESET
mbed_official 489:119543c9f674 1502 #define __PWR_RELEASE_RESET __HAL_RCC_PWR_RELEASE_RESET
mbed_official 489:119543c9f674 1503 #define __QSPI_CLK_DISABLE __HAL_RCC_QSPI_CLK_DISABLE
mbed_official 489:119543c9f674 1504 #define __QSPI_CLK_ENABLE __HAL_RCC_QSPI_CLK_ENABLE
mbed_official 489:119543c9f674 1505 #define __QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QSPI_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1506 #define __QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QSPI_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1507 #define __QSPI_FORCE_RESET __HAL_RCC_QSPI_FORCE_RESET
mbed_official 489:119543c9f674 1508 #define __QSPI_RELEASE_RESET __HAL_RCC_QSPI_RELEASE_RESET
mbed_official 489:119543c9f674 1509 #define __RNG_CLK_DISABLE __HAL_RCC_RNG_CLK_DISABLE
mbed_official 489:119543c9f674 1510 #define __RNG_CLK_ENABLE __HAL_RCC_RNG_CLK_ENABLE
mbed_official 489:119543c9f674 1511 #define __RNG_CLK_SLEEP_DISABLE __HAL_RCC_RNG_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1512 #define __RNG_CLK_SLEEP_ENABLE __HAL_RCC_RNG_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1513 #define __RNG_FORCE_RESET __HAL_RCC_RNG_FORCE_RESET
mbed_official 489:119543c9f674 1514 #define __RNG_RELEASE_RESET __HAL_RCC_RNG_RELEASE_RESET
mbed_official 489:119543c9f674 1515 #define __SAI1_CLK_DISABLE __HAL_RCC_SAI1_CLK_DISABLE
mbed_official 489:119543c9f674 1516 #define __SAI1_CLK_ENABLE __HAL_RCC_SAI1_CLK_ENABLE
mbed_official 489:119543c9f674 1517 #define __SAI1_CLK_SLEEP_DISABLE __HAL_RCC_SAI1_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1518 #define __SAI1_CLK_SLEEP_ENABLE __HAL_RCC_SAI1_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1519 #define __SAI1_FORCE_RESET __HAL_RCC_SAI1_FORCE_RESET
mbed_official 489:119543c9f674 1520 #define __SAI1_RELEASE_RESET __HAL_RCC_SAI1_RELEASE_RESET
mbed_official 489:119543c9f674 1521 #define __SAI2_CLK_DISABLE __HAL_RCC_SAI2_CLK_DISABLE
mbed_official 489:119543c9f674 1522 #define __SAI2_CLK_ENABLE __HAL_RCC_SAI2_CLK_ENABLE
mbed_official 489:119543c9f674 1523 #define __SAI2_CLK_SLEEP_DISABLE __HAL_RCC_SAI2_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1524 #define __SAI2_CLK_SLEEP_ENABLE __HAL_RCC_SAI2_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1525 #define __SAI2_FORCE_RESET __HAL_RCC_SAI2_FORCE_RESET
mbed_official 489:119543c9f674 1526 #define __SAI2_RELEASE_RESET __HAL_RCC_SAI2_RELEASE_RESET
mbed_official 489:119543c9f674 1527 #define __SDIO_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE
mbed_official 489:119543c9f674 1528 #define __SDIO_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE
mbed_official 489:119543c9f674 1529 #define __SDMMC_CLK_DISABLE __HAL_RCC_SDMMC_CLK_DISABLE
mbed_official 489:119543c9f674 1530 #define __SDMMC_CLK_ENABLE __HAL_RCC_SDMMC_CLK_ENABLE
mbed_official 489:119543c9f674 1531 #define __SDMMC_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1532 #define __SDMMC_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1533 #define __SDMMC_FORCE_RESET __HAL_RCC_SDMMC_FORCE_RESET
mbed_official 489:119543c9f674 1534 #define __SDMMC_RELEASE_RESET __HAL_RCC_SDMMC_RELEASE_RESET
mbed_official 489:119543c9f674 1535 #define __SPI1_CLK_DISABLE __HAL_RCC_SPI1_CLK_DISABLE
mbed_official 489:119543c9f674 1536 #define __SPI1_CLK_ENABLE __HAL_RCC_SPI1_CLK_ENABLE
mbed_official 489:119543c9f674 1537 #define __SPI1_CLK_SLEEP_DISABLE __HAL_RCC_SPI1_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1538 #define __SPI1_CLK_SLEEP_ENABLE __HAL_RCC_SPI1_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1539 #define __SPI1_FORCE_RESET __HAL_RCC_SPI1_FORCE_RESET
mbed_official 489:119543c9f674 1540 #define __SPI1_RELEASE_RESET __HAL_RCC_SPI1_RELEASE_RESET
mbed_official 489:119543c9f674 1541 #define __SPI2_CLK_DISABLE __HAL_RCC_SPI2_CLK_DISABLE
mbed_official 489:119543c9f674 1542 #define __SPI2_CLK_ENABLE __HAL_RCC_SPI2_CLK_ENABLE
mbed_official 489:119543c9f674 1543 #define __SPI2_CLK_SLEEP_DISABLE __HAL_RCC_SPI2_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1544 #define __SPI2_CLK_SLEEP_ENABLE __HAL_RCC_SPI2_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1545 #define __SPI2_FORCE_RESET __HAL_RCC_SPI2_FORCE_RESET
mbed_official 489:119543c9f674 1546 #define __SPI2_RELEASE_RESET __HAL_RCC_SPI2_RELEASE_RESET
mbed_official 489:119543c9f674 1547 #define __SPI3_CLK_DISABLE __HAL_RCC_SPI3_CLK_DISABLE
mbed_official 489:119543c9f674 1548 #define __SPI3_CLK_ENABLE __HAL_RCC_SPI3_CLK_ENABLE
mbed_official 489:119543c9f674 1549 #define __SPI3_CLK_SLEEP_DISABLE __HAL_RCC_SPI3_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1550 #define __SPI3_CLK_SLEEP_ENABLE __HAL_RCC_SPI3_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1551 #define __SPI3_FORCE_RESET __HAL_RCC_SPI3_FORCE_RESET
mbed_official 489:119543c9f674 1552 #define __SPI3_RELEASE_RESET __HAL_RCC_SPI3_RELEASE_RESET
mbed_official 489:119543c9f674 1553 #define __SRAM_CLK_DISABLE __HAL_RCC_SRAM_CLK_DISABLE
mbed_official 489:119543c9f674 1554 #define __SRAM_CLK_ENABLE __HAL_RCC_SRAM_CLK_ENABLE
mbed_official 489:119543c9f674 1555 #define __SRAM1_CLK_SLEEP_DISABLE __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1556 #define __SRAM1_CLK_SLEEP_ENABLE __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1557 #define __SRAM2_CLK_SLEEP_DISABLE __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1558 #define __SRAM2_CLK_SLEEP_ENABLE __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1559 #define __SWPMI1_CLK_DISABLE __HAL_RCC_SWPMI1_CLK_DISABLE
mbed_official 489:119543c9f674 1560 #define __SWPMI1_CLK_ENABLE __HAL_RCC_SWPMI1_CLK_ENABLE
mbed_official 489:119543c9f674 1561 #define __SWPMI1_CLK_SLEEP_DISABLE __HAL_RCC_SWPMI1_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1562 #define __SWPMI1_CLK_SLEEP_ENABLE __HAL_RCC_SWPMI1_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1563 #define __SWPMI1_FORCE_RESET __HAL_RCC_SWPMI1_FORCE_RESET
mbed_official 489:119543c9f674 1564 #define __SWPMI1_RELEASE_RESET __HAL_RCC_SWPMI1_RELEASE_RESET
mbed_official 489:119543c9f674 1565 #define __SYSCFG_CLK_DISABLE __HAL_RCC_SYSCFG_CLK_DISABLE
mbed_official 489:119543c9f674 1566 #define __SYSCFG_CLK_ENABLE __HAL_RCC_SYSCFG_CLK_ENABLE
mbed_official 489:119543c9f674 1567 #define __SYSCFG_CLK_SLEEP_DISABLE __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1568 #define __SYSCFG_CLK_SLEEP_ENABLE __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1569 #define __SYSCFG_FORCE_RESET __HAL_RCC_SYSCFG_FORCE_RESET
mbed_official 489:119543c9f674 1570 #define __SYSCFG_RELEASE_RESET __HAL_RCC_SYSCFG_RELEASE_RESET
mbed_official 489:119543c9f674 1571 #define __TIM1_CLK_DISABLE __HAL_RCC_TIM1_CLK_DISABLE
mbed_official 489:119543c9f674 1572 #define __TIM1_CLK_ENABLE __HAL_RCC_TIM1_CLK_ENABLE
mbed_official 489:119543c9f674 1573 #define __TIM1_CLK_SLEEP_DISABLE __HAL_RCC_TIM1_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1574 #define __TIM1_CLK_SLEEP_ENABLE __HAL_RCC_TIM1_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1575 #define __TIM1_FORCE_RESET __HAL_RCC_TIM1_FORCE_RESET
mbed_official 489:119543c9f674 1576 #define __TIM1_RELEASE_RESET __HAL_RCC_TIM1_RELEASE_RESET
mbed_official 489:119543c9f674 1577 #define __TIM10_CLK_DISABLE __HAL_RCC_TIM10_CLK_DISABLE
mbed_official 489:119543c9f674 1578 #define __TIM10_CLK_ENABLE __HAL_RCC_TIM10_CLK_ENABLE
mbed_official 489:119543c9f674 1579 #define __TIM10_FORCE_RESET __HAL_RCC_TIM10_FORCE_RESET
mbed_official 489:119543c9f674 1580 #define __TIM10_RELEASE_RESET __HAL_RCC_TIM10_RELEASE_RESET
mbed_official 489:119543c9f674 1581 #define __TIM11_CLK_DISABLE __HAL_RCC_TIM11_CLK_DISABLE
mbed_official 489:119543c9f674 1582 #define __TIM11_CLK_ENABLE __HAL_RCC_TIM11_CLK_ENABLE
mbed_official 489:119543c9f674 1583 #define __TIM11_FORCE_RESET __HAL_RCC_TIM11_FORCE_RESET
mbed_official 489:119543c9f674 1584 #define __TIM11_RELEASE_RESET __HAL_RCC_TIM11_RELEASE_RESET
mbed_official 489:119543c9f674 1585 #define __TIM12_CLK_DISABLE __HAL_RCC_TIM12_CLK_DISABLE
mbed_official 489:119543c9f674 1586 #define __TIM12_CLK_ENABLE __HAL_RCC_TIM12_CLK_ENABLE
mbed_official 489:119543c9f674 1587 #define __TIM12_FORCE_RESET __HAL_RCC_TIM12_FORCE_RESET
mbed_official 489:119543c9f674 1588 #define __TIM12_RELEASE_RESET __HAL_RCC_TIM12_RELEASE_RESET
mbed_official 489:119543c9f674 1589 #define __TIM13_CLK_DISABLE __HAL_RCC_TIM13_CLK_DISABLE
mbed_official 489:119543c9f674 1590 #define __TIM13_CLK_ENABLE __HAL_RCC_TIM13_CLK_ENABLE
mbed_official 489:119543c9f674 1591 #define __TIM13_FORCE_RESET __HAL_RCC_TIM13_FORCE_RESET
mbed_official 489:119543c9f674 1592 #define __TIM13_RELEASE_RESET __HAL_RCC_TIM13_RELEASE_RESET
mbed_official 489:119543c9f674 1593 #define __TIM14_CLK_DISABLE __HAL_RCC_TIM14_CLK_DISABLE
mbed_official 489:119543c9f674 1594 #define __TIM14_CLK_ENABLE __HAL_RCC_TIM14_CLK_ENABLE
mbed_official 489:119543c9f674 1595 #define __TIM14_FORCE_RESET __HAL_RCC_TIM14_FORCE_RESET
mbed_official 489:119543c9f674 1596 #define __TIM14_RELEASE_RESET __HAL_RCC_TIM14_RELEASE_RESET
mbed_official 489:119543c9f674 1597 #define __TIM15_CLK_DISABLE __HAL_RCC_TIM15_CLK_DISABLE
mbed_official 489:119543c9f674 1598 #define __TIM15_CLK_ENABLE __HAL_RCC_TIM15_CLK_ENABLE
mbed_official 489:119543c9f674 1599 #define __TIM15_CLK_SLEEP_DISABLE __HAL_RCC_TIM15_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1600 #define __TIM15_CLK_SLEEP_ENABLE __HAL_RCC_TIM15_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1601 #define __TIM15_FORCE_RESET __HAL_RCC_TIM15_FORCE_RESET
mbed_official 489:119543c9f674 1602 #define __TIM15_RELEASE_RESET __HAL_RCC_TIM15_RELEASE_RESET
mbed_official 489:119543c9f674 1603 #define __TIM16_CLK_DISABLE __HAL_RCC_TIM16_CLK_DISABLE
mbed_official 489:119543c9f674 1604 #define __TIM16_CLK_ENABLE __HAL_RCC_TIM16_CLK_ENABLE
mbed_official 489:119543c9f674 1605 #define __TIM16_CLK_SLEEP_DISABLE __HAL_RCC_TIM16_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1606 #define __TIM16_CLK_SLEEP_ENABLE __HAL_RCC_TIM16_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1607 #define __TIM16_FORCE_RESET __HAL_RCC_TIM16_FORCE_RESET
mbed_official 489:119543c9f674 1608 #define __TIM16_RELEASE_RESET __HAL_RCC_TIM16_RELEASE_RESET
mbed_official 489:119543c9f674 1609 #define __TIM17_CLK_DISABLE __HAL_RCC_TIM17_CLK_DISABLE
mbed_official 489:119543c9f674 1610 #define __TIM17_CLK_ENABLE __HAL_RCC_TIM17_CLK_ENABLE
mbed_official 489:119543c9f674 1611 #define __TIM17_CLK_SLEEP_DISABLE __HAL_RCC_TIM17_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1612 #define __TIM17_CLK_SLEEP_ENABLE __HAL_RCC_TIM17_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1613 #define __TIM17_FORCE_RESET __HAL_RCC_TIM17_FORCE_RESET
mbed_official 489:119543c9f674 1614 #define __TIM17_RELEASE_RESET __HAL_RCC_TIM17_RELEASE_RESET
mbed_official 489:119543c9f674 1615 #define __TIM2_CLK_DISABLE __HAL_RCC_TIM2_CLK_DISABLE
mbed_official 489:119543c9f674 1616 #define __TIM2_CLK_ENABLE __HAL_RCC_TIM2_CLK_ENABLE
mbed_official 489:119543c9f674 1617 #define __TIM2_CLK_SLEEP_DISABLE __HAL_RCC_TIM2_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1618 #define __TIM2_CLK_SLEEP_ENABLE __HAL_RCC_TIM2_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1619 #define __TIM2_FORCE_RESET __HAL_RCC_TIM2_FORCE_RESET
mbed_official 489:119543c9f674 1620 #define __TIM2_RELEASE_RESET __HAL_RCC_TIM2_RELEASE_RESET
mbed_official 489:119543c9f674 1621 #define __TIM3_CLK_DISABLE __HAL_RCC_TIM3_CLK_DISABLE
mbed_official 489:119543c9f674 1622 #define __TIM3_CLK_ENABLE __HAL_RCC_TIM3_CLK_ENABLE
mbed_official 489:119543c9f674 1623 #define __TIM3_CLK_SLEEP_DISABLE __HAL_RCC_TIM3_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1624 #define __TIM3_CLK_SLEEP_ENABLE __HAL_RCC_TIM3_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1625 #define __TIM3_FORCE_RESET __HAL_RCC_TIM3_FORCE_RESET
mbed_official 489:119543c9f674 1626 #define __TIM3_RELEASE_RESET __HAL_RCC_TIM3_RELEASE_RESET
mbed_official 489:119543c9f674 1627 #define __TIM4_CLK_DISABLE __HAL_RCC_TIM4_CLK_DISABLE
mbed_official 489:119543c9f674 1628 #define __TIM4_CLK_ENABLE __HAL_RCC_TIM4_CLK_ENABLE
mbed_official 489:119543c9f674 1629 #define __TIM4_CLK_SLEEP_DISABLE __HAL_RCC_TIM4_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1630 #define __TIM4_CLK_SLEEP_ENABLE __HAL_RCC_TIM4_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1631 #define __TIM4_FORCE_RESET __HAL_RCC_TIM4_FORCE_RESET
mbed_official 489:119543c9f674 1632 #define __TIM4_RELEASE_RESET __HAL_RCC_TIM4_RELEASE_RESET
mbed_official 489:119543c9f674 1633 #define __TIM5_CLK_DISABLE __HAL_RCC_TIM5_CLK_DISABLE
mbed_official 489:119543c9f674 1634 #define __TIM5_CLK_ENABLE __HAL_RCC_TIM5_CLK_ENABLE
mbed_official 489:119543c9f674 1635 #define __TIM5_CLK_SLEEP_DISABLE __HAL_RCC_TIM5_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1636 #define __TIM5_CLK_SLEEP_ENABLE __HAL_RCC_TIM5_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1637 #define __TIM5_FORCE_RESET __HAL_RCC_TIM5_FORCE_RESET
mbed_official 489:119543c9f674 1638 #define __TIM5_RELEASE_RESET __HAL_RCC_TIM5_RELEASE_RESET
mbed_official 489:119543c9f674 1639 #define __TIM6_CLK_DISABLE __HAL_RCC_TIM6_CLK_DISABLE
mbed_official 489:119543c9f674 1640 #define __TIM6_CLK_ENABLE __HAL_RCC_TIM6_CLK_ENABLE
mbed_official 489:119543c9f674 1641 #define __TIM6_CLK_SLEEP_DISABLE __HAL_RCC_TIM6_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1642 #define __TIM6_CLK_SLEEP_ENABLE __HAL_RCC_TIM6_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1643 #define __TIM6_FORCE_RESET __HAL_RCC_TIM6_FORCE_RESET
mbed_official 489:119543c9f674 1644 #define __TIM6_RELEASE_RESET __HAL_RCC_TIM6_RELEASE_RESET
mbed_official 489:119543c9f674 1645 #define __TIM7_CLK_DISABLE __HAL_RCC_TIM7_CLK_DISABLE
mbed_official 489:119543c9f674 1646 #define __TIM7_CLK_ENABLE __HAL_RCC_TIM7_CLK_ENABLE
mbed_official 489:119543c9f674 1647 #define __TIM7_CLK_SLEEP_DISABLE __HAL_RCC_TIM7_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1648 #define __TIM7_CLK_SLEEP_ENABLE __HAL_RCC_TIM7_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1649 #define __TIM7_FORCE_RESET __HAL_RCC_TIM7_FORCE_RESET
mbed_official 489:119543c9f674 1650 #define __TIM7_RELEASE_RESET __HAL_RCC_TIM7_RELEASE_RESET
mbed_official 489:119543c9f674 1651 #define __TIM8_CLK_DISABLE __HAL_RCC_TIM8_CLK_DISABLE
mbed_official 489:119543c9f674 1652 #define __TIM8_CLK_ENABLE __HAL_RCC_TIM8_CLK_ENABLE
mbed_official 489:119543c9f674 1653 #define __TIM8_CLK_SLEEP_DISABLE __HAL_RCC_TIM8_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1654 #define __TIM8_CLK_SLEEP_ENABLE __HAL_RCC_TIM8_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1655 #define __TIM8_FORCE_RESET __HAL_RCC_TIM8_FORCE_RESET
mbed_official 489:119543c9f674 1656 #define __TIM8_RELEASE_RESET __HAL_RCC_TIM8_RELEASE_RESET
mbed_official 489:119543c9f674 1657 #define __TIM9_CLK_DISABLE __HAL_RCC_TIM9_CLK_DISABLE
mbed_official 489:119543c9f674 1658 #define __TIM9_CLK_ENABLE __HAL_RCC_TIM9_CLK_ENABLE
mbed_official 489:119543c9f674 1659 #define __TIM9_FORCE_RESET __HAL_RCC_TIM9_FORCE_RESET
mbed_official 489:119543c9f674 1660 #define __TIM9_RELEASE_RESET __HAL_RCC_TIM9_RELEASE_RESET
mbed_official 489:119543c9f674 1661 #define __TSC_CLK_DISABLE __HAL_RCC_TSC_CLK_DISABLE
mbed_official 489:119543c9f674 1662 #define __TSC_CLK_ENABLE __HAL_RCC_TSC_CLK_ENABLE
mbed_official 489:119543c9f674 1663 #define __TSC_CLK_SLEEP_DISABLE __HAL_RCC_TSC_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1664 #define __TSC_CLK_SLEEP_ENABLE __HAL_RCC_TSC_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1665 #define __TSC_FORCE_RESET __HAL_RCC_TSC_FORCE_RESET
mbed_official 489:119543c9f674 1666 #define __TSC_RELEASE_RESET __HAL_RCC_TSC_RELEASE_RESET
mbed_official 489:119543c9f674 1667 #define __UART4_CLK_DISABLE __HAL_RCC_UART4_CLK_DISABLE
mbed_official 489:119543c9f674 1668 #define __UART4_CLK_ENABLE __HAL_RCC_UART4_CLK_ENABLE
mbed_official 489:119543c9f674 1669 #define __UART4_CLK_SLEEP_DISABLE __HAL_RCC_UART4_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1670 #define __UART4_CLK_SLEEP_ENABLE __HAL_RCC_UART4_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1671 #define __UART4_FORCE_RESET __HAL_RCC_UART4_FORCE_RESET
mbed_official 489:119543c9f674 1672 #define __UART4_RELEASE_RESET __HAL_RCC_UART4_RELEASE_RESET
mbed_official 489:119543c9f674 1673 #define __UART5_CLK_DISABLE __HAL_RCC_UART5_CLK_DISABLE
mbed_official 489:119543c9f674 1674 #define __UART5_CLK_ENABLE __HAL_RCC_UART5_CLK_ENABLE
mbed_official 489:119543c9f674 1675 #define __UART5_CLK_SLEEP_DISABLE __HAL_RCC_UART5_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1676 #define __UART5_CLK_SLEEP_ENABLE __HAL_RCC_UART5_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1677 #define __UART5_FORCE_RESET __HAL_RCC_UART5_FORCE_RESET
mbed_official 489:119543c9f674 1678 #define __UART5_RELEASE_RESET __HAL_RCC_UART5_RELEASE_RESET
mbed_official 489:119543c9f674 1679 #define __USART1_CLK_DISABLE __HAL_RCC_USART1_CLK_DISABLE
mbed_official 489:119543c9f674 1680 #define __USART1_CLK_ENABLE __HAL_RCC_USART1_CLK_ENABLE
mbed_official 489:119543c9f674 1681 #define __USART1_CLK_SLEEP_DISABLE __HAL_RCC_USART1_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1682 #define __USART1_CLK_SLEEP_ENABLE __HAL_RCC_USART1_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1683 #define __USART1_FORCE_RESET __HAL_RCC_USART1_FORCE_RESET
mbed_official 489:119543c9f674 1684 #define __USART1_RELEASE_RESET __HAL_RCC_USART1_RELEASE_RESET
mbed_official 489:119543c9f674 1685 #define __USART2_CLK_DISABLE __HAL_RCC_USART2_CLK_DISABLE
mbed_official 489:119543c9f674 1686 #define __USART2_CLK_ENABLE __HAL_RCC_USART2_CLK_ENABLE
mbed_official 489:119543c9f674 1687 #define __USART2_CLK_SLEEP_DISABLE __HAL_RCC_USART2_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1688 #define __USART2_CLK_SLEEP_ENABLE __HAL_RCC_USART2_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1689 #define __USART2_FORCE_RESET __HAL_RCC_USART2_FORCE_RESET
mbed_official 489:119543c9f674 1690 #define __USART2_RELEASE_RESET __HAL_RCC_USART2_RELEASE_RESET
mbed_official 489:119543c9f674 1691 #define __USART3_CLK_DISABLE __HAL_RCC_USART3_CLK_DISABLE
mbed_official 489:119543c9f674 1692 #define __USART3_CLK_ENABLE __HAL_RCC_USART3_CLK_ENABLE
mbed_official 489:119543c9f674 1693 #define __USART3_CLK_SLEEP_DISABLE __HAL_RCC_USART3_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1694 #define __USART3_CLK_SLEEP_ENABLE __HAL_RCC_USART3_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1695 #define __USART3_FORCE_RESET __HAL_RCC_USART3_FORCE_RESET
mbed_official 489:119543c9f674 1696 #define __USART3_RELEASE_RESET __HAL_RCC_USART3_RELEASE_RESET
mbed_official 489:119543c9f674 1697 #define __USB_CLK_DISABLE __HAL_RCC_USB_CLK_DISABLE
mbed_official 489:119543c9f674 1698 #define __USB_CLK_ENABLE __HAL_RCC_USB_CLK_ENABLE
mbed_official 489:119543c9f674 1699 #define __USB_FORCE_RESET __HAL_RCC_USB_FORCE_RESET
mbed_official 489:119543c9f674 1700 #define __USB_CLK_SLEEP_ENABLE __HAL_RCC_USB_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1701 #define __USB_CLK_SLEEP_DISABLE __HAL_RCC_USB_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1702 #define __USB_OTG_FS_CLK_DISABLE __HAL_RCC_USB_OTG_FS_CLK_DISABLE
mbed_official 489:119543c9f674 1703 #define __USB_OTG_FS_CLK_ENABLE __HAL_RCC_USB_OTG_FS_CLK_ENABLE
mbed_official 489:119543c9f674 1704 #define __USB_RELEASE_RESET __HAL_RCC_USB_RELEASE_RESET
mbed_official 489:119543c9f674 1705 #define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE
mbed_official 489:119543c9f674 1706 #define __WWDG_CLK_ENABLE __HAL_RCC_WWDG_CLK_ENABLE
mbed_official 489:119543c9f674 1707 #define __WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1708 #define __WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1709 #define __WWDG_FORCE_RESET __HAL_RCC_WWDG_FORCE_RESET
mbed_official 489:119543c9f674 1710 #define __WWDG_RELEASE_RESET __HAL_RCC_WWDG_RELEASE_RESET
mbed_official 489:119543c9f674 1711 #define __TIM21_CLK_ENABLE __HAL_RCC_TIM21_CLK_ENABLE
mbed_official 489:119543c9f674 1712 #define __TIM21_CLK_DISABLE __HAL_RCC_TIM21_CLK_DISABLE
mbed_official 489:119543c9f674 1713 #define __TIM21_FORCE_RESET __HAL_RCC_TIM21_FORCE_RESET
mbed_official 489:119543c9f674 1714 #define __TIM21_RELEASE_RESET __HAL_RCC_TIM21_RELEASE_RESET
mbed_official 489:119543c9f674 1715 #define __TIM21_CLK_SLEEP_ENABLE __HAL_RCC_TIM21_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1716 #define __TIM21_CLK_SLEEP_DISABLE __HAL_RCC_TIM21_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1717 #define __TIM22_CLK_ENABLE __HAL_RCC_TIM22_CLK_ENABLE
mbed_official 489:119543c9f674 1718 #define __TIM22_CLK_DISABLE __HAL_RCC_TIM22_CLK_DISABLE
mbed_official 489:119543c9f674 1719 #define __TIM22_FORCE_RESET __HAL_RCC_TIM22_FORCE_RESET
mbed_official 489:119543c9f674 1720 #define __TIM22_RELEASE_RESET __HAL_RCC_TIM22_RELEASE_RESET
mbed_official 489:119543c9f674 1721 #define __TIM22_CLK_SLEEP_ENABLE __HAL_RCC_TIM22_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1722 #define __TIM22_CLK_SLEEP_DISABLE __HAL_RCC_TIM22_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1723 #define __CRS_CLK_DISABLE __HAL_RCC_CRS_CLK_DISABLE
mbed_official 489:119543c9f674 1724 #define __CRS_CLK_ENABLE __HAL_RCC_CRS_CLK_ENABLE
mbed_official 489:119543c9f674 1725 #define __CRS_CLK_SLEEP_DISABLE __HAL_RCC_CRS_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1726 #define __CRS_CLK_SLEEP_ENABLE __HAL_RCC_CRS_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1727 #define __CRS_FORCE_RESET __HAL_RCC_CRS_FORCE_RESET
mbed_official 489:119543c9f674 1728 #define __CRS_RELEASE_RESET __HAL_RCC_CRS_RELEASE_RESET
mbed_official 489:119543c9f674 1729 #define __RCC_BACKUPRESET_FORCE __HAL_RCC_BACKUPRESET_FORCE
mbed_official 489:119543c9f674 1730 #define __RCC_BACKUPRESET_RELEASE __HAL_RCC_BACKUPRESET_RELEASE
mbed_official 489:119543c9f674 1731
mbed_official 489:119543c9f674 1732 #define __USB_OTG_FS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET
mbed_official 489:119543c9f674 1733 #define __USB_OTG_FS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET
mbed_official 489:119543c9f674 1734 #define __USB_OTG_FS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1735 #define __USB_OTG_FS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1736 #define __USB_OTG_HS_CLK_DISABLE __HAL_RCC_USB_OTG_HS_CLK_DISABLE
mbed_official 489:119543c9f674 1737 #define __USB_OTG_HS_CLK_ENABLE __HAL_RCC_USB_OTG_HS_CLK_ENABLE
mbed_official 489:119543c9f674 1738 #define __USB_OTG_HS_ULPI_CLK_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE
mbed_official 489:119543c9f674 1739 #define __USB_OTG_HS_ULPI_CLK_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE
mbed_official 489:119543c9f674 1740 #define __TIM9_CLK_SLEEP_ENABLE __HAL_RCC_TIM9_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1741 #define __TIM9_CLK_SLEEP_DISABLE __HAL_RCC_TIM9_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1742 #define __TIM10_CLK_SLEEP_ENABLE __HAL_RCC_TIM10_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1743 #define __TIM10_CLK_SLEEP_DISABLE __HAL_RCC_TIM10_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1744 #define __TIM11_CLK_SLEEP_ENABLE __HAL_RCC_TIM11_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1745 #define __TIM11_CLK_SLEEP_DISABLE __HAL_RCC_TIM11_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1746 #define __ETHMACPTP_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1747 #define __ETHMACPTP_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1748 #define __ETHMACPTP_CLK_ENABLE __HAL_RCC_ETHMACPTP_CLK_ENABLE
mbed_official 489:119543c9f674 1749 #define __ETHMACPTP_CLK_DISABLE __HAL_RCC_ETHMACPTP_CLK_DISABLE
mbed_official 489:119543c9f674 1750 #define __HASH_CLK_ENABLE __HAL_RCC_HASH_CLK_ENABLE
mbed_official 489:119543c9f674 1751 #define __HASH_FORCE_RESET __HAL_RCC_HASH_FORCE_RESET
mbed_official 489:119543c9f674 1752 #define __HASH_RELEASE_RESET __HAL_RCC_HASH_RELEASE_RESET
mbed_official 489:119543c9f674 1753 #define __HASH_CLK_SLEEP_ENABLE __HAL_RCC_HASH_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1754 #define __HASH_CLK_SLEEP_DISABLE __HAL_RCC_HASH_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1755 #define __HASH_CLK_DISABLE __HAL_RCC_HASH_CLK_DISABLE
mbed_official 489:119543c9f674 1756 #define __SPI5_CLK_ENABLE __HAL_RCC_SPI5_CLK_ENABLE
mbed_official 489:119543c9f674 1757 #define __SPI5_CLK_DISABLE __HAL_RCC_SPI5_CLK_DISABLE
mbed_official 489:119543c9f674 1758 #define __SPI5_FORCE_RESET __HAL_RCC_SPI5_FORCE_RESET
mbed_official 489:119543c9f674 1759 #define __SPI5_RELEASE_RESET __HAL_RCC_SPI5_RELEASE_RESET
mbed_official 489:119543c9f674 1760 #define __SPI5_CLK_SLEEP_ENABLE __HAL_RCC_SPI5_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1761 #define __SPI5_CLK_SLEEP_DISABLE __HAL_RCC_SPI5_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1762 #define __SPI6_CLK_ENABLE __HAL_RCC_SPI6_CLK_ENABLE
mbed_official 489:119543c9f674 1763 #define __SPI6_CLK_DISABLE __HAL_RCC_SPI6_CLK_DISABLE
mbed_official 489:119543c9f674 1764 #define __SPI6_FORCE_RESET __HAL_RCC_SPI6_FORCE_RESET
mbed_official 489:119543c9f674 1765 #define __SPI6_RELEASE_RESET __HAL_RCC_SPI6_RELEASE_RESET
mbed_official 489:119543c9f674 1766 #define __SPI6_CLK_SLEEP_ENABLE __HAL_RCC_SPI6_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1767 #define __SPI6_CLK_SLEEP_DISABLE __HAL_RCC_SPI6_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1768 #define __LTDC_CLK_ENABLE __HAL_RCC_LTDC_CLK_ENABLE
mbed_official 489:119543c9f674 1769 #define __LTDC_CLK_DISABLE __HAL_RCC_LTDC_CLK_DISABLE
mbed_official 489:119543c9f674 1770 #define __LTDC_FORCE_RESET __HAL_RCC_LTDC_FORCE_RESET
mbed_official 489:119543c9f674 1771 #define __LTDC_RELEASE_RESET __HAL_RCC_LTDC_RELEASE_RESET
mbed_official 489:119543c9f674 1772 #define __LTDC_CLK_SLEEP_ENABLE __HAL_RCC_LTDC_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1773 #define __ETHMAC_CLK_SLEEP_ENABLE __HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1774 #define __ETHMAC_CLK_SLEEP_DISABLE __HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1775 #define __ETHMACTX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1776 #define __ETHMACTX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1777 #define __ETHMACRX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1778 #define __ETHMACRX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1779 #define __TIM12_CLK_SLEEP_ENABLE __HAL_RCC_TIM12_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1780 #define __TIM12_CLK_SLEEP_DISABLE __HAL_RCC_TIM12_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1781 #define __TIM13_CLK_SLEEP_ENABLE __HAL_RCC_TIM13_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1782 #define __TIM13_CLK_SLEEP_DISABLE __HAL_RCC_TIM13_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1783 #define __TIM14_CLK_SLEEP_ENABLE __HAL_RCC_TIM14_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1784 #define __TIM14_CLK_SLEEP_DISABLE __HAL_RCC_TIM14_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1785 #define __BKPSRAM_CLK_ENABLE __HAL_RCC_BKPSRAM_CLK_ENABLE
mbed_official 489:119543c9f674 1786 #define __BKPSRAM_CLK_DISABLE __HAL_RCC_BKPSRAM_CLK_DISABLE
mbed_official 489:119543c9f674 1787 #define __BKPSRAM_CLK_SLEEP_ENABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1788 #define __BKPSRAM_CLK_SLEEP_DISABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1789 #define __CCMDATARAMEN_CLK_ENABLE __HAL_RCC_CCMDATARAMEN_CLK_ENABLE
mbed_official 489:119543c9f674 1790 #define __CCMDATARAMEN_CLK_DISABLE __HAL_RCC_CCMDATARAMEN_CLK_DISABLE
mbed_official 489:119543c9f674 1791 #define __USART6_CLK_ENABLE __HAL_RCC_USART6_CLK_ENABLE
mbed_official 489:119543c9f674 1792 #define __USART6_CLK_DISABLE __HAL_RCC_USART6_CLK_DISABLE
mbed_official 489:119543c9f674 1793 #define __USART6_FORCE_RESET __HAL_RCC_USART6_FORCE_RESET
mbed_official 489:119543c9f674 1794 #define __USART6_RELEASE_RESET __HAL_RCC_USART6_RELEASE_RESET
mbed_official 489:119543c9f674 1795 #define __USART6_CLK_SLEEP_ENABLE __HAL_RCC_USART6_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1796 #define __USART6_CLK_SLEEP_DISABLE __HAL_RCC_USART6_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1797 #define __SPI4_CLK_ENABLE __HAL_RCC_SPI4_CLK_ENABLE
mbed_official 489:119543c9f674 1798 #define __SPI4_CLK_DISABLE __HAL_RCC_SPI4_CLK_DISABLE
mbed_official 489:119543c9f674 1799 #define __SPI4_FORCE_RESET __HAL_RCC_SPI4_FORCE_RESET
mbed_official 489:119543c9f674 1800 #define __SPI4_RELEASE_RESET __HAL_RCC_SPI4_RELEASE_RESET
mbed_official 489:119543c9f674 1801 #define __SPI4_CLK_SLEEP_ENABLE __HAL_RCC_SPI4_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1802 #define __SPI4_CLK_SLEEP_DISABLE __HAL_RCC_SPI4_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1803 #define __GPIOI_CLK_ENABLE __HAL_RCC_GPIOI_CLK_ENABLE
mbed_official 489:119543c9f674 1804 #define __GPIOI_CLK_DISABLE __HAL_RCC_GPIOI_CLK_DISABLE
mbed_official 489:119543c9f674 1805 #define __GPIOI_FORCE_RESET __HAL_RCC_GPIOI_FORCE_RESET
mbed_official 489:119543c9f674 1806 #define __GPIOI_RELEASE_RESET __HAL_RCC_GPIOI_RELEASE_RESET
mbed_official 489:119543c9f674 1807 #define __GPIOI_CLK_SLEEP_ENABLE __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1808 #define __GPIOI_CLK_SLEEP_DISABLE __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1809 #define __GPIOJ_CLK_ENABLE __HAL_RCC_GPIOJ_CLK_ENABLE
mbed_official 489:119543c9f674 1810 #define __GPIOJ_CLK_DISABLE __HAL_RCC_GPIOJ_CLK_DISABLE
mbed_official 489:119543c9f674 1811 #define __GPIOJ_FORCE_RESET __HAL_RCC_GPIOJ_FORCE_RESET
mbed_official 489:119543c9f674 1812 #define __GPIOJ_RELEASE_RESET __HAL_RCC_GPIOJ_RELEASE_RESET
mbed_official 489:119543c9f674 1813 #define __GPIOJ_CLK_SLEEP_ENABLE __HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1814 #define __GPIOJ_CLK_SLEEP_DISABLE __HAL_RCC_GPIOJ_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1815 #define __GPIOK_CLK_ENABLE __HAL_RCC_GPIOK_CLK_ENABLE
mbed_official 489:119543c9f674 1816 #define __GPIOK_CLK_DISABLE __HAL_RCC_GPIOK_CLK_DISABLE
mbed_official 489:119543c9f674 1817 #define __GPIOK_RELEASE_RESET __HAL_RCC_GPIOK_RELEASE_RESET
mbed_official 489:119543c9f674 1818 #define __GPIOK_CLK_SLEEP_ENABLE __HAL_RCC_GPIOK_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1819 #define __GPIOK_CLK_SLEEP_DISABLE __HAL_RCC_GPIOK_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1820 #define __ETH_CLK_ENABLE __HAL_RCC_ETH_CLK_ENABLE
mbed_official 489:119543c9f674 1821 #define __ETH_CLK_DISABLE __HAL_RCC_ETH_CLK_DISABLE
mbed_official 489:119543c9f674 1822 #define __DCMI_CLK_ENABLE __HAL_RCC_DCMI_CLK_ENABLE
mbed_official 489:119543c9f674 1823 #define __DCMI_CLK_DISABLE __HAL_RCC_DCMI_CLK_DISABLE
mbed_official 489:119543c9f674 1824 #define __DCMI_FORCE_RESET __HAL_RCC_DCMI_FORCE_RESET
mbed_official 489:119543c9f674 1825 #define __DCMI_RELEASE_RESET __HAL_RCC_DCMI_RELEASE_RESET
mbed_official 489:119543c9f674 1826 #define __DCMI_CLK_SLEEP_ENABLE __HAL_RCC_DCMI_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1827 #define __DCMI_CLK_SLEEP_DISABLE __HAL_RCC_DCMI_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1828 #define __UART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE
mbed_official 489:119543c9f674 1829 #define __UART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE
mbed_official 489:119543c9f674 1830 #define __UART7_RELEASE_RESET __HAL_RCC_UART7_RELEASE_RESET
mbed_official 489:119543c9f674 1831 #define __UART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET
mbed_official 489:119543c9f674 1832 #define __UART7_CLK_SLEEP_ENABLE __HAL_RCC_UART7_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1833 #define __UART7_CLK_SLEEP_DISABLE __HAL_RCC_UART7_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1834 #define __UART8_CLK_ENABLE __HAL_RCC_UART8_CLK_ENABLE
mbed_official 489:119543c9f674 1835 #define __UART8_CLK_DISABLE __HAL_RCC_UART8_CLK_DISABLE
mbed_official 489:119543c9f674 1836 #define __UART8_FORCE_RESET __HAL_RCC_UART8_FORCE_RESET
mbed_official 489:119543c9f674 1837 #define __UART8_RELEASE_RESET __HAL_RCC_UART8_RELEASE_RESET
mbed_official 489:119543c9f674 1838 #define __UART8_CLK_SLEEP_ENABLE __HAL_RCC_UART8_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1839 #define __UART8_CLK_SLEEP_DISABLE __HAL_RCC_UART8_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1840 #define __OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_OTGHS_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1841 #define __OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_OTGHS_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1842 #define __OTGHS_FORCE_RESET __HAL_RCC_OTGHS_FORCE_RESET
mbed_official 489:119543c9f674 1843 #define __OTGHS_RELEASE_RESET __HAL_RCC_OTGHS_RELEASE_RESET
mbed_official 489:119543c9f674 1844 #define __OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1845 #define __OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1846 #define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET
mbed_official 489:119543c9f674 1847 #define __SRAM3_CLK_SLEEP_ENABLE __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1848 #define __CAN2_CLK_SLEEP_ENABLE __HAL_RCC_CAN2_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1849 #define __CAN2_CLK_SLEEP_DISABLE __HAL_RCC_CAN2_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1850 #define __DAC_CLK_SLEEP_ENABLE __HAL_RCC_DAC_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1851 #define __DAC_CLK_SLEEP_DISABLE __HAL_RCC_DAC_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1852 #define __ADC2_CLK_SLEEP_ENABLE __HAL_RCC_ADC2_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1853 #define __ADC2_CLK_SLEEP_DISABLE __HAL_RCC_ADC2_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1854 #define __ADC3_CLK_SLEEP_ENABLE __HAL_RCC_ADC3_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1855 #define __ADC3_CLK_SLEEP_DISABLE __HAL_RCC_ADC3_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1856 #define __FSMC_FORCE_RESET __HAL_RCC_FSMC_FORCE_RESET
mbed_official 489:119543c9f674 1857 #define __FSMC_RELEASE_RESET __HAL_RCC_FSMC_RELEASE_RESET
mbed_official 489:119543c9f674 1858 #define __FSMC_CLK_SLEEP_ENABLE __HAL_RCC_FSMC_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1859 #define __FSMC_CLK_SLEEP_DISABLE __HAL_RCC_FSMC_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1860 #define __SDIO_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET
mbed_official 489:119543c9f674 1861 #define __SDIO_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET
mbed_official 489:119543c9f674 1862 #define __SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1863 #define __SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1864 #define __DMA2D_CLK_ENABLE __HAL_RCC_DMA2D_CLK_ENABLE
mbed_official 489:119543c9f674 1865 #define __DMA2D_CLK_DISABLE __HAL_RCC_DMA2D_CLK_DISABLE
mbed_official 489:119543c9f674 1866 #define __DMA2D_FORCE_RESET __HAL_RCC_DMA2D_FORCE_RESET
mbed_official 489:119543c9f674 1867 #define __DMA2D_RELEASE_RESET __HAL_RCC_DMA2D_RELEASE_RESET
mbed_official 489:119543c9f674 1868 #define __DMA2D_CLK_SLEEP_ENABLE __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE
mbed_official 489:119543c9f674 1869 #define __DMA2D_CLK_SLEEP_DISABLE __HAL_RCC_DMA2D_CLK_SLEEP_DISABLE
mbed_official 489:119543c9f674 1870
mbed_official 489:119543c9f674 1871 /* alias define maintained for legacy */
mbed_official 489:119543c9f674 1872 #define __HAL_RCC_OTGFS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET
mbed_official 489:119543c9f674 1873 #define __HAL_RCC_OTGFS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET
mbed_official 489:119543c9f674 1874
mbed_official 489:119543c9f674 1875 #define __HAL_RCC_I2SCLK __HAL_RCC_I2S_CONFIG
mbed_official 489:119543c9f674 1876 #define __HAL_RCC_I2SCLK_CONFIG __HAL_RCC_I2S_CONFIG
mbed_official 489:119543c9f674 1877
mbed_official 489:119543c9f674 1878 #define __RCC_PLLSRC RCC_GET_PLL_OSCSOURCE
mbed_official 489:119543c9f674 1879
mbed_official 489:119543c9f674 1880 #define IS_RCC_MSIRANGE IS_RCC_MSI_CLOCK_RANGE
mbed_official 489:119543c9f674 1881 #define IS_RCC_RTCCLK_SOURCE IS_RCC_RTCCLKSOURCE
mbed_official 489:119543c9f674 1882 #define IS_RCC_SYSCLK_DIV IS_RCC_HCLK
mbed_official 489:119543c9f674 1883 #define IS_RCC_HCLK_DIV IS_RCC_PCLK
mbed_official 489:119543c9f674 1884
mbed_official 489:119543c9f674 1885 #define RCC_MCO_NODIV RCC_MCODIV_1
mbed_official 489:119543c9f674 1886
mbed_official 489:119543c9f674 1887 #define HSION_BitNumber RCC_HSION_BIT_NUMBER
mbed_official 489:119543c9f674 1888 #define CSSON_BitNumber RCC_CSSON_BIT_NUMBER
mbed_official 489:119543c9f674 1889 #define PLLON_BitNumber RCC_PLLON_BIT_NUMBER
mbed_official 489:119543c9f674 1890 #define PLLI2SON_BitNumber RCC_PLLI2SON_BIT_NUMBER
mbed_official 489:119543c9f674 1891 #define I2SSRC_BitNumber RCC_I2SSRC_BIT_NUMBER
mbed_official 489:119543c9f674 1892 #define RTCEN_BitNumber RCC_RTCEN_BIT_NUMBER
mbed_official 489:119543c9f674 1893 #define BDRST_BitNumber RCC_BDRST_BIT_NUMBER
mbed_official 489:119543c9f674 1894 #define LSION_BitNumber RCC_LSION_BIT_NUMBER
mbed_official 489:119543c9f674 1895 #define PLLSAION_BitNumber RCC_PLLSAION_BIT_NUMBER
mbed_official 489:119543c9f674 1896 #define TIMPRE_BitNumber RCC_TIMPRE_BIT_NUMBER
mbed_official 489:119543c9f674 1897
mbed_official 489:119543c9f674 1898 #define CR_BYTE2_ADDRESS RCC_CR_BYTE2_ADDRESS
mbed_official 489:119543c9f674 1899 #define CIR_BYTE1_ADDRESS RCC_CIR_BYTE1_ADDRESS
mbed_official 489:119543c9f674 1900 #define CIR_BYTE2_ADDRESS RCC_CIR_BYTE2_ADDRESS
mbed_official 489:119543c9f674 1901 #define BDCR_BYTE0_ADDRESS RCC_BDCR_BYTE0_ADDRESS
mbed_official 489:119543c9f674 1902 #define DBP_TIMEOUT_VALUE RCC_DBP_TIMEOUT_VALUE
mbed_official 489:119543c9f674 1903 #define LSE_TIMEOUT_VALUE RCC_LSE_TIMEOUT_VALUE
mbed_official 489:119543c9f674 1904
mbed_official 489:119543c9f674 1905 #define CR_HSION_BB RCC_CR_HSION_BB
mbed_official 489:119543c9f674 1906 #define CR_CSSON_BB RCC_CR_CSSON_BB
mbed_official 489:119543c9f674 1907 #define CR_PLLON_BB RCC_CR_PLLON_BB
mbed_official 489:119543c9f674 1908 #define CR_PLLI2SON_BB RCC_CR_PLLI2SON_BB
mbed_official 489:119543c9f674 1909 #define CR_MSION_BB RCC_CR_MSION_BB
mbed_official 489:119543c9f674 1910 #define CSR_LSION_BB RCC_CSR_LSION_BB
mbed_official 489:119543c9f674 1911 #define CSR_LSEON_BB RCC_CSR_LSEON_BB
mbed_official 489:119543c9f674 1912 #define CSR_LSEBYP_BB RCC_CSR_LSEBYP_BB
mbed_official 489:119543c9f674 1913 #define CSR_RTCEN_BB RCC_CSR_RTCEN_BB
mbed_official 489:119543c9f674 1914 #define CSR_RTCRST_BB RCC_CSR_RTCRST_BB
mbed_official 489:119543c9f674 1915 #define CFGR_I2SSRC_BB RCC_CFGR_I2SSRC_BB
mbed_official 489:119543c9f674 1916 #define BDCR_RTCEN_BB RCC_BDCR_RTCEN_BB
mbed_official 489:119543c9f674 1917 #define BDCR_BDRST_BB RCC_BDCR_BDRST_BB
mbed_official 489:119543c9f674 1918 #define CR_PLLSAION_BB RCC_CR_PLLSAION_BB
mbed_official 489:119543c9f674 1919 #define DCKCFGR_TIMPRE_BB RCC_DCKCFGR_TIMPRE_BB
mbed_official 489:119543c9f674 1920
mbed_official 489:119543c9f674 1921 /**
mbed_official 489:119543c9f674 1922 * @}
mbed_official 489:119543c9f674 1923 */
mbed_official 489:119543c9f674 1924
mbed_official 489:119543c9f674 1925 /** @defgroup HAL_RNG_Aliased_Macros HAL RNG Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 1926 * @{
mbed_official 489:119543c9f674 1927 */
mbed_official 489:119543c9f674 1928 #define HAL_RNG_ReadyCallback(__HANDLE__) HAL_RNG_ReadyDataCallback((__HANDLE__), uint32_t random32bit)
mbed_official 489:119543c9f674 1929
mbed_official 489:119543c9f674 1930 /**
mbed_official 489:119543c9f674 1931 * @}
mbed_official 489:119543c9f674 1932 */
mbed_official 489:119543c9f674 1933
mbed_official 489:119543c9f674 1934 /** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 1935 * @{
mbed_official 489:119543c9f674 1936 */
mbed_official 489:119543c9f674 1937
mbed_official 489:119543c9f674 1938 #define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
mbed_official 489:119543c9f674 1939 #define __HAL_RTC_DISABLE_IT __HAL_RTC_EXTI_DISABLE_IT
mbed_official 489:119543c9f674 1940 #define __HAL_RTC_ENABLE_IT __HAL_RTC_EXTI_ENABLE_IT
mbed_official 489:119543c9f674 1941 #if defined (RTC_EXTI_LINE_WAKEUPTIMER_EVENT)
mbed_official 489:119543c9f674 1942 #define __HAL_RTC_EXTI_CLEAR_FLAG(__EXTI_LINE__) ((__EXTI_LINE__ == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() : \
mbed_official 489:119543c9f674 1943 ((__EXTI_LINE__ == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() : \
mbed_official 489:119543c9f674 1944 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG()))
mbed_official 489:119543c9f674 1945 #define __HAL_RTC_EXTI_ENABLE_IT(__EXTI_LINE__) ((__EXTI_LINE__ == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_ENABLE_IT() : \
mbed_official 489:119543c9f674 1946 ((__EXTI_LINE__ == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() : \
mbed_official 489:119543c9f674 1947 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT()))
mbed_official 489:119543c9f674 1948 #define __HAL_RTC_EXTI_DISABLE_IT(__EXTI_LINE__) ((__EXTI_LINE__ == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_DISABLE_IT() : \
mbed_official 489:119543c9f674 1949 ((__EXTI_LINE__ == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() : \
mbed_official 489:119543c9f674 1950 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT()))
mbed_official 489:119543c9f674 1951 #define __HAL_RTC_EXTI_GET_FLAG(__EXTI_LINE__) ((__EXTI_LINE__ == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GET_FLAG() : \
mbed_official 489:119543c9f674 1952 ((__EXTI_LINE__ == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() : \
mbed_official 489:119543c9f674 1953 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG()))
mbed_official 489:119543c9f674 1954 #define __HAL_RTC_EXTI_GENERATE_SWIT(__EXTI_LINE__) ((__EXTI_LINE__ == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GENERATE_SWIT() : \
mbed_official 489:119543c9f674 1955 ((__EXTI_LINE__ == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT() : \
mbed_official 489:119543c9f674 1956 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT()))
mbed_official 489:119543c9f674 1957
mbed_official 489:119543c9f674 1958 #else
mbed_official 489:119543c9f674 1959 #define __HAL_RTC_EXTI_CLEAR_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_CLEAR_FLAG()
mbed_official 489:119543c9f674 1960
mbed_official 489:119543c9f674 1961 #define __HAL_RTC_EXTI_ENABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_ENABLE_IT()
mbed_official 489:119543c9f674 1962
mbed_official 489:119543c9f674 1963 #define __HAL_RTC_EXTI_DISABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_DISABLE_IT()
mbed_official 489:119543c9f674 1964
mbed_official 489:119543c9f674 1965 #define __HAL_RTC_EXTI_GET_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GET_FLAG()
mbed_official 489:119543c9f674 1966
mbed_official 489:119543c9f674 1967 #define __HAL_RTC_EXTI_GENERATE_SWIT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GENERATE_SWIT()
mbed_official 489:119543c9f674 1968
mbed_official 489:119543c9f674 1969 #endif
mbed_official 489:119543c9f674 1970
mbed_official 489:119543c9f674 1971 #define IS_ALARM IS_RTC_ALARM
mbed_official 489:119543c9f674 1972 #define IS_ALARM_MASK IS_RTC_ALARM_MASK
mbed_official 489:119543c9f674 1973 #define IS_TAMPER IS_RTC_TAMPER
mbed_official 489:119543c9f674 1974 #define IS_TAMPER_ERASE_MODE IS_RTC_TAMPER_ERASE_MODE
mbed_official 489:119543c9f674 1975 #define IS_TAMPER_FILTER IS_RTC_TAMPER_FILTER
mbed_official 489:119543c9f674 1976 #define IS_TAMPER_INTERRUPT IS_RTC_TAMPER_INTERRUPT
mbed_official 489:119543c9f674 1977 #define IS_TAMPER_MASKFLAG_STATE IS_RTC_TAMPER_MASKFLAG_STATE
mbed_official 489:119543c9f674 1978 #define IS_TAMPER_PRECHARGE_DURATION IS_RTC_TAMPER_PRECHARGE_DURATION
mbed_official 489:119543c9f674 1979 #define IS_TAMPER_PULLUP_STATE IS_RTC_TAMPER_PULLUP_STATE
mbed_official 489:119543c9f674 1980 #define IS_TAMPER_SAMPLING_FREQ IS_RTC_TAMPER_SAMPLING_FREQ
mbed_official 489:119543c9f674 1981 #define IS_TAMPER_TIMESTAMPONTAMPER_DETECTION IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION
mbed_official 489:119543c9f674 1982 #define IS_TAMPER_TRIGGER IS_RTC_TAMPER_TRIGGER
mbed_official 489:119543c9f674 1983 #define IS_WAKEUP_CLOCK IS_RTC_WAKEUP_CLOCK
mbed_official 489:119543c9f674 1984 #define IS_WAKEUP_COUNTER IS_RTC_WAKEUP_COUNTER
mbed_official 489:119543c9f674 1985
mbed_official 489:119543c9f674 1986 #define __RTC_WRITEPROTECTION_ENABLE __HAL_RTC_WRITEPROTECTION_ENABLE
mbed_official 489:119543c9f674 1987 #define __RTC_WRITEPROTECTION_DISABLE __HAL_RTC_WRITEPROTECTION_DISABLE
mbed_official 489:119543c9f674 1988
mbed_official 489:119543c9f674 1989 /**
mbed_official 489:119543c9f674 1990 * @}
mbed_official 489:119543c9f674 1991 */
mbed_official 489:119543c9f674 1992
mbed_official 489:119543c9f674 1993 /** @defgroup HAL_SD_Aliased_Macros HAL SD Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 1994 * @{
mbed_official 489:119543c9f674 1995 */
mbed_official 489:119543c9f674 1996
mbed_official 489:119543c9f674 1997 #define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE
mbed_official 489:119543c9f674 1998 #define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS
mbed_official 489:119543c9f674 1999
mbed_official 489:119543c9f674 2000 /**
mbed_official 489:119543c9f674 2001 * @}
mbed_official 489:119543c9f674 2002 */
mbed_official 489:119543c9f674 2003
mbed_official 489:119543c9f674 2004 /** @defgroup HAL_SMARTCARD_Aliased_Macros HAL SMARTCARD Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 2005 * @{
mbed_official 489:119543c9f674 2006 */
mbed_official 489:119543c9f674 2007
mbed_official 489:119543c9f674 2008 #define __SMARTCARD_ENABLE_IT __HAL_SMARTCARD_ENABLE_IT
mbed_official 489:119543c9f674 2009 #define __SMARTCARD_DISABLE_IT __HAL_SMARTCARD_DISABLE_IT
mbed_official 489:119543c9f674 2010 #define __SMARTCARD_ENABLE __HAL_SMARTCARD_ENABLE
mbed_official 489:119543c9f674 2011 #define __SMARTCARD_DISABLE __HAL_SMARTCARD_DISABLE
mbed_official 489:119543c9f674 2012 #define __SMARTCARD_DMA_REQUEST_ENABLE __HAL_SMARTCARD_DMA_REQUEST_ENABLE
mbed_official 489:119543c9f674 2013 #define __SMARTCARD_DMA_REQUEST_DISABLE __HAL_SMARTCARD_DMA_REQUEST_DISABLE
mbed_official 489:119543c9f674 2014
mbed_official 489:119543c9f674 2015 #define __HAL_SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE
mbed_official 489:119543c9f674 2016 #define __SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE
mbed_official 489:119543c9f674 2017
mbed_official 489:119543c9f674 2018 #define IS_SMARTCARD_ONEBIT_SAMPLING IS_SMARTCARD_ONE_BIT_SAMPLE
mbed_official 489:119543c9f674 2019
mbed_official 489:119543c9f674 2020 /**
mbed_official 489:119543c9f674 2021 * @}
mbed_official 489:119543c9f674 2022 */
mbed_official 489:119543c9f674 2023
mbed_official 489:119543c9f674 2024 /** @defgroup HAL_SMBUS_Aliased_Macros HAL SMBUS Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 2025 * @{
mbed_official 489:119543c9f674 2026 */
mbed_official 489:119543c9f674 2027 #define __HAL_SMBUS_RESET_CR1 SMBUS_RESET_CR1
mbed_official 489:119543c9f674 2028 #define __HAL_SMBUS_RESET_CR2 SMBUS_RESET_CR2
mbed_official 489:119543c9f674 2029 #define __HAL_SMBUS_GENERATE_START SMBUS_GENERATE_START
mbed_official 489:119543c9f674 2030 #define __HAL_SMBUS_GET_ADDR_MATCH SMBUS_GET_ADDR_MATCH
mbed_official 489:119543c9f674 2031 #define __HAL_SMBUS_GET_DIR SMBUS_GET_DIR
mbed_official 489:119543c9f674 2032 #define __HAL_SMBUS_GET_STOP_MODE SMBUS_GET_STOP_MODE
mbed_official 489:119543c9f674 2033 #define __HAL_SMBUS_GET_PEC_MODE SMBUS_GET_PEC_MODE
mbed_official 489:119543c9f674 2034 #define __HAL_SMBUS_GET_ALERT_ENABLED SMBUS_GET_ALERT_ENABLED
mbed_official 489:119543c9f674 2035 /**
mbed_official 489:119543c9f674 2036 * @}
mbed_official 489:119543c9f674 2037 */
mbed_official 489:119543c9f674 2038
mbed_official 489:119543c9f674 2039 /** @defgroup HAL_SPI_Aliased_Macros HAL SPI Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 2040 * @{
mbed_official 489:119543c9f674 2041 */
mbed_official 489:119543c9f674 2042
mbed_official 489:119543c9f674 2043 #define __HAL_SPI_1LINE_TX SPI_1LINE_TX
mbed_official 489:119543c9f674 2044 #define __HAL_SPI_1LINE_RX SPI_1LINE_RX
mbed_official 489:119543c9f674 2045 #define __HAL_SPI_RESET_CRC SPI_RESET_CRC
mbed_official 489:119543c9f674 2046
mbed_official 489:119543c9f674 2047 /**
mbed_official 489:119543c9f674 2048 * @}
mbed_official 489:119543c9f674 2049 */
mbed_official 489:119543c9f674 2050
mbed_official 489:119543c9f674 2051 /** @defgroup HAL_UART_Aliased_Macros HAL UART Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 2052 * @{
mbed_official 489:119543c9f674 2053 */
mbed_official 489:119543c9f674 2054
mbed_official 489:119543c9f674 2055 #define __HAL_UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE
mbed_official 489:119543c9f674 2056 #define __HAL_UART_MASK_COMPUTATION UART_MASK_COMPUTATION
mbed_official 489:119543c9f674 2057 #define __UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE
mbed_official 489:119543c9f674 2058 #define __UART_MASK_COMPUTATION UART_MASK_COMPUTATION
mbed_official 489:119543c9f674 2059
mbed_official 489:119543c9f674 2060 #define IS_UART_WAKEUPMETHODE IS_UART_WAKEUPMETHOD
mbed_official 489:119543c9f674 2061
mbed_official 489:119543c9f674 2062 #define IS_UART_ONEBIT_SAMPLE IS_UART_ONE_BIT_SAMPLE
mbed_official 489:119543c9f674 2063 #define IS_UART_ONEBIT_SAMPLING IS_UART_ONE_BIT_SAMPLE
mbed_official 489:119543c9f674 2064
mbed_official 489:119543c9f674 2065 /**
mbed_official 489:119543c9f674 2066 * @}
mbed_official 489:119543c9f674 2067 */
mbed_official 489:119543c9f674 2068
mbed_official 489:119543c9f674 2069
mbed_official 489:119543c9f674 2070 /** @defgroup HAL_USART_Aliased_Macros HAL USART Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 2071 * @{
mbed_official 489:119543c9f674 2072 */
mbed_official 489:119543c9f674 2073
mbed_official 489:119543c9f674 2074 #define __USART_ENABLE_IT __HAL_USART_ENABLE_IT
mbed_official 489:119543c9f674 2075 #define __USART_DISABLE_IT __HAL_USART_DISABLE_IT
mbed_official 489:119543c9f674 2076 #define __USART_ENABLE __HAL_USART_ENABLE
mbed_official 489:119543c9f674 2077 #define __USART_DISABLE __HAL_USART_DISABLE
mbed_official 489:119543c9f674 2078
mbed_official 489:119543c9f674 2079 #define __HAL_USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE
mbed_official 489:119543c9f674 2080 #define __USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE
mbed_official 489:119543c9f674 2081
mbed_official 489:119543c9f674 2082 /**
mbed_official 489:119543c9f674 2083 * @}
mbed_official 489:119543c9f674 2084 */
mbed_official 489:119543c9f674 2085
mbed_official 489:119543c9f674 2086 /** @defgroup HAL_USB_Aliased_Macros HAL USB Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 2087 * @{
mbed_official 489:119543c9f674 2088 */
mbed_official 489:119543c9f674 2089 #define USB_EXTI_LINE_WAKEUP USB_WAKEUP_EXTI_LINE
mbed_official 489:119543c9f674 2090
mbed_official 489:119543c9f674 2091 #define USB_FS_EXTI_TRIGGER_RISING_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE
mbed_official 489:119543c9f674 2092 #define USB_FS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE
mbed_official 489:119543c9f674 2093 #define USB_FS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE
mbed_official 489:119543c9f674 2094 #define USB_FS_EXTI_LINE_WAKEUP USB_OTG_FS_WAKEUP_EXTI_LINE
mbed_official 489:119543c9f674 2095
mbed_official 489:119543c9f674 2096 #define USB_HS_EXTI_TRIGGER_RISING_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_EDGE
mbed_official 489:119543c9f674 2097 #define USB_HS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_HS_WAKEUP_EXTI_FALLING_EDGE
mbed_official 489:119543c9f674 2098 #define USB_HS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_FALLING_EDGE
mbed_official 489:119543c9f674 2099 #define USB_HS_EXTI_LINE_WAKEUP USB_OTG_HS_WAKEUP_EXTI_LINE
mbed_official 489:119543c9f674 2100
mbed_official 489:119543c9f674 2101 #define __HAL_USB_EXTI_ENABLE_IT __HAL_USB_WAKEUP_EXTI_ENABLE_IT
mbed_official 489:119543c9f674 2102 #define __HAL_USB_EXTI_DISABLE_IT __HAL_USB_WAKEUP_EXTI_DISABLE_IT
mbed_official 489:119543c9f674 2103 #define __HAL_USB_EXTI_GET_FLAG __HAL_USB_WAKEUP_EXTI_GET_FLAG
mbed_official 489:119543c9f674 2104 #define __HAL_USB_EXTI_CLEAR_FLAG __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG
mbed_official 489:119543c9f674 2105 #define __HAL_USB_EXTI_SET_RISING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE
mbed_official 489:119543c9f674 2106 #define __HAL_USB_EXTI_SET_FALLING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE
mbed_official 489:119543c9f674 2107 #define __HAL_USB_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
mbed_official 489:119543c9f674 2108
mbed_official 489:119543c9f674 2109 #define __HAL_USB_FS_EXTI_ENABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT
mbed_official 489:119543c9f674 2110 #define __HAL_USB_FS_EXTI_DISABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT
mbed_official 489:119543c9f674 2111 #define __HAL_USB_FS_EXTI_GET_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG
mbed_official 489:119543c9f674 2112 #define __HAL_USB_FS_EXTI_CLEAR_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG
mbed_official 489:119543c9f674 2113 #define __HAL_USB_FS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE
mbed_official 489:119543c9f674 2114 #define __HAL_USB_FS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
mbed_official 489:119543c9f674 2115 #define __HAL_USB_FS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
mbed_official 489:119543c9f674 2116 #define __HAL_USB_FS_EXTI_GENERATE_SWIT __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT
mbed_official 489:119543c9f674 2117
mbed_official 489:119543c9f674 2118 #define __HAL_USB_HS_EXTI_ENABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_IT
mbed_official 489:119543c9f674 2119 #define __HAL_USB_HS_EXTI_DISABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_DISABLE_IT
mbed_official 489:119543c9f674 2120 #define __HAL_USB_HS_EXTI_GET_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_GET_FLAG
mbed_official 489:119543c9f674 2121 #define __HAL_USB_HS_EXTI_CLEAR_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG
mbed_official 489:119543c9f674 2122 #define __HAL_USB_HS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE
mbed_official 489:119543c9f674 2123 #define __HAL_USB_HS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
mbed_official 489:119543c9f674 2124 #define __HAL_USB_HS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
mbed_official 489:119543c9f674 2125 #define __HAL_USB_HS_EXTI_GENERATE_SWIT __HAL_USB_OTG_HS_WAKEUP_EXTI_GENERATE_SWIT
mbed_official 489:119543c9f674 2126
mbed_official 489:119543c9f674 2127 #define HAL_PCD_ActiveRemoteWakeup HAL_PCD_ActivateRemoteWakeup
mbed_official 489:119543c9f674 2128 #define HAL_PCD_DeActiveRemoteWakeup HAL_PCD_DeActivateRemoteWakeup
mbed_official 489:119543c9f674 2129
mbed_official 489:119543c9f674 2130 #define HAL_PCD_SetTxFiFo HAL_PCDEx_SetTxFiFo
mbed_official 489:119543c9f674 2131 #define HAL_PCD_SetRxFiFo HAL_PCDEx_SetRxFiFo
mbed_official 489:119543c9f674 2132 /**
mbed_official 489:119543c9f674 2133 * @}
mbed_official 489:119543c9f674 2134 */
mbed_official 489:119543c9f674 2135
mbed_official 489:119543c9f674 2136 /** @defgroup HAL_TIM_Aliased_Macros HAL TIM Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 2137 * @{
mbed_official 489:119543c9f674 2138 */
mbed_official 489:119543c9f674 2139 #define __HAL_TIM_SetICPrescalerValue TIM_SET_ICPRESCALERVALUE
mbed_official 489:119543c9f674 2140 #define __HAL_TIM_ResetICPrescalerValue TIM_RESET_ICPRESCALERVALUE
mbed_official 489:119543c9f674 2141
mbed_official 489:119543c9f674 2142 #define TIM_GET_ITSTATUS __HAL_TIM_GET_IT_SOURCE
mbed_official 489:119543c9f674 2143 #define TIM_GET_CLEAR_IT __HAL_TIM_CLEAR_IT
mbed_official 489:119543c9f674 2144
mbed_official 489:119543c9f674 2145 #define __HAL_TIM_DIRECTION_STATUS __HAL_TIM_IS_TIM_COUNTING_DOWN
mbed_official 489:119543c9f674 2146 #define __HAL_TIM_PRESCALER __HAL_TIM_SET_PRESCALER
mbed_official 489:119543c9f674 2147 #define __HAL_TIM_SetCounter __HAL_TIM_SET_COUNTER
mbed_official 489:119543c9f674 2148 #define __HAL_TIM_GetCounter __HAL_TIM_GET_COUNTER
mbed_official 489:119543c9f674 2149 #define __HAL_TIM_SetAutoreload __HAL_TIM_SET_AUTORELOAD
mbed_official 489:119543c9f674 2150 #define __HAL_TIM_GetAutoreload __HAL_TIM_GET_AUTORELOAD
mbed_official 489:119543c9f674 2151 #define __HAL_TIM_SetClockDivision __HAL_TIM_SET_CLOCKDIVISION
mbed_official 489:119543c9f674 2152 #define __HAL_TIM_GetClockDivision __HAL_TIM_GET_CLOCKDIVISION
mbed_official 489:119543c9f674 2153 #define __HAL_TIM_SetICPrescaler __HAL_TIM_SET_ICPRESCALER
mbed_official 489:119543c9f674 2154 #define __HAL_TIM_GetICPrescaler __HAL_TIM_GET_ICPRESCALER
mbed_official 489:119543c9f674 2155 #define __HAL_TIM_SetCompare __HAL_TIM_SET_COMPARE
mbed_official 489:119543c9f674 2156 #define __HAL_TIM_GetCompare __HAL_TIM_GET_COMPARE
mbed_official 489:119543c9f674 2157
mbed_official 489:119543c9f674 2158 #define TIM_TS_ITR0 ((uint32_t)0x0000)
mbed_official 489:119543c9f674 2159 #define TIM_TS_ITR1 ((uint32_t)0x0010)
mbed_official 489:119543c9f674 2160 #define TIM_TS_ITR2 ((uint32_t)0x0020)
mbed_official 489:119543c9f674 2161 #define TIM_TS_ITR3 ((uint32_t)0x0030)
mbed_official 489:119543c9f674 2162 #define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
mbed_official 489:119543c9f674 2163 ((SELECTION) == TIM_TS_ITR1) || \
mbed_official 489:119543c9f674 2164 ((SELECTION) == TIM_TS_ITR2) || \
mbed_official 489:119543c9f674 2165 ((SELECTION) == TIM_TS_ITR3))
mbed_official 489:119543c9f674 2166
mbed_official 489:119543c9f674 2167 #define TIM_CHANNEL_1 ((uint32_t)0x0000)
mbed_official 489:119543c9f674 2168 #define TIM_CHANNEL_2 ((uint32_t)0x0004)
mbed_official 489:119543c9f674 2169 #define IS_TIM_PWMI_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
mbed_official 489:119543c9f674 2170 ((CHANNEL) == TIM_CHANNEL_2))
mbed_official 489:119543c9f674 2171
mbed_official 489:119543c9f674 2172 #define TIM_OUTPUTNSTATE_DISABLE ((uint32_t)0x0000)
mbed_official 489:119543c9f674 2173 #define TIM_OUTPUTNSTATE_ENABLE (TIM_CCER_CC1NE)
mbed_official 489:119543c9f674 2174
mbed_official 489:119543c9f674 2175 #define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OUTPUTNSTATE_DISABLE) || \
mbed_official 489:119543c9f674 2176 ((STATE) == TIM_OUTPUTNSTATE_ENABLE))
mbed_official 489:119543c9f674 2177
mbed_official 489:119543c9f674 2178 #define TIM_OUTPUTSTATE_DISABLE ((uint32_t)0x0000)
mbed_official 489:119543c9f674 2179 #define TIM_OUTPUTSTATE_ENABLE (TIM_CCER_CC1E)
mbed_official 489:119543c9f674 2180
mbed_official 489:119543c9f674 2181 #define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OUTPUTSTATE_DISABLE) || \
mbed_official 489:119543c9f674 2182 ((STATE) == TIM_OUTPUTSTATE_ENABLE))
mbed_official 489:119543c9f674 2183 /**
mbed_official 489:119543c9f674 2184 * @}
mbed_official 489:119543c9f674 2185 */
mbed_official 489:119543c9f674 2186
mbed_official 489:119543c9f674 2187 /** @defgroup HAL_ETH_Aliased_Macros HAL ETH Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 2188 * @{
mbed_official 489:119543c9f674 2189 */
mbed_official 489:119543c9f674 2190
mbed_official 489:119543c9f674 2191 #define __HAL_ETH_EXTI_ENABLE_IT __HAL_ETH_WAKEUP_EXTI_ENABLE_IT
mbed_official 489:119543c9f674 2192 #define __HAL_ETH_EXTI_DISABLE_IT __HAL_ETH_WAKEUP_EXTI_DISABLE_IT
mbed_official 489:119543c9f674 2193 #define __HAL_ETH_EXTI_GET_FLAG __HAL_ETH_WAKEUP_EXTI_GET_FLAG
mbed_official 489:119543c9f674 2194 #define __HAL_ETH_EXTI_CLEAR_FLAG __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG
mbed_official 489:119543c9f674 2195 #define __HAL_ETH_EXTI_SET_RISING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_EDGE_TRIGGER
mbed_official 489:119543c9f674 2196 #define __HAL_ETH_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLING_EDGE_TRIGGER
mbed_official 489:119543c9f674 2197 #define __HAL_ETH_EXTI_SET_FALLINGRISING_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER
mbed_official 489:119543c9f674 2198
mbed_official 489:119543c9f674 2199 #define ETH_PROMISCIOUSMODE_ENABLE ETH_PROMISCUOUS_MODE_ENABLE
mbed_official 489:119543c9f674 2200 #define ETH_PROMISCIOUSMODE_DISABLE ETH_PROMISCUOUS_MODE_DISABLE
mbed_official 489:119543c9f674 2201 #define IS_ETH_PROMISCIOUS_MODE IS_ETH_PROMISCUOUS_MODE
mbed_official 489:119543c9f674 2202 /**
mbed_official 489:119543c9f674 2203 * @}
mbed_official 489:119543c9f674 2204 */
mbed_official 489:119543c9f674 2205
mbed_official 489:119543c9f674 2206 /** @defgroup HAL_LTDC_Aliased_Macros HAL LTDC Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 2207 * @{
mbed_official 489:119543c9f674 2208 */
mbed_official 489:119543c9f674 2209 #define __HAL_LTDC_LAYER LTDC_LAYER
mbed_official 489:119543c9f674 2210 /**
mbed_official 489:119543c9f674 2211 * @}
mbed_official 489:119543c9f674 2212 */
mbed_official 489:119543c9f674 2213
mbed_official 489:119543c9f674 2214 /** @defgroup HAL_SAI_Aliased_Macros HAL SAI Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 2215 * @{
mbed_official 489:119543c9f674 2216 */
mbed_official 489:119543c9f674 2217 #define SAI_OUTPUTDRIVE_DISABLED SAI_OUTPUTDRIVE_DISABLE
mbed_official 489:119543c9f674 2218 #define SAI_OUTPUTDRIVE_ENABLED SAI_OUTPUTDRIVE_ENABLE
mbed_official 489:119543c9f674 2219 #define SAI_MASTERDIVIDER_ENABLED SAI_MASTERDIVIDER_ENABLE
mbed_official 489:119543c9f674 2220 #define SAI_MASTERDIVIDER_DISABLED SAI_MASTERDIVIDER_DISABLE
mbed_official 489:119543c9f674 2221 #define SAI_STREOMODE SAI_STEREOMODE
mbed_official 489:119543c9f674 2222 #define SAI_FIFOStatus_Empty SAI_FIFOSTATUS_EMPTY
mbed_official 489:119543c9f674 2223 #define SAI_FIFOStatus_Less1QuarterFull SAI_FIFOSTATUS_LESS1QUARTERFULL
mbed_official 489:119543c9f674 2224 #define SAI_FIFOStatus_1QuarterFull SAI_FIFOSTATUS_1QUARTERFULL
mbed_official 489:119543c9f674 2225 #define SAI_FIFOStatus_HalfFull SAI_FIFOSTATUS_HALFFULL
mbed_official 489:119543c9f674 2226 #define SAI_FIFOStatus_3QuartersFull SAI_FIFOSTATUS_3QUARTERFULL
mbed_official 489:119543c9f674 2227 #define SAI_FIFOStatus_Full SAI_FIFOSTATUS_FULL
mbed_official 489:119543c9f674 2228 #define IS_SAI_BLOCK_MONO_STREO_MODE IS_SAI_BLOCK_MONO_STEREO_MODE
mbed_official 489:119543c9f674 2229
mbed_official 489:119543c9f674 2230 /**
mbed_official 489:119543c9f674 2231 * @}
mbed_official 489:119543c9f674 2232 */
mbed_official 489:119543c9f674 2233
mbed_official 489:119543c9f674 2234
mbed_official 489:119543c9f674 2235 /** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose
mbed_official 489:119543c9f674 2236 * @{
mbed_official 489:119543c9f674 2237 */
mbed_official 489:119543c9f674 2238
mbed_official 489:119543c9f674 2239 /**
mbed_official 489:119543c9f674 2240 * @}
mbed_official 489:119543c9f674 2241 */
mbed_official 489:119543c9f674 2242
mbed_official 489:119543c9f674 2243 #ifdef __cplusplus
mbed_official 489:119543c9f674 2244 }
mbed_official 489:119543c9f674 2245 #endif
mbed_official 489:119543c9f674 2246
mbed_official 489:119543c9f674 2247 #endif /* ___STM32_HAL_LEGACY */
mbed_official 489:119543c9f674 2248
mbed_official 489:119543c9f674 2249 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
mbed_official 489:119543c9f674 2250