mbed official / mbed-src

mbed library sources

Dependents:   Encrypted my_mbed lklk CyaSSL_DTLS_Cellular ... more

Superseded

This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

Import librarymbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_dma.c@579:53297373a894, 2015-07-01 (annotated)

Committer:
mbed_official
Date:
Wed Jul 01 09:45:11 2015 +0100
Revision:
579:53297373a894
Parent:
573:ad23fe03a082
Child:
610:813dcc80987e
Synchronized with git revision d5b4d2ab9c47edb4dc5776e7177b0c2263459081



Full URL: https://github.com/mbedmicro/mbed/commit/d5b4d2ab9c47edb4dc5776e7177b0c2263459081/



Initial version of drivers for SAMR21

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 573:ad23fe03a082 1 /**
mbed_official 573:ad23fe03a082 2 ******************************************************************************
mbed_official 573:ad23fe03a082 3 * @file stm32f7xx_hal_dma.c
mbed_official 573:ad23fe03a082 4 * @author MCD Application Team
mbed_official 573:ad23fe03a082 5 * @version V1.0.0
mbed_official 573:ad23fe03a082 6 * @date 12-May-2015
mbed_official 573:ad23fe03a082 7 * @brief DMA HAL module driver.
mbed_official 573:ad23fe03a082 8 *
mbed_official 573:ad23fe03a082 9 * This file provides firmware functions to manage the following
mbed_official 573:ad23fe03a082 10 * functionalities of the Direct Memory Access (DMA) peripheral:
mbed_official 573:ad23fe03a082 11 * + Initialization and de-initialization functions
mbed_official 573:ad23fe03a082 12 * + IO operation functions
mbed_official 573:ad23fe03a082 13 * + Peripheral State and errors functions
mbed_official 573:ad23fe03a082 14 @verbatim
mbed_official 573:ad23fe03a082 15 ==============================================================================
mbed_official 573:ad23fe03a082 16 ##### How to use this driver #####
mbed_official 573:ad23fe03a082 17 ==============================================================================
mbed_official 573:ad23fe03a082 18 [..]
mbed_official 573:ad23fe03a082 19 (#) Enable and configure the peripheral to be connected to the DMA Stream
mbed_official 573:ad23fe03a082 20 (except for internal SRAM/FLASH memories: no initialization is
mbed_official 573:ad23fe03a082 21 necessary) please refer to Reference manual for connection between peripherals
mbed_official 573:ad23fe03a082 22 and DMA requests .
mbed_official 573:ad23fe03a082 23
mbed_official 573:ad23fe03a082 24 (#) For a given Stream, program the required configuration through the following parameters:
mbed_official 573:ad23fe03a082 25 Transfer Direction, Source and Destination data formats,
mbed_official 573:ad23fe03a082 26 Circular, Normal or peripheral flow control mode, Stream Priority level,
mbed_official 573:ad23fe03a082 27 Source and Destination Increment mode, FIFO mode and its Threshold (if needed),
mbed_official 573:ad23fe03a082 28 Burst mode for Source and/or Destination (if needed) using HAL_DMA_Init() function.
mbed_official 573:ad23fe03a082 29
mbed_official 573:ad23fe03a082 30 *** Polling mode IO operation ***
mbed_official 573:ad23fe03a082 31 =================================
mbed_official 573:ad23fe03a082 32 [..]
mbed_official 573:ad23fe03a082 33 (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source
mbed_official 573:ad23fe03a082 34 address and destination address and the Length of data to be transferred
mbed_official 573:ad23fe03a082 35 (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this
mbed_official 573:ad23fe03a082 36 case a fixed Timeout can be configured by User depending from his application.
mbed_official 573:ad23fe03a082 37
mbed_official 573:ad23fe03a082 38 *** Interrupt mode IO operation ***
mbed_official 573:ad23fe03a082 39 ===================================
mbed_official 573:ad23fe03a082 40 [..]
mbed_official 573:ad23fe03a082 41 (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
mbed_official 573:ad23fe03a082 42 (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ()
mbed_official 573:ad23fe03a082 43 (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of
mbed_official 573:ad23fe03a082 44 Source address and destination address and the Length of data to be transferred. In this
mbed_official 573:ad23fe03a082 45 case the DMA interrupt is configured
mbed_official 573:ad23fe03a082 46 (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
mbed_official 573:ad23fe03a082 47 (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can
mbed_official 573:ad23fe03a082 48 add his own function by customization of function pointer XferCpltCallback and
mbed_official 573:ad23fe03a082 49 XferErrorCallback (i.e a member of DMA handle structure).
mbed_official 573:ad23fe03a082 50 [..]
mbed_official 573:ad23fe03a082 51 (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error
mbed_official 573:ad23fe03a082 52 detection.
mbed_official 573:ad23fe03a082 53
mbed_official 573:ad23fe03a082 54 (#) Use HAL_DMA_Abort() function to abort the current transfer
mbed_official 573:ad23fe03a082 55
mbed_official 573:ad23fe03a082 56 -@- In Memory-to-Memory transfer mode, Circular mode is not allowed.
mbed_official 573:ad23fe03a082 57
mbed_official 573:ad23fe03a082 58 -@- The FIFO is used mainly to reduce bus usage and to allow data packing/unpacking: it is
mbed_official 573:ad23fe03a082 59 possible to set different Data Sizes for the Peripheral and the Memory (ie. you can set
mbed_official 573:ad23fe03a082 60 Half-Word data size for the peripheral to access its data register and set Word data size
mbed_official 573:ad23fe03a082 61 for the Memory to gain in access time. Each two half words will be packed and written in
mbed_official 573:ad23fe03a082 62 a single access to a Word in the Memory).
mbed_official 573:ad23fe03a082 63
mbed_official 573:ad23fe03a082 64 -@- When FIFO is disabled, it is not allowed to configure different Data Sizes for Source
mbed_official 573:ad23fe03a082 65 and Destination. In this case the Peripheral Data Size will be applied to both Source
mbed_official 573:ad23fe03a082 66 and Destination.
mbed_official 573:ad23fe03a082 67
mbed_official 573:ad23fe03a082 68 *** DMA HAL driver macros list ***
mbed_official 573:ad23fe03a082 69 =============================================
mbed_official 573:ad23fe03a082 70 [..]
mbed_official 573:ad23fe03a082 71 Below the list of most used macros in DMA HAL driver.
mbed_official 573:ad23fe03a082 72
mbed_official 573:ad23fe03a082 73 (+) __HAL_DMA_ENABLE: Enable the specified DMA Stream.
mbed_official 573:ad23fe03a082 74 (+) __HAL_DMA_DISABLE: Disable the specified DMA Stream.
mbed_official 573:ad23fe03a082 75 (+) __HAL_DMA_GET_FS: Return the current DMA Stream FIFO filled level.
mbed_official 573:ad23fe03a082 76 (+) __HAL_DMA_GET_FLAG: Get the DMA Stream pending flags.
mbed_official 573:ad23fe03a082 77 (+) __HAL_DMA_CLEAR_FLAG: Clear the DMA Stream pending flags.
mbed_official 573:ad23fe03a082 78 (+) __HAL_DMA_ENABLE_IT: Enable the specified DMA Stream interrupts.
mbed_official 573:ad23fe03a082 79 (+) __HAL_DMA_DISABLE_IT: Disable the specified DMA Stream interrupts.
mbed_official 573:ad23fe03a082 80 (+) __HAL_DMA_GET_IT_SOURCE: Check whether the specified DMA Stream interrupt has occurred or not.
mbed_official 573:ad23fe03a082 81
mbed_official 573:ad23fe03a082 82 [..]
mbed_official 573:ad23fe03a082 83 (@) You can refer to the DMA HAL driver header file for more useful macros
mbed_official 573:ad23fe03a082 84
mbed_official 573:ad23fe03a082 85 @endverbatim
mbed_official 573:ad23fe03a082 86 ******************************************************************************
mbed_official 573:ad23fe03a082 87 * @attention
mbed_official 573:ad23fe03a082 88 *
mbed_official 573:ad23fe03a082 89 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 573:ad23fe03a082 90 *
mbed_official 573:ad23fe03a082 91 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 573:ad23fe03a082 92 * are permitted provided that the following conditions are met:
mbed_official 573:ad23fe03a082 93 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 573:ad23fe03a082 94 * this list of conditions and the following disclaimer.
mbed_official 573:ad23fe03a082 95 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 573:ad23fe03a082 96 * this list of conditions and the following disclaimer in the documentation
mbed_official 573:ad23fe03a082 97 * and/or other materials provided with the distribution.
mbed_official 573:ad23fe03a082 98 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 573:ad23fe03a082 99 * may be used to endorse or promote products derived from this software
mbed_official 573:ad23fe03a082 100 * without specific prior written permission.
mbed_official 573:ad23fe03a082 101 *
mbed_official 573:ad23fe03a082 102 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 573:ad23fe03a082 103 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 573:ad23fe03a082 104 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 573:ad23fe03a082 105 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 573:ad23fe03a082 106 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 573:ad23fe03a082 107 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 573:ad23fe03a082 108 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 573:ad23fe03a082 109 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 573:ad23fe03a082 110 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 573:ad23fe03a082 111 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 573:ad23fe03a082 112 *
mbed_official 573:ad23fe03a082 113 ******************************************************************************
mbed_official 573:ad23fe03a082 114 */
mbed_official 573:ad23fe03a082 115
mbed_official 573:ad23fe03a082 116 /* Includes ------------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 117 #include "stm32f7xx_hal.h"
mbed_official 573:ad23fe03a082 118
mbed_official 573:ad23fe03a082 119 /** @addtogroup STM32F7xx_HAL_Driver
mbed_official 573:ad23fe03a082 120 * @{
mbed_official 573:ad23fe03a082 121 */
mbed_official 573:ad23fe03a082 122
mbed_official 573:ad23fe03a082 123 /** @defgroup DMA DMA
mbed_official 573:ad23fe03a082 124 * @brief DMA HAL module driver
mbed_official 573:ad23fe03a082 125 * @{
mbed_official 573:ad23fe03a082 126 */
mbed_official 573:ad23fe03a082 127
mbed_official 573:ad23fe03a082 128 #ifdef HAL_DMA_MODULE_ENABLED
mbed_official 573:ad23fe03a082 129
mbed_official 573:ad23fe03a082 130 /* Private types -------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 131 /* Private variables ---------------------------------------------------------*/
mbed_official 573:ad23fe03a082 132 /* Private constants ---------------------------------------------------------*/
mbed_official 573:ad23fe03a082 133 /** @addtogroup DMA_Private_Constants
mbed_official 573:ad23fe03a082 134 * @{
mbed_official 573:ad23fe03a082 135 */
mbed_official 573:ad23fe03a082 136 #define HAL_TIMEOUT_DMA_ABORT ((uint32_t)1000) /* 1s */
mbed_official 573:ad23fe03a082 137 /**
mbed_official 573:ad23fe03a082 138 * @}
mbed_official 573:ad23fe03a082 139 */
mbed_official 573:ad23fe03a082 140 /* Private macros ------------------------------------------------------------*/
mbed_official 573:ad23fe03a082 141 /* Private functions ---------------------------------------------------------*/
mbed_official 573:ad23fe03a082 142 /** @addtogroup DMA_Private_Functions
mbed_official 573:ad23fe03a082 143 * @{
mbed_official 573:ad23fe03a082 144 */
mbed_official 573:ad23fe03a082 145 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
mbed_official 573:ad23fe03a082 146 /**
mbed_official 573:ad23fe03a082 147 * @brief Sets the DMA Transfer parameter.
mbed_official 573:ad23fe03a082 148 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 149 * the configuration information for the specified DMA Stream.
mbed_official 573:ad23fe03a082 150 * @param SrcAddress: The source memory Buffer address
mbed_official 573:ad23fe03a082 151 * @param DstAddress: The destination memory Buffer address
mbed_official 573:ad23fe03a082 152 * @param DataLength: The length of data to be transferred from source to destination
mbed_official 573:ad23fe03a082 153 * @retval HAL status
mbed_official 573:ad23fe03a082 154 */
mbed_official 573:ad23fe03a082 155 static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
mbed_official 573:ad23fe03a082 156 {
mbed_official 573:ad23fe03a082 157 /* Clear DBM bit */
mbed_official 573:ad23fe03a082 158 hdma->Instance->CR &= (uint32_t)(~DMA_SxCR_DBM);
mbed_official 573:ad23fe03a082 159
mbed_official 573:ad23fe03a082 160 /* Configure DMA Stream data length */
mbed_official 573:ad23fe03a082 161 hdma->Instance->NDTR = DataLength;
mbed_official 573:ad23fe03a082 162
mbed_official 573:ad23fe03a082 163 /* Peripheral to Memory */
mbed_official 573:ad23fe03a082 164 if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
mbed_official 573:ad23fe03a082 165 {
mbed_official 573:ad23fe03a082 166 /* Configure DMA Stream destination address */
mbed_official 573:ad23fe03a082 167 hdma->Instance->PAR = DstAddress;
mbed_official 573:ad23fe03a082 168
mbed_official 573:ad23fe03a082 169 /* Configure DMA Stream source address */
mbed_official 573:ad23fe03a082 170 hdma->Instance->M0AR = SrcAddress;
mbed_official 573:ad23fe03a082 171 }
mbed_official 573:ad23fe03a082 172 /* Memory to Peripheral */
mbed_official 573:ad23fe03a082 173 else
mbed_official 573:ad23fe03a082 174 {
mbed_official 573:ad23fe03a082 175 /* Configure DMA Stream source address */
mbed_official 573:ad23fe03a082 176 hdma->Instance->PAR = SrcAddress;
mbed_official 573:ad23fe03a082 177
mbed_official 573:ad23fe03a082 178 /* Configure DMA Stream destination address */
mbed_official 573:ad23fe03a082 179 hdma->Instance->M0AR = DstAddress;
mbed_official 573:ad23fe03a082 180 }
mbed_official 573:ad23fe03a082 181 }
mbed_official 573:ad23fe03a082 182
mbed_official 573:ad23fe03a082 183 /**
mbed_official 573:ad23fe03a082 184 * @}
mbed_official 573:ad23fe03a082 185 */
mbed_official 573:ad23fe03a082 186
mbed_official 573:ad23fe03a082 187 /* Exported functions ---------------------------------------------------------*/
mbed_official 573:ad23fe03a082 188 /** @addtogroup DMA_Exported_Functions
mbed_official 573:ad23fe03a082 189 * @{
mbed_official 573:ad23fe03a082 190 */
mbed_official 573:ad23fe03a082 191
mbed_official 573:ad23fe03a082 192 /** @addtogroup DMA_Exported_Functions_Group1
mbed_official 573:ad23fe03a082 193 *
mbed_official 573:ad23fe03a082 194 @verbatim
mbed_official 573:ad23fe03a082 195 ===============================================================================
mbed_official 573:ad23fe03a082 196 ##### Initialization and de-initialization functions #####
mbed_official 573:ad23fe03a082 197 ===============================================================================
mbed_official 573:ad23fe03a082 198 [..]
mbed_official 573:ad23fe03a082 199 This section provides functions allowing to initialize the DMA Stream source
mbed_official 573:ad23fe03a082 200 and destination addresses, incrementation and data sizes, transfer direction,
mbed_official 573:ad23fe03a082 201 circular/normal mode selection, memory-to-memory mode selection and Stream priority value.
mbed_official 573:ad23fe03a082 202 [..]
mbed_official 573:ad23fe03a082 203 The HAL_DMA_Init() function follows the DMA configuration procedures as described in
mbed_official 573:ad23fe03a082 204 reference manual.
mbed_official 573:ad23fe03a082 205
mbed_official 573:ad23fe03a082 206 @endverbatim
mbed_official 573:ad23fe03a082 207 * @{
mbed_official 573:ad23fe03a082 208 */
mbed_official 573:ad23fe03a082 209
mbed_official 573:ad23fe03a082 210 /**
mbed_official 573:ad23fe03a082 211 * @brief Initializes the DMA according to the specified
mbed_official 573:ad23fe03a082 212 * parameters in the DMA_InitTypeDef and create the associated handle.
mbed_official 573:ad23fe03a082 213 * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 214 * the configuration information for the specified DMA Stream.
mbed_official 573:ad23fe03a082 215 * @retval HAL status
mbed_official 573:ad23fe03a082 216 */
mbed_official 573:ad23fe03a082 217 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 218 {
mbed_official 573:ad23fe03a082 219 uint32_t tmp = 0;
mbed_official 573:ad23fe03a082 220
mbed_official 573:ad23fe03a082 221 /* Check the DMA peripheral state */
mbed_official 573:ad23fe03a082 222 if(hdma == NULL)
mbed_official 573:ad23fe03a082 223 {
mbed_official 573:ad23fe03a082 224 return HAL_ERROR;
mbed_official 573:ad23fe03a082 225 }
mbed_official 573:ad23fe03a082 226
mbed_official 573:ad23fe03a082 227 /* Check the parameters */
mbed_official 573:ad23fe03a082 228 assert_param(IS_DMA_STREAM_ALL_INSTANCE(hdma->Instance));
mbed_official 573:ad23fe03a082 229 assert_param(IS_DMA_CHANNEL(hdma->Init.Channel));
mbed_official 573:ad23fe03a082 230 assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
mbed_official 573:ad23fe03a082 231 assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
mbed_official 573:ad23fe03a082 232 assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
mbed_official 573:ad23fe03a082 233 assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
mbed_official 573:ad23fe03a082 234 assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
mbed_official 573:ad23fe03a082 235 assert_param(IS_DMA_MODE(hdma->Init.Mode));
mbed_official 573:ad23fe03a082 236 assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
mbed_official 573:ad23fe03a082 237 assert_param(IS_DMA_FIFO_MODE_STATE(hdma->Init.FIFOMode));
mbed_official 573:ad23fe03a082 238 /* Check the memory burst, peripheral burst and FIFO threshold parameters only
mbed_official 573:ad23fe03a082 239 when FIFO mode is enabled */
mbed_official 573:ad23fe03a082 240 if(hdma->Init.FIFOMode != DMA_FIFOMODE_DISABLE)
mbed_official 573:ad23fe03a082 241 {
mbed_official 573:ad23fe03a082 242 assert_param(IS_DMA_FIFO_THRESHOLD(hdma->Init.FIFOThreshold));
mbed_official 573:ad23fe03a082 243 assert_param(IS_DMA_MEMORY_BURST(hdma->Init.MemBurst));
mbed_official 573:ad23fe03a082 244 assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst));
mbed_official 573:ad23fe03a082 245 }
mbed_official 573:ad23fe03a082 246
mbed_official 573:ad23fe03a082 247 /* Change DMA peripheral state */
mbed_official 573:ad23fe03a082 248 hdma->State = HAL_DMA_STATE_BUSY;
mbed_official 573:ad23fe03a082 249
mbed_official 573:ad23fe03a082 250 /* Get the CR register value */
mbed_official 573:ad23fe03a082 251 tmp = hdma->Instance->CR;
mbed_official 573:ad23fe03a082 252
mbed_official 573:ad23fe03a082 253 /* Clear CHSEL, MBURST, PBURST, PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, CT and DBM bits */
mbed_official 573:ad23fe03a082 254 tmp &= ((uint32_t)~(DMA_SxCR_CHSEL | DMA_SxCR_MBURST | DMA_SxCR_PBURST | \
mbed_official 573:ad23fe03a082 255 DMA_SxCR_PL | DMA_SxCR_MSIZE | DMA_SxCR_PSIZE | \
mbed_official 573:ad23fe03a082 256 DMA_SxCR_MINC | DMA_SxCR_PINC | DMA_SxCR_CIRC | \
mbed_official 573:ad23fe03a082 257 DMA_SxCR_DIR | DMA_SxCR_CT | DMA_SxCR_DBM));
mbed_official 573:ad23fe03a082 258
mbed_official 573:ad23fe03a082 259 /* Prepare the DMA Stream configuration */
mbed_official 573:ad23fe03a082 260 tmp |= hdma->Init.Channel | hdma->Init.Direction |
mbed_official 573:ad23fe03a082 261 hdma->Init.PeriphInc | hdma->Init.MemInc |
mbed_official 573:ad23fe03a082 262 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
mbed_official 573:ad23fe03a082 263 hdma->Init.Mode | hdma->Init.Priority;
mbed_official 573:ad23fe03a082 264
mbed_official 573:ad23fe03a082 265 /* the Memory burst and peripheral burst are not used when the FIFO is disabled */
mbed_official 573:ad23fe03a082 266 if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
mbed_official 573:ad23fe03a082 267 {
mbed_official 573:ad23fe03a082 268 /* Get memory burst and peripheral burst */
mbed_official 573:ad23fe03a082 269 tmp |= hdma->Init.MemBurst | hdma->Init.PeriphBurst;
mbed_official 573:ad23fe03a082 270 }
mbed_official 573:ad23fe03a082 271
mbed_official 573:ad23fe03a082 272 /* Write to DMA Stream CR register */
mbed_official 573:ad23fe03a082 273 hdma->Instance->CR = tmp;
mbed_official 573:ad23fe03a082 274
mbed_official 573:ad23fe03a082 275 /* Get the FCR register value */
mbed_official 573:ad23fe03a082 276 tmp = hdma->Instance->FCR;
mbed_official 573:ad23fe03a082 277
mbed_official 573:ad23fe03a082 278 /* Clear Direct mode and FIFO threshold bits */
mbed_official 573:ad23fe03a082 279 tmp &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH);
mbed_official 573:ad23fe03a082 280
mbed_official 573:ad23fe03a082 281 /* Prepare the DMA Stream FIFO configuration */
mbed_official 573:ad23fe03a082 282 tmp |= hdma->Init.FIFOMode;
mbed_official 573:ad23fe03a082 283
mbed_official 573:ad23fe03a082 284 /* the FIFO threshold is not used when the FIFO mode is disabled */
mbed_official 573:ad23fe03a082 285 if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
mbed_official 573:ad23fe03a082 286 {
mbed_official 573:ad23fe03a082 287 /* Get the FIFO threshold */
mbed_official 573:ad23fe03a082 288 tmp |= hdma->Init.FIFOThreshold;
mbed_official 573:ad23fe03a082 289 }
mbed_official 573:ad23fe03a082 290
mbed_official 573:ad23fe03a082 291 /* Write to DMA Stream FCR */
mbed_official 573:ad23fe03a082 292 hdma->Instance->FCR = tmp;
mbed_official 573:ad23fe03a082 293
mbed_official 573:ad23fe03a082 294 /* Initialize the error code */
mbed_official 573:ad23fe03a082 295 hdma->ErrorCode = HAL_DMA_ERROR_NONE;
mbed_official 573:ad23fe03a082 296
mbed_official 573:ad23fe03a082 297 /* Initialize the DMA state */
mbed_official 573:ad23fe03a082 298 hdma->State = HAL_DMA_STATE_READY;
mbed_official 573:ad23fe03a082 299
mbed_official 573:ad23fe03a082 300 return HAL_OK;
mbed_official 573:ad23fe03a082 301 }
mbed_official 573:ad23fe03a082 302
mbed_official 573:ad23fe03a082 303 /**
mbed_official 573:ad23fe03a082 304 * @brief DeInitializes the DMA peripheral
mbed_official 573:ad23fe03a082 305 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 306 * the configuration information for the specified DMA Stream.
mbed_official 573:ad23fe03a082 307 * @retval HAL status
mbed_official 573:ad23fe03a082 308 */
mbed_official 573:ad23fe03a082 309 HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 310 {
mbed_official 573:ad23fe03a082 311 /* Check the DMA peripheral state */
mbed_official 573:ad23fe03a082 312 if(hdma == NULL)
mbed_official 573:ad23fe03a082 313 {
mbed_official 573:ad23fe03a082 314 return HAL_ERROR;
mbed_official 573:ad23fe03a082 315 }
mbed_official 573:ad23fe03a082 316
mbed_official 573:ad23fe03a082 317 /* Check the DMA peripheral state */
mbed_official 573:ad23fe03a082 318 if(hdma->State == HAL_DMA_STATE_BUSY)
mbed_official 573:ad23fe03a082 319 {
mbed_official 573:ad23fe03a082 320 return HAL_ERROR;
mbed_official 573:ad23fe03a082 321 }
mbed_official 573:ad23fe03a082 322
mbed_official 573:ad23fe03a082 323 /* Disable the selected DMA Streamx */
mbed_official 573:ad23fe03a082 324 __HAL_DMA_DISABLE(hdma);
mbed_official 573:ad23fe03a082 325
mbed_official 573:ad23fe03a082 326 /* Reset DMA Streamx control register */
mbed_official 573:ad23fe03a082 327 hdma->Instance->CR = 0;
mbed_official 573:ad23fe03a082 328
mbed_official 573:ad23fe03a082 329 /* Reset DMA Streamx number of data to transfer register */
mbed_official 573:ad23fe03a082 330 hdma->Instance->NDTR = 0;
mbed_official 573:ad23fe03a082 331
mbed_official 573:ad23fe03a082 332 /* Reset DMA Streamx peripheral address register */
mbed_official 573:ad23fe03a082 333 hdma->Instance->PAR = 0;
mbed_official 573:ad23fe03a082 334
mbed_official 573:ad23fe03a082 335 /* Reset DMA Streamx memory 0 address register */
mbed_official 573:ad23fe03a082 336 hdma->Instance->M0AR = 0;
mbed_official 573:ad23fe03a082 337
mbed_official 573:ad23fe03a082 338 /* Reset DMA Streamx memory 1 address register */
mbed_official 573:ad23fe03a082 339 hdma->Instance->M1AR = 0;
mbed_official 573:ad23fe03a082 340
mbed_official 573:ad23fe03a082 341 /* Reset DMA Streamx FIFO control register */
mbed_official 573:ad23fe03a082 342 hdma->Instance->FCR = (uint32_t)0x00000021;
mbed_official 573:ad23fe03a082 343
mbed_official 573:ad23fe03a082 344 /* Clear all flags */
mbed_official 573:ad23fe03a082 345 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 346 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 347 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 348 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 349 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 350
mbed_official 573:ad23fe03a082 351 /* Initialize the error code */
mbed_official 573:ad23fe03a082 352 hdma->ErrorCode = HAL_DMA_ERROR_NONE;
mbed_official 573:ad23fe03a082 353
mbed_official 573:ad23fe03a082 354 /* Initialize the DMA state */
mbed_official 573:ad23fe03a082 355 hdma->State = HAL_DMA_STATE_RESET;
mbed_official 573:ad23fe03a082 356
mbed_official 573:ad23fe03a082 357 /* Release Lock */
mbed_official 573:ad23fe03a082 358 __HAL_UNLOCK(hdma);
mbed_official 573:ad23fe03a082 359
mbed_official 573:ad23fe03a082 360 return HAL_OK;
mbed_official 573:ad23fe03a082 361 }
mbed_official 573:ad23fe03a082 362
mbed_official 573:ad23fe03a082 363 /**
mbed_official 573:ad23fe03a082 364 * @}
mbed_official 573:ad23fe03a082 365 */
mbed_official 573:ad23fe03a082 366
mbed_official 573:ad23fe03a082 367 /** @addtogroup DMA_Exported_Functions_Group2
mbed_official 573:ad23fe03a082 368 *
mbed_official 573:ad23fe03a082 369 @verbatim
mbed_official 573:ad23fe03a082 370 ===============================================================================
mbed_official 573:ad23fe03a082 371 ##### IO operation functions #####
mbed_official 573:ad23fe03a082 372 ===============================================================================
mbed_official 573:ad23fe03a082 373 [..] This section provides functions allowing to:
mbed_official 573:ad23fe03a082 374 (+) Configure the source, destination address and data length and Start DMA transfer
mbed_official 573:ad23fe03a082 375 (+) Configure the source, destination address and data length and
mbed_official 573:ad23fe03a082 376 Start DMA transfer with interrupt
mbed_official 573:ad23fe03a082 377 (+) Abort DMA transfer
mbed_official 573:ad23fe03a082 378 (+) Poll for transfer complete
mbed_official 573:ad23fe03a082 379 (+) Handle DMA interrupt request
mbed_official 573:ad23fe03a082 380
mbed_official 573:ad23fe03a082 381 @endverbatim
mbed_official 573:ad23fe03a082 382 * @{
mbed_official 573:ad23fe03a082 383 */
mbed_official 573:ad23fe03a082 384
mbed_official 573:ad23fe03a082 385 /**
mbed_official 573:ad23fe03a082 386 * @brief Starts the DMA Transfer.
mbed_official 573:ad23fe03a082 387 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 388 * the configuration information for the specified DMA Stream.
mbed_official 573:ad23fe03a082 389 * @param SrcAddress: The source memory Buffer address
mbed_official 573:ad23fe03a082 390 * @param DstAddress: The destination memory Buffer address
mbed_official 573:ad23fe03a082 391 * @param DataLength: The length of data to be transferred from source to destination
mbed_official 573:ad23fe03a082 392 * @retval HAL status
mbed_official 573:ad23fe03a082 393 */
mbed_official 573:ad23fe03a082 394 HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
mbed_official 573:ad23fe03a082 395 {
mbed_official 573:ad23fe03a082 396 /* Process locked */
mbed_official 573:ad23fe03a082 397 __HAL_LOCK(hdma);
mbed_official 573:ad23fe03a082 398
mbed_official 573:ad23fe03a082 399 /* Change DMA peripheral state */
mbed_official 573:ad23fe03a082 400 hdma->State = HAL_DMA_STATE_BUSY;
mbed_official 573:ad23fe03a082 401
mbed_official 573:ad23fe03a082 402 /* Check the parameters */
mbed_official 573:ad23fe03a082 403 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
mbed_official 573:ad23fe03a082 404
mbed_official 573:ad23fe03a082 405 /* Disable the peripheral */
mbed_official 573:ad23fe03a082 406 __HAL_DMA_DISABLE(hdma);
mbed_official 573:ad23fe03a082 407
mbed_official 573:ad23fe03a082 408 /* Configure the source, destination address and the data length */
mbed_official 573:ad23fe03a082 409 DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
mbed_official 573:ad23fe03a082 410
mbed_official 573:ad23fe03a082 411 /* Enable the Peripheral */
mbed_official 573:ad23fe03a082 412 __HAL_DMA_ENABLE(hdma);
mbed_official 573:ad23fe03a082 413
mbed_official 573:ad23fe03a082 414 return HAL_OK;
mbed_official 573:ad23fe03a082 415 }
mbed_official 573:ad23fe03a082 416
mbed_official 573:ad23fe03a082 417 /**
mbed_official 573:ad23fe03a082 418 * @brief Start the DMA Transfer with interrupt enabled.
mbed_official 573:ad23fe03a082 419 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 420 * the configuration information for the specified DMA Stream.
mbed_official 573:ad23fe03a082 421 * @param SrcAddress: The source memory Buffer address
mbed_official 573:ad23fe03a082 422 * @param DstAddress: The destination memory Buffer address
mbed_official 573:ad23fe03a082 423 * @param DataLength: The length of data to be transferred from source to destination
mbed_official 573:ad23fe03a082 424 * @retval HAL status
mbed_official 573:ad23fe03a082 425 */
mbed_official 573:ad23fe03a082 426 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
mbed_official 573:ad23fe03a082 427 {
mbed_official 573:ad23fe03a082 428 /* Process locked */
mbed_official 573:ad23fe03a082 429 __HAL_LOCK(hdma);
mbed_official 573:ad23fe03a082 430
mbed_official 573:ad23fe03a082 431 /* Change DMA peripheral state */
mbed_official 573:ad23fe03a082 432 hdma->State = HAL_DMA_STATE_BUSY;
mbed_official 573:ad23fe03a082 433
mbed_official 573:ad23fe03a082 434 /* Check the parameters */
mbed_official 573:ad23fe03a082 435 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
mbed_official 573:ad23fe03a082 436
mbed_official 573:ad23fe03a082 437 /* Disable the peripheral */
mbed_official 573:ad23fe03a082 438 __HAL_DMA_DISABLE(hdma);
mbed_official 573:ad23fe03a082 439
mbed_official 573:ad23fe03a082 440 /* Configure the source, destination address and the data length */
mbed_official 573:ad23fe03a082 441 DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
mbed_official 573:ad23fe03a082 442
mbed_official 573:ad23fe03a082 443 /* Enable the transfer complete interrupt */
mbed_official 573:ad23fe03a082 444 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TC);
mbed_official 573:ad23fe03a082 445
mbed_official 573:ad23fe03a082 446 /* Enable the Half transfer complete interrupt */
mbed_official 573:ad23fe03a082 447 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_HT);
mbed_official 573:ad23fe03a082 448
mbed_official 573:ad23fe03a082 449 /* Enable the transfer Error interrupt */
mbed_official 573:ad23fe03a082 450 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TE);
mbed_official 573:ad23fe03a082 451
mbed_official 573:ad23fe03a082 452 /* Enable the FIFO Error interrupt */
mbed_official 573:ad23fe03a082 453 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_FE);
mbed_official 573:ad23fe03a082 454
mbed_official 573:ad23fe03a082 455 /* Enable the direct mode Error interrupt */
mbed_official 573:ad23fe03a082 456 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_DME);
mbed_official 573:ad23fe03a082 457
mbed_official 573:ad23fe03a082 458 /* Enable the Peripheral */
mbed_official 573:ad23fe03a082 459 __HAL_DMA_ENABLE(hdma);
mbed_official 573:ad23fe03a082 460
mbed_official 573:ad23fe03a082 461 return HAL_OK;
mbed_official 573:ad23fe03a082 462 }
mbed_official 573:ad23fe03a082 463
mbed_official 573:ad23fe03a082 464 /**
mbed_official 573:ad23fe03a082 465 * @brief Aborts the DMA Transfer.
mbed_official 573:ad23fe03a082 466 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 467 * the configuration information for the specified DMA Stream.
mbed_official 573:ad23fe03a082 468 *
mbed_official 573:ad23fe03a082 469 * @note After disabling a DMA Stream, a check for wait until the DMA Stream is
mbed_official 573:ad23fe03a082 470 * effectively disabled is added. If a Stream is disabled
mbed_official 573:ad23fe03a082 471 * while a data transfer is ongoing, the current data will be transferred
mbed_official 573:ad23fe03a082 472 * and the Stream will be effectively disabled only after the transfer of
mbed_official 573:ad23fe03a082 473 * this single data is finished.
mbed_official 573:ad23fe03a082 474 * @retval HAL status
mbed_official 573:ad23fe03a082 475 */
mbed_official 573:ad23fe03a082 476 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 477 {
mbed_official 573:ad23fe03a082 478 uint32_t tickstart = 0;
mbed_official 573:ad23fe03a082 479
mbed_official 573:ad23fe03a082 480 /* Disable the stream */
mbed_official 573:ad23fe03a082 481 __HAL_DMA_DISABLE(hdma);
mbed_official 573:ad23fe03a082 482
mbed_official 573:ad23fe03a082 483 /* Get tick */
mbed_official 573:ad23fe03a082 484 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 485
mbed_official 573:ad23fe03a082 486 /* Check if the DMA Stream is effectively disabled */
mbed_official 573:ad23fe03a082 487 while((hdma->Instance->CR & DMA_SxCR_EN) != 0)
mbed_official 573:ad23fe03a082 488 {
mbed_official 573:ad23fe03a082 489 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 490 if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
mbed_official 573:ad23fe03a082 491 {
mbed_official 573:ad23fe03a082 492 /* Update error code */
mbed_official 573:ad23fe03a082 493 hdma->ErrorCode |= HAL_DMA_ERROR_TIMEOUT;
mbed_official 573:ad23fe03a082 494
mbed_official 573:ad23fe03a082 495 /* Process Unlocked */
mbed_official 573:ad23fe03a082 496 __HAL_UNLOCK(hdma);
mbed_official 573:ad23fe03a082 497
mbed_official 573:ad23fe03a082 498 /* Change the DMA state */
mbed_official 573:ad23fe03a082 499 hdma->State = HAL_DMA_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 500
mbed_official 573:ad23fe03a082 501 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 502 }
mbed_official 573:ad23fe03a082 503 }
mbed_official 573:ad23fe03a082 504 /* Process Unlocked */
mbed_official 573:ad23fe03a082 505 __HAL_UNLOCK(hdma);
mbed_official 573:ad23fe03a082 506
mbed_official 573:ad23fe03a082 507 /* Change the DMA state*/
mbed_official 573:ad23fe03a082 508 hdma->State = HAL_DMA_STATE_READY;
mbed_official 573:ad23fe03a082 509
mbed_official 573:ad23fe03a082 510 return HAL_OK;
mbed_official 573:ad23fe03a082 511 }
mbed_official 573:ad23fe03a082 512
mbed_official 573:ad23fe03a082 513 /**
mbed_official 573:ad23fe03a082 514 * @brief Polling for transfer complete.
mbed_official 573:ad23fe03a082 515 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 516 * the configuration information for the specified DMA Stream.
mbed_official 573:ad23fe03a082 517 * @param CompleteLevel: Specifies the DMA level complete.
mbed_official 573:ad23fe03a082 518 * @param Timeout: Timeout duration.
mbed_official 573:ad23fe03a082 519 * @retval HAL status
mbed_official 573:ad23fe03a082 520 */
mbed_official 573:ad23fe03a082 521 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout)
mbed_official 573:ad23fe03a082 522 {
mbed_official 573:ad23fe03a082 523 uint32_t temp, tmp, tmp1, tmp2;
mbed_official 573:ad23fe03a082 524 uint32_t tickstart = 0;
mbed_official 573:ad23fe03a082 525
mbed_official 573:ad23fe03a082 526 /* Get the level transfer complete flag */
mbed_official 573:ad23fe03a082 527 if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
mbed_official 573:ad23fe03a082 528 {
mbed_official 573:ad23fe03a082 529 /* Transfer Complete flag */
mbed_official 573:ad23fe03a082 530 temp = __HAL_DMA_GET_TC_FLAG_INDEX(hdma);
mbed_official 573:ad23fe03a082 531 }
mbed_official 573:ad23fe03a082 532 else
mbed_official 573:ad23fe03a082 533 {
mbed_official 573:ad23fe03a082 534 /* Half Transfer Complete flag */
mbed_official 573:ad23fe03a082 535 temp = __HAL_DMA_GET_HT_FLAG_INDEX(hdma);
mbed_official 573:ad23fe03a082 536 }
mbed_official 573:ad23fe03a082 537
mbed_official 573:ad23fe03a082 538 /* Get tick */
mbed_official 573:ad23fe03a082 539 tickstart = HAL_GetTick();
mbed_official 573:ad23fe03a082 540
mbed_official 573:ad23fe03a082 541 while(__HAL_DMA_GET_FLAG(hdma, temp) == RESET)
mbed_official 573:ad23fe03a082 542 {
mbed_official 573:ad23fe03a082 543 tmp = __HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 544 tmp1 = __HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 545 tmp2 = __HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 546 if((tmp != RESET) || (tmp1 != RESET) || (tmp2 != RESET))
mbed_official 573:ad23fe03a082 547 {
mbed_official 573:ad23fe03a082 548 if(tmp != RESET)
mbed_official 573:ad23fe03a082 549 {
mbed_official 573:ad23fe03a082 550 /* Update error code */
mbed_official 573:ad23fe03a082 551 hdma->ErrorCode |= HAL_DMA_ERROR_TE;
mbed_official 573:ad23fe03a082 552
mbed_official 573:ad23fe03a082 553 /* Clear the transfer error flag */
mbed_official 573:ad23fe03a082 554 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 555 }
mbed_official 573:ad23fe03a082 556 if(tmp1 != RESET)
mbed_official 573:ad23fe03a082 557 {
mbed_official 573:ad23fe03a082 558 /* Update error code */
mbed_official 573:ad23fe03a082 559 hdma->ErrorCode |= HAL_DMA_ERROR_FE;
mbed_official 573:ad23fe03a082 560
mbed_official 573:ad23fe03a082 561 /* Clear the FIFO error flag */
mbed_official 573:ad23fe03a082 562 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 563 }
mbed_official 573:ad23fe03a082 564 if(tmp2 != RESET)
mbed_official 573:ad23fe03a082 565 {
mbed_official 573:ad23fe03a082 566 /* Update error code */
mbed_official 573:ad23fe03a082 567 hdma->ErrorCode |= HAL_DMA_ERROR_DME;
mbed_official 573:ad23fe03a082 568
mbed_official 573:ad23fe03a082 569 /* Clear the Direct Mode error flag */
mbed_official 573:ad23fe03a082 570 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 571 }
mbed_official 573:ad23fe03a082 572 /* Change the DMA state */
mbed_official 573:ad23fe03a082 573 hdma->State= HAL_DMA_STATE_ERROR;
mbed_official 573:ad23fe03a082 574
mbed_official 573:ad23fe03a082 575 /* Process Unlocked */
mbed_official 573:ad23fe03a082 576 __HAL_UNLOCK(hdma);
mbed_official 573:ad23fe03a082 577
mbed_official 573:ad23fe03a082 578 return HAL_ERROR;
mbed_official 573:ad23fe03a082 579 }
mbed_official 573:ad23fe03a082 580 /* Check for the Timeout */
mbed_official 573:ad23fe03a082 581 if(Timeout != HAL_MAX_DELAY)
mbed_official 573:ad23fe03a082 582 {
mbed_official 573:ad23fe03a082 583 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
mbed_official 573:ad23fe03a082 584 {
mbed_official 573:ad23fe03a082 585 /* Update error code */
mbed_official 573:ad23fe03a082 586 hdma->ErrorCode |= HAL_DMA_ERROR_TIMEOUT;
mbed_official 573:ad23fe03a082 587
mbed_official 573:ad23fe03a082 588 /* Change the DMA state */
mbed_official 573:ad23fe03a082 589 hdma->State = HAL_DMA_STATE_TIMEOUT;
mbed_official 573:ad23fe03a082 590
mbed_official 573:ad23fe03a082 591 /* Process Unlocked */
mbed_official 573:ad23fe03a082 592 __HAL_UNLOCK(hdma);
mbed_official 573:ad23fe03a082 593
mbed_official 573:ad23fe03a082 594 return HAL_TIMEOUT;
mbed_official 573:ad23fe03a082 595 }
mbed_official 573:ad23fe03a082 596 }
mbed_official 573:ad23fe03a082 597 }
mbed_official 573:ad23fe03a082 598
mbed_official 573:ad23fe03a082 599 if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
mbed_official 573:ad23fe03a082 600 {
mbed_official 573:ad23fe03a082 601 /* Multi_Buffering mode enabled */
mbed_official 573:ad23fe03a082 602 if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0)
mbed_official 573:ad23fe03a082 603 {
mbed_official 573:ad23fe03a082 604 /* Clear the half transfer complete flag */
mbed_official 573:ad23fe03a082 605 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 606 /* Clear the transfer complete flag */
mbed_official 573:ad23fe03a082 607 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 608
mbed_official 573:ad23fe03a082 609 /* Current memory buffer used is Memory 0 */
mbed_official 573:ad23fe03a082 610 if((hdma->Instance->CR & DMA_SxCR_CT) == 0)
mbed_official 573:ad23fe03a082 611 {
mbed_official 573:ad23fe03a082 612 /* Change DMA peripheral state */
mbed_official 573:ad23fe03a082 613 hdma->State = HAL_DMA_STATE_READY_MEM0;
mbed_official 573:ad23fe03a082 614 }
mbed_official 573:ad23fe03a082 615 /* Current memory buffer used is Memory 1 */
mbed_official 573:ad23fe03a082 616 else if((hdma->Instance->CR & DMA_SxCR_CT) != 0)
mbed_official 573:ad23fe03a082 617 {
mbed_official 573:ad23fe03a082 618 /* Change DMA peripheral state */
mbed_official 573:ad23fe03a082 619 hdma->State = HAL_DMA_STATE_READY_MEM1;
mbed_official 573:ad23fe03a082 620 }
mbed_official 573:ad23fe03a082 621 }
mbed_official 573:ad23fe03a082 622 else
mbed_official 573:ad23fe03a082 623 {
mbed_official 573:ad23fe03a082 624 /* Clear the half transfer complete flag */
mbed_official 573:ad23fe03a082 625 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 626 /* Clear the transfer complete flag */
mbed_official 573:ad23fe03a082 627 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 628
mbed_official 573:ad23fe03a082 629 /* The selected Streamx EN bit is cleared (DMA is disabled and all transfers
mbed_official 573:ad23fe03a082 630 are complete) */
mbed_official 573:ad23fe03a082 631 hdma->State = HAL_DMA_STATE_READY_MEM0;
mbed_official 573:ad23fe03a082 632 }
mbed_official 573:ad23fe03a082 633 /* Process Unlocked */
mbed_official 573:ad23fe03a082 634 __HAL_UNLOCK(hdma);
mbed_official 573:ad23fe03a082 635 }
mbed_official 573:ad23fe03a082 636 else
mbed_official 573:ad23fe03a082 637 {
mbed_official 573:ad23fe03a082 638 /* Multi_Buffering mode enabled */
mbed_official 573:ad23fe03a082 639 if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0)
mbed_official 573:ad23fe03a082 640 {
mbed_official 573:ad23fe03a082 641 /* Clear the half transfer complete flag */
mbed_official 573:ad23fe03a082 642 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 643
mbed_official 573:ad23fe03a082 644 /* Current memory buffer used is Memory 0 */
mbed_official 573:ad23fe03a082 645 if((hdma->Instance->CR & DMA_SxCR_CT) == 0)
mbed_official 573:ad23fe03a082 646 {
mbed_official 573:ad23fe03a082 647 /* Change DMA peripheral state */
mbed_official 573:ad23fe03a082 648 hdma->State = HAL_DMA_STATE_READY_HALF_MEM0;
mbed_official 573:ad23fe03a082 649 }
mbed_official 573:ad23fe03a082 650 /* Current memory buffer used is Memory 1 */
mbed_official 573:ad23fe03a082 651 else if((hdma->Instance->CR & DMA_SxCR_CT) != 0)
mbed_official 573:ad23fe03a082 652 {
mbed_official 573:ad23fe03a082 653 /* Change DMA peripheral state */
mbed_official 573:ad23fe03a082 654 hdma->State = HAL_DMA_STATE_READY_HALF_MEM1;
mbed_official 573:ad23fe03a082 655 }
mbed_official 573:ad23fe03a082 656 }
mbed_official 573:ad23fe03a082 657 else
mbed_official 573:ad23fe03a082 658 {
mbed_official 573:ad23fe03a082 659 /* Clear the half transfer complete flag */
mbed_official 573:ad23fe03a082 660 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 661
mbed_official 573:ad23fe03a082 662 /* Change DMA peripheral state */
mbed_official 573:ad23fe03a082 663 hdma->State = HAL_DMA_STATE_READY_HALF_MEM0;
mbed_official 573:ad23fe03a082 664 }
mbed_official 573:ad23fe03a082 665 }
mbed_official 573:ad23fe03a082 666 return HAL_OK;
mbed_official 573:ad23fe03a082 667 }
mbed_official 573:ad23fe03a082 668
mbed_official 573:ad23fe03a082 669 /**
mbed_official 573:ad23fe03a082 670 * @brief Handles DMA interrupt request.
mbed_official 573:ad23fe03a082 671 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 672 * the configuration information for the specified DMA Stream.
mbed_official 573:ad23fe03a082 673 * @retval None
mbed_official 573:ad23fe03a082 674 */
mbed_official 573:ad23fe03a082 675 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 676 {
mbed_official 573:ad23fe03a082 677 /* Transfer Error Interrupt management ***************************************/
mbed_official 573:ad23fe03a082 678 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET)
mbed_official 573:ad23fe03a082 679 {
mbed_official 573:ad23fe03a082 680 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != RESET)
mbed_official 573:ad23fe03a082 681 {
mbed_official 573:ad23fe03a082 682 /* Disable the transfer error interrupt */
mbed_official 573:ad23fe03a082 683 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE);
mbed_official 573:ad23fe03a082 684
mbed_official 573:ad23fe03a082 685 /* Clear the transfer error flag */
mbed_official 573:ad23fe03a082 686 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 687
mbed_official 573:ad23fe03a082 688 /* Update error code */
mbed_official 573:ad23fe03a082 689 hdma->ErrorCode |= HAL_DMA_ERROR_TE;
mbed_official 573:ad23fe03a082 690
mbed_official 573:ad23fe03a082 691 /* Change the DMA state */
mbed_official 573:ad23fe03a082 692 hdma->State = HAL_DMA_STATE_ERROR;
mbed_official 573:ad23fe03a082 693
mbed_official 573:ad23fe03a082 694 /* Process Unlocked */
mbed_official 573:ad23fe03a082 695 __HAL_UNLOCK(hdma);
mbed_official 573:ad23fe03a082 696
mbed_official 573:ad23fe03a082 697 if(hdma->XferErrorCallback != NULL)
mbed_official 573:ad23fe03a082 698 {
mbed_official 573:ad23fe03a082 699 /* Transfer error callback */
mbed_official 573:ad23fe03a082 700 hdma->XferErrorCallback(hdma);
mbed_official 573:ad23fe03a082 701 }
mbed_official 573:ad23fe03a082 702 }
mbed_official 573:ad23fe03a082 703 }
mbed_official 573:ad23fe03a082 704 /* FIFO Error Interrupt management ******************************************/
mbed_official 573:ad23fe03a082 705 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma)) != RESET)
mbed_official 573:ad23fe03a082 706 {
mbed_official 573:ad23fe03a082 707 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_FE) != RESET)
mbed_official 573:ad23fe03a082 708 {
mbed_official 573:ad23fe03a082 709 /* Disable the FIFO Error interrupt */
mbed_official 573:ad23fe03a082 710 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_FE);
mbed_official 573:ad23fe03a082 711
mbed_official 573:ad23fe03a082 712 /* Clear the FIFO error flag */
mbed_official 573:ad23fe03a082 713 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 714
mbed_official 573:ad23fe03a082 715 /* Update error code */
mbed_official 573:ad23fe03a082 716 hdma->ErrorCode |= HAL_DMA_ERROR_FE;
mbed_official 573:ad23fe03a082 717
mbed_official 573:ad23fe03a082 718 /* Change the DMA state */
mbed_official 573:ad23fe03a082 719 hdma->State = HAL_DMA_STATE_ERROR;
mbed_official 573:ad23fe03a082 720
mbed_official 573:ad23fe03a082 721 /* Process Unlocked */
mbed_official 573:ad23fe03a082 722 __HAL_UNLOCK(hdma);
mbed_official 573:ad23fe03a082 723
mbed_official 573:ad23fe03a082 724 if(hdma->XferErrorCallback != NULL)
mbed_official 573:ad23fe03a082 725 {
mbed_official 573:ad23fe03a082 726 /* Transfer error callback */
mbed_official 573:ad23fe03a082 727 hdma->XferErrorCallback(hdma);
mbed_official 573:ad23fe03a082 728 }
mbed_official 573:ad23fe03a082 729 }
mbed_official 573:ad23fe03a082 730 }
mbed_official 573:ad23fe03a082 731 /* Direct Mode Error Interrupt management ***********************************/
mbed_official 573:ad23fe03a082 732 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma)) != RESET)
mbed_official 573:ad23fe03a082 733 {
mbed_official 573:ad23fe03a082 734 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_DME) != RESET)
mbed_official 573:ad23fe03a082 735 {
mbed_official 573:ad23fe03a082 736 /* Disable the direct mode Error interrupt */
mbed_official 573:ad23fe03a082 737 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_DME);
mbed_official 573:ad23fe03a082 738
mbed_official 573:ad23fe03a082 739 /* Clear the direct mode error flag */
mbed_official 573:ad23fe03a082 740 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 741
mbed_official 573:ad23fe03a082 742 /* Update error code */
mbed_official 573:ad23fe03a082 743 hdma->ErrorCode |= HAL_DMA_ERROR_DME;
mbed_official 573:ad23fe03a082 744
mbed_official 573:ad23fe03a082 745 /* Change the DMA state */
mbed_official 573:ad23fe03a082 746 hdma->State = HAL_DMA_STATE_ERROR;
mbed_official 573:ad23fe03a082 747
mbed_official 573:ad23fe03a082 748 /* Process Unlocked */
mbed_official 573:ad23fe03a082 749 __HAL_UNLOCK(hdma);
mbed_official 573:ad23fe03a082 750
mbed_official 573:ad23fe03a082 751 if(hdma->XferErrorCallback != NULL)
mbed_official 573:ad23fe03a082 752 {
mbed_official 573:ad23fe03a082 753 /* Transfer error callback */
mbed_official 573:ad23fe03a082 754 hdma->XferErrorCallback(hdma);
mbed_official 573:ad23fe03a082 755 }
mbed_official 573:ad23fe03a082 756 }
mbed_official 573:ad23fe03a082 757 }
mbed_official 573:ad23fe03a082 758 /* Half Transfer Complete Interrupt management ******************************/
mbed_official 573:ad23fe03a082 759 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)) != RESET)
mbed_official 573:ad23fe03a082 760 {
mbed_official 573:ad23fe03a082 761 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != RESET)
mbed_official 573:ad23fe03a082 762 {
mbed_official 573:ad23fe03a082 763 /* Multi_Buffering mode enabled */
mbed_official 573:ad23fe03a082 764 if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0)
mbed_official 573:ad23fe03a082 765 {
mbed_official 573:ad23fe03a082 766 /* Clear the half transfer complete flag */
mbed_official 573:ad23fe03a082 767 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 768
mbed_official 573:ad23fe03a082 769 /* Current memory buffer used is Memory 0 */
mbed_official 573:ad23fe03a082 770 if((hdma->Instance->CR & DMA_SxCR_CT) == 0)
mbed_official 573:ad23fe03a082 771 {
mbed_official 573:ad23fe03a082 772 /* Change DMA peripheral state */
mbed_official 573:ad23fe03a082 773 hdma->State = HAL_DMA_STATE_READY_HALF_MEM0;
mbed_official 573:ad23fe03a082 774 }
mbed_official 573:ad23fe03a082 775 /* Current memory buffer used is Memory 1 */
mbed_official 573:ad23fe03a082 776 else if((hdma->Instance->CR & DMA_SxCR_CT) != 0)
mbed_official 573:ad23fe03a082 777 {
mbed_official 573:ad23fe03a082 778 /* Change DMA peripheral state */
mbed_official 573:ad23fe03a082 779 hdma->State = HAL_DMA_STATE_READY_HALF_MEM1;
mbed_official 573:ad23fe03a082 780 }
mbed_official 573:ad23fe03a082 781 }
mbed_official 573:ad23fe03a082 782 else
mbed_official 573:ad23fe03a082 783 {
mbed_official 573:ad23fe03a082 784 /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
mbed_official 573:ad23fe03a082 785 if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
mbed_official 573:ad23fe03a082 786 {
mbed_official 573:ad23fe03a082 787 /* Disable the half transfer interrupt */
mbed_official 573:ad23fe03a082 788 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
mbed_official 573:ad23fe03a082 789 }
mbed_official 573:ad23fe03a082 790 /* Clear the half transfer complete flag */
mbed_official 573:ad23fe03a082 791 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 792
mbed_official 573:ad23fe03a082 793 /* Change DMA peripheral state */
mbed_official 573:ad23fe03a082 794 hdma->State = HAL_DMA_STATE_READY_HALF_MEM0;
mbed_official 573:ad23fe03a082 795 }
mbed_official 573:ad23fe03a082 796
mbed_official 573:ad23fe03a082 797 if(hdma->XferHalfCpltCallback != NULL)
mbed_official 573:ad23fe03a082 798 {
mbed_official 573:ad23fe03a082 799 /* Half transfer callback */
mbed_official 573:ad23fe03a082 800 hdma->XferHalfCpltCallback(hdma);
mbed_official 573:ad23fe03a082 801 }
mbed_official 573:ad23fe03a082 802 }
mbed_official 573:ad23fe03a082 803 }
mbed_official 573:ad23fe03a082 804 /* Transfer Complete Interrupt management ***********************************/
mbed_official 573:ad23fe03a082 805 if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)) != RESET)
mbed_official 573:ad23fe03a082 806 {
mbed_official 573:ad23fe03a082 807 if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != RESET)
mbed_official 573:ad23fe03a082 808 {
mbed_official 573:ad23fe03a082 809 if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0)
mbed_official 573:ad23fe03a082 810 {
mbed_official 573:ad23fe03a082 811 /* Clear the transfer complete flag */
mbed_official 573:ad23fe03a082 812 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 813
mbed_official 573:ad23fe03a082 814 /* Current memory buffer used is Memory 1 */
mbed_official 573:ad23fe03a082 815 if((hdma->Instance->CR & DMA_SxCR_CT) == 0)
mbed_official 573:ad23fe03a082 816 {
mbed_official 573:ad23fe03a082 817 if(hdma->XferM1CpltCallback != NULL)
mbed_official 573:ad23fe03a082 818 {
mbed_official 573:ad23fe03a082 819 /* Transfer complete Callback for memory1 */
mbed_official 573:ad23fe03a082 820 hdma->XferM1CpltCallback(hdma);
mbed_official 573:ad23fe03a082 821 }
mbed_official 573:ad23fe03a082 822 }
mbed_official 573:ad23fe03a082 823 /* Current memory buffer used is Memory 0 */
mbed_official 573:ad23fe03a082 824 else if((hdma->Instance->CR & DMA_SxCR_CT) != 0)
mbed_official 573:ad23fe03a082 825 {
mbed_official 573:ad23fe03a082 826 if(hdma->XferCpltCallback != NULL)
mbed_official 573:ad23fe03a082 827 {
mbed_official 573:ad23fe03a082 828 /* Transfer complete Callback for memory0 */
mbed_official 573:ad23fe03a082 829 hdma->XferCpltCallback(hdma);
mbed_official 573:ad23fe03a082 830 }
mbed_official 573:ad23fe03a082 831 }
mbed_official 573:ad23fe03a082 832 }
mbed_official 573:ad23fe03a082 833 /* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */
mbed_official 573:ad23fe03a082 834 else
mbed_official 573:ad23fe03a082 835 {
mbed_official 573:ad23fe03a082 836 if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
mbed_official 573:ad23fe03a082 837 {
mbed_official 573:ad23fe03a082 838 /* Disable the transfer complete interrupt */
mbed_official 573:ad23fe03a082 839 __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TC);
mbed_official 573:ad23fe03a082 840 }
mbed_official 573:ad23fe03a082 841 /* Clear the transfer complete flag */
mbed_official 573:ad23fe03a082 842 __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
mbed_official 573:ad23fe03a082 843
mbed_official 573:ad23fe03a082 844 /* Update error code */
mbed_official 573:ad23fe03a082 845 hdma->ErrorCode |= HAL_DMA_ERROR_NONE;
mbed_official 573:ad23fe03a082 846
mbed_official 573:ad23fe03a082 847 /* Change the DMA state */
mbed_official 573:ad23fe03a082 848 hdma->State = HAL_DMA_STATE_READY_MEM0;
mbed_official 573:ad23fe03a082 849
mbed_official 573:ad23fe03a082 850 /* Process Unlocked */
mbed_official 573:ad23fe03a082 851 __HAL_UNLOCK(hdma);
mbed_official 573:ad23fe03a082 852
mbed_official 573:ad23fe03a082 853 if(hdma->XferCpltCallback != NULL)
mbed_official 573:ad23fe03a082 854 {
mbed_official 573:ad23fe03a082 855 /* Transfer complete callback */
mbed_official 573:ad23fe03a082 856 hdma->XferCpltCallback(hdma);
mbed_official 573:ad23fe03a082 857 }
mbed_official 573:ad23fe03a082 858 }
mbed_official 573:ad23fe03a082 859 }
mbed_official 573:ad23fe03a082 860 }
mbed_official 573:ad23fe03a082 861 }
mbed_official 573:ad23fe03a082 862
mbed_official 573:ad23fe03a082 863 /**
mbed_official 573:ad23fe03a082 864 * @}
mbed_official 573:ad23fe03a082 865 */
mbed_official 573:ad23fe03a082 866
mbed_official 573:ad23fe03a082 867 /** @addtogroup DMA_Exported_Functions_Group3
mbed_official 573:ad23fe03a082 868 *
mbed_official 573:ad23fe03a082 869 @verbatim
mbed_official 573:ad23fe03a082 870 ===============================================================================
mbed_official 573:ad23fe03a082 871 ##### State and Errors functions #####
mbed_official 573:ad23fe03a082 872 ===============================================================================
mbed_official 573:ad23fe03a082 873 [..]
mbed_official 573:ad23fe03a082 874 This subsection provides functions allowing to
mbed_official 573:ad23fe03a082 875 (+) Check the DMA state
mbed_official 573:ad23fe03a082 876 (+) Get error code
mbed_official 573:ad23fe03a082 877
mbed_official 573:ad23fe03a082 878 @endverbatim
mbed_official 573:ad23fe03a082 879 * @{
mbed_official 573:ad23fe03a082 880 */
mbed_official 573:ad23fe03a082 881
mbed_official 573:ad23fe03a082 882 /**
mbed_official 573:ad23fe03a082 883 * @brief Returns the DMA state.
mbed_official 573:ad23fe03a082 884 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 885 * the configuration information for the specified DMA Stream.
mbed_official 573:ad23fe03a082 886 * @retval HAL state
mbed_official 573:ad23fe03a082 887 */
mbed_official 573:ad23fe03a082 888 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 889 {
mbed_official 573:ad23fe03a082 890 return hdma->State;
mbed_official 573:ad23fe03a082 891 }
mbed_official 573:ad23fe03a082 892
mbed_official 573:ad23fe03a082 893 /**
mbed_official 573:ad23fe03a082 894 * @brief Return the DMA error code
mbed_official 573:ad23fe03a082 895 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
mbed_official 573:ad23fe03a082 896 * the configuration information for the specified DMA Stream.
mbed_official 573:ad23fe03a082 897 * @retval DMA Error Code
mbed_official 573:ad23fe03a082 898 */
mbed_official 573:ad23fe03a082 899 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
mbed_official 573:ad23fe03a082 900 {
mbed_official 573:ad23fe03a082 901 return hdma->ErrorCode;
mbed_official 573:ad23fe03a082 902 }
mbed_official 573:ad23fe03a082 903
mbed_official 573:ad23fe03a082 904 /**
mbed_official 573:ad23fe03a082 905 * @}
mbed_official 573:ad23fe03a082 906 */
mbed_official 573:ad23fe03a082 907
mbed_official 573:ad23fe03a082 908 /**
mbed_official 573:ad23fe03a082 909 * @}
mbed_official 573:ad23fe03a082 910 */
mbed_official 573:ad23fe03a082 911
mbed_official 573:ad23fe03a082 912 #endif /* HAL_DMA_MODULE_ENABLED */
mbed_official 573:ad23fe03a082 913 /**
mbed_official 573:ad23fe03a082 914 * @}
mbed_official 573:ad23fe03a082 915 */
mbed_official 573:ad23fe03a082 916
mbed_official 573:ad23fe03a082 917 /**
mbed_official 573:ad23fe03a082 918 * @}
mbed_official 573:ad23fe03a082 919 */
mbed_official 573:ad23fe03a082 920
mbed_official 573:ad23fe03a082 921 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/