mbed official / mbed-src

mbed library sources

Dependents:   Encrypted my_mbed lklk CyaSSL_DTLS_Cellular ... more

Superseded

This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

Import librarymbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_i2s.c@579:53297373a894, 2015-07-01 (annotated)

Committer:
mbed_official
Date:
Wed Jul 01 09:45:11 2015 +0100
Revision:
579:53297373a894
Parent:
441:d2c15dda23c1
Child:
630:825f75ca301e
Synchronized with git revision d5b4d2ab9c47edb4dc5776e7177b0c2263459081



Full URL: https://github.com/mbedmicro/mbed/commit/d5b4d2ab9c47edb4dc5776e7177b0c2263459081/



Initial version of drivers for SAMR21

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 340:28d1f895c6fe 1 /**
mbed_official 340:28d1f895c6fe 2 ******************************************************************************
mbed_official 340:28d1f895c6fe 3 * @file stm32f0xx_hal_i2s.c
mbed_official 340:28d1f895c6fe 4 * @author MCD Application Team
mbed_official 441:d2c15dda23c1 5 * @version V1.2.0
mbed_official 441:d2c15dda23c1 6 * @date 11-December-2014
mbed_official 340:28d1f895c6fe 7 * @brief I2S HAL module driver.
mbed_official 340:28d1f895c6fe 8 * This file provides firmware functions to manage the following
mbed_official 340:28d1f895c6fe 9 * functionalities of the Integrated Interchip Sound (I2S) peripheral:
mbed_official 340:28d1f895c6fe 10 * + Initialization and de-initialization functions
mbed_official 340:28d1f895c6fe 11 * + IO operation functions
mbed_official 340:28d1f895c6fe 12 * + Peripheral State and Errors functions
mbed_official 340:28d1f895c6fe 13 @verbatim
mbed_official 340:28d1f895c6fe 14 ===============================================================================
mbed_official 340:28d1f895c6fe 15 ##### How to use this driver #####
mbed_official 340:28d1f895c6fe 16 ===============================================================================
mbed_official 340:28d1f895c6fe 17 [..]
mbed_official 340:28d1f895c6fe 18 The I2S HAL driver can be used as follow:
mbed_official 340:28d1f895c6fe 19
mbed_official 340:28d1f895c6fe 20 (#) Declare a I2S_HandleTypeDef handle structure.
mbed_official 340:28d1f895c6fe 21 (#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API:
mbed_official 340:28d1f895c6fe 22 (##) Enable the SPIx interface clock.
mbed_official 340:28d1f895c6fe 23 (##) I2S pins configuration:
mbed_official 340:28d1f895c6fe 24 (+++) Enable the clock for the I2S GPIOs.
mbed_official 340:28d1f895c6fe 25 (+++) Configure these I2S pins as alternate function pull-up.
mbed_official 340:28d1f895c6fe 26 (##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT()
mbed_official 340:28d1f895c6fe 27 and HAL_I2S_Receive_IT() APIs).
mbed_official 340:28d1f895c6fe 28 (+++) Configure the I2Sx interrupt priority.
mbed_official 340:28d1f895c6fe 29 (+++) Enable the NVIC I2S IRQ handle.
mbed_official 340:28d1f895c6fe 30 (##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA()
mbed_official 340:28d1f895c6fe 31 and HAL_I2S_Receive_DMA() APIs:
mbed_official 340:28d1f895c6fe 32 (+++) Declare a DMA handle structure for the Tx/Rx Channel.
mbed_official 340:28d1f895c6fe 33 (+++) Enable the DMAx interface clock.
mbed_official 340:28d1f895c6fe 34 (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
mbed_official 340:28d1f895c6fe 35 (+++) Configure the DMA Tx/Rx Channel.
mbed_official 340:28d1f895c6fe 36 (+++) Associate the initilalized DMA handle to the I2S DMA Tx/Rx handle.
mbed_official 340:28d1f895c6fe 37 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
mbed_official 340:28d1f895c6fe 38 DMA Tx/Rx Channel.
mbed_official 340:28d1f895c6fe 39
mbed_official 340:28d1f895c6fe 40 (#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity
mbed_official 340:28d1f895c6fe 41 using HAL_I2S_Init() function.
mbed_official 340:28d1f895c6fe 42
mbed_official 340:28d1f895c6fe 43 -@- The specific I2S interrupts (Transmission complete interrupt,
mbed_official 340:28d1f895c6fe 44 RXNE interrupt and Error Interrupts) will be managed using the macros
mbed_official 340:28d1f895c6fe 45 __HAL_I2S_ENABLE_IT() and __HAL_I2S_DISABLE_IT() inside the transmit and receive process.
mbed_official 340:28d1f895c6fe 46 -@- Make sure that either:
mbed_official 340:28d1f895c6fe 47 (+@) External clock source is configured after setting correctly
mbed_official 340:28d1f895c6fe 48 the define constant EXTERNAL_CLOCK_VALUE in the stm32f0xx_hal_conf.h file.
mbed_official 340:28d1f895c6fe 49
mbed_official 340:28d1f895c6fe 50 (#) Three mode of operations are available within this driver :
mbed_official 340:28d1f895c6fe 51
mbed_official 340:28d1f895c6fe 52 *** Polling mode IO operation ***
mbed_official 340:28d1f895c6fe 53 =================================
mbed_official 340:28d1f895c6fe 54 [..]
mbed_official 340:28d1f895c6fe 55 (+) Send an amount of data in blocking mode using HAL_I2S_Transmit()
mbed_official 340:28d1f895c6fe 56 (+) Receive an amount of data in blocking mode using HAL_I2S_Receive()
mbed_official 340:28d1f895c6fe 57
mbed_official 340:28d1f895c6fe 58 *** Interrupt mode IO operation ***
mbed_official 340:28d1f895c6fe 59 ===================================
mbed_official 340:28d1f895c6fe 60 [..]
mbed_official 340:28d1f895c6fe 61 (+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT()
mbed_official 340:28d1f895c6fe 62 (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
mbed_official 340:28d1f895c6fe 63 add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
mbed_official 340:28d1f895c6fe 64 (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
mbed_official 340:28d1f895c6fe 65 add his own code by customization of function pointer HAL_I2S_TxCpltCallback
mbed_official 340:28d1f895c6fe 66 (+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT()
mbed_official 340:28d1f895c6fe 67 (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
mbed_official 340:28d1f895c6fe 68 add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
mbed_official 340:28d1f895c6fe 69 (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
mbed_official 340:28d1f895c6fe 70 add his own code by customization of function pointer HAL_I2S_RxCpltCallback
mbed_official 340:28d1f895c6fe 71 (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
mbed_official 340:28d1f895c6fe 72 add his own code by customization of function pointer HAL_I2S_ErrorCallback
mbed_official 340:28d1f895c6fe 73
mbed_official 340:28d1f895c6fe 74 *** DMA mode IO operation ***
mbed_official 340:28d1f895c6fe 75 ==============================
mbed_official 340:28d1f895c6fe 76 [..]
mbed_official 340:28d1f895c6fe 77 (+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA()
mbed_official 340:28d1f895c6fe 78 (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
mbed_official 340:28d1f895c6fe 79 add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
mbed_official 340:28d1f895c6fe 80 (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
mbed_official 340:28d1f895c6fe 81 add his own code by customization of function pointer HAL_I2S_TxCpltCallback
mbed_official 340:28d1f895c6fe 82 (+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA()
mbed_official 340:28d1f895c6fe 83 (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
mbed_official 340:28d1f895c6fe 84 add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
mbed_official 340:28d1f895c6fe 85 (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
mbed_official 340:28d1f895c6fe 86 add his own code by customization of function pointer HAL_I2S_RxCpltCallback
mbed_official 340:28d1f895c6fe 87 (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
mbed_official 340:28d1f895c6fe 88 add his own code by customization of function pointer HAL_I2S_ErrorCallback
mbed_official 340:28d1f895c6fe 89 (+) Pause the DMA Transfer using HAL_I2S_DMAPause()
mbed_official 340:28d1f895c6fe 90 (+) Resume the DMA Transfer using HAL_I2S_DMAResume()
mbed_official 340:28d1f895c6fe 91 (+) Stop the DMA Transfer using HAL_I2S_DMAStop()
mbed_official 340:28d1f895c6fe 92
mbed_official 340:28d1f895c6fe 93 *** I2S HAL driver macros list ***
mbed_official 340:28d1f895c6fe 94 =============================================
mbed_official 340:28d1f895c6fe 95 [..]
mbed_official 441:d2c15dda23c1 96 Below the list of most used macros in I2S HAL driver.
mbed_official 340:28d1f895c6fe 97
mbed_official 340:28d1f895c6fe 98 (+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode)
mbed_official 340:28d1f895c6fe 99 (+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode)
mbed_official 340:28d1f895c6fe 100 (+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts
mbed_official 340:28d1f895c6fe 101 (+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts
mbed_official 340:28d1f895c6fe 102 (+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not
mbed_official 340:28d1f895c6fe 103
mbed_official 340:28d1f895c6fe 104 [..]
mbed_official 340:28d1f895c6fe 105 (@) You can refer to the I2S HAL driver header file for more useful macros
mbed_official 340:28d1f895c6fe 106
mbed_official 340:28d1f895c6fe 107 @endverbatim
mbed_official 340:28d1f895c6fe 108 ******************************************************************************
mbed_official 340:28d1f895c6fe 109 * @attention
mbed_official 340:28d1f895c6fe 110 *
mbed_official 340:28d1f895c6fe 111 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 340:28d1f895c6fe 112 *
mbed_official 340:28d1f895c6fe 113 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 340:28d1f895c6fe 114 * are permitted provided that the following conditions are met:
mbed_official 340:28d1f895c6fe 115 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 340:28d1f895c6fe 116 * this list of conditions and the following disclaimer.
mbed_official 340:28d1f895c6fe 117 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 340:28d1f895c6fe 118 * this list of conditions and the following disclaimer in the documentation
mbed_official 340:28d1f895c6fe 119 * and/or other materials provided with the distribution.
mbed_official 340:28d1f895c6fe 120 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 340:28d1f895c6fe 121 * may be used to endorse or promote products derived from this software
mbed_official 340:28d1f895c6fe 122 * without specific prior written permission.
mbed_official 340:28d1f895c6fe 123 *
mbed_official 340:28d1f895c6fe 124 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 340:28d1f895c6fe 125 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 340:28d1f895c6fe 126 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 340:28d1f895c6fe 127 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 340:28d1f895c6fe 128 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 340:28d1f895c6fe 129 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 340:28d1f895c6fe 130 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 340:28d1f895c6fe 131 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 340:28d1f895c6fe 132 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 340:28d1f895c6fe 133 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 340:28d1f895c6fe 134 *
mbed_official 340:28d1f895c6fe 135 ******************************************************************************
mbed_official 340:28d1f895c6fe 136 */
mbed_official 340:28d1f895c6fe 137
mbed_official 340:28d1f895c6fe 138 /* Includes ------------------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 139 #include "stm32f0xx_hal.h"
mbed_official 340:28d1f895c6fe 140
mbed_official 441:d2c15dda23c1 141 #ifdef HAL_I2S_MODULE_ENABLED
mbed_official 441:d2c15dda23c1 142
mbed_official 441:d2c15dda23c1 143 #if defined(STM32F031x6) || defined(STM32F038xx) || \
mbed_official 441:d2c15dda23c1 144 defined(STM32F051x8) || defined(STM32F058xx) || \
mbed_official 441:d2c15dda23c1 145 defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
mbed_official 441:d2c15dda23c1 146 defined(STM32F042x6) || defined(STM32F048xx) || \
mbed_official 441:d2c15dda23c1 147 defined(STM32F091xC) || defined(STM32F098xx)
mbed_official 441:d2c15dda23c1 148
mbed_official 340:28d1f895c6fe 149 /** @addtogroup STM32F0xx_HAL_Driver
mbed_official 340:28d1f895c6fe 150 * @{
mbed_official 340:28d1f895c6fe 151 */
mbed_official 340:28d1f895c6fe 152
mbed_official 340:28d1f895c6fe 153 /** @defgroup I2S I2S HAL module driver
mbed_official 340:28d1f895c6fe 154 * @brief I2S HAL module driver
mbed_official 340:28d1f895c6fe 155 * @{
mbed_official 340:28d1f895c6fe 156 */
mbed_official 340:28d1f895c6fe 157
mbed_official 340:28d1f895c6fe 158 /* Private typedef -----------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 159 /* Private define ------------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 160 /* Private macro -------------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 161 /* Private variables ---------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 162 /* Private function prototypes -----------------------------------------------*/
mbed_official 441:d2c15dda23c1 163 /** @defgroup I2S_Private_Functions I2S Private Functions
mbed_official 441:d2c15dda23c1 164 * @{
mbed_official 441:d2c15dda23c1 165 */
mbed_official 340:28d1f895c6fe 166 static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
mbed_official 340:28d1f895c6fe 167 static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
mbed_official 340:28d1f895c6fe 168 static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
mbed_official 340:28d1f895c6fe 169 static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
mbed_official 340:28d1f895c6fe 170 static void I2S_DMAError(DMA_HandleTypeDef *hdma);
mbed_official 340:28d1f895c6fe 171 static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s);
mbed_official 340:28d1f895c6fe 172 static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s);
mbed_official 340:28d1f895c6fe 173 static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t State, uint32_t Timeout);
mbed_official 441:d2c15dda23c1 174 /**
mbed_official 441:d2c15dda23c1 175 * @}
mbed_official 441:d2c15dda23c1 176 */
mbed_official 340:28d1f895c6fe 177
mbed_official 441:d2c15dda23c1 178 /* Exported functions ---------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 179
mbed_official 340:28d1f895c6fe 180 /** @defgroup I2S_Exported_Functions I2S Exported Functions
mbed_official 340:28d1f895c6fe 181 * @{
mbed_official 340:28d1f895c6fe 182 */
mbed_official 340:28d1f895c6fe 183
mbed_official 340:28d1f895c6fe 184 /** @defgroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions
mbed_official 340:28d1f895c6fe 185 * @brief Initialization and Configuration functions
mbed_official 340:28d1f895c6fe 186 *
mbed_official 340:28d1f895c6fe 187 @verbatim
mbed_official 340:28d1f895c6fe 188 ===============================================================================
mbed_official 340:28d1f895c6fe 189 ##### Initialization and de-initialization functions #####
mbed_official 340:28d1f895c6fe 190 ===============================================================================
mbed_official 340:28d1f895c6fe 191 [..] This subsection provides a set of functions allowing to initialize and
mbed_official 340:28d1f895c6fe 192 de-initialiaze the I2Sx peripheral in simplex mode:
mbed_official 340:28d1f895c6fe 193
mbed_official 340:28d1f895c6fe 194 (+) User must Implement HAL_I2S_MspInit() function in which he configures
mbed_official 340:28d1f895c6fe 195 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
mbed_official 340:28d1f895c6fe 196
mbed_official 340:28d1f895c6fe 197 (+) Call the function HAL_I2S_Init() to configure the selected device with
mbed_official 340:28d1f895c6fe 198 the selected configuration:
mbed_official 340:28d1f895c6fe 199 (++) Mode
mbed_official 340:28d1f895c6fe 200 (++) Standard
mbed_official 340:28d1f895c6fe 201 (++) Data Format
mbed_official 340:28d1f895c6fe 202 (++) MCLK Output
mbed_official 340:28d1f895c6fe 203 (++) Audio frequency
mbed_official 340:28d1f895c6fe 204 (++) Polarity
mbed_official 340:28d1f895c6fe 205
mbed_official 340:28d1f895c6fe 206 (+) Call the function HAL_I2S_DeInit() to restore the default configuration
mbed_official 340:28d1f895c6fe 207 of the selected I2Sx periperal.
mbed_official 340:28d1f895c6fe 208 @endverbatim
mbed_official 340:28d1f895c6fe 209 * @{
mbed_official 340:28d1f895c6fe 210 */
mbed_official 340:28d1f895c6fe 211
mbed_official 340:28d1f895c6fe 212 /**
mbed_official 340:28d1f895c6fe 213 * @brief Initializes the I2S according to the specified parameters
mbed_official 340:28d1f895c6fe 214 * in the I2S_InitTypeDef and create the associated handle.
mbed_official 340:28d1f895c6fe 215 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 216 * the configuration information for I2S module
mbed_official 340:28d1f895c6fe 217 * @retval HAL status
mbed_official 340:28d1f895c6fe 218 */
mbed_official 340:28d1f895c6fe 219 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
mbed_official 340:28d1f895c6fe 220 {
mbed_official 340:28d1f895c6fe 221 uint32_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
mbed_official 340:28d1f895c6fe 222 uint32_t tmp = 0, i2sclk = 0;
mbed_official 340:28d1f895c6fe 223
mbed_official 340:28d1f895c6fe 224 /* Check the I2S handle allocation */
mbed_official 441:d2c15dda23c1 225 if(hi2s == NULL)
mbed_official 340:28d1f895c6fe 226 {
mbed_official 340:28d1f895c6fe 227 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 228 }
mbed_official 340:28d1f895c6fe 229
mbed_official 340:28d1f895c6fe 230 /* Check the I2S parameters */
mbed_official 340:28d1f895c6fe 231 assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
mbed_official 340:28d1f895c6fe 232 assert_param(IS_I2S_MODE(hi2s->Init.Mode));
mbed_official 340:28d1f895c6fe 233 assert_param(IS_I2S_STANDARD(hi2s->Init.Standard));
mbed_official 340:28d1f895c6fe 234 assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat));
mbed_official 340:28d1f895c6fe 235 assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput));
mbed_official 340:28d1f895c6fe 236 assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq));
mbed_official 340:28d1f895c6fe 237 assert_param(IS_I2S_CPOL(hi2s->Init.CPOL));
mbed_official 340:28d1f895c6fe 238
mbed_official 340:28d1f895c6fe 239 if(hi2s->State == HAL_I2S_STATE_RESET)
mbed_official 340:28d1f895c6fe 240 {
mbed_official 340:28d1f895c6fe 241 /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
mbed_official 340:28d1f895c6fe 242 HAL_I2S_MspInit(hi2s);
mbed_official 340:28d1f895c6fe 243 }
mbed_official 340:28d1f895c6fe 244
mbed_official 340:28d1f895c6fe 245 hi2s->State = HAL_I2S_STATE_BUSY;
mbed_official 340:28d1f895c6fe 246
mbed_official 340:28d1f895c6fe 247 /*----------------------- SPIx I2SCFGR & I2SPR Configuration ---------------*/
mbed_official 340:28d1f895c6fe 248 /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
mbed_official 340:28d1f895c6fe 249 hi2s->Instance->I2SCFGR &= (uint16_t)(~(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CKPOL | \
mbed_official 340:28d1f895c6fe 250 SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG | \
mbed_official 340:28d1f895c6fe 251 SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD));
mbed_official 340:28d1f895c6fe 252 hi2s->Instance->I2SPR = 0x0002;
mbed_official 340:28d1f895c6fe 253
mbed_official 340:28d1f895c6fe 254 /* Get the I2SCFGR register value */
mbed_official 340:28d1f895c6fe 255 tmpreg = hi2s->Instance->I2SCFGR;
mbed_official 340:28d1f895c6fe 256
mbed_official 340:28d1f895c6fe 257 /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
mbed_official 340:28d1f895c6fe 258 if(hi2s->Init.AudioFreq == I2S_AUDIOFREQ_DEFAULT)
mbed_official 340:28d1f895c6fe 259 {
mbed_official 340:28d1f895c6fe 260 i2sodd = (uint16_t)0;
mbed_official 340:28d1f895c6fe 261 i2sdiv = (uint16_t)2;
mbed_official 340:28d1f895c6fe 262 }
mbed_official 340:28d1f895c6fe 263 /* If the requested audio frequency is not the default, compute the prescaler */
mbed_official 340:28d1f895c6fe 264 else
mbed_official 340:28d1f895c6fe 265 {
mbed_official 340:28d1f895c6fe 266 /* Check the frame length (For the Prescaler computing) *******************/
mbed_official 340:28d1f895c6fe 267 if(hi2s->Init.DataFormat == I2S_DATAFORMAT_16B)
mbed_official 340:28d1f895c6fe 268 {
mbed_official 340:28d1f895c6fe 269 /* Packet length is 16 bits */
mbed_official 340:28d1f895c6fe 270 packetlength = 1;
mbed_official 340:28d1f895c6fe 271 }
mbed_official 340:28d1f895c6fe 272 else
mbed_official 340:28d1f895c6fe 273 {
mbed_official 340:28d1f895c6fe 274 /* Packet length is 32 bits */
mbed_official 340:28d1f895c6fe 275 packetlength = 2;
mbed_official 340:28d1f895c6fe 276 }
mbed_official 340:28d1f895c6fe 277
mbed_official 340:28d1f895c6fe 278 /* Get I2S source Clock frequency ****************************************/
mbed_official 340:28d1f895c6fe 279 i2sclk = HAL_RCC_GetSysClockFreq();
mbed_official 340:28d1f895c6fe 280
mbed_official 340:28d1f895c6fe 281 /* Compute the Real divider depending on the MCLK output state, with a floating point */
mbed_official 340:28d1f895c6fe 282 if(hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE)
mbed_official 340:28d1f895c6fe 283 {
mbed_official 340:28d1f895c6fe 284 /* MCLK output is enabled */
mbed_official 340:28d1f895c6fe 285 tmp = (uint32_t)(((((i2sclk / 256) * 10) / hi2s->Init.AudioFreq)) + 5);
mbed_official 340:28d1f895c6fe 286 }
mbed_official 340:28d1f895c6fe 287 else
mbed_official 340:28d1f895c6fe 288 {
mbed_official 340:28d1f895c6fe 289 /* MCLK output is disabled */
mbed_official 340:28d1f895c6fe 290 tmp = (uint32_t)(((((i2sclk / (32 * packetlength)) *10 ) / hi2s->Init.AudioFreq)) + 5);
mbed_official 340:28d1f895c6fe 291 }
mbed_official 340:28d1f895c6fe 292
mbed_official 340:28d1f895c6fe 293 /* Remove the flatting point */
mbed_official 340:28d1f895c6fe 294 tmp = tmp / 10;
mbed_official 340:28d1f895c6fe 295
mbed_official 340:28d1f895c6fe 296 /* Check the parity of the divider */
mbed_official 340:28d1f895c6fe 297 i2sodd = (uint32_t)(tmp & (uint32_t)1);
mbed_official 340:28d1f895c6fe 298
mbed_official 340:28d1f895c6fe 299 /* Compute the i2sdiv prescaler */
mbed_official 340:28d1f895c6fe 300 i2sdiv = (uint32_t)((tmp - i2sodd) / 2);
mbed_official 340:28d1f895c6fe 301
mbed_official 340:28d1f895c6fe 302 /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
mbed_official 340:28d1f895c6fe 303 i2sodd = (uint32_t) (i2sodd << 8);
mbed_official 340:28d1f895c6fe 304 }
mbed_official 340:28d1f895c6fe 305
mbed_official 340:28d1f895c6fe 306 /* Test if the divider is 1 or 0 or greater than 0xFF */
mbed_official 340:28d1f895c6fe 307 if((i2sdiv < 2) || (i2sdiv > 0xFF))
mbed_official 340:28d1f895c6fe 308 {
mbed_official 340:28d1f895c6fe 309 /* Set the default values */
mbed_official 340:28d1f895c6fe 310 i2sdiv = 2;
mbed_official 340:28d1f895c6fe 311 i2sodd = 0;
mbed_official 340:28d1f895c6fe 312 }
mbed_official 340:28d1f895c6fe 313
mbed_official 340:28d1f895c6fe 314 /* Write to SPIx I2SPR register the computed value */
mbed_official 340:28d1f895c6fe 315 hi2s->Instance->I2SPR = (uint32_t)((uint32_t)i2sdiv | (uint32_t)(i2sodd | (uint32_t)hi2s->Init.MCLKOutput));
mbed_official 340:28d1f895c6fe 316
mbed_official 340:28d1f895c6fe 317 /* Configure the I2S with the I2S_InitStruct values */
mbed_official 340:28d1f895c6fe 318 tmpreg |= (uint32_t)(SPI_I2SCFGR_I2SMOD | hi2s->Init.Mode | hi2s->Init.Standard | hi2s->Init.DataFormat | hi2s->Init.CPOL);
mbed_official 340:28d1f895c6fe 319
mbed_official 340:28d1f895c6fe 320 /* Write to SPIx I2SCFGR */
mbed_official 340:28d1f895c6fe 321 hi2s->Instance->I2SCFGR = tmpreg;
mbed_official 340:28d1f895c6fe 322
mbed_official 340:28d1f895c6fe 323 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official 340:28d1f895c6fe 324 hi2s->State= HAL_I2S_STATE_READY;
mbed_official 340:28d1f895c6fe 325
mbed_official 340:28d1f895c6fe 326 return HAL_OK;
mbed_official 340:28d1f895c6fe 327 }
mbed_official 340:28d1f895c6fe 328
mbed_official 340:28d1f895c6fe 329 /**
mbed_official 340:28d1f895c6fe 330 * @brief DeInitializes the I2S peripheral
mbed_official 340:28d1f895c6fe 331 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 332 * the configuration information for I2S module
mbed_official 340:28d1f895c6fe 333 * @retval HAL status
mbed_official 340:28d1f895c6fe 334 */
mbed_official 340:28d1f895c6fe 335 HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
mbed_official 340:28d1f895c6fe 336 {
mbed_official 340:28d1f895c6fe 337 /* Check the I2S handle allocation */
mbed_official 441:d2c15dda23c1 338 if(hi2s == NULL)
mbed_official 340:28d1f895c6fe 339 {
mbed_official 340:28d1f895c6fe 340 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 341 }
mbed_official 340:28d1f895c6fe 342
mbed_official 340:28d1f895c6fe 343 /* Check the parameters */
mbed_official 340:28d1f895c6fe 344 assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
mbed_official 340:28d1f895c6fe 345
mbed_official 340:28d1f895c6fe 346 hi2s->State = HAL_I2S_STATE_BUSY;
mbed_official 340:28d1f895c6fe 347
mbed_official 340:28d1f895c6fe 348 /* Disable the I2S Peripheral Clock */
mbed_official 340:28d1f895c6fe 349 __HAL_I2S_DISABLE(hi2s);
mbed_official 340:28d1f895c6fe 350
mbed_official 340:28d1f895c6fe 351 /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
mbed_official 340:28d1f895c6fe 352 HAL_I2S_MspDeInit(hi2s);
mbed_official 340:28d1f895c6fe 353
mbed_official 340:28d1f895c6fe 354 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official 340:28d1f895c6fe 355 hi2s->State = HAL_I2S_STATE_RESET;
mbed_official 340:28d1f895c6fe 356
mbed_official 340:28d1f895c6fe 357 /* Release Lock */
mbed_official 340:28d1f895c6fe 358 __HAL_UNLOCK(hi2s);
mbed_official 340:28d1f895c6fe 359
mbed_official 340:28d1f895c6fe 360 return HAL_OK;
mbed_official 340:28d1f895c6fe 361 }
mbed_official 340:28d1f895c6fe 362
mbed_official 340:28d1f895c6fe 363 /**
mbed_official 340:28d1f895c6fe 364 * @brief I2S MSP Init
mbed_official 340:28d1f895c6fe 365 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 366 * the configuration information for I2S module
mbed_official 340:28d1f895c6fe 367 * @retval None
mbed_official 340:28d1f895c6fe 368 */
mbed_official 340:28d1f895c6fe 369 __weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s)
mbed_official 340:28d1f895c6fe 370 {
mbed_official 340:28d1f895c6fe 371 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 372 the HAL_I2S_MspInit could be implemented in the user file
mbed_official 340:28d1f895c6fe 373 */
mbed_official 340:28d1f895c6fe 374 }
mbed_official 340:28d1f895c6fe 375
mbed_official 340:28d1f895c6fe 376 /**
mbed_official 340:28d1f895c6fe 377 * @brief I2S MSP DeInit
mbed_official 340:28d1f895c6fe 378 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 379 * the configuration information for I2S module
mbed_official 340:28d1f895c6fe 380 * @retval None
mbed_official 340:28d1f895c6fe 381 */
mbed_official 340:28d1f895c6fe 382 __weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s)
mbed_official 340:28d1f895c6fe 383 {
mbed_official 340:28d1f895c6fe 384 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 385 the HAL_I2S_MspDeInit could be implemented in the user file
mbed_official 340:28d1f895c6fe 386 */
mbed_official 340:28d1f895c6fe 387 }
mbed_official 340:28d1f895c6fe 388
mbed_official 340:28d1f895c6fe 389 /**
mbed_official 340:28d1f895c6fe 390 * @}
mbed_official 340:28d1f895c6fe 391 */
mbed_official 340:28d1f895c6fe 392
mbed_official 340:28d1f895c6fe 393 /** @defgroup I2S_Exported_Functions_Group2 IO operation functions
mbed_official 340:28d1f895c6fe 394 * @brief Data transfers functions
mbed_official 340:28d1f895c6fe 395 *
mbed_official 340:28d1f895c6fe 396 @verbatim
mbed_official 340:28d1f895c6fe 397 ===============================================================================
mbed_official 340:28d1f895c6fe 398 ##### IO operation functions #####
mbed_official 340:28d1f895c6fe 399 ===============================================================================
mbed_official 340:28d1f895c6fe 400 [..]
mbed_official 340:28d1f895c6fe 401 This subsection provides a set of functions allowing to manage the I2S data
mbed_official 340:28d1f895c6fe 402 transfers.
mbed_official 340:28d1f895c6fe 403
mbed_official 340:28d1f895c6fe 404 (#) There are two modes of transfer:
mbed_official 340:28d1f895c6fe 405 (++) Blocking mode : The communication is performed in the polling mode.
mbed_official 340:28d1f895c6fe 406 The status of all data processing is returned by the same function
mbed_official 340:28d1f895c6fe 407 after finishing transfer.
mbed_official 340:28d1f895c6fe 408 (++) No-Blocking mode : The communication is performed using Interrupts
mbed_official 340:28d1f895c6fe 409 or DMA. These functions return the status of the transfer startup.
mbed_official 340:28d1f895c6fe 410 The end of the data processing will be indicated through the
mbed_official 340:28d1f895c6fe 411 dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when
mbed_official 340:28d1f895c6fe 412 using DMA mode.
mbed_official 340:28d1f895c6fe 413
mbed_official 340:28d1f895c6fe 414 (#) Blocking mode functions are :
mbed_official 340:28d1f895c6fe 415 (++) HAL_I2S_Transmit()
mbed_official 340:28d1f895c6fe 416 (++) HAL_I2S_Receive()
mbed_official 340:28d1f895c6fe 417
mbed_official 340:28d1f895c6fe 418 (#) No-Blocking mode functions with Interrupt are :
mbed_official 340:28d1f895c6fe 419 (++) HAL_I2S_Transmit_IT()
mbed_official 340:28d1f895c6fe 420 (++) HAL_I2S_Receive_IT()
mbed_official 340:28d1f895c6fe 421
mbed_official 340:28d1f895c6fe 422 (#) No-Blocking mode functions with DMA are :
mbed_official 340:28d1f895c6fe 423 (++) HAL_I2S_Transmit_DMA()
mbed_official 340:28d1f895c6fe 424 (++) HAL_I2S_Receive_DMA()
mbed_official 340:28d1f895c6fe 425
mbed_official 340:28d1f895c6fe 426 (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
mbed_official 340:28d1f895c6fe 427 (++) HAL_I2S_TxCpltCallback()
mbed_official 340:28d1f895c6fe 428 (++) HAL_I2S_RxCpltCallback()
mbed_official 340:28d1f895c6fe 429 (++) HAL_I2S_ErrorCallback()
mbed_official 340:28d1f895c6fe 430
mbed_official 340:28d1f895c6fe 431 @endverbatim
mbed_official 340:28d1f895c6fe 432 * @{
mbed_official 340:28d1f895c6fe 433 */
mbed_official 340:28d1f895c6fe 434
mbed_official 340:28d1f895c6fe 435 /**
mbed_official 340:28d1f895c6fe 436 * @brief Transmit an amount of data in blocking mode
mbed_official 340:28d1f895c6fe 437 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 438 * the configuration information for I2S module
mbed_official 340:28d1f895c6fe 439 * @param pData: a 16-bit pointer to data buffer.
mbed_official 340:28d1f895c6fe 440 * @param Size: number of data sample to be sent:
mbed_official 340:28d1f895c6fe 441 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
mbed_official 340:28d1f895c6fe 442 * configuration phase, the Size parameter means the number of 16-bit data length
mbed_official 340:28d1f895c6fe 443 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
mbed_official 340:28d1f895c6fe 444 * the Size parameter means the number of 16-bit data length.
mbed_official 340:28d1f895c6fe 445 * @param Timeout: Timeout duration
mbed_official 340:28d1f895c6fe 446 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
mbed_official 340:28d1f895c6fe 447 * between Master and Slave(example: audio streaming).
mbed_official 340:28d1f895c6fe 448 * @retval HAL status
mbed_official 340:28d1f895c6fe 449 */
mbed_official 340:28d1f895c6fe 450 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
mbed_official 340:28d1f895c6fe 451 {
mbed_official 441:d2c15dda23c1 452 if((pData == NULL ) || (Size == 0))
mbed_official 340:28d1f895c6fe 453 {
mbed_official 340:28d1f895c6fe 454 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 455 }
mbed_official 340:28d1f895c6fe 456
mbed_official 340:28d1f895c6fe 457 /* Process Locked */
mbed_official 340:28d1f895c6fe 458 __HAL_LOCK(hi2s);
mbed_official 340:28d1f895c6fe 459
mbed_official 340:28d1f895c6fe 460 if(hi2s->State == HAL_I2S_STATE_READY)
mbed_official 340:28d1f895c6fe 461 {
mbed_official 340:28d1f895c6fe 462 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
mbed_official 340:28d1f895c6fe 463 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
mbed_official 340:28d1f895c6fe 464 {
mbed_official 340:28d1f895c6fe 465 hi2s->TxXferSize = (Size << 1);
mbed_official 340:28d1f895c6fe 466 hi2s->TxXferCount = (Size << 1);
mbed_official 340:28d1f895c6fe 467 }
mbed_official 340:28d1f895c6fe 468 else
mbed_official 340:28d1f895c6fe 469 {
mbed_official 340:28d1f895c6fe 470 hi2s->TxXferSize = Size;
mbed_official 340:28d1f895c6fe 471 hi2s->TxXferCount = Size;
mbed_official 340:28d1f895c6fe 472 }
mbed_official 340:28d1f895c6fe 473
mbed_official 340:28d1f895c6fe 474 /* Set state and reset error code */
mbed_official 340:28d1f895c6fe 475 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official 340:28d1f895c6fe 476 hi2s->State = HAL_I2S_STATE_BUSY_TX;
mbed_official 340:28d1f895c6fe 477 hi2s->pTxBuffPtr = pData;
mbed_official 340:28d1f895c6fe 478
mbed_official 340:28d1f895c6fe 479 /* Check if the I2S is already enabled */
mbed_official 340:28d1f895c6fe 480 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official 340:28d1f895c6fe 481 {
mbed_official 340:28d1f895c6fe 482 /* Enable I2S peripheral */
mbed_official 340:28d1f895c6fe 483 __HAL_I2S_ENABLE(hi2s);
mbed_official 340:28d1f895c6fe 484 }
mbed_official 340:28d1f895c6fe 485
mbed_official 340:28d1f895c6fe 486 while(hi2s->TxXferCount > 0)
mbed_official 340:28d1f895c6fe 487 {
mbed_official 340:28d1f895c6fe 488 /* Wait until TXE flag is set */
mbed_official 340:28d1f895c6fe 489 if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 490 {
mbed_official 340:28d1f895c6fe 491 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 492 }
mbed_official 340:28d1f895c6fe 493 hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
mbed_official 340:28d1f895c6fe 494 hi2s->TxXferCount--;
mbed_official 340:28d1f895c6fe 495 }
mbed_official 340:28d1f895c6fe 496
mbed_official 340:28d1f895c6fe 497 /* Wait until TXE flag is set, to confirm the end of the transcation */
mbed_official 340:28d1f895c6fe 498 if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 499 {
mbed_official 340:28d1f895c6fe 500 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 501 }
mbed_official 340:28d1f895c6fe 502 /* Wait until Busy flag is reset */
mbed_official 340:28d1f895c6fe 503 if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_BSY, SET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 504 {
mbed_official 340:28d1f895c6fe 505 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 506 }
mbed_official 340:28d1f895c6fe 507
mbed_official 340:28d1f895c6fe 508 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 340:28d1f895c6fe 509
mbed_official 340:28d1f895c6fe 510 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 511 __HAL_UNLOCK(hi2s);
mbed_official 340:28d1f895c6fe 512
mbed_official 340:28d1f895c6fe 513 return HAL_OK;
mbed_official 340:28d1f895c6fe 514 }
mbed_official 340:28d1f895c6fe 515 else
mbed_official 340:28d1f895c6fe 516 {
mbed_official 340:28d1f895c6fe 517 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 518 __HAL_UNLOCK(hi2s);
mbed_official 340:28d1f895c6fe 519 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 520 }
mbed_official 340:28d1f895c6fe 521 }
mbed_official 340:28d1f895c6fe 522
mbed_official 340:28d1f895c6fe 523 /**
mbed_official 340:28d1f895c6fe 524 * @brief Receive an amount of data in blocking mode
mbed_official 340:28d1f895c6fe 525 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 526 * the configuration information for I2S module
mbed_official 340:28d1f895c6fe 527 * @param pData: a 16-bit pointer to data buffer.
mbed_official 340:28d1f895c6fe 528 * @param Size: number of data sample to be sent:
mbed_official 340:28d1f895c6fe 529 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
mbed_official 340:28d1f895c6fe 530 * configuration phase, the Size parameter means the number of 16-bit data length
mbed_official 340:28d1f895c6fe 531 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
mbed_official 340:28d1f895c6fe 532 * the Size parameter means the number of 16-bit data length.
mbed_official 340:28d1f895c6fe 533 * @param Timeout: Timeout duration
mbed_official 340:28d1f895c6fe 534 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
mbed_official 340:28d1f895c6fe 535 * between Master and Slave(example: audio streaming).
mbed_official 340:28d1f895c6fe 536 * @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate
mbed_official 340:28d1f895c6fe 537 * in continouse way and as the I2S is not disabled at the end of the I2S transaction.
mbed_official 340:28d1f895c6fe 538 * @retval HAL status
mbed_official 340:28d1f895c6fe 539 */
mbed_official 340:28d1f895c6fe 540 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
mbed_official 340:28d1f895c6fe 541 {
mbed_official 441:d2c15dda23c1 542 if((pData == NULL ) || (Size == 0))
mbed_official 340:28d1f895c6fe 543 {
mbed_official 340:28d1f895c6fe 544 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 545 }
mbed_official 340:28d1f895c6fe 546
mbed_official 340:28d1f895c6fe 547 /* Process Locked */
mbed_official 340:28d1f895c6fe 548 __HAL_LOCK(hi2s);
mbed_official 340:28d1f895c6fe 549
mbed_official 340:28d1f895c6fe 550 if(hi2s->State == HAL_I2S_STATE_READY)
mbed_official 340:28d1f895c6fe 551 {
mbed_official 340:28d1f895c6fe 552 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
mbed_official 340:28d1f895c6fe 553 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
mbed_official 340:28d1f895c6fe 554 {
mbed_official 340:28d1f895c6fe 555 hi2s->RxXferSize = (Size << 1);
mbed_official 340:28d1f895c6fe 556 hi2s->RxXferCount = (Size << 1);
mbed_official 340:28d1f895c6fe 557 }
mbed_official 340:28d1f895c6fe 558 else
mbed_official 340:28d1f895c6fe 559 {
mbed_official 340:28d1f895c6fe 560 hi2s->RxXferSize = Size;
mbed_official 340:28d1f895c6fe 561 hi2s->RxXferCount = Size;
mbed_official 340:28d1f895c6fe 562 }
mbed_official 340:28d1f895c6fe 563
mbed_official 340:28d1f895c6fe 564 /* Set state and reset error code */
mbed_official 340:28d1f895c6fe 565 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official 340:28d1f895c6fe 566 hi2s->State = HAL_I2S_STATE_BUSY_RX;
mbed_official 340:28d1f895c6fe 567 hi2s->pRxBuffPtr = pData;
mbed_official 340:28d1f895c6fe 568
mbed_official 340:28d1f895c6fe 569 /* Check if the I2S is already enabled */
mbed_official 340:28d1f895c6fe 570 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official 340:28d1f895c6fe 571 {
mbed_official 340:28d1f895c6fe 572 /* Enable I2S peripheral */
mbed_official 340:28d1f895c6fe 573 __HAL_I2S_ENABLE(hi2s);
mbed_official 340:28d1f895c6fe 574 }
mbed_official 340:28d1f895c6fe 575
mbed_official 340:28d1f895c6fe 576 /* Receive data */
mbed_official 340:28d1f895c6fe 577 while(hi2s->RxXferCount > 0)
mbed_official 340:28d1f895c6fe 578 {
mbed_official 340:28d1f895c6fe 579 /* Wait until RXNE flag is set */
mbed_official 340:28d1f895c6fe 580 if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official 340:28d1f895c6fe 581 {
mbed_official 340:28d1f895c6fe 582 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 583 }
mbed_official 340:28d1f895c6fe 584
mbed_official 340:28d1f895c6fe 585 (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
mbed_official 340:28d1f895c6fe 586 hi2s->RxXferCount--;
mbed_official 340:28d1f895c6fe 587 }
mbed_official 340:28d1f895c6fe 588
mbed_official 340:28d1f895c6fe 589 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 340:28d1f895c6fe 590
mbed_official 340:28d1f895c6fe 591 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 592 __HAL_UNLOCK(hi2s);
mbed_official 340:28d1f895c6fe 593
mbed_official 340:28d1f895c6fe 594 return HAL_OK;
mbed_official 340:28d1f895c6fe 595 }
mbed_official 340:28d1f895c6fe 596 else
mbed_official 340:28d1f895c6fe 597 {
mbed_official 340:28d1f895c6fe 598 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 599 __HAL_UNLOCK(hi2s);
mbed_official 340:28d1f895c6fe 600 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 601 }
mbed_official 340:28d1f895c6fe 602 }
mbed_official 340:28d1f895c6fe 603
mbed_official 340:28d1f895c6fe 604 /**
mbed_official 340:28d1f895c6fe 605 * @brief Transmit an amount of data in non-blocking mode with Interrupt
mbed_official 340:28d1f895c6fe 606 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 607 * the configuration information for I2S module
mbed_official 340:28d1f895c6fe 608 * @param pData: a 16-bit pointer to data buffer.
mbed_official 340:28d1f895c6fe 609 * @param Size: number of data sample to be sent:
mbed_official 340:28d1f895c6fe 610 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
mbed_official 340:28d1f895c6fe 611 * configuration phase, the Size parameter means the number of 16-bit data length
mbed_official 340:28d1f895c6fe 612 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
mbed_official 340:28d1f895c6fe 613 * the Size parameter means the number of 16-bit data length.
mbed_official 340:28d1f895c6fe 614 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
mbed_official 340:28d1f895c6fe 615 * between Master and Slave(example: audio streaming).
mbed_official 340:28d1f895c6fe 616 * @retval HAL status
mbed_official 340:28d1f895c6fe 617 */
mbed_official 340:28d1f895c6fe 618 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
mbed_official 340:28d1f895c6fe 619 {
mbed_official 441:d2c15dda23c1 620 if((pData == NULL) || (Size == 0))
mbed_official 340:28d1f895c6fe 621 {
mbed_official 340:28d1f895c6fe 622 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 623 }
mbed_official 340:28d1f895c6fe 624
mbed_official 340:28d1f895c6fe 625 /* Process Locked */
mbed_official 340:28d1f895c6fe 626 __HAL_LOCK(hi2s);
mbed_official 340:28d1f895c6fe 627
mbed_official 340:28d1f895c6fe 628 if(hi2s->State == HAL_I2S_STATE_READY)
mbed_official 340:28d1f895c6fe 629 {
mbed_official 340:28d1f895c6fe 630 hi2s->pTxBuffPtr = pData;
mbed_official 340:28d1f895c6fe 631 hi2s->State = HAL_I2S_STATE_BUSY_TX;
mbed_official 340:28d1f895c6fe 632 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official 340:28d1f895c6fe 633
mbed_official 340:28d1f895c6fe 634 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
mbed_official 340:28d1f895c6fe 635 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
mbed_official 340:28d1f895c6fe 636 {
mbed_official 340:28d1f895c6fe 637 hi2s->TxXferSize = (Size << 1);
mbed_official 340:28d1f895c6fe 638 hi2s->TxXferCount = (Size << 1);
mbed_official 340:28d1f895c6fe 639 }
mbed_official 340:28d1f895c6fe 640 else
mbed_official 340:28d1f895c6fe 641 {
mbed_official 340:28d1f895c6fe 642 hi2s->TxXferSize = Size;
mbed_official 340:28d1f895c6fe 643 hi2s->TxXferCount = Size;
mbed_official 340:28d1f895c6fe 644 }
mbed_official 340:28d1f895c6fe 645
mbed_official 340:28d1f895c6fe 646 /* Enable TXE and ERR interrupt */
mbed_official 340:28d1f895c6fe 647 __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
mbed_official 340:28d1f895c6fe 648
mbed_official 340:28d1f895c6fe 649 /* Check if the I2S is already enabled */
mbed_official 340:28d1f895c6fe 650 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official 340:28d1f895c6fe 651 {
mbed_official 340:28d1f895c6fe 652 /* Enable I2S peripheral */
mbed_official 340:28d1f895c6fe 653 __HAL_I2S_ENABLE(hi2s);
mbed_official 340:28d1f895c6fe 654 }
mbed_official 340:28d1f895c6fe 655
mbed_official 340:28d1f895c6fe 656 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 657 __HAL_UNLOCK(hi2s);
mbed_official 340:28d1f895c6fe 658
mbed_official 340:28d1f895c6fe 659 return HAL_OK;
mbed_official 340:28d1f895c6fe 660 }
mbed_official 340:28d1f895c6fe 661 else
mbed_official 340:28d1f895c6fe 662 {
mbed_official 340:28d1f895c6fe 663 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 664 __HAL_UNLOCK(hi2s);
mbed_official 340:28d1f895c6fe 665 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 666 }
mbed_official 340:28d1f895c6fe 667 }
mbed_official 340:28d1f895c6fe 668
mbed_official 340:28d1f895c6fe 669 /**
mbed_official 340:28d1f895c6fe 670 * @brief Receive an amount of data in non-blocking mode with Interrupt
mbed_official 340:28d1f895c6fe 671 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 672 * the configuration information for I2S module
mbed_official 340:28d1f895c6fe 673 * @param pData: a 16-bit pointer to the Receive data buffer.
mbed_official 340:28d1f895c6fe 674 * @param Size: number of data sample to be sent:
mbed_official 340:28d1f895c6fe 675 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
mbed_official 340:28d1f895c6fe 676 * configuration phase, the Size parameter means the number of 16-bit data length
mbed_official 340:28d1f895c6fe 677 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
mbed_official 340:28d1f895c6fe 678 * the Size parameter means the number of 16-bit data length.
mbed_official 340:28d1f895c6fe 679 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
mbed_official 340:28d1f895c6fe 680 * between Master and Slave(example: audio streaming).
mbed_official 340:28d1f895c6fe 681 * @note It is recommended to use DMA for the I2S receiver to avoid de-synchronisation
mbed_official 340:28d1f895c6fe 682 * between Master and Slave otherwise the I2S interrupt should be optimized.
mbed_official 340:28d1f895c6fe 683 * @retval HAL status
mbed_official 340:28d1f895c6fe 684 */
mbed_official 340:28d1f895c6fe 685 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
mbed_official 340:28d1f895c6fe 686 {
mbed_official 441:d2c15dda23c1 687 if((pData == NULL) || (Size == 0))
mbed_official 340:28d1f895c6fe 688 {
mbed_official 340:28d1f895c6fe 689 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 690 }
mbed_official 340:28d1f895c6fe 691
mbed_official 340:28d1f895c6fe 692 /* Process Locked */
mbed_official 340:28d1f895c6fe 693 __HAL_LOCK(hi2s);
mbed_official 340:28d1f895c6fe 694
mbed_official 340:28d1f895c6fe 695 if(hi2s->State == HAL_I2S_STATE_READY)
mbed_official 340:28d1f895c6fe 696 {
mbed_official 340:28d1f895c6fe 697 hi2s->pRxBuffPtr = pData;
mbed_official 340:28d1f895c6fe 698 hi2s->State = HAL_I2S_STATE_BUSY_RX;
mbed_official 340:28d1f895c6fe 699 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official 340:28d1f895c6fe 700
mbed_official 340:28d1f895c6fe 701 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
mbed_official 340:28d1f895c6fe 702 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
mbed_official 340:28d1f895c6fe 703 {
mbed_official 340:28d1f895c6fe 704 hi2s->RxXferSize = (Size << 1);
mbed_official 340:28d1f895c6fe 705 hi2s->RxXferCount = (Size << 1);
mbed_official 340:28d1f895c6fe 706 }
mbed_official 340:28d1f895c6fe 707 else
mbed_official 340:28d1f895c6fe 708 {
mbed_official 340:28d1f895c6fe 709 hi2s->RxXferSize = Size;
mbed_official 340:28d1f895c6fe 710 hi2s->RxXferCount = Size;
mbed_official 340:28d1f895c6fe 711 }
mbed_official 340:28d1f895c6fe 712
mbed_official 340:28d1f895c6fe 713 /* Enable TXE and ERR interrupt */
mbed_official 340:28d1f895c6fe 714 __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
mbed_official 340:28d1f895c6fe 715
mbed_official 340:28d1f895c6fe 716 /* Check if the I2S is already enabled */
mbed_official 340:28d1f895c6fe 717 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official 340:28d1f895c6fe 718 {
mbed_official 340:28d1f895c6fe 719 /* Enable I2S peripheral */
mbed_official 340:28d1f895c6fe 720 __HAL_I2S_ENABLE(hi2s);
mbed_official 340:28d1f895c6fe 721 }
mbed_official 340:28d1f895c6fe 722
mbed_official 340:28d1f895c6fe 723 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 724 __HAL_UNLOCK(hi2s);
mbed_official 340:28d1f895c6fe 725
mbed_official 340:28d1f895c6fe 726 return HAL_OK;
mbed_official 340:28d1f895c6fe 727 }
mbed_official 340:28d1f895c6fe 728 else
mbed_official 340:28d1f895c6fe 729 {
mbed_official 340:28d1f895c6fe 730 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 731 __HAL_UNLOCK(hi2s);
mbed_official 340:28d1f895c6fe 732 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 733 }
mbed_official 340:28d1f895c6fe 734 }
mbed_official 340:28d1f895c6fe 735
mbed_official 340:28d1f895c6fe 736 /**
mbed_official 340:28d1f895c6fe 737 * @brief Transmit an amount of data in non-blocking mode with DMA
mbed_official 340:28d1f895c6fe 738 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 739 * the configuration information for I2S module
mbed_official 340:28d1f895c6fe 740 * @param pData: a 16-bit pointer to the Transmit data buffer.
mbed_official 340:28d1f895c6fe 741 * @param Size: number of data sample to be sent:
mbed_official 340:28d1f895c6fe 742 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
mbed_official 340:28d1f895c6fe 743 * configuration phase, the Size parameter means the number of 16-bit data length
mbed_official 340:28d1f895c6fe 744 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
mbed_official 340:28d1f895c6fe 745 * the Size parameter means the number of 16-bit data length.
mbed_official 340:28d1f895c6fe 746 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
mbed_official 340:28d1f895c6fe 747 * between Master and Slave(example: audio streaming).
mbed_official 340:28d1f895c6fe 748 * @retval HAL status
mbed_official 340:28d1f895c6fe 749 */
mbed_official 340:28d1f895c6fe 750 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
mbed_official 340:28d1f895c6fe 751 {
mbed_official 441:d2c15dda23c1 752 if((pData == NULL) || (Size == 0))
mbed_official 340:28d1f895c6fe 753 {
mbed_official 340:28d1f895c6fe 754 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 755 }
mbed_official 340:28d1f895c6fe 756
mbed_official 340:28d1f895c6fe 757 /* Process Locked */
mbed_official 340:28d1f895c6fe 758 __HAL_LOCK(hi2s);
mbed_official 340:28d1f895c6fe 759
mbed_official 340:28d1f895c6fe 760 if(hi2s->State == HAL_I2S_STATE_READY)
mbed_official 340:28d1f895c6fe 761 {
mbed_official 340:28d1f895c6fe 762 hi2s->pTxBuffPtr = pData;
mbed_official 340:28d1f895c6fe 763 hi2s->State = HAL_I2S_STATE_BUSY_TX;
mbed_official 340:28d1f895c6fe 764 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official 340:28d1f895c6fe 765
mbed_official 340:28d1f895c6fe 766 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
mbed_official 340:28d1f895c6fe 767 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
mbed_official 340:28d1f895c6fe 768 {
mbed_official 340:28d1f895c6fe 769 hi2s->TxXferSize = (Size << 1);
mbed_official 340:28d1f895c6fe 770 hi2s->TxXferCount = (Size << 1);
mbed_official 340:28d1f895c6fe 771 }
mbed_official 340:28d1f895c6fe 772 else
mbed_official 340:28d1f895c6fe 773 {
mbed_official 340:28d1f895c6fe 774 hi2s->TxXferSize = Size;
mbed_official 340:28d1f895c6fe 775 hi2s->TxXferCount = Size;
mbed_official 340:28d1f895c6fe 776 }
mbed_official 340:28d1f895c6fe 777
mbed_official 340:28d1f895c6fe 778 /* Set the I2S Tx DMA Half transfert complete callback */
mbed_official 340:28d1f895c6fe 779 hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt;
mbed_official 340:28d1f895c6fe 780
mbed_official 340:28d1f895c6fe 781 /* Set the I2S Tx DMA transfert complete callback */
mbed_official 340:28d1f895c6fe 782 hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt;
mbed_official 340:28d1f895c6fe 783
mbed_official 340:28d1f895c6fe 784 /* Set the DMA error callback */
mbed_official 340:28d1f895c6fe 785 hi2s->hdmatx->XferErrorCallback = I2S_DMAError;
mbed_official 340:28d1f895c6fe 786
mbed_official 340:28d1f895c6fe 787 /* Enable the Tx DMA Channel */
mbed_official 340:28d1f895c6fe 788 HAL_DMA_Start_IT(hi2s->hdmatx, (uint32_t)hi2s->pTxBuffPtr, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize);
mbed_official 340:28d1f895c6fe 789
mbed_official 340:28d1f895c6fe 790 /* Check if the I2S is already enabled */
mbed_official 340:28d1f895c6fe 791 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official 340:28d1f895c6fe 792 {
mbed_official 340:28d1f895c6fe 793 /* Enable I2S peripheral */
mbed_official 340:28d1f895c6fe 794 __HAL_I2S_ENABLE(hi2s);
mbed_official 340:28d1f895c6fe 795 }
mbed_official 340:28d1f895c6fe 796
mbed_official 340:28d1f895c6fe 797 /* Check if the I2S Tx request is already enabled */
mbed_official 340:28d1f895c6fe 798 if((hi2s->Instance->CR2 & SPI_CR2_TXDMAEN) != SPI_CR2_TXDMAEN)
mbed_official 340:28d1f895c6fe 799 {
mbed_official 340:28d1f895c6fe 800 /* Enable Tx DMA Request */
mbed_official 340:28d1f895c6fe 801 hi2s->Instance->CR2 |= SPI_CR2_TXDMAEN;
mbed_official 340:28d1f895c6fe 802 }
mbed_official 340:28d1f895c6fe 803
mbed_official 340:28d1f895c6fe 804 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 805 __HAL_UNLOCK(hi2s);
mbed_official 340:28d1f895c6fe 806
mbed_official 340:28d1f895c6fe 807 return HAL_OK;
mbed_official 340:28d1f895c6fe 808 }
mbed_official 340:28d1f895c6fe 809 else
mbed_official 340:28d1f895c6fe 810 {
mbed_official 340:28d1f895c6fe 811 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 812 __HAL_UNLOCK(hi2s);
mbed_official 340:28d1f895c6fe 813 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 814 }
mbed_official 340:28d1f895c6fe 815 }
mbed_official 340:28d1f895c6fe 816
mbed_official 340:28d1f895c6fe 817 /**
mbed_official 340:28d1f895c6fe 818 * @brief Receive an amount of data in non-blocking mode with DMA
mbed_official 340:28d1f895c6fe 819 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 820 * the configuration information for I2S module
mbed_official 340:28d1f895c6fe 821 * @param pData: a 16-bit pointer to the Receive data buffer.
mbed_official 340:28d1f895c6fe 822 * @param Size: number of data sample to be sent:
mbed_official 340:28d1f895c6fe 823 * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
mbed_official 340:28d1f895c6fe 824 * configuration phase, the Size parameter means the number of 16-bit data length
mbed_official 340:28d1f895c6fe 825 * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
mbed_official 340:28d1f895c6fe 826 * the Size parameter means the number of 16-bit data length.
mbed_official 340:28d1f895c6fe 827 * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
mbed_official 340:28d1f895c6fe 828 * between Master and Slave(example: audio streaming).
mbed_official 340:28d1f895c6fe 829 * @retval HAL status
mbed_official 340:28d1f895c6fe 830 */
mbed_official 340:28d1f895c6fe 831 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
mbed_official 340:28d1f895c6fe 832 {
mbed_official 441:d2c15dda23c1 833 if((pData == NULL) || (Size == 0))
mbed_official 340:28d1f895c6fe 834 {
mbed_official 340:28d1f895c6fe 835 return HAL_ERROR;
mbed_official 340:28d1f895c6fe 836 }
mbed_official 340:28d1f895c6fe 837
mbed_official 340:28d1f895c6fe 838 /* Process Locked */
mbed_official 340:28d1f895c6fe 839 __HAL_LOCK(hi2s);
mbed_official 340:28d1f895c6fe 840
mbed_official 340:28d1f895c6fe 841 if(hi2s->State == HAL_I2S_STATE_READY)
mbed_official 340:28d1f895c6fe 842 {
mbed_official 340:28d1f895c6fe 843 hi2s->pRxBuffPtr = pData;
mbed_official 340:28d1f895c6fe 844 hi2s->State = HAL_I2S_STATE_BUSY_RX;
mbed_official 340:28d1f895c6fe 845 hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
mbed_official 340:28d1f895c6fe 846
mbed_official 340:28d1f895c6fe 847 if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
mbed_official 340:28d1f895c6fe 848 ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
mbed_official 340:28d1f895c6fe 849 {
mbed_official 340:28d1f895c6fe 850 hi2s->RxXferSize = (Size << 1);
mbed_official 340:28d1f895c6fe 851 hi2s->RxXferCount = (Size << 1);
mbed_official 340:28d1f895c6fe 852 }
mbed_official 340:28d1f895c6fe 853 else
mbed_official 340:28d1f895c6fe 854 {
mbed_official 340:28d1f895c6fe 855 hi2s->RxXferSize = Size;
mbed_official 340:28d1f895c6fe 856 hi2s->RxXferCount = Size;
mbed_official 340:28d1f895c6fe 857 }
mbed_official 340:28d1f895c6fe 858
mbed_official 340:28d1f895c6fe 859
mbed_official 340:28d1f895c6fe 860 /* Set the I2S Rx DMA Half transfert complete callback */
mbed_official 340:28d1f895c6fe 861 hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt;
mbed_official 340:28d1f895c6fe 862
mbed_official 340:28d1f895c6fe 863 /* Set the I2S Rx DMA transfert complete callback */
mbed_official 340:28d1f895c6fe 864 hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt;
mbed_official 340:28d1f895c6fe 865
mbed_official 340:28d1f895c6fe 866 /* Set the DMA error callback */
mbed_official 340:28d1f895c6fe 867 hi2s->hdmarx->XferErrorCallback = I2S_DMAError;
mbed_official 340:28d1f895c6fe 868
mbed_official 340:28d1f895c6fe 869 /* Check if Master Receiver mode is selected */
mbed_official 340:28d1f895c6fe 870 if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
mbed_official 340:28d1f895c6fe 871 {
mbed_official 340:28d1f895c6fe 872 /* Clear the Overrun Flag by a read operation to the SPI_DR register followed by a read
mbed_official 340:28d1f895c6fe 873 access to the SPI_SR register. */
mbed_official 340:28d1f895c6fe 874 __HAL_I2S_CLEAR_OVRFLAG(hi2s);
mbed_official 340:28d1f895c6fe 875 }
mbed_official 340:28d1f895c6fe 876
mbed_official 340:28d1f895c6fe 877 /* Enable the Rx DMA Channel */
mbed_official 340:28d1f895c6fe 878 HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, (uint32_t)hi2s->pRxBuffPtr, hi2s->RxXferSize);
mbed_official 340:28d1f895c6fe 879
mbed_official 340:28d1f895c6fe 880 /* Check if the I2S is already enabled */
mbed_official 340:28d1f895c6fe 881 if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
mbed_official 340:28d1f895c6fe 882 {
mbed_official 340:28d1f895c6fe 883 /* Enable I2S peripheral */
mbed_official 340:28d1f895c6fe 884 __HAL_I2S_ENABLE(hi2s);
mbed_official 340:28d1f895c6fe 885 }
mbed_official 340:28d1f895c6fe 886
mbed_official 340:28d1f895c6fe 887 /* Check if the I2S Rx request is already enabled */
mbed_official 340:28d1f895c6fe 888 if((hi2s->Instance->CR2 &SPI_CR2_RXDMAEN) != SPI_CR2_RXDMAEN)
mbed_official 340:28d1f895c6fe 889 {
mbed_official 340:28d1f895c6fe 890 /* Enable Rx DMA Request */
mbed_official 340:28d1f895c6fe 891 hi2s->Instance->CR2 |= SPI_CR2_RXDMAEN;
mbed_official 340:28d1f895c6fe 892 }
mbed_official 340:28d1f895c6fe 893
mbed_official 340:28d1f895c6fe 894 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 895 __HAL_UNLOCK(hi2s);
mbed_official 340:28d1f895c6fe 896
mbed_official 340:28d1f895c6fe 897 return HAL_OK;
mbed_official 340:28d1f895c6fe 898 }
mbed_official 340:28d1f895c6fe 899 else
mbed_official 340:28d1f895c6fe 900 {
mbed_official 340:28d1f895c6fe 901 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 902 __HAL_UNLOCK(hi2s);
mbed_official 340:28d1f895c6fe 903 return HAL_BUSY;
mbed_official 340:28d1f895c6fe 904 }
mbed_official 340:28d1f895c6fe 905 }
mbed_official 340:28d1f895c6fe 906
mbed_official 340:28d1f895c6fe 907 /**
mbed_official 340:28d1f895c6fe 908 * @brief Pauses the audio stream playing from the Media.
mbed_official 340:28d1f895c6fe 909 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 910 * the configuration information for I2S module
mbed_official 340:28d1f895c6fe 911 * @retval HAL status
mbed_official 340:28d1f895c6fe 912 */
mbed_official 340:28d1f895c6fe 913 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s)
mbed_official 340:28d1f895c6fe 914 {
mbed_official 340:28d1f895c6fe 915 /* Process Locked */
mbed_official 340:28d1f895c6fe 916 __HAL_LOCK(hi2s);
mbed_official 340:28d1f895c6fe 917
mbed_official 340:28d1f895c6fe 918 if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
mbed_official 340:28d1f895c6fe 919 {
mbed_official 340:28d1f895c6fe 920 /* Disable the I2S DMA Tx request */
mbed_official 340:28d1f895c6fe 921 hi2s->Instance->CR2 &= (uint16_t)(~SPI_CR2_TXDMAEN);
mbed_official 340:28d1f895c6fe 922 }
mbed_official 340:28d1f895c6fe 923 else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
mbed_official 340:28d1f895c6fe 924 {
mbed_official 340:28d1f895c6fe 925 /* Disable the I2S DMA Rx request */
mbed_official 340:28d1f895c6fe 926 hi2s->Instance->CR2 &= (uint16_t)(~SPI_CR2_RXDMAEN);
mbed_official 340:28d1f895c6fe 927 }
mbed_official 340:28d1f895c6fe 928
mbed_official 340:28d1f895c6fe 929 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 930 __HAL_UNLOCK(hi2s);
mbed_official 340:28d1f895c6fe 931
mbed_official 340:28d1f895c6fe 932 return HAL_OK;
mbed_official 340:28d1f895c6fe 933 }
mbed_official 340:28d1f895c6fe 934
mbed_official 340:28d1f895c6fe 935 /**
mbed_official 340:28d1f895c6fe 936 * @brief Resumes the audio stream playing from the Media.
mbed_official 340:28d1f895c6fe 937 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 938 * the configuration information for I2S module
mbed_official 340:28d1f895c6fe 939 * @retval HAL status
mbed_official 340:28d1f895c6fe 940 */
mbed_official 340:28d1f895c6fe 941 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s)
mbed_official 340:28d1f895c6fe 942 {
mbed_official 340:28d1f895c6fe 943 /* Process Locked */
mbed_official 340:28d1f895c6fe 944 __HAL_LOCK(hi2s);
mbed_official 340:28d1f895c6fe 945
mbed_official 340:28d1f895c6fe 946 if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
mbed_official 340:28d1f895c6fe 947 {
mbed_official 340:28d1f895c6fe 948 /* Enable the I2S DMA Tx request */
mbed_official 340:28d1f895c6fe 949 hi2s->Instance->CR2 |= SPI_CR2_TXDMAEN;
mbed_official 340:28d1f895c6fe 950 }
mbed_official 340:28d1f895c6fe 951 else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
mbed_official 340:28d1f895c6fe 952 {
mbed_official 340:28d1f895c6fe 953 /* Enable the I2S DMA Rx request */
mbed_official 340:28d1f895c6fe 954 hi2s->Instance->CR2 |= SPI_CR2_RXDMAEN;
mbed_official 340:28d1f895c6fe 955 }
mbed_official 340:28d1f895c6fe 956
mbed_official 340:28d1f895c6fe 957 /* If the I2S peripheral is still not enabled, enable it */
mbed_official 340:28d1f895c6fe 958 if ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) == 0)
mbed_official 340:28d1f895c6fe 959 {
mbed_official 340:28d1f895c6fe 960 /* Enable I2S peripheral */
mbed_official 340:28d1f895c6fe 961 __HAL_I2S_ENABLE(hi2s);
mbed_official 340:28d1f895c6fe 962 }
mbed_official 340:28d1f895c6fe 963
mbed_official 340:28d1f895c6fe 964 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 965 __HAL_UNLOCK(hi2s);
mbed_official 340:28d1f895c6fe 966
mbed_official 340:28d1f895c6fe 967 return HAL_OK;
mbed_official 340:28d1f895c6fe 968 }
mbed_official 340:28d1f895c6fe 969
mbed_official 340:28d1f895c6fe 970 /**
mbed_official 340:28d1f895c6fe 971 * @brief Resumes the audio stream playing from the Media.
mbed_official 340:28d1f895c6fe 972 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 973 * the configuration information for I2S module
mbed_official 340:28d1f895c6fe 974 * @retval HAL status
mbed_official 340:28d1f895c6fe 975 */
mbed_official 340:28d1f895c6fe 976 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
mbed_official 340:28d1f895c6fe 977 {
mbed_official 340:28d1f895c6fe 978 /* Process Locked */
mbed_official 340:28d1f895c6fe 979 __HAL_LOCK(hi2s);
mbed_official 340:28d1f895c6fe 980
mbed_official 340:28d1f895c6fe 981 /* Disable the I2S Tx/Rx DMA requests */
mbed_official 340:28d1f895c6fe 982 hi2s->Instance->CR2 &= (uint16_t)(~SPI_CR2_TXDMAEN);
mbed_official 340:28d1f895c6fe 983 hi2s->Instance->CR2 &= (uint16_t)(~SPI_CR2_RXDMAEN);
mbed_official 340:28d1f895c6fe 984
mbed_official 340:28d1f895c6fe 985 /* Disable the I2S DMA channel */
mbed_official 340:28d1f895c6fe 986 __HAL_DMA_DISABLE(hi2s->hdmatx);
mbed_official 340:28d1f895c6fe 987 __HAL_DMA_DISABLE(hi2s->hdmarx);
mbed_official 340:28d1f895c6fe 988
mbed_official 340:28d1f895c6fe 989 /* Abort the I2S DMA tx channel */
mbed_official 441:d2c15dda23c1 990 if(hi2s->hdmatx != NULL)
mbed_official 340:28d1f895c6fe 991 {
mbed_official 340:28d1f895c6fe 992 HAL_DMA_Abort(hi2s->hdmatx);
mbed_official 340:28d1f895c6fe 993 }
mbed_official 340:28d1f895c6fe 994 /* Abort the I2S DMA rx channel */
mbed_official 441:d2c15dda23c1 995 if(hi2s->hdmarx != NULL)
mbed_official 340:28d1f895c6fe 996 {
mbed_official 340:28d1f895c6fe 997 HAL_DMA_Abort(hi2s->hdmarx);
mbed_official 340:28d1f895c6fe 998 }
mbed_official 340:28d1f895c6fe 999
mbed_official 340:28d1f895c6fe 1000 /* Disable I2S peripheral */
mbed_official 340:28d1f895c6fe 1001 __HAL_I2S_DISABLE(hi2s);
mbed_official 340:28d1f895c6fe 1002
mbed_official 340:28d1f895c6fe 1003 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 340:28d1f895c6fe 1004
mbed_official 340:28d1f895c6fe 1005 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1006 __HAL_UNLOCK(hi2s);
mbed_official 340:28d1f895c6fe 1007
mbed_official 340:28d1f895c6fe 1008 return HAL_OK;
mbed_official 340:28d1f895c6fe 1009 }
mbed_official 340:28d1f895c6fe 1010
mbed_official 340:28d1f895c6fe 1011 /**
mbed_official 340:28d1f895c6fe 1012 * @brief This function handles I2S interrupt request.
mbed_official 340:28d1f895c6fe 1013 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1014 * the configuration information for I2S module
mbed_official 340:28d1f895c6fe 1015 * @retval None
mbed_official 340:28d1f895c6fe 1016 */
mbed_official 340:28d1f895c6fe 1017 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
mbed_official 340:28d1f895c6fe 1018 {
mbed_official 340:28d1f895c6fe 1019 uint32_t i2ssr = hi2s->Instance->SR;
mbed_official 340:28d1f895c6fe 1020
mbed_official 340:28d1f895c6fe 1021 /* I2S in mode Receiver ------------------------------------------------*/
mbed_official 340:28d1f895c6fe 1022 if(((i2ssr & I2S_FLAG_OVR) != I2S_FLAG_OVR) &&
mbed_official 340:28d1f895c6fe 1023 ((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET))
mbed_official 340:28d1f895c6fe 1024 {
mbed_official 340:28d1f895c6fe 1025 I2S_Receive_IT(hi2s);
mbed_official 340:28d1f895c6fe 1026 return;
mbed_official 340:28d1f895c6fe 1027 }
mbed_official 340:28d1f895c6fe 1028
mbed_official 340:28d1f895c6fe 1029 /* I2S in mode Tramitter -----------------------------------------------*/
mbed_official 340:28d1f895c6fe 1030 if(((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET))
mbed_official 340:28d1f895c6fe 1031 {
mbed_official 340:28d1f895c6fe 1032 I2S_Transmit_IT(hi2s);
mbed_official 340:28d1f895c6fe 1033 return;
mbed_official 340:28d1f895c6fe 1034 }
mbed_official 340:28d1f895c6fe 1035
mbed_official 340:28d1f895c6fe 1036 /* I2S Overrun error interrupt occured ---------------------------------*/
mbed_official 340:28d1f895c6fe 1037 if(((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
mbed_official 340:28d1f895c6fe 1038 {
mbed_official 340:28d1f895c6fe 1039 /* Disable RXNE and ERR interrupt */
mbed_official 340:28d1f895c6fe 1040 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
mbed_official 340:28d1f895c6fe 1041
mbed_official 340:28d1f895c6fe 1042 /* Set the I2S State ready */
mbed_official 340:28d1f895c6fe 1043 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 340:28d1f895c6fe 1044
mbed_official 340:28d1f895c6fe 1045 /* Set the error code and execute error callback*/
mbed_official 340:28d1f895c6fe 1046 hi2s->ErrorCode |= HAL_I2S_ERROR_OVR;
mbed_official 340:28d1f895c6fe 1047 HAL_I2S_ErrorCallback(hi2s);
mbed_official 340:28d1f895c6fe 1048 }
mbed_official 340:28d1f895c6fe 1049
mbed_official 340:28d1f895c6fe 1050 /* I2S Underrun error interrupt occured --------------------------------*/
mbed_official 340:28d1f895c6fe 1051 if(((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
mbed_official 340:28d1f895c6fe 1052 {
mbed_official 340:28d1f895c6fe 1053 /* Disable TXE and ERR interrupt */
mbed_official 340:28d1f895c6fe 1054 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
mbed_official 340:28d1f895c6fe 1055
mbed_official 340:28d1f895c6fe 1056 /* Set the I2S State ready */
mbed_official 340:28d1f895c6fe 1057 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 340:28d1f895c6fe 1058
mbed_official 340:28d1f895c6fe 1059 /* Set the error code and execute error callback*/
mbed_official 340:28d1f895c6fe 1060 hi2s->ErrorCode |= HAL_I2S_ERROR_UDR;
mbed_official 340:28d1f895c6fe 1061 HAL_I2S_ErrorCallback(hi2s);
mbed_official 340:28d1f895c6fe 1062 }
mbed_official 340:28d1f895c6fe 1063 }
mbed_official 340:28d1f895c6fe 1064
mbed_official 340:28d1f895c6fe 1065 /**
mbed_official 340:28d1f895c6fe 1066 * @brief Tx Transfer Half completed callbacks
mbed_official 340:28d1f895c6fe 1067 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1068 * the configuration information for I2S module
mbed_official 340:28d1f895c6fe 1069 * @retval None
mbed_official 340:28d1f895c6fe 1070 */
mbed_official 340:28d1f895c6fe 1071 __weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
mbed_official 340:28d1f895c6fe 1072 {
mbed_official 340:28d1f895c6fe 1073 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 1074 the HAL_I2S_TxHalfCpltCallback could be implemented in the user file
mbed_official 340:28d1f895c6fe 1075 */
mbed_official 340:28d1f895c6fe 1076 }
mbed_official 340:28d1f895c6fe 1077
mbed_official 340:28d1f895c6fe 1078 /**
mbed_official 340:28d1f895c6fe 1079 * @brief Tx Transfer completed callbacks
mbed_official 340:28d1f895c6fe 1080 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1081 * the configuration information for I2S module
mbed_official 340:28d1f895c6fe 1082 * @retval None
mbed_official 340:28d1f895c6fe 1083 */
mbed_official 340:28d1f895c6fe 1084 __weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s)
mbed_official 340:28d1f895c6fe 1085 {
mbed_official 340:28d1f895c6fe 1086 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 1087 the HAL_I2S_TxCpltCallback could be implemented in the user file
mbed_official 340:28d1f895c6fe 1088 */
mbed_official 340:28d1f895c6fe 1089 }
mbed_official 340:28d1f895c6fe 1090
mbed_official 340:28d1f895c6fe 1091 /**
mbed_official 340:28d1f895c6fe 1092 * @brief Rx Transfer half completed callbacks
mbed_official 340:28d1f895c6fe 1093 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1094 * the configuration information for I2S module
mbed_official 340:28d1f895c6fe 1095 * @retval None
mbed_official 340:28d1f895c6fe 1096 */
mbed_official 340:28d1f895c6fe 1097 __weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
mbed_official 340:28d1f895c6fe 1098 {
mbed_official 340:28d1f895c6fe 1099 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 1100 the HAL_I2S_RxCpltCallback could be implemented in the user file
mbed_official 340:28d1f895c6fe 1101 */
mbed_official 340:28d1f895c6fe 1102 }
mbed_official 340:28d1f895c6fe 1103
mbed_official 340:28d1f895c6fe 1104 /**
mbed_official 340:28d1f895c6fe 1105 * @brief Rx Transfer completed callbacks
mbed_official 340:28d1f895c6fe 1106 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1107 * the configuration information for I2S module
mbed_official 340:28d1f895c6fe 1108 * @retval None
mbed_official 340:28d1f895c6fe 1109 */
mbed_official 340:28d1f895c6fe 1110 __weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
mbed_official 340:28d1f895c6fe 1111 {
mbed_official 340:28d1f895c6fe 1112 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 1113 the HAL_I2S_RxCpltCallback could be implemented in the user file
mbed_official 340:28d1f895c6fe 1114 */
mbed_official 340:28d1f895c6fe 1115 }
mbed_official 340:28d1f895c6fe 1116
mbed_official 340:28d1f895c6fe 1117 /**
mbed_official 340:28d1f895c6fe 1118 * @brief I2S error callbacks
mbed_official 340:28d1f895c6fe 1119 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1120 * the configuration information for I2S module
mbed_official 340:28d1f895c6fe 1121 * @retval None
mbed_official 340:28d1f895c6fe 1122 */
mbed_official 340:28d1f895c6fe 1123 __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s)
mbed_official 340:28d1f895c6fe 1124 {
mbed_official 340:28d1f895c6fe 1125 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 340:28d1f895c6fe 1126 the HAL_I2S_ErrorCallback could be implemented in the user file
mbed_official 340:28d1f895c6fe 1127 */
mbed_official 340:28d1f895c6fe 1128 }
mbed_official 340:28d1f895c6fe 1129
mbed_official 340:28d1f895c6fe 1130 /**
mbed_official 340:28d1f895c6fe 1131 * @}
mbed_official 340:28d1f895c6fe 1132 */
mbed_official 340:28d1f895c6fe 1133
mbed_official 340:28d1f895c6fe 1134 /** @defgroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions
mbed_official 340:28d1f895c6fe 1135 * @brief Peripheral State functions
mbed_official 340:28d1f895c6fe 1136 *
mbed_official 340:28d1f895c6fe 1137 @verbatim
mbed_official 340:28d1f895c6fe 1138 ===============================================================================
mbed_official 340:28d1f895c6fe 1139 ##### Peripheral State and Errors functions #####
mbed_official 340:28d1f895c6fe 1140 ===============================================================================
mbed_official 340:28d1f895c6fe 1141 [..]
mbed_official 340:28d1f895c6fe 1142 This subsection permits to get in run-time the status of the peripheral
mbed_official 340:28d1f895c6fe 1143 and the data flow.
mbed_official 340:28d1f895c6fe 1144
mbed_official 340:28d1f895c6fe 1145 @endverbatim
mbed_official 340:28d1f895c6fe 1146 * @{
mbed_official 340:28d1f895c6fe 1147 */
mbed_official 340:28d1f895c6fe 1148
mbed_official 340:28d1f895c6fe 1149 /**
mbed_official 340:28d1f895c6fe 1150 * @brief Return the I2S state
mbed_official 340:28d1f895c6fe 1151 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1152 * the configuration information for I2S module
mbed_official 340:28d1f895c6fe 1153 * @retval HAL state
mbed_official 340:28d1f895c6fe 1154 */
mbed_official 340:28d1f895c6fe 1155 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s)
mbed_official 340:28d1f895c6fe 1156 {
mbed_official 340:28d1f895c6fe 1157 return hi2s->State;
mbed_official 340:28d1f895c6fe 1158 }
mbed_official 340:28d1f895c6fe 1159
mbed_official 340:28d1f895c6fe 1160 /**
mbed_official 340:28d1f895c6fe 1161 * @brief Return the I2S error code
mbed_official 340:28d1f895c6fe 1162 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1163 * the configuration information for I2S module
mbed_official 340:28d1f895c6fe 1164 * @retval I2S Error Code
mbed_official 340:28d1f895c6fe 1165 */
mbed_official 441:d2c15dda23c1 1166 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s)
mbed_official 340:28d1f895c6fe 1167 {
mbed_official 340:28d1f895c6fe 1168 return hi2s->ErrorCode;
mbed_official 340:28d1f895c6fe 1169 }
mbed_official 340:28d1f895c6fe 1170 /**
mbed_official 340:28d1f895c6fe 1171 * @}
mbed_official 340:28d1f895c6fe 1172 */
mbed_official 340:28d1f895c6fe 1173
mbed_official 340:28d1f895c6fe 1174 /**
mbed_official 340:28d1f895c6fe 1175 * @}
mbed_official 340:28d1f895c6fe 1176 */
mbed_official 340:28d1f895c6fe 1177
mbed_official 441:d2c15dda23c1 1178 /** @addtogroup I2S_Private_Functions I2S Private Functions
mbed_official 340:28d1f895c6fe 1179 * @{
mbed_official 340:28d1f895c6fe 1180 */
mbed_official 340:28d1f895c6fe 1181 /**
mbed_official 340:28d1f895c6fe 1182 * @brief DMA I2S transmit process complete callback
mbed_official 340:28d1f895c6fe 1183 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1184 * the configuration information for the specified DMA module.
mbed_official 340:28d1f895c6fe 1185 * @retval None
mbed_official 340:28d1f895c6fe 1186 */
mbed_official 340:28d1f895c6fe 1187 static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma)
mbed_official 340:28d1f895c6fe 1188 {
mbed_official 340:28d1f895c6fe 1189 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
mbed_official 340:28d1f895c6fe 1190
mbed_official 340:28d1f895c6fe 1191 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
mbed_official 340:28d1f895c6fe 1192 {
mbed_official 340:28d1f895c6fe 1193 /* Disable Tx DMA Request */
mbed_official 340:28d1f895c6fe 1194 hi2s->Instance->CR2 &= (uint16_t)(~SPI_CR2_TXDMAEN);
mbed_official 340:28d1f895c6fe 1195
mbed_official 340:28d1f895c6fe 1196 hi2s->TxXferCount = 0;
mbed_official 340:28d1f895c6fe 1197 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 340:28d1f895c6fe 1198 }
mbed_official 340:28d1f895c6fe 1199 HAL_I2S_TxCpltCallback(hi2s);
mbed_official 340:28d1f895c6fe 1200 }
mbed_official 340:28d1f895c6fe 1201
mbed_official 340:28d1f895c6fe 1202 /**
mbed_official 340:28d1f895c6fe 1203 * @brief DMA I2S transmit process half complete callback
mbed_official 340:28d1f895c6fe 1204 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1205 * the configuration information for the specified DMA module.
mbed_official 340:28d1f895c6fe 1206 * @retval None
mbed_official 340:28d1f895c6fe 1207 */
mbed_official 340:28d1f895c6fe 1208 static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
mbed_official 340:28d1f895c6fe 1209 {
mbed_official 340:28d1f895c6fe 1210 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
mbed_official 340:28d1f895c6fe 1211
mbed_official 340:28d1f895c6fe 1212 HAL_I2S_TxHalfCpltCallback(hi2s);
mbed_official 340:28d1f895c6fe 1213 }
mbed_official 340:28d1f895c6fe 1214
mbed_official 340:28d1f895c6fe 1215 /**
mbed_official 340:28d1f895c6fe 1216 * @brief DMA I2S receive process complete callback
mbed_official 340:28d1f895c6fe 1217 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1218 * the configuration information for the specified DMA module.
mbed_official 340:28d1f895c6fe 1219 * @retval None
mbed_official 340:28d1f895c6fe 1220 */
mbed_official 340:28d1f895c6fe 1221 static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma)
mbed_official 340:28d1f895c6fe 1222 {
mbed_official 340:28d1f895c6fe 1223 I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 340:28d1f895c6fe 1224
mbed_official 340:28d1f895c6fe 1225 if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
mbed_official 340:28d1f895c6fe 1226 {
mbed_official 340:28d1f895c6fe 1227 /* Disable Rx DMA Request */
mbed_official 340:28d1f895c6fe 1228 hi2s->Instance->CR2 &= (uint16_t)(~SPI_CR2_RXDMAEN);
mbed_official 340:28d1f895c6fe 1229 hi2s->RxXferCount = 0;
mbed_official 340:28d1f895c6fe 1230 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 340:28d1f895c6fe 1231 }
mbed_official 340:28d1f895c6fe 1232 HAL_I2S_RxCpltCallback(hi2s);
mbed_official 340:28d1f895c6fe 1233 }
mbed_official 340:28d1f895c6fe 1234
mbed_official 340:28d1f895c6fe 1235 /**
mbed_official 340:28d1f895c6fe 1236 * @brief DMA I2S receive process half complete callback
mbed_official 340:28d1f895c6fe 1237 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1238 * the configuration information for the specified DMA module.
mbed_official 340:28d1f895c6fe 1239 * @retval None
mbed_official 340:28d1f895c6fe 1240 */
mbed_official 340:28d1f895c6fe 1241 static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
mbed_official 340:28d1f895c6fe 1242 {
mbed_official 340:28d1f895c6fe 1243 I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
mbed_official 340:28d1f895c6fe 1244
mbed_official 340:28d1f895c6fe 1245 HAL_I2S_RxHalfCpltCallback(hi2s);
mbed_official 340:28d1f895c6fe 1246 }
mbed_official 340:28d1f895c6fe 1247
mbed_official 340:28d1f895c6fe 1248 /**
mbed_official 340:28d1f895c6fe 1249 * @brief DMA I2S communication error callback
mbed_official 340:28d1f895c6fe 1250 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1251 * the configuration information for the specified DMA module.
mbed_official 340:28d1f895c6fe 1252 * @retval None
mbed_official 340:28d1f895c6fe 1253 */
mbed_official 340:28d1f895c6fe 1254 static void I2S_DMAError(DMA_HandleTypeDef *hdma)
mbed_official 340:28d1f895c6fe 1255 {
mbed_official 340:28d1f895c6fe 1256 I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 340:28d1f895c6fe 1257
mbed_official 340:28d1f895c6fe 1258 /* Disable Rx and Tx DMA Request */
mbed_official 340:28d1f895c6fe 1259 hi2s->Instance->CR2 &= (uint16_t)(~(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN));
mbed_official 340:28d1f895c6fe 1260 hi2s->TxXferCount = 0;
mbed_official 340:28d1f895c6fe 1261 hi2s->RxXferCount = 0;
mbed_official 340:28d1f895c6fe 1262
mbed_official 340:28d1f895c6fe 1263 hi2s->State= HAL_I2S_STATE_READY;
mbed_official 340:28d1f895c6fe 1264
mbed_official 340:28d1f895c6fe 1265 /* Set the error code and execute error callback*/
mbed_official 340:28d1f895c6fe 1266 hi2s->ErrorCode |= HAL_I2S_ERROR_DMA;
mbed_official 340:28d1f895c6fe 1267 HAL_I2S_ErrorCallback(hi2s);
mbed_official 340:28d1f895c6fe 1268 }
mbed_official 340:28d1f895c6fe 1269
mbed_official 340:28d1f895c6fe 1270 /**
mbed_official 340:28d1f895c6fe 1271 * @brief Transmit an amount of data in non-blocking mode with Interrupt
mbed_official 340:28d1f895c6fe 1272 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1273 * the configuration information for I2S module
mbed_official 340:28d1f895c6fe 1274 * @retval None
mbed_official 340:28d1f895c6fe 1275 */
mbed_official 340:28d1f895c6fe 1276 static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s)
mbed_official 340:28d1f895c6fe 1277 {
mbed_official 340:28d1f895c6fe 1278 /* Transmit data */
mbed_official 340:28d1f895c6fe 1279 hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
mbed_official 340:28d1f895c6fe 1280 hi2s->TxXferCount--;
mbed_official 340:28d1f895c6fe 1281
mbed_official 340:28d1f895c6fe 1282 if(hi2s->TxXferCount == 0)
mbed_official 340:28d1f895c6fe 1283 {
mbed_official 340:28d1f895c6fe 1284 /* Disable TXE and ERR interrupt */
mbed_official 340:28d1f895c6fe 1285 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
mbed_official 340:28d1f895c6fe 1286
mbed_official 340:28d1f895c6fe 1287 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 340:28d1f895c6fe 1288 HAL_I2S_TxCpltCallback(hi2s);
mbed_official 340:28d1f895c6fe 1289 }
mbed_official 340:28d1f895c6fe 1290 }
mbed_official 340:28d1f895c6fe 1291
mbed_official 340:28d1f895c6fe 1292 /**
mbed_official 340:28d1f895c6fe 1293 * @brief Receive an amount of data in non-blocking mode with Interrupt
mbed_official 340:28d1f895c6fe 1294 * @param hi2s: I2S handle
mbed_official 340:28d1f895c6fe 1295 * @retval None
mbed_official 340:28d1f895c6fe 1296 */
mbed_official 340:28d1f895c6fe 1297 static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s)
mbed_official 340:28d1f895c6fe 1298 {
mbed_official 340:28d1f895c6fe 1299 /* Receive data */
mbed_official 340:28d1f895c6fe 1300 (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
mbed_official 340:28d1f895c6fe 1301 hi2s->RxXferCount--;
mbed_official 340:28d1f895c6fe 1302
mbed_official 340:28d1f895c6fe 1303 if(hi2s->RxXferCount == 0)
mbed_official 340:28d1f895c6fe 1304 {
mbed_official 340:28d1f895c6fe 1305 /* Disable RXNE and ERR interrupt */
mbed_official 340:28d1f895c6fe 1306 __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
mbed_official 340:28d1f895c6fe 1307
mbed_official 340:28d1f895c6fe 1308 hi2s->State = HAL_I2S_STATE_READY;
mbed_official 340:28d1f895c6fe 1309 HAL_I2S_RxCpltCallback(hi2s);
mbed_official 340:28d1f895c6fe 1310 }
mbed_official 340:28d1f895c6fe 1311 }
mbed_official 340:28d1f895c6fe 1312
mbed_official 340:28d1f895c6fe 1313
mbed_official 340:28d1f895c6fe 1314 /**
mbed_official 340:28d1f895c6fe 1315 * @brief This function handles I2S Communication Timeout.
mbed_official 340:28d1f895c6fe 1316 * @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
mbed_official 340:28d1f895c6fe 1317 * the configuration information for I2S module
mbed_official 340:28d1f895c6fe 1318 * @param Flag: Flag checked
mbed_official 340:28d1f895c6fe 1319 * @param State: Value of the flag expected
mbed_official 340:28d1f895c6fe 1320 * @param Timeout: Duration of the timeout
mbed_official 340:28d1f895c6fe 1321 * @retval HAL status
mbed_official 340:28d1f895c6fe 1322 */
mbed_official 340:28d1f895c6fe 1323 static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t State, uint32_t Timeout)
mbed_official 340:28d1f895c6fe 1324 {
mbed_official 340:28d1f895c6fe 1325 uint32_t tickstart = HAL_GetTick();
mbed_official 340:28d1f895c6fe 1326
mbed_official 340:28d1f895c6fe 1327 /* Wait until flag is set */
mbed_official 340:28d1f895c6fe 1328 if(State == RESET)
mbed_official 340:28d1f895c6fe 1329 {
mbed_official 340:28d1f895c6fe 1330 while(__HAL_I2S_GET_FLAG(hi2s, Flag) == RESET)
mbed_official 340:28d1f895c6fe 1331 {
mbed_official 340:28d1f895c6fe 1332 if(Timeout != HAL_MAX_DELAY)
mbed_official 340:28d1f895c6fe 1333 {
mbed_official 340:28d1f895c6fe 1334 if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
mbed_official 340:28d1f895c6fe 1335 {
mbed_official 340:28d1f895c6fe 1336 /* Set the I2S State ready */
mbed_official 340:28d1f895c6fe 1337 hi2s->State= HAL_I2S_STATE_READY;
mbed_official 340:28d1f895c6fe 1338
mbed_official 340:28d1f895c6fe 1339 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1340 __HAL_UNLOCK(hi2s);
mbed_official 340:28d1f895c6fe 1341
mbed_official 340:28d1f895c6fe 1342 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 1343 }
mbed_official 340:28d1f895c6fe 1344 }
mbed_official 340:28d1f895c6fe 1345 }
mbed_official 340:28d1f895c6fe 1346 }
mbed_official 340:28d1f895c6fe 1347 else
mbed_official 340:28d1f895c6fe 1348 {
mbed_official 340:28d1f895c6fe 1349 while(__HAL_I2S_GET_FLAG(hi2s, Flag) != RESET)
mbed_official 340:28d1f895c6fe 1350 {
mbed_official 340:28d1f895c6fe 1351 if(Timeout != HAL_MAX_DELAY)
mbed_official 340:28d1f895c6fe 1352 {
mbed_official 340:28d1f895c6fe 1353 if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
mbed_official 340:28d1f895c6fe 1354 {
mbed_official 340:28d1f895c6fe 1355 /* Set the I2S State ready */
mbed_official 340:28d1f895c6fe 1356 hi2s->State= HAL_I2S_STATE_READY;
mbed_official 340:28d1f895c6fe 1357
mbed_official 340:28d1f895c6fe 1358 /* Process Unlocked */
mbed_official 340:28d1f895c6fe 1359 __HAL_UNLOCK(hi2s);
mbed_official 340:28d1f895c6fe 1360
mbed_official 340:28d1f895c6fe 1361 return HAL_TIMEOUT;
mbed_official 340:28d1f895c6fe 1362 }
mbed_official 340:28d1f895c6fe 1363 }
mbed_official 340:28d1f895c6fe 1364 }
mbed_official 340:28d1f895c6fe 1365 }
mbed_official 340:28d1f895c6fe 1366 return HAL_OK;
mbed_official 340:28d1f895c6fe 1367 }
mbed_official 340:28d1f895c6fe 1368
mbed_official 340:28d1f895c6fe 1369 /**
mbed_official 340:28d1f895c6fe 1370 * @}
mbed_official 340:28d1f895c6fe 1371 */
mbed_official 340:28d1f895c6fe 1372
mbed_official 340:28d1f895c6fe 1373 /**
mbed_official 340:28d1f895c6fe 1374 * @}
mbed_official 340:28d1f895c6fe 1375 */
mbed_official 340:28d1f895c6fe 1376
mbed_official 340:28d1f895c6fe 1377 /**
mbed_official 340:28d1f895c6fe 1378 * @}
mbed_official 340:28d1f895c6fe 1379 */
mbed_official 340:28d1f895c6fe 1380
mbed_official 441:d2c15dda23c1 1381 #endif /* defined(STM32F031x6) || defined(STM32F038xx) || */
mbed_official 441:d2c15dda23c1 1382 /* defined(STM32F051x8) || defined(STM32F058xx) || */
mbed_official 441:d2c15dda23c1 1383 /* defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || */
mbed_official 441:d2c15dda23c1 1384 /* defined(STM32F042x6) || defined(STM32F048xx) || */
mbed_official 441:d2c15dda23c1 1385 /* defined(STM32F091xC) || defined(STM32F098xx) */
mbed_official 441:d2c15dda23c1 1386
mbed_official 441:d2c15dda23c1 1387 #endif /* HAL_I2S_MODULE_ENABLED */
mbed_official 441:d2c15dda23c1 1388
mbed_official 340:28d1f895c6fe 1389 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/