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Last commit 20 Feb 2019 by 
mbed official
targets/cmsis/TARGET_Maxim/TARGET_MAX32600/clkman_regs.h@579:53297373a894, 2015-07-01 (annotated)
- Committer:
- mbed_official
- Date:
- Wed Jul 01 09:45:11 2015 +0100
- Revision:
- 579:53297373a894
- Parent:
- 514:7668256dbe61
Synchronized with git revision d5b4d2ab9c47edb4dc5776e7177b0c2263459081
Full URL: https://github.com/mbedmicro/mbed/commit/d5b4d2ab9c47edb4dc5776e7177b0c2263459081/
Initial version of drivers for SAMR21
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 514:7668256dbe61 | 1 | /******************************************************************************* |
| mbed_official | 514:7668256dbe61 | 2 | * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved. |
| mbed_official | 514:7668256dbe61 | 3 | * |
| mbed_official | 514:7668256dbe61 | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| mbed_official | 514:7668256dbe61 | 5 | * copy of this software and associated documentation files (the "Software"), |
| mbed_official | 514:7668256dbe61 | 6 | * to deal in the Software without restriction, including without limitation |
| mbed_official | 514:7668256dbe61 | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| mbed_official | 514:7668256dbe61 | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| mbed_official | 514:7668256dbe61 | 9 | * Software is furnished to do so, subject to the following conditions: |
| mbed_official | 514:7668256dbe61 | 10 | * |
| mbed_official | 514:7668256dbe61 | 11 | * The above copyright notice and this permission notice shall be included |
| mbed_official | 514:7668256dbe61 | 12 | * in all copies or substantial portions of the Software. |
| mbed_official | 514:7668256dbe61 | 13 | * |
| mbed_official | 514:7668256dbe61 | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
| mbed_official | 514:7668256dbe61 | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| mbed_official | 514:7668256dbe61 | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
| mbed_official | 514:7668256dbe61 | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
| mbed_official | 514:7668256dbe61 | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| mbed_official | 514:7668256dbe61 | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| mbed_official | 514:7668256dbe61 | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| mbed_official | 514:7668256dbe61 | 21 | * |
| mbed_official | 514:7668256dbe61 | 22 | * Except as contained in this notice, the name of Maxim Integrated |
| mbed_official | 514:7668256dbe61 | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
| mbed_official | 514:7668256dbe61 | 24 | * Products, Inc. Branding Policy. |
| mbed_official | 514:7668256dbe61 | 25 | * |
| mbed_official | 514:7668256dbe61 | 26 | * The mere transfer of this software does not imply any licenses |
| mbed_official | 514:7668256dbe61 | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
| mbed_official | 514:7668256dbe61 | 28 | * trademarks, maskwork rights, or any other form of intellectual |
| mbed_official | 514:7668256dbe61 | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
| mbed_official | 514:7668256dbe61 | 30 | * ownership rights. |
| mbed_official | 514:7668256dbe61 | 31 | ******************************************************************************* |
| mbed_official | 514:7668256dbe61 | 32 | */ |
| mbed_official | 514:7668256dbe61 | 33 | |
| mbed_official | 514:7668256dbe61 | 34 | #ifndef _MXC_CLKMAN_REGS_H_ |
| mbed_official | 514:7668256dbe61 | 35 | #define _MXC_CLKMAN_REGS_H_ |
| mbed_official | 514:7668256dbe61 | 36 | |
| mbed_official | 514:7668256dbe61 | 37 | #ifdef __cplusplus |
| mbed_official | 514:7668256dbe61 | 38 | extern "C" { |
| mbed_official | 514:7668256dbe61 | 39 | #endif |
| mbed_official | 514:7668256dbe61 | 40 | |
| mbed_official | 514:7668256dbe61 | 41 | #include <stdint.h> |
| mbed_official | 514:7668256dbe61 | 42 | |
| mbed_official | 514:7668256dbe61 | 43 | /** |
| mbed_official | 514:7668256dbe61 | 44 | * @file clkman_regs.h |
| mbed_official | 514:7668256dbe61 | 45 | * @addtogroup clkman CLKMAN |
| mbed_official | 514:7668256dbe61 | 46 | * @{ |
| mbed_official | 514:7668256dbe61 | 47 | */ |
| mbed_official | 514:7668256dbe61 | 48 | |
| mbed_official | 514:7668256dbe61 | 49 | /** |
| mbed_official | 514:7668256dbe61 | 50 | * @brief Defines clock input selections for the phase locked loop. |
| mbed_official | 514:7668256dbe61 | 51 | */ |
| mbed_official | 514:7668256dbe61 | 52 | typedef enum { |
| mbed_official | 514:7668256dbe61 | 53 | /** Input select for high frequency crystal oscillator */ |
| mbed_official | 514:7668256dbe61 | 54 | MXC_E_CLKMAN_PLL_INPUT_SELECT_HFX = 0, |
| mbed_official | 514:7668256dbe61 | 55 | /** Input select for 24MHz ring oscillator */ |
| mbed_official | 514:7668256dbe61 | 56 | MXC_E_CLKMAN_PLL_INPUT_SELECT_24MHZ_RO, |
| mbed_official | 514:7668256dbe61 | 57 | } mxc_clkman_pll_input_select_t; |
| mbed_official | 514:7668256dbe61 | 58 | |
| mbed_official | 514:7668256dbe61 | 59 | /** |
| mbed_official | 514:7668256dbe61 | 60 | * @brief Defines clock input frequency for the phase locked loop. |
| mbed_official | 514:7668256dbe61 | 61 | */ |
| mbed_official | 514:7668256dbe61 | 62 | typedef enum { |
| mbed_official | 514:7668256dbe61 | 63 | /** Input frequency of 24MHz */ |
| mbed_official | 514:7668256dbe61 | 64 | MXC_E_CLKMAN_PLL_DIVISOR_SELECT_24MHZ = 0, |
| mbed_official | 514:7668256dbe61 | 65 | /** Input frequency of 12MHz */ |
| mbed_official | 514:7668256dbe61 | 66 | MXC_E_CLKMAN_PLL_DIVISOR_SELECT_12MHZ, |
| mbed_official | 514:7668256dbe61 | 67 | /** Input frequency of 8MHz */ |
| mbed_official | 514:7668256dbe61 | 68 | MXC_E_CLKMAN_PLL_DIVISOR_SELECT_8MHZ, |
| mbed_official | 514:7668256dbe61 | 69 | } mxc_clkman_pll_divisor_select_t; |
| mbed_official | 514:7668256dbe61 | 70 | |
| mbed_official | 514:7668256dbe61 | 71 | /** |
| mbed_official | 514:7668256dbe61 | 72 | * @brief Defines terminal count for PLL stable. |
| mbed_official | 514:7668256dbe61 | 73 | */ |
| mbed_official | 514:7668256dbe61 | 74 | typedef enum { |
| mbed_official | 514:7668256dbe61 | 75 | /** Clock stable after 2^8 = 256 clock cycles */ |
| mbed_official | 514:7668256dbe61 | 76 | MXC_E_CLKMAN_STABILITY_COUNT_2_8_CLKS = 0, |
| mbed_official | 514:7668256dbe61 | 77 | /** Clock stable after 2^9 = 512 clock cycles */ |
| mbed_official | 514:7668256dbe61 | 78 | MXC_E_CLKMAN_STABILITY_COUNT_2_9_CLKS, |
| mbed_official | 514:7668256dbe61 | 79 | /** Clock stable after 2^10 = 1024 clock cycles */ |
| mbed_official | 514:7668256dbe61 | 80 | MXC_E_CLKMAN_STABILITY_COUNT_2_10_CLKS, |
| mbed_official | 514:7668256dbe61 | 81 | /** Clock stable after 2^11 = 2048 clock cycles */ |
| mbed_official | 514:7668256dbe61 | 82 | MXC_E_CLKMAN_STABILITY_COUNT_2_11_CLKS, |
| mbed_official | 514:7668256dbe61 | 83 | /** Clock stable after 2^12 = 4096 clock cycles */ |
| mbed_official | 514:7668256dbe61 | 84 | MXC_E_CLKMAN_STABILITY_COUNT_2_12_CLKS, |
| mbed_official | 514:7668256dbe61 | 85 | /** Clock stable after 2^13 = 8192 clock cycles */ |
| mbed_official | 514:7668256dbe61 | 86 | MXC_E_CLKMAN_STABILITY_COUNT_2_13_CLKS, |
| mbed_official | 514:7668256dbe61 | 87 | /** Clock stable after 2^14 = 16384 clock cycles */ |
| mbed_official | 514:7668256dbe61 | 88 | MXC_E_CLKMAN_STABILITY_COUNT_2_14_CLKS, |
| mbed_official | 514:7668256dbe61 | 89 | /** Clock stable after 2^15 = 32768 clock cycles */ |
| mbed_official | 514:7668256dbe61 | 90 | MXC_E_CLKMAN_STABILITY_COUNT_2_15_CLKS, |
| mbed_official | 514:7668256dbe61 | 91 | /** Clock stable after 2^16 = 65536 clock cycles */ |
| mbed_official | 514:7668256dbe61 | 92 | MXC_E_CLKMAN_STABILITY_COUNT_2_16_CLKS, |
| mbed_official | 514:7668256dbe61 | 93 | /** Clock stable after 2^17 = 131072 clock cycles */ |
| mbed_official | 514:7668256dbe61 | 94 | MXC_E_CLKMAN_STABILITY_COUNT_2_17_CLKS, |
| mbed_official | 514:7668256dbe61 | 95 | /** Clock stable after 2^18 = 262144 clock cycles */ |
| mbed_official | 514:7668256dbe61 | 96 | MXC_E_CLKMAN_STABILITY_COUNT_2_18_CLKS, |
| mbed_official | 514:7668256dbe61 | 97 | /** Clock stable after 2^19 = 524288 clock cycles */ |
| mbed_official | 514:7668256dbe61 | 98 | MXC_E_CLKMAN_STABILITY_COUNT_2_19_CLKS, |
| mbed_official | 514:7668256dbe61 | 99 | /** Clock stable after 2^20 = 1048576 clock cycles */ |
| mbed_official | 514:7668256dbe61 | 100 | MXC_E_CLKMAN_STABILITY_COUNT_2_20_CLKS, |
| mbed_official | 514:7668256dbe61 | 101 | /** Clock stable after 2^21 = 2097152 clock cycles */ |
| mbed_official | 514:7668256dbe61 | 102 | MXC_E_CLKMAN_STABILITY_COUNT_2_21_CLKS, |
| mbed_official | 514:7668256dbe61 | 103 | /** Clock stable after 2^22 = 4194304 clock cycles */ |
| mbed_official | 514:7668256dbe61 | 104 | MXC_E_CLKMAN_STABILITY_COUNT_2_22_CLKS, |
| mbed_official | 514:7668256dbe61 | 105 | /** Clock stable after 2^23 = 8388608 clock cycles */ |
| mbed_official | 514:7668256dbe61 | 106 | MXC_E_CLKMAN_STABILITY_COUNT_2_23_CLKS |
| mbed_official | 514:7668256dbe61 | 107 | } mxc_clkman_stability_count_t; |
| mbed_official | 514:7668256dbe61 | 108 | |
| mbed_official | 514:7668256dbe61 | 109 | /** |
| mbed_official | 514:7668256dbe61 | 110 | * @brief Defines clock source selections for system clock. |
| mbed_official | 514:7668256dbe61 | 111 | */ |
| mbed_official | 514:7668256dbe61 | 112 | typedef enum { |
| mbed_official | 514:7668256dbe61 | 113 | /** Clock select for 24MHz ring oscillator divided by 8 (3MHz) */ |
| mbed_official | 514:7668256dbe61 | 114 | MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_24MHZ_RO_DIV_8 = 0, |
| mbed_official | 514:7668256dbe61 | 115 | /** Clock select for 24MHz ring oscillator */ |
| mbed_official | 514:7668256dbe61 | 116 | MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_24MHZ_RO, |
| mbed_official | 514:7668256dbe61 | 117 | /** Clock select for high frequency crystal oscillator */ |
| mbed_official | 514:7668256dbe61 | 118 | MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_HFX, |
| mbed_official | 514:7668256dbe61 | 119 | /** Clock select for 48MHz phase locked loop output divided by 2 (24MHz) */ |
| mbed_official | 514:7668256dbe61 | 120 | MXC_E_CLKMAN_SYSTEM_SOURCE_SELECT_PLL_48MHZ_DIV_2 |
| mbed_official | 514:7668256dbe61 | 121 | } mxc_clkman_system_source_select_t; |
| mbed_official | 514:7668256dbe61 | 122 | |
| mbed_official | 514:7668256dbe61 | 123 | /** |
| mbed_official | 514:7668256dbe61 | 124 | * @brief Defines clock source selections for analog to digital converter clock. |
| mbed_official | 514:7668256dbe61 | 125 | */ |
| mbed_official | 514:7668256dbe61 | 126 | typedef enum { |
| mbed_official | 514:7668256dbe61 | 127 | /** Clock select for system clock frequency */ |
| mbed_official | 514:7668256dbe61 | 128 | MXC_E_CLKMAN_ADC_SOURCE_SELECT_SYSTEM = 0, |
| mbed_official | 514:7668256dbe61 | 129 | /** Clock select for 8MHz phase locked loop output */ |
| mbed_official | 514:7668256dbe61 | 130 | MXC_E_CLKMAN_ADC_SOURCE_SELECT_PLL_8MHZ, |
| mbed_official | 514:7668256dbe61 | 131 | /** Clock select for high frequency crystal oscillator */ |
| mbed_official | 514:7668256dbe61 | 132 | MXC_E_CLKMAN_ADC_SOURCE_SELECT_HFX, |
| mbed_official | 514:7668256dbe61 | 133 | /** Clock select for 24MHz ring oscillator */ |
| mbed_official | 514:7668256dbe61 | 134 | MXC_E_CLKMAN_ADC_SOURCE_SELECT_24MHZ_RO, |
| mbed_official | 514:7668256dbe61 | 135 | } mxc_clkman_adc_source_select_t; |
| mbed_official | 514:7668256dbe61 | 136 | |
| mbed_official | 514:7668256dbe61 | 137 | /** |
| mbed_official | 514:7668256dbe61 | 138 | * @brief Defines clock source selections for watchdog timer clock. |
| mbed_official | 514:7668256dbe61 | 139 | */ |
| mbed_official | 514:7668256dbe61 | 140 | typedef enum { |
| mbed_official | 514:7668256dbe61 | 141 | /** Clock select for system clock frequency */ |
| mbed_official | 514:7668256dbe61 | 142 | MXC_E_CLKMAN_WDT_SOURCE_SELECT_SYSTEM = 0, |
| mbed_official | 514:7668256dbe61 | 143 | /** Clock select for 8MHz phase locked loop output */ |
| mbed_official | 514:7668256dbe61 | 144 | MXC_E_CLKMAN_WDT_SOURCE_SELECT_RTC, |
| mbed_official | 514:7668256dbe61 | 145 | /** Clock select for high frequency crystal oscillator */ |
| mbed_official | 514:7668256dbe61 | 146 | MXC_E_CLKMAN_WDT_SOURCE_SELECT_24MHZ_RO, |
| mbed_official | 514:7668256dbe61 | 147 | /** Clock select for 24MHz ring oscillator */ |
| mbed_official | 514:7668256dbe61 | 148 | MXC_E_CLKMAN_WDT_SOURCE_SELECT_NANO, |
| mbed_official | 514:7668256dbe61 | 149 | } mxc_clkman_wdt_source_select_t; |
| mbed_official | 514:7668256dbe61 | 150 | |
| mbed_official | 514:7668256dbe61 | 151 | /** |
| mbed_official | 514:7668256dbe61 | 152 | * @brief Defines clock scales for various clocks. |
| mbed_official | 514:7668256dbe61 | 153 | */ |
| mbed_official | 514:7668256dbe61 | 154 | typedef enum { |
| mbed_official | 514:7668256dbe61 | 155 | /** Clock disabled */ |
| mbed_official | 514:7668256dbe61 | 156 | MXC_E_CLKMAN_CLK_SCALE_DISABLED = 0, |
| mbed_official | 514:7668256dbe61 | 157 | /** Clock enabled */ |
| mbed_official | 514:7668256dbe61 | 158 | MXC_E_CLKMAN_CLK_SCALE_ENABLED, |
| mbed_official | 514:7668256dbe61 | 159 | /** Clock scale for dividing by 2 */ |
| mbed_official | 514:7668256dbe61 | 160 | MXC_E_CLKMAN_CLK_SCALE_DIV_2, |
| mbed_official | 514:7668256dbe61 | 161 | /** Clock scale for dividing by 4 */ |
| mbed_official | 514:7668256dbe61 | 162 | MXC_E_CLKMAN_CLK_SCALE_DIV_4, |
| mbed_official | 514:7668256dbe61 | 163 | /** Clock scale for dividing by 8 */ |
| mbed_official | 514:7668256dbe61 | 164 | MXC_E_CLKMAN_CLK_SCALE_DIV_8, |
| mbed_official | 514:7668256dbe61 | 165 | /** Clock scale for dividing by 16 */ |
| mbed_official | 514:7668256dbe61 | 166 | MXC_E_CLKMAN_CLK_SCALE_DIV_16, |
| mbed_official | 514:7668256dbe61 | 167 | /** Clock scale for dividing by 32 */ |
| mbed_official | 514:7668256dbe61 | 168 | MXC_E_CLKMAN_CLK_SCALE_DIV_32, |
| mbed_official | 514:7668256dbe61 | 169 | /** Clock scale for dividing by 64 */ |
| mbed_official | 514:7668256dbe61 | 170 | MXC_E_CLKMAN_CLK_SCALE_DIV_64, |
| mbed_official | 514:7668256dbe61 | 171 | /** Clock scale for dividing by 128 */ |
| mbed_official | 514:7668256dbe61 | 172 | MXC_E_CLKMAN_CLK_SCALE_DIV_128, |
| mbed_official | 514:7668256dbe61 | 173 | /** Clock scale for dividing by 256 */ |
| mbed_official | 514:7668256dbe61 | 174 | MXC_E_CLKMAN_CLK_SCALE_DIV_256 |
| mbed_official | 514:7668256dbe61 | 175 | } mxc_clkman_clk_scale_t; |
| mbed_official | 514:7668256dbe61 | 176 | |
| mbed_official | 514:7668256dbe61 | 177 | /** |
| mbed_official | 514:7668256dbe61 | 178 | * @brief Defines Setting of the Clock Gates . |
| mbed_official | 514:7668256dbe61 | 179 | */ |
| mbed_official | 514:7668256dbe61 | 180 | typedef enum { |
| mbed_official | 514:7668256dbe61 | 181 | /** Clock Gater is Off */ |
| mbed_official | 514:7668256dbe61 | 182 | MXC_E_CLKMAN_CLK_GATE_OFF = 0, |
| mbed_official | 514:7668256dbe61 | 183 | /** Clock Gater is Dynamic */ |
| mbed_official | 514:7668256dbe61 | 184 | MXC_E_CLKMAN_CLK_GATE_DYNAMIC, |
| mbed_official | 514:7668256dbe61 | 185 | /** Clock Gater is On */ |
| mbed_official | 514:7668256dbe61 | 186 | MXC_E_CLKMAN_CLK_GATE_ON |
| mbed_official | 514:7668256dbe61 | 187 | } mxc_clkman_clk_gate_t; |
| mbed_official | 514:7668256dbe61 | 188 | |
| mbed_official | 514:7668256dbe61 | 189 | /* Offset Register Description |
| mbed_official | 514:7668256dbe61 | 190 | ====== ===================================================================== */ |
| mbed_official | 514:7668256dbe61 | 191 | typedef struct { |
| mbed_official | 514:7668256dbe61 | 192 | __IO uint32_t clk_config; /* 0x0000 System Clock Configuration */ |
| mbed_official | 514:7668256dbe61 | 193 | __IO uint32_t clk_ctrl; /* 0x0004 System Clock Controls */ |
| mbed_official | 514:7668256dbe61 | 194 | __IO uint32_t intfl; /* 0x0008 Interrupt Flags */ |
| mbed_official | 514:7668256dbe61 | 195 | __IO uint32_t inten; /* 0x000C Interrupt Enable/Disable Controls */ |
| mbed_official | 514:7668256dbe61 | 196 | __IO uint32_t trim_calc; /* 0x0010 Trim Calculation Controls */ |
| mbed_official | 514:7668256dbe61 | 197 | __I uint32_t rsv0014[4]; /* 0x0014 */ |
| mbed_official | 514:7668256dbe61 | 198 | __IO uint32_t i2c_timer_ctrl; /* 0x0024 I2C Timer Control */ |
| mbed_official | 514:7668256dbe61 | 199 | __I uint32_t rsv0028[6]; /* 0x0028 */ |
| mbed_official | 514:7668256dbe61 | 200 | __IO uint32_t clk_ctrl_0_system; /* 0x0040 Control Settings for CLK0 - System Clock */ |
| mbed_official | 514:7668256dbe61 | 201 | __IO uint32_t clk_ctrl_1_gpio; /* 0x0044 Control Settings for CLK1 - GPIO Module Clock */ |
| mbed_official | 514:7668256dbe61 | 202 | __IO uint32_t clk_ctrl_2_pt; /* 0x0048 Control Settings for CLK2 - Pulse Train Module Clock */ |
| mbed_official | 514:7668256dbe61 | 203 | __IO uint32_t clk_ctrl_3_spi0; /* 0x004C Control Settings for CLK3 - SPI0 Master Clock */ |
| mbed_official | 514:7668256dbe61 | 204 | __IO uint32_t clk_ctrl_4_spi1; /* 0x0050 Control Settings for CLK4 - SPI1 Master Clock */ |
| mbed_official | 514:7668256dbe61 | 205 | __IO uint32_t clk_ctrl_5_spi2; /* 0x0054 Control Settings for CLK5 - SPI2 Master Clock */ |
| mbed_official | 514:7668256dbe61 | 206 | __IO uint32_t clk_ctrl_6_i2cm; /* 0x0058 Control Settings for CLK6 - Clock for all I2C Masters */ |
| mbed_official | 514:7668256dbe61 | 207 | __IO uint32_t clk_ctrl_7_i2cs; /* 0x005C Control Settings for CLK7 - I2C Slave Clock */ |
| mbed_official | 514:7668256dbe61 | 208 | __IO uint32_t clk_ctrl_8_lcd_chpump; /* 0x0060 Control Settings for CLK8 - LCD Charge Pump Clock */ |
| mbed_official | 514:7668256dbe61 | 209 | __IO uint32_t clk_ctrl_9_puf; /* 0x0064 Control Settings for CLK9 - PUF Clock */ |
| mbed_official | 514:7668256dbe61 | 210 | __IO uint32_t clk_ctrl_10_prng; /* 0x0068 Control Settings for CLK10 - PRNG Clock */ |
| mbed_official | 514:7668256dbe61 | 211 | __IO uint32_t clk_ctrl_11_wdt0; /* 0x006C Control Settings for CLK11 - Watchdog Timer 0 ScaledSysClk */ |
| mbed_official | 514:7668256dbe61 | 212 | __IO uint32_t clk_ctrl_12_wdt1; /* 0x0070 Control Settings for CLK12 - Watchdog Timer 1 ScaledSysClk */ |
| mbed_official | 514:7668256dbe61 | 213 | __IO uint32_t clk_ctrl_13_rtc_int_sync; /* 0x0074 Control Settings for CLK13 - RTC Interrupt Sync Clock */ |
| mbed_official | 514:7668256dbe61 | 214 | __IO uint32_t clk_ctrl_14_dac0; /* 0x0078 Control Settings for CLK14 - 12-bit DAC 0 Clock */ |
| mbed_official | 514:7668256dbe61 | 215 | __IO uint32_t clk_ctrl_15_dac1; /* 0x007C Control Settings for CLK15 - 12-bit DAC 1 Clock */ |
| mbed_official | 514:7668256dbe61 | 216 | __IO uint32_t clk_ctrl_16_dac2; /* 0x0080 Control Settings for CLK16 - 8-bit DAC 0 Clock */ |
| mbed_official | 514:7668256dbe61 | 217 | __IO uint32_t clk_ctrl_17_dac3; /* 0x0084 Control Settings for CLK17 - 8-bit DAC 1 Clock */ |
| mbed_official | 514:7668256dbe61 | 218 | __I uint32_t rsv0088[30]; /* 0x0088 */ |
| mbed_official | 514:7668256dbe61 | 219 | __IO uint32_t crypt_clk_ctrl_0_aes; /* 0x0100 Control Settings for Crypto Clock 0 - AES */ |
| mbed_official | 514:7668256dbe61 | 220 | __IO uint32_t crypt_clk_ctrl_1_maa; /* 0x0104 Control Settings for Crypto Clock 1 - MAA */ |
| mbed_official | 514:7668256dbe61 | 221 | __IO uint32_t crypt_clk_ctrl_2_prng; /* 0x0108 Control Settings for Crypto Clock 2 - PRNG */ |
| mbed_official | 514:7668256dbe61 | 222 | __I uint32_t rsv010C[13]; /* 0x010C */ |
| mbed_official | 514:7668256dbe61 | 223 | __IO uint32_t clk_gate_ctrl0; /* 0x0140 Dynamic Clock Gating Control Register 0 */ |
| mbed_official | 514:7668256dbe61 | 224 | __IO uint32_t clk_gate_ctrl1; /* 0x0144 Dynamic Clock Gating Control Register 1 */ |
| mbed_official | 514:7668256dbe61 | 225 | __IO uint32_t clk_gate_ctrl2; /* 0x0148 Dynamic Clock Gating Control Register 2 */ |
| mbed_official | 514:7668256dbe61 | 226 | } mxc_clkman_regs_t; |
| mbed_official | 514:7668256dbe61 | 227 | |
| mbed_official | 514:7668256dbe61 | 228 | /* |
| mbed_official | 514:7668256dbe61 | 229 | Register offsets for module CLKMAN. |
| mbed_official | 514:7668256dbe61 | 230 | */ |
| mbed_official | 514:7668256dbe61 | 231 | #define MXC_R_CLKMAN_OFFS_CLK_CONFIG ((uint32_t)0x00000000UL) |
| mbed_official | 514:7668256dbe61 | 232 | #define MXC_R_CLKMAN_OFFS_CLK_CTRL ((uint32_t)0x00000004UL) |
| mbed_official | 514:7668256dbe61 | 233 | #define MXC_R_CLKMAN_OFFS_INTFL ((uint32_t)0x00000008UL) |
| mbed_official | 514:7668256dbe61 | 234 | #define MXC_R_CLKMAN_OFFS_INTEN ((uint32_t)0x0000000CUL) |
| mbed_official | 514:7668256dbe61 | 235 | #define MXC_R_CLKMAN_OFFS_TRIM_CALC ((uint32_t)0x00000010UL) |
| mbed_official | 514:7668256dbe61 | 236 | #define MXC_R_CLKMAN_OFFS_I2C_TIMER_CTRL ((uint32_t)0x00000024UL) |
| mbed_official | 514:7668256dbe61 | 237 | #define MXC_R_CLKMAN_OFFS_CLK_CTRL_0_SYSTEM ((uint32_t)0x00000040UL) |
| mbed_official | 514:7668256dbe61 | 238 | #define MXC_R_CLKMAN_OFFS_CLK_CTRL_1_GPIO ((uint32_t)0x00000044UL) |
| mbed_official | 514:7668256dbe61 | 239 | #define MXC_R_CLKMAN_OFFS_CLK_CTRL_2_PT ((uint32_t)0x00000048UL) |
| mbed_official | 514:7668256dbe61 | 240 | #define MXC_R_CLKMAN_OFFS_CLK_CTRL_3_SPI0 ((uint32_t)0x0000004CUL) |
| mbed_official | 514:7668256dbe61 | 241 | #define MXC_R_CLKMAN_OFFS_CLK_CTRL_4_SPI1 ((uint32_t)0x00000050UL) |
| mbed_official | 514:7668256dbe61 | 242 | #define MXC_R_CLKMAN_OFFS_CLK_CTRL_5_SPI2 ((uint32_t)0x00000054UL) |
| mbed_official | 514:7668256dbe61 | 243 | #define MXC_R_CLKMAN_OFFS_CLK_CTRL_6_I2CM ((uint32_t)0x00000058UL) |
| mbed_official | 514:7668256dbe61 | 244 | #define MXC_R_CLKMAN_OFFS_CLK_CTRL_7_I2CS ((uint32_t)0x0000005CUL) |
| mbed_official | 514:7668256dbe61 | 245 | #define MXC_R_CLKMAN_OFFS_CLK_CTRL_8_LCD_CHPUMP ((uint32_t)0x00000060UL) |
| mbed_official | 514:7668256dbe61 | 246 | #define MXC_R_CLKMAN_OFFS_CLK_CTRL_9_PUF ((uint32_t)0x00000064UL) |
| mbed_official | 514:7668256dbe61 | 247 | #define MXC_R_CLKMAN_OFFS_CLK_CTRL_10_PRNG ((uint32_t)0x00000068UL) |
| mbed_official | 514:7668256dbe61 | 248 | #define MXC_R_CLKMAN_OFFS_CLK_CTRL_11_WDT0 ((uint32_t)0x0000006CUL) |
| mbed_official | 514:7668256dbe61 | 249 | #define MXC_R_CLKMAN_OFFS_CLK_CTRL_12_WDT1 ((uint32_t)0x00000070UL) |
| mbed_official | 514:7668256dbe61 | 250 | #define MXC_R_CLKMAN_OFFS_CLK_CTRL_13_RTC_INT_SYNC ((uint32_t)0x00000074UL) |
| mbed_official | 514:7668256dbe61 | 251 | #define MXC_R_CLKMAN_OFFS_CLK_CTRL_14_DAC0 ((uint32_t)0x00000078UL) |
| mbed_official | 514:7668256dbe61 | 252 | #define MXC_R_CLKMAN_OFFS_CLK_CTRL_15_DAC1 ((uint32_t)0x0000007CUL) |
| mbed_official | 514:7668256dbe61 | 253 | #define MXC_R_CLKMAN_OFFS_CLK_CTRL_16_DAC2 ((uint32_t)0x00000080UL) |
| mbed_official | 514:7668256dbe61 | 254 | #define MXC_R_CLKMAN_OFFS_CLK_CTRL_17_DAC3 ((uint32_t)0x00000084UL) |
| mbed_official | 514:7668256dbe61 | 255 | #define MXC_R_CLKMAN_OFFS_CRYPT_CLK_CTRL_0_AES ((uint32_t)0x00000100UL) |
| mbed_official | 514:7668256dbe61 | 256 | #define MXC_R_CLKMAN_OFFS_CRYPT_CLK_CTRL_1_MAA ((uint32_t)0x00000104UL) |
| mbed_official | 514:7668256dbe61 | 257 | #define MXC_R_CLKMAN_OFFS_CRYPT_CLK_CTRL_2_PRNG ((uint32_t)0x00000108UL) |
| mbed_official | 514:7668256dbe61 | 258 | #define MXC_R_CLKMAN_OFFS_CLK_GATE_CTRL0 ((uint32_t)0x00000140UL) |
| mbed_official | 514:7668256dbe61 | 259 | #define MXC_R_CLKMAN_OFFS_CLK_GATE_CTRL1 ((uint32_t)0x00000144UL) |
| mbed_official | 514:7668256dbe61 | 260 | #define MXC_R_CLKMAN_OFFS_CLK_GATE_CTRL2 ((uint32_t)0x00000148UL) |
| mbed_official | 514:7668256dbe61 | 261 | |
| mbed_official | 514:7668256dbe61 | 262 | /* |
| mbed_official | 514:7668256dbe61 | 263 | Field positions and masks for module CLKMAN. |
| mbed_official | 514:7668256dbe61 | 264 | */ |
| mbed_official | 514:7668256dbe61 | 265 | #define MXC_F_CLKMAN_CLK_CONFIG_HFX_ENABLE_POS 0 |
| mbed_official | 514:7668256dbe61 | 266 | #define MXC_F_CLKMAN_CLK_CONFIG_HFX_ENABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_HFX_ENABLE_POS)) |
| mbed_official | 514:7668256dbe61 | 267 | #define MXC_F_CLKMAN_CLK_CONFIG_HFX_BYPASS_POS 1 |
| mbed_official | 514:7668256dbe61 | 268 | #define MXC_F_CLKMAN_CLK_CONFIG_HFX_BYPASS ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_HFX_BYPASS_POS)) |
| mbed_official | 514:7668256dbe61 | 269 | #define MXC_F_CLKMAN_CLK_CONFIG_HFX_TEST_ENABLE_POS 2 |
| mbed_official | 514:7668256dbe61 | 270 | #define MXC_F_CLKMAN_CLK_CONFIG_HFX_TEST_ENABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_HFX_TEST_ENABLE_POS)) |
| mbed_official | 514:7668256dbe61 | 271 | #define MXC_F_CLKMAN_CLK_CONFIG_HFX_GM_ADJUST_POS 4 |
| mbed_official | 514:7668256dbe61 | 272 | #define MXC_F_CLKMAN_CLK_CONFIG_HFX_GM_ADJUST ((uint32_t)(0x0000001FUL << MXC_F_CLKMAN_CLK_CONFIG_HFX_GM_ADJUST_POS)) |
| mbed_official | 514:7668256dbe61 | 273 | #define MXC_F_CLKMAN_CLK_CONFIG_HFX_DC_CONTROL_POS 9 |
| mbed_official | 514:7668256dbe61 | 274 | #define MXC_F_CLKMAN_CLK_CONFIG_HFX_DC_CONTROL ((uint32_t)(0x00000007UL << MXC_F_CLKMAN_CLK_CONFIG_HFX_DC_CONTROL_POS)) |
| mbed_official | 514:7668256dbe61 | 275 | #define MXC_F_CLKMAN_CLK_CONFIG_PLL_ENABLE_POS 12 |
| mbed_official | 514:7668256dbe61 | 276 | #define MXC_F_CLKMAN_CLK_CONFIG_PLL_ENABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_ENABLE_POS)) |
| mbed_official | 514:7668256dbe61 | 277 | #define MXC_F_CLKMAN_CLK_CONFIG_PLL_RESET_N_POS 13 |
| mbed_official | 514:7668256dbe61 | 278 | #define MXC_F_CLKMAN_CLK_CONFIG_PLL_RESET_N ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_RESET_N_POS)) |
| mbed_official | 514:7668256dbe61 | 279 | #define MXC_F_CLKMAN_CLK_CONFIG_PLL_INPUT_SELECT_POS 14 |
| mbed_official | 514:7668256dbe61 | 280 | #define MXC_F_CLKMAN_CLK_CONFIG_PLL_INPUT_SELECT ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_INPUT_SELECT_POS)) |
| mbed_official | 514:7668256dbe61 | 281 | #define MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT_POS 16 |
| mbed_official | 514:7668256dbe61 | 282 | #define MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_DIVISOR_SELECT_POS)) |
| mbed_official | 514:7668256dbe61 | 283 | #define MXC_F_CLKMAN_CLK_CONFIG_PLL_8MHZ_ENABLE_POS 18 |
| mbed_official | 514:7668256dbe61 | 284 | #define MXC_F_CLKMAN_CLK_CONFIG_PLL_8MHZ_ENABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_8MHZ_ENABLE_POS)) |
| mbed_official | 514:7668256dbe61 | 285 | #define MXC_F_CLKMAN_CLK_CONFIG_PLL_BYPASS_POS 19 |
| mbed_official | 514:7668256dbe61 | 286 | #define MXC_F_CLKMAN_CLK_CONFIG_PLL_BYPASS ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_PLL_BYPASS_POS)) |
| mbed_official | 514:7668256dbe61 | 287 | #define MXC_F_CLKMAN_CLK_CONFIG_PLL_STABILITY_COUNT_POS 20 |
| mbed_official | 514:7668256dbe61 | 288 | #define MXC_F_CLKMAN_CLK_CONFIG_PLL_STABILITY_COUNT ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CONFIG_PLL_STABILITY_COUNT_POS)) |
| mbed_official | 514:7668256dbe61 | 289 | #define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_ENABLE_POS 24 |
| mbed_official | 514:7668256dbe61 | 290 | #define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_ENABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_ENABLE_POS)) |
| mbed_official | 514:7668256dbe61 | 291 | #define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_RESET_N_POS 25 |
| mbed_official | 514:7668256dbe61 | 292 | #define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_RESET_N ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_RESET_N_POS)) |
| mbed_official | 514:7668256dbe61 | 293 | #define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_STABILITY_COUNT_POS 28 |
| mbed_official | 514:7668256dbe61 | 294 | #define MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_STABILITY_COUNT ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_STABILITY_COUNT_POS)) |
| mbed_official | 514:7668256dbe61 | 295 | |
| mbed_official | 514:7668256dbe61 | 296 | #define MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT_POS 1 |
| mbed_official | 514:7668256dbe61 | 297 | #define MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT_POS)) |
| mbed_official | 514:7668256dbe61 | 298 | #define MXC_F_CLKMAN_CLK_CTRL_AUTO_CLK_DISABLE_POS 3 |
| mbed_official | 514:7668256dbe61 | 299 | #define MXC_F_CLKMAN_CLK_CTRL_AUTO_CLK_DISABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_AUTO_CLK_DISABLE_POS)) |
| mbed_official | 514:7668256dbe61 | 300 | #define MXC_F_CLKMAN_CLK_CTRL_USB_GATE_N_POS 4 |
| mbed_official | 514:7668256dbe61 | 301 | #define MXC_F_CLKMAN_CLK_CTRL_USB_GATE_N ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_USB_GATE_N_POS)) |
| mbed_official | 514:7668256dbe61 | 302 | #define MXC_F_CLKMAN_CLK_CTRL_ADC_GATE_N_POS 8 |
| mbed_official | 514:7668256dbe61 | 303 | #define MXC_F_CLKMAN_CLK_CTRL_ADC_GATE_N ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_ADC_GATE_N_POS)) |
| mbed_official | 514:7668256dbe61 | 304 | #define MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT_POS 9 |
| mbed_official | 514:7668256dbe61 | 305 | #define MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_CTRL_ADC_SOURCE_SELECT_POS)) |
| mbed_official | 514:7668256dbe61 | 306 | #define MXC_F_CLKMAN_CLK_CTRL_CRYPTO_GATE_N_POS 12 |
| mbed_official | 514:7668256dbe61 | 307 | #define MXC_F_CLKMAN_CLK_CTRL_CRYPTO_GATE_N ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_CRYPTO_GATE_N_POS)) |
| mbed_official | 514:7668256dbe61 | 308 | #define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_GATE_N_POS 16 |
| mbed_official | 514:7668256dbe61 | 309 | #define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_GATE_N ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_GATE_N_POS)) |
| mbed_official | 514:7668256dbe61 | 310 | #define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_SOURCE_SELECT_POS 17 |
| mbed_official | 514:7668256dbe61 | 311 | #define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_SOURCE_SELECT ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_CTRL_WATCHDOG0_SOURCE_SELECT_POS)) |
| mbed_official | 514:7668256dbe61 | 312 | #define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_GATE_N_POS 20 |
| mbed_official | 514:7668256dbe61 | 313 | #define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_GATE_N ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_GATE_N_POS)) |
| mbed_official | 514:7668256dbe61 | 314 | #define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_SOURCE_SELECT_POS 21 |
| mbed_official | 514:7668256dbe61 | 315 | #define MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_SOURCE_SELECT ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_CTRL_WATCHDOG1_SOURCE_SELECT_POS)) |
| mbed_official | 514:7668256dbe61 | 316 | #define MXC_F_CLKMAN_CLK_CTRL_RTOS_MODE_POS 24 |
| mbed_official | 514:7668256dbe61 | 317 | #define MXC_F_CLKMAN_CLK_CTRL_RTOS_MODE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_CLK_CTRL_RTOS_MODE_POS)) |
| mbed_official | 514:7668256dbe61 | 318 | |
| mbed_official | 514:7668256dbe61 | 319 | #define MXC_F_CLKMAN_INTFL_RING_STABLE_POS 0 |
| mbed_official | 514:7668256dbe61 | 320 | #define MXC_F_CLKMAN_INTFL_RING_STABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTFL_RING_STABLE_POS)) |
| mbed_official | 514:7668256dbe61 | 321 | #define MXC_F_CLKMAN_INTFL_PLL_STABLE_POS 1 |
| mbed_official | 514:7668256dbe61 | 322 | #define MXC_F_CLKMAN_INTFL_PLL_STABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTFL_PLL_STABLE_POS)) |
| mbed_official | 514:7668256dbe61 | 323 | #define MXC_F_CLKMAN_INTFL_CRYPTO_STABLE_POS 2 |
| mbed_official | 514:7668256dbe61 | 324 | #define MXC_F_CLKMAN_INTFL_CRYPTO_STABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTFL_CRYPTO_STABLE_POS)) |
| mbed_official | 514:7668256dbe61 | 325 | |
| mbed_official | 514:7668256dbe61 | 326 | #define MXC_F_CLKMAN_INTEN_RING_STABLE_POS 0 |
| mbed_official | 514:7668256dbe61 | 327 | #define MXC_F_CLKMAN_INTEN_RING_STABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTEN_RING_STABLE_POS)) |
| mbed_official | 514:7668256dbe61 | 328 | #define MXC_F_CLKMAN_INTEN_PLL_STABLE_POS 1 |
| mbed_official | 514:7668256dbe61 | 329 | #define MXC_F_CLKMAN_INTEN_PLL_STABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTEN_PLL_STABLE_POS)) |
| mbed_official | 514:7668256dbe61 | 330 | #define MXC_F_CLKMAN_INTEN_CRYPTO_STABLE_POS 2 |
| mbed_official | 514:7668256dbe61 | 331 | #define MXC_F_CLKMAN_INTEN_CRYPTO_STABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_INTEN_CRYPTO_STABLE_POS)) |
| mbed_official | 514:7668256dbe61 | 332 | |
| mbed_official | 514:7668256dbe61 | 333 | #define MXC_F_CLKMAN_TRIM_CALC_TRIM_CLK_SEL_POS 0 |
| mbed_official | 514:7668256dbe61 | 334 | #define MXC_F_CLKMAN_TRIM_CALC_TRIM_CLK_SEL ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_TRIM_CALC_TRIM_CLK_SEL_POS)) |
| mbed_official | 514:7668256dbe61 | 335 | #define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_START_POS 1 |
| mbed_official | 514:7668256dbe61 | 336 | #define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_START ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_START_POS)) |
| mbed_official | 514:7668256dbe61 | 337 | #define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_COMPLETED_POS 2 |
| mbed_official | 514:7668256dbe61 | 338 | #define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_COMPLETED ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_COMPLETED_POS)) |
| mbed_official | 514:7668256dbe61 | 339 | #define MXC_F_CLKMAN_TRIM_CALC_TRIM_ENABLE_POS 3 |
| mbed_official | 514:7668256dbe61 | 340 | #define MXC_F_CLKMAN_TRIM_CALC_TRIM_ENABLE ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_TRIM_CALC_TRIM_ENABLE_POS)) |
| mbed_official | 514:7668256dbe61 | 341 | #define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_RESULTS_POS 16 |
| mbed_official | 514:7668256dbe61 | 342 | #define MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_RESULTS ((uint32_t)(0x000003FFUL << MXC_F_CLKMAN_TRIM_CALC_TRIM_CALC_RESULTS_POS)) |
| mbed_official | 514:7668256dbe61 | 343 | |
| mbed_official | 514:7668256dbe61 | 344 | #define MXC_F_CLKMAN_I2C_TIMER_CTRL_I2C_1MS_TIMER_EN_POS 0 |
| mbed_official | 514:7668256dbe61 | 345 | #define MXC_F_CLKMAN_I2C_TIMER_CTRL_I2C_1MS_TIMER_EN ((uint32_t)(0x00000001UL << MXC_F_CLKMAN_I2C_TIMER_CTRL_I2C_1MS_TIMER_EN_POS)) |
| mbed_official | 514:7668256dbe61 | 346 | |
| mbed_official | 514:7668256dbe61 | 347 | #define MXC_F_CLKMAN_CLK_CTRL_0_SYSTEM_SYS_CLK_SCALE_POS 0 |
| mbed_official | 514:7668256dbe61 | 348 | #define MXC_F_CLKMAN_CLK_CTRL_0_SYSTEM_SYS_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_0_SYSTEM_SYS_CLK_SCALE_POS)) |
| mbed_official | 514:7668256dbe61 | 349 | |
| mbed_official | 514:7668256dbe61 | 350 | #define MXC_F_CLKMAN_CLK_CTRL_1_GPIO_GPIO_CLK_SCALE_POS 0 |
| mbed_official | 514:7668256dbe61 | 351 | #define MXC_F_CLKMAN_CLK_CTRL_1_GPIO_GPIO_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_1_GPIO_GPIO_CLK_SCALE_POS)) |
| mbed_official | 514:7668256dbe61 | 352 | |
| mbed_official | 514:7668256dbe61 | 353 | #define MXC_F_CLKMAN_CLK_CTRL_2_PT_PULSE_TRAIN_CLK_SCALE_POS 0 |
| mbed_official | 514:7668256dbe61 | 354 | #define MXC_F_CLKMAN_CLK_CTRL_2_PT_PULSE_TRAIN_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_2_PT_PULSE_TRAIN_CLK_SCALE_POS)) |
| mbed_official | 514:7668256dbe61 | 355 | |
| mbed_official | 514:7668256dbe61 | 356 | #define MXC_F_CLKMAN_CLK_CTRL_3_SPI0_SPI0_CLK_SCALE_POS 0 |
| mbed_official | 514:7668256dbe61 | 357 | #define MXC_F_CLKMAN_CLK_CTRL_3_SPI0_SPI0_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_3_SPI0_SPI0_CLK_SCALE_POS)) |
| mbed_official | 514:7668256dbe61 | 358 | |
| mbed_official | 514:7668256dbe61 | 359 | #define MXC_F_CLKMAN_CLK_CTRL_4_SPI1_SPI1_CLK_SCALE_POS 0 |
| mbed_official | 514:7668256dbe61 | 360 | #define MXC_F_CLKMAN_CLK_CTRL_4_SPI1_SPI1_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_4_SPI1_SPI1_CLK_SCALE_POS)) |
| mbed_official | 514:7668256dbe61 | 361 | |
| mbed_official | 514:7668256dbe61 | 362 | #define MXC_F_CLKMAN_CLK_CTRL_5_SPI2_SPI2_CLK_SCALE_POS 0 |
| mbed_official | 514:7668256dbe61 | 363 | #define MXC_F_CLKMAN_CLK_CTRL_5_SPI2_SPI2_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_5_SPI2_SPI2_CLK_SCALE_POS)) |
| mbed_official | 514:7668256dbe61 | 364 | |
| mbed_official | 514:7668256dbe61 | 365 | #define MXC_F_CLKMAN_CLK_CTRL_6_I2CM_I2CM_CLK_SCALE_POS 0 |
| mbed_official | 514:7668256dbe61 | 366 | #define MXC_F_CLKMAN_CLK_CTRL_6_I2CM_I2CM_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_6_I2CM_I2CM_CLK_SCALE_POS)) |
| mbed_official | 514:7668256dbe61 | 367 | |
| mbed_official | 514:7668256dbe61 | 368 | #define MXC_F_CLKMAN_CLK_CTRL_7_I2CS_I2CS_CLK_SCALE_POS 0 |
| mbed_official | 514:7668256dbe61 | 369 | #define MXC_F_CLKMAN_CLK_CTRL_7_I2CS_I2CS_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_7_I2CS_I2CS_CLK_SCALE_POS)) |
| mbed_official | 514:7668256dbe61 | 370 | |
| mbed_official | 514:7668256dbe61 | 371 | #define MXC_F_CLKMAN_CLK_CTRL_8_LCD_CHPUMP_LCD_CLK_SCALE_POS 0 |
| mbed_official | 514:7668256dbe61 | 372 | #define MXC_F_CLKMAN_CLK_CTRL_8_LCD_CHPUMP_LCD_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_8_LCD_CHPUMP_LCD_CLK_SCALE_POS)) |
| mbed_official | 514:7668256dbe61 | 373 | |
| mbed_official | 514:7668256dbe61 | 374 | #define MXC_F_CLKMAN_CLK_CTRL_9_PUF_PUF_CLK_SCALE_POS 0 |
| mbed_official | 514:7668256dbe61 | 375 | #define MXC_F_CLKMAN_CLK_CTRL_9_PUF_PUF_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_9_PUF_PUF_CLK_SCALE_POS)) |
| mbed_official | 514:7668256dbe61 | 376 | |
| mbed_official | 514:7668256dbe61 | 377 | #define MXC_F_CLKMAN_CLK_CTRL_10_PRNG_PRNG_CLK_SCALE_POS 0 |
| mbed_official | 514:7668256dbe61 | 378 | #define MXC_F_CLKMAN_CLK_CTRL_10_PRNG_PRNG_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_10_PRNG_PRNG_CLK_SCALE_POS)) |
| mbed_official | 514:7668256dbe61 | 379 | |
| mbed_official | 514:7668256dbe61 | 380 | #define MXC_F_CLKMAN_CLK_CTRL_11_WDT0_WATCHDOG0_CLK_SCALE_POS 0 |
| mbed_official | 514:7668256dbe61 | 381 | #define MXC_F_CLKMAN_CLK_CTRL_11_WDT0_WATCHDOG0_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_11_WDT0_WATCHDOG0_CLK_SCALE_POS)) |
| mbed_official | 514:7668256dbe61 | 382 | |
| mbed_official | 514:7668256dbe61 | 383 | #define MXC_F_CLKMAN_CLK_CTRL_12_WDT1_WATCHDOG1_CLK_SCALE_POS 0 |
| mbed_official | 514:7668256dbe61 | 384 | #define MXC_F_CLKMAN_CLK_CTRL_12_WDT1_WATCHDOG1_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_12_WDT1_WATCHDOG1_CLK_SCALE_POS)) |
| mbed_official | 514:7668256dbe61 | 385 | |
| mbed_official | 514:7668256dbe61 | 386 | #define MXC_F_CLKMAN_CLK_CTRL_13_RTC_INT_SYNC_RTC_CLK_SCALE_POS 0 |
| mbed_official | 514:7668256dbe61 | 387 | #define MXC_F_CLKMAN_CLK_CTRL_13_RTC_INT_SYNC_RTC_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_13_RTC_INT_SYNC_RTC_CLK_SCALE_POS)) |
| mbed_official | 514:7668256dbe61 | 388 | |
| mbed_official | 514:7668256dbe61 | 389 | #define MXC_F_CLKMAN_CLK_CTRL_14_DAC0_DAC0_CLK_SCALE_POS 0 |
| mbed_official | 514:7668256dbe61 | 390 | #define MXC_F_CLKMAN_CLK_CTRL_14_DAC0_DAC0_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_14_DAC0_DAC0_CLK_SCALE_POS)) |
| mbed_official | 514:7668256dbe61 | 391 | |
| mbed_official | 514:7668256dbe61 | 392 | #define MXC_F_CLKMAN_CLK_CTRL_15_DAC1_DAC1_CLK_SCALE_POS 0 |
| mbed_official | 514:7668256dbe61 | 393 | #define MXC_F_CLKMAN_CLK_CTRL_15_DAC1_DAC1_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_15_DAC1_DAC1_CLK_SCALE_POS)) |
| mbed_official | 514:7668256dbe61 | 394 | |
| mbed_official | 514:7668256dbe61 | 395 | #define MXC_F_CLKMAN_CLK_CTRL_16_DAC2_DAC2_CLK_SCALE_POS 0 |
| mbed_official | 514:7668256dbe61 | 396 | #define MXC_F_CLKMAN_CLK_CTRL_16_DAC2_DAC2_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_16_DAC2_DAC2_CLK_SCALE_POS)) |
| mbed_official | 514:7668256dbe61 | 397 | |
| mbed_official | 514:7668256dbe61 | 398 | #define MXC_F_CLKMAN_CLK_CTRL_17_DAC3_DAC3_CLK_SCALE_POS 0 |
| mbed_official | 514:7668256dbe61 | 399 | #define MXC_F_CLKMAN_CLK_CTRL_17_DAC3_DAC3_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CLK_CTRL_17_DAC3_DAC3_CLK_SCALE_POS)) |
| mbed_official | 514:7668256dbe61 | 400 | |
| mbed_official | 514:7668256dbe61 | 401 | #define MXC_F_CLKMAN_CRYPT_CLK_CTRL_0_AES_AES_CLK_SCALE_POS 0 |
| mbed_official | 514:7668256dbe61 | 402 | #define MXC_F_CLKMAN_CRYPT_CLK_CTRL_0_AES_AES_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CRYPT_CLK_CTRL_0_AES_AES_CLK_SCALE_POS)) |
| mbed_official | 514:7668256dbe61 | 403 | |
| mbed_official | 514:7668256dbe61 | 404 | #define MXC_F_CLKMAN_CRYPT_CLK_CTRL_1_MAA_UMAA_CLK_SCALE_POS 0 |
| mbed_official | 514:7668256dbe61 | 405 | #define MXC_F_CLKMAN_CRYPT_CLK_CTRL_1_MAA_UMAA_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CRYPT_CLK_CTRL_1_MAA_UMAA_CLK_SCALE_POS)) |
| mbed_official | 514:7668256dbe61 | 406 | |
| mbed_official | 514:7668256dbe61 | 407 | #define MXC_F_CLKMAN_CRYPT_CLK_CTRL_2_PRNG_PRNG_CLK_SCALE_POS 0 |
| mbed_official | 514:7668256dbe61 | 408 | #define MXC_F_CLKMAN_CRYPT_CLK_CTRL_2_PRNG_PRNG_CLK_SCALE ((uint32_t)(0x0000000FUL << MXC_F_CLKMAN_CRYPT_CLK_CTRL_2_PRNG_PRNG_CLK_SCALE_POS)) |
| mbed_official | 514:7668256dbe61 | 409 | |
| mbed_official | 514:7668256dbe61 | 410 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_CM3_CLK_GATER_POS 0 |
| mbed_official | 514:7668256dbe61 | 411 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_CM3_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_CM3_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 412 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSBUS_CLK_GATER_POS 2 |
| mbed_official | 514:7668256dbe61 | 413 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSBUS_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSBUS_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 414 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_ICACHE_CLK_GATER_POS 4 |
| mbed_official | 514:7668256dbe61 | 415 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_ICACHE_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_ICACHE_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 416 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_FLASH_CLK_GATER_POS 6 |
| mbed_official | 514:7668256dbe61 | 417 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_FLASH_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_FLASH_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 418 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_SRAM_CLK_GATER_POS 8 |
| mbed_official | 514:7668256dbe61 | 419 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_SRAM_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_SRAM_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 420 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_APB_BRIDGE_CLK_GATER_POS 10 |
| mbed_official | 514:7668256dbe61 | 421 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_APB_BRIDGE_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_APB_BRIDGE_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 422 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSMAN_CLK_GATER_POS 12 |
| mbed_official | 514:7668256dbe61 | 423 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSMAN_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_SYSMAN_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 424 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_UART0_CLK_GATER_POS 14 |
| mbed_official | 514:7668256dbe61 | 425 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_UART0_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_UART0_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 426 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_UART1_CLK_GATER_POS 16 |
| mbed_official | 514:7668256dbe61 | 427 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_UART1_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_UART1_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 428 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER0_CLK_GATER_POS 18 |
| mbed_official | 514:7668256dbe61 | 429 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER0_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER0_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 430 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER1_CLK_GATER_POS 20 |
| mbed_official | 514:7668256dbe61 | 431 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER1_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER1_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 432 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER2_CLK_GATER_POS 22 |
| mbed_official | 514:7668256dbe61 | 433 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER2_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER2_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 434 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER3_CLK_GATER_POS 24 |
| mbed_official | 514:7668256dbe61 | 435 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER3_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_TIMER3_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 436 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG0_CLK_GATER_POS 26 |
| mbed_official | 514:7668256dbe61 | 437 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG0_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG0_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 438 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG1_CLK_GATER_POS 28 |
| mbed_official | 514:7668256dbe61 | 439 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG1_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_WATCHDOG1_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 440 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_USB_CLK_GATER_POS 30 |
| mbed_official | 514:7668256dbe61 | 441 | #define MXC_F_CLKMAN_CLK_GATE_CTRL0_USB_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL0_USB_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 442 | |
| mbed_official | 514:7668256dbe61 | 443 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_TESTACC_CLK_GATER_POS 0 |
| mbed_official | 514:7668256dbe61 | 444 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_TESTACC_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_TESTACC_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 445 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_ADC_CLK_GATER_POS 2 |
| mbed_official | 514:7668256dbe61 | 446 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_ADC_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_ADC_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 447 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_0_CLK_GATER_POS 4 |
| mbed_official | 514:7668256dbe61 | 448 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_0_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_0_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 449 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_1_CLK_GATER_POS 6 |
| mbed_official | 514:7668256dbe61 | 450 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_1_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC12_1_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 451 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_0_CLK_GATER_POS 8 |
| mbed_official | 514:7668256dbe61 | 452 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_0_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_0_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 453 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_1_CLK_GATER_POS 10 |
| mbed_official | 514:7668256dbe61 | 454 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_1_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_DAC8_1_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 455 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_PMU_CLK_GATER_POS 12 |
| mbed_official | 514:7668256dbe61 | 456 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_PMU_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_PMU_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 457 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_LCD_CLK_GATER_POS 14 |
| mbed_official | 514:7668256dbe61 | 458 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_LCD_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_LCD_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 459 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_GPIO_CLK_GATER_POS 16 |
| mbed_official | 514:7668256dbe61 | 460 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_GPIO_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_GPIO_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 461 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_PULSETRAIN_CLK_GATER_POS 18 |
| mbed_official | 514:7668256dbe61 | 462 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_PULSETRAIN_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_PULSETRAIN_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 463 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI0_CLK_GATER_POS 20 |
| mbed_official | 514:7668256dbe61 | 464 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI0_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI0_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 465 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI1_CLK_GATER_POS 22 |
| mbed_official | 514:7668256dbe61 | 466 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI1_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI1_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 467 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI2_CLK_GATER_POS 24 |
| mbed_official | 514:7668256dbe61 | 468 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI2_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_SPI2_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 469 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM0_CLK_GATER_POS 26 |
| mbed_official | 514:7668256dbe61 | 470 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM0_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM0_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 471 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM1_CLK_GATER_POS 28 |
| mbed_official | 514:7668256dbe61 | 472 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM1_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CM1_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 473 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CS_CLK_GATER_POS 30 |
| mbed_official | 514:7668256dbe61 | 474 | #define MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CS_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL1_I2CS_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 475 | |
| mbed_official | 514:7668256dbe61 | 476 | #define MXC_F_CLKMAN_CLK_GATE_CTRL2_CRC_CLK_GATER_POS 0 |
| mbed_official | 514:7668256dbe61 | 477 | #define MXC_F_CLKMAN_CLK_GATE_CTRL2_CRC_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL2_CRC_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 478 | #define MXC_F_CLKMAN_CLK_GATE_CTRL2_TPU_CLK_GATER_POS 2 |
| mbed_official | 514:7668256dbe61 | 479 | #define MXC_F_CLKMAN_CLK_GATE_CTRL2_TPU_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL2_TPU_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 480 | #define MXC_F_CLKMAN_CLK_GATE_CTRL2_SSBMUX_CLK_GATER_POS 4 |
| mbed_official | 514:7668256dbe61 | 481 | #define MXC_F_CLKMAN_CLK_GATE_CTRL2_SSBMUX_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL2_SSBMUX_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 482 | #define MXC_F_CLKMAN_CLK_GATE_CTRL2_PAD_CLK_GATER_POS 6 |
| mbed_official | 514:7668256dbe61 | 483 | #define MXC_F_CLKMAN_CLK_GATE_CTRL2_PAD_CLK_GATER ((uint32_t)(0x00000003UL << MXC_F_CLKMAN_CLK_GATE_CTRL2_PAD_CLK_GATER_POS)) |
| mbed_official | 514:7668256dbe61 | 484 | |
| mbed_official | 514:7668256dbe61 | 485 | #ifdef __cplusplus |
| mbed_official | 514:7668256dbe61 | 486 | } |
| mbed_official | 514:7668256dbe61 | 487 | #endif |
| mbed_official | 514:7668256dbe61 | 488 | |
| mbed_official | 514:7668256dbe61 | 489 | /** |
| mbed_official | 514:7668256dbe61 | 490 | * @} |
| mbed_official | 514:7668256dbe61 | 491 | */ |
| mbed_official | 514:7668256dbe61 | 492 | |
| mbed_official | 514:7668256dbe61 | 493 | #endif /* _MXC_CLKMAN_REGS_H_ */ |
