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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rcc.c@380:510f0c3515e3, 2014-11-03 (annotated)

Committer:
mbed_official
Date:
Mon Nov 03 10:15:07 2014 +0000
Revision:
380:510f0c3515e3
Parent:
targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_rcc.c@235:685d5f11838f
Child:
532:fe11edbda85c
Synchronized with git revision 417f470ba9f4882d7079611cbc576afd9c49b0ef



Full URL: https://github.com/mbedmicro/mbed/commit/417f470ba9f4882d7079611cbc576afd9c49b0ef/



Targets: Factorisation of NUCLEO_F401RE and F411RE cmsis folders

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 235:685d5f11838f 1 /**
mbed_official 235:685d5f11838f 2 ******************************************************************************
mbed_official 235:685d5f11838f 3 * @file stm32f4xx_hal_rcc.c
mbed_official 235:685d5f11838f 4 * @author MCD Application Team
mbed_official 235:685d5f11838f 5 * @version V1.1.0
mbed_official 235:685d5f11838f 6 * @date 19-June-2014
mbed_official 235:685d5f11838f 7 * @brief RCC HAL module driver.
mbed_official 235:685d5f11838f 8 * This file provides firmware functions to manage the following
mbed_official 235:685d5f11838f 9 * functionalities of the Reset and Clock Control (RCC) peripheral:
mbed_official 235:685d5f11838f 10 * + Initialization and de-initialization functions
mbed_official 235:685d5f11838f 11 * + Peripheral Control functions
mbed_official 235:685d5f11838f 12 *
mbed_official 235:685d5f11838f 13 @verbatim
mbed_official 235:685d5f11838f 14 ==============================================================================
mbed_official 235:685d5f11838f 15 ##### RCC specific features #####
mbed_official 235:685d5f11838f 16 ==============================================================================
mbed_official 235:685d5f11838f 17 [..]
mbed_official 235:685d5f11838f 18 After reset the device is running from Internal High Speed oscillator
mbed_official 235:685d5f11838f 19 (HSI 16MHz) with Flash 0 wait state, Flash prefetch buffer, D-Cache
mbed_official 235:685d5f11838f 20 and I-Cache are disabled, and all peripherals are off except internal
mbed_official 235:685d5f11838f 21 SRAM, Flash and JTAG.
mbed_official 235:685d5f11838f 22 (+) There is no prescaler on High speed (AHB) and Low speed (APB) busses;
mbed_official 235:685d5f11838f 23 all peripherals mapped on these busses are running at HSI speed.
mbed_official 235:685d5f11838f 24 (+) The clock for all peripherals is switched off, except the SRAM and FLASH.
mbed_official 235:685d5f11838f 25 (+) All GPIOs are in input floating state, except the JTAG pins which
mbed_official 235:685d5f11838f 26 are assigned to be used for debug purpose.
mbed_official 235:685d5f11838f 27
mbed_official 235:685d5f11838f 28 [..]
mbed_official 235:685d5f11838f 29 Once the device started from reset, the user application has to:
mbed_official 235:685d5f11838f 30 (+) Configure the clock source to be used to drive the System clock
mbed_official 235:685d5f11838f 31 (if the application needs higher frequency/performance)
mbed_official 235:685d5f11838f 32 (+) Configure the System clock frequency and Flash settings
mbed_official 235:685d5f11838f 33 (+) Configure the AHB and APB busses prescalers
mbed_official 235:685d5f11838f 34 (+) Enable the clock for the peripheral(s) to be used
mbed_official 235:685d5f11838f 35 (+) Configure the clock source(s) for peripherals which clocks are not
mbed_official 235:685d5f11838f 36 derived from the System clock (I2S, RTC, ADC, USB OTG FS/SDIO/RNG)
mbed_official 235:685d5f11838f 37
mbed_official 235:685d5f11838f 38 @endverbatim
mbed_official 235:685d5f11838f 39 ******************************************************************************
mbed_official 235:685d5f11838f 40 * @attention
mbed_official 235:685d5f11838f 41 *
mbed_official 235:685d5f11838f 42 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 235:685d5f11838f 43 *
mbed_official 235:685d5f11838f 44 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 235:685d5f11838f 45 * are permitted provided that the following conditions are met:
mbed_official 235:685d5f11838f 46 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 235:685d5f11838f 47 * this list of conditions and the following disclaimer.
mbed_official 235:685d5f11838f 48 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 235:685d5f11838f 49 * this list of conditions and the following disclaimer in the documentation
mbed_official 235:685d5f11838f 50 * and/or other materials provided with the distribution.
mbed_official 235:685d5f11838f 51 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 235:685d5f11838f 52 * may be used to endorse or promote products derived from this software
mbed_official 235:685d5f11838f 53 * without specific prior written permission.
mbed_official 235:685d5f11838f 54 *
mbed_official 235:685d5f11838f 55 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 235:685d5f11838f 56 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 235:685d5f11838f 57 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 235:685d5f11838f 58 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 235:685d5f11838f 59 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 235:685d5f11838f 60 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 235:685d5f11838f 61 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 235:685d5f11838f 62 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 235:685d5f11838f 63 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 235:685d5f11838f 64 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 235:685d5f11838f 65 *
mbed_official 235:685d5f11838f 66 ******************************************************************************
mbed_official 235:685d5f11838f 67 */
mbed_official 235:685d5f11838f 68
mbed_official 235:685d5f11838f 69 /* Includes ------------------------------------------------------------------*/
mbed_official 235:685d5f11838f 70 #include "stm32f4xx_hal.h"
mbed_official 235:685d5f11838f 71
mbed_official 235:685d5f11838f 72 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 235:685d5f11838f 73 * @{
mbed_official 235:685d5f11838f 74 */
mbed_official 235:685d5f11838f 75
mbed_official 235:685d5f11838f 76 /** @defgroup RCC
mbed_official 235:685d5f11838f 77 * @brief RCC HAL module driver
mbed_official 235:685d5f11838f 78 * @{
mbed_official 235:685d5f11838f 79 */
mbed_official 235:685d5f11838f 80
mbed_official 235:685d5f11838f 81 #ifdef HAL_RCC_MODULE_ENABLED
mbed_official 235:685d5f11838f 82
mbed_official 235:685d5f11838f 83 /* Private typedef -----------------------------------------------------------*/
mbed_official 235:685d5f11838f 84 /* Private define ------------------------------------------------------------*/
mbed_official 235:685d5f11838f 85 #define HSE_TIMEOUT_VALUE HSE_STARTUP_TIMEOUT
mbed_official 235:685d5f11838f 86 #define HSI_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */
mbed_official 235:685d5f11838f 87 #define LSI_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */
mbed_official 235:685d5f11838f 88 #define PLL_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */
mbed_official 235:685d5f11838f 89 #define CLOCKSWITCH_TIMEOUT_VALUE ((uint32_t)5000) /* 5 s */
mbed_official 235:685d5f11838f 90
mbed_official 235:685d5f11838f 91 /* Private macro -------------------------------------------------------------*/
mbed_official 235:685d5f11838f 92 #define __MCO1_CLK_ENABLE() __GPIOA_CLK_ENABLE()
mbed_official 235:685d5f11838f 93 #define MCO1_GPIO_PORT GPIOA
mbed_official 235:685d5f11838f 94 #define MCO1_PIN GPIO_PIN_8
mbed_official 235:685d5f11838f 95
mbed_official 235:685d5f11838f 96 #define __MCO2_CLK_ENABLE() __GPIOC_CLK_ENABLE()
mbed_official 235:685d5f11838f 97 #define MCO2_GPIO_PORT GPIOC
mbed_official 235:685d5f11838f 98 #define MCO2_PIN GPIO_PIN_9
mbed_official 235:685d5f11838f 99
mbed_official 235:685d5f11838f 100 /* Private variables ---------------------------------------------------------*/
mbed_official 235:685d5f11838f 101 const uint8_t APBAHBPrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9};
mbed_official 235:685d5f11838f 102
mbed_official 235:685d5f11838f 103 /* Private function prototypes -----------------------------------------------*/
mbed_official 235:685d5f11838f 104 /* Private functions ---------------------------------------------------------*/
mbed_official 235:685d5f11838f 105
mbed_official 235:685d5f11838f 106 /** @defgroup RCC_Private_Functions
mbed_official 235:685d5f11838f 107 * @{
mbed_official 235:685d5f11838f 108 */
mbed_official 235:685d5f11838f 109
mbed_official 235:685d5f11838f 110 /** @defgroup RCC_Group1 Initialization and de-initialization functions
mbed_official 235:685d5f11838f 111 * @brief Initialization and Configuration functions
mbed_official 235:685d5f11838f 112 *
mbed_official 235:685d5f11838f 113 @verbatim
mbed_official 235:685d5f11838f 114 ===============================================================================
mbed_official 235:685d5f11838f 115 ##### Initialization and de-initialization functions #####
mbed_official 235:685d5f11838f 116 ===============================================================================
mbed_official 235:685d5f11838f 117 [..]
mbed_official 235:685d5f11838f 118 This section provides functions allowing to configure the internal/external oscillators
mbed_official 235:685d5f11838f 119 (HSE, HSI, LSE, LSI, PLL, CSS and MCO) and the System busses clocks (SYSCLK, AHB, APB1
mbed_official 235:685d5f11838f 120 and APB2).
mbed_official 235:685d5f11838f 121
mbed_official 235:685d5f11838f 122 [..] Internal/external clock and PLL configuration
mbed_official 235:685d5f11838f 123 (#) HSI (high-speed internal), 16 MHz factory-trimmed RC used directly or through
mbed_official 235:685d5f11838f 124 the PLL as System clock source.
mbed_official 235:685d5f11838f 125
mbed_official 235:685d5f11838f 126 (#) LSI (low-speed internal), 32 KHz low consumption RC used as IWDG and/or RTC
mbed_official 235:685d5f11838f 127 clock source.
mbed_official 235:685d5f11838f 128
mbed_official 235:685d5f11838f 129 (#) HSE (high-speed external), 4 to 26 MHz crystal oscillator used directly or
mbed_official 235:685d5f11838f 130 through the PLL as System clock source. Can be used also as RTC clock source.
mbed_official 235:685d5f11838f 131
mbed_official 235:685d5f11838f 132 (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source.
mbed_official 235:685d5f11838f 133
mbed_official 235:685d5f11838f 134 (#) PLL (clocked by HSI or HSE), featuring two different output clocks:
mbed_official 235:685d5f11838f 135 (++) The first output is used to generate the high speed system clock (up to 168 MHz)
mbed_official 235:685d5f11838f 136 (++) The second output is used to generate the clock for the USB OTG FS (48 MHz),
mbed_official 235:685d5f11838f 137 the random analog generator (<=48 MHz) and the SDIO (<= 48 MHz).
mbed_official 235:685d5f11838f 138
mbed_official 235:685d5f11838f 139 (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE()
mbed_official 235:685d5f11838f 140 and if a HSE clock failure occurs(HSE used directly or through PLL as System
mbed_official 235:685d5f11838f 141 clock source), the System clockis automatically switched to HSI and an interrupt
mbed_official 235:685d5f11838f 142 is generated if enabled. The interrupt is linked to the Cortex-M4 NMI
mbed_official 235:685d5f11838f 143 (Non-Maskable Interrupt) exception vector.
mbed_official 235:685d5f11838f 144
mbed_official 235:685d5f11838f 145 (#) MCO1 (microcontroller clock output), used to output HSI, LSE, HSE or PLL
mbed_official 235:685d5f11838f 146 clock (through a configurable prescaler) on PA8 pin.
mbed_official 235:685d5f11838f 147
mbed_official 235:685d5f11838f 148 (#) MCO2 (microcontroller clock output), used to output HSE, PLL, SYSCLK or PLLI2S
mbed_official 235:685d5f11838f 149 clock (through a configurable prescaler) on PC9 pin.
mbed_official 235:685d5f11838f 150
mbed_official 235:685d5f11838f 151 [..] System, AHB and APB busses clocks configuration
mbed_official 235:685d5f11838f 152 (#) Several clock sources can be used to drive the System clock (SYSCLK): HSI,
mbed_official 235:685d5f11838f 153 HSE and PLL.
mbed_official 235:685d5f11838f 154 The AHB clock (HCLK) is derived from System clock through configurable
mbed_official 235:685d5f11838f 155 prescaler and used to clock the CPU, memory and peripherals mapped
mbed_official 235:685d5f11838f 156 on AHB bus (DMA, GPIO...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived
mbed_official 235:685d5f11838f 157 from AHB clock through configurable prescalers and used to clock
mbed_official 235:685d5f11838f 158 the peripherals mapped on these busses. You can use
mbed_official 235:685d5f11838f 159 "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks.
mbed_official 235:685d5f11838f 160
mbed_official 235:685d5f11838f 161 -@- All the peripheral clocks are derived from the System clock (SYSCLK) except:
mbed_official 235:685d5f11838f 162 (+@) I2S: the I2S clock can be derived either from a specific PLL (PLLI2S) or
mbed_official 235:685d5f11838f 163 from an external clock mapped on the I2S_CKIN pin.
mbed_official 235:685d5f11838f 164 You have to use __HAL_RCC_PLLI2S_CONFIG() macro to configure this clock.
mbed_official 235:685d5f11838f 165 (+@) SAI: the SAI clock can be derived either from a specific PLL (PLLI2S) or (PLLSAI) or
mbed_official 235:685d5f11838f 166 from an external clock mapped on the I2S_CKIN pin.
mbed_official 235:685d5f11838f 167 You have to use __HAL_RCC_PLLI2S_CONFIG() macro to configure this clock.
mbed_official 235:685d5f11838f 168 (+@) RTC: the RTC clock can be derived either from the LSI, LSE or HSE clock
mbed_official 235:685d5f11838f 169 divided by 2 to 31. You have to use __HAL_RCC_RTC_CONFIG() and __HAL_RCC_RTC_ENABLE()
mbed_official 235:685d5f11838f 170 macros to configure this clock.
mbed_official 235:685d5f11838f 171 (+@) USB OTG FS, SDIO and RTC: USB OTG FS require a frequency equal to 48 MHz
mbed_official 235:685d5f11838f 172 to work correctly, while the SDIO require a frequency equal or lower than
mbed_official 235:685d5f11838f 173 to 48. This clock is derived of the main PLL through PLLQ divider.
mbed_official 235:685d5f11838f 174 (+@) IWDG clock which is always the LSI clock.
mbed_official 235:685d5f11838f 175
mbed_official 235:685d5f11838f 176 (#) For the STM32F405xx/07xx and STM32F415xx/17xx devices, the maximum
mbed_official 235:685d5f11838f 177 frequency of the SYSCLK and HCLK is 168 MHz, PCLK2 84 MHz and PCLK1 42 MHz.
mbed_official 235:685d5f11838f 178 Depending on the device voltage range, the maximum frequency should
mbed_official 235:685d5f11838f 179 be adapted accordingly (refer to the product datasheets for more details).
mbed_official 235:685d5f11838f 180
mbed_official 235:685d5f11838f 181 (#) For the STM32F42xxx and STM32F43xxx devices, the maximum frequency
mbed_official 235:685d5f11838f 182 of the SYSCLK and HCLK is 180 MHz, PCLK2 90 MHz and PCLK1 45 MHz.
mbed_official 235:685d5f11838f 183 Depending on the device voltage range, the maximum frequency should
mbed_official 235:685d5f11838f 184 be adapted accordingly (refer to the product datasheets for more details).
mbed_official 235:685d5f11838f 185
mbed_official 235:685d5f11838f 186 (#) For the STM32F401xx, the maximum frequency of the SYSCLK and HCLK is 84 MHz,
mbed_official 235:685d5f11838f 187 PCLK2 84 MHz and PCLK1 42 MHz.
mbed_official 235:685d5f11838f 188 Depending on the device voltage range, the maximum frequency should
mbed_official 235:685d5f11838f 189 be adapted accordingly (refer to the product datasheets for more details).
mbed_official 235:685d5f11838f 190 @endverbatim
mbed_official 235:685d5f11838f 191 * @{
mbed_official 235:685d5f11838f 192 */
mbed_official 235:685d5f11838f 193
mbed_official 235:685d5f11838f 194 /**
mbed_official 235:685d5f11838f 195 * @brief Resets the RCC clock configuration to the default reset state.
mbed_official 235:685d5f11838f 196 * @note The default reset state of the clock configuration is given below:
mbed_official 235:685d5f11838f 197 * - HSI ON and used as system clock source
mbed_official 235:685d5f11838f 198 * - HSE, PLL and PLLI2S OFF
mbed_official 235:685d5f11838f 199 * - AHB, APB1 and APB2 prescaler set to 1.
mbed_official 235:685d5f11838f 200 * - CSS, MCO1 and MCO2 OFF
mbed_official 235:685d5f11838f 201 * - All interrupts disabled
mbed_official 235:685d5f11838f 202 * @note This function doesn't modify the configuration of the
mbed_official 235:685d5f11838f 203 * - Peripheral clocks
mbed_official 235:685d5f11838f 204 * - LSI, LSE and RTC clocks
mbed_official 235:685d5f11838f 205 * @param None
mbed_official 235:685d5f11838f 206 * @retval None
mbed_official 235:685d5f11838f 207 */
mbed_official 235:685d5f11838f 208 void HAL_RCC_DeInit(void)
mbed_official 235:685d5f11838f 209 {
mbed_official 235:685d5f11838f 210 /* Set HSION bit */
mbed_official 235:685d5f11838f 211 SET_BIT(RCC->CR, RCC_CR_HSION | RCC_CR_HSITRIM_4);
mbed_official 235:685d5f11838f 212
mbed_official 235:685d5f11838f 213 /* Reset CFGR register */
mbed_official 235:685d5f11838f 214 CLEAR_REG(RCC->CFGR);
mbed_official 235:685d5f11838f 215
mbed_official 235:685d5f11838f 216 /* Reset HSEON, CSSON, PLLON, PLLI2S */
mbed_official 235:685d5f11838f 217 CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_CSSON | RCC_CR_PLLON| RCC_CR_PLLI2SON);
mbed_official 235:685d5f11838f 218
mbed_official 235:685d5f11838f 219 /* Reset PLLCFGR register */
mbed_official 235:685d5f11838f 220 CLEAR_REG(RCC->PLLCFGR);
mbed_official 235:685d5f11838f 221 SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLN_6 | RCC_PLLCFGR_PLLN_7 | RCC_PLLCFGR_PLLQ_2);
mbed_official 235:685d5f11838f 222
mbed_official 235:685d5f11838f 223 /* Reset PLLI2SCFGR register */
mbed_official 235:685d5f11838f 224 CLEAR_REG(RCC->PLLI2SCFGR);
mbed_official 235:685d5f11838f 225 SET_BIT(RCC->PLLI2SCFGR, RCC_PLLI2SCFGR_PLLI2SN_6 | RCC_PLLI2SCFGR_PLLI2SN_7 | RCC_PLLI2SCFGR_PLLI2SR_1);
mbed_official 235:685d5f11838f 226
mbed_official 235:685d5f11838f 227 /* Reset HSEBYP bit */
mbed_official 235:685d5f11838f 228 CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP);
mbed_official 235:685d5f11838f 229
mbed_official 235:685d5f11838f 230 /* Disable all interrupts */
mbed_official 235:685d5f11838f 231 CLEAR_REG(RCC->CIR);
mbed_official 235:685d5f11838f 232 }
mbed_official 235:685d5f11838f 233
mbed_official 235:685d5f11838f 234 /**
mbed_official 235:685d5f11838f 235 * @brief Initializes the RCC Oscillators according to the specified parameters in the
mbed_official 235:685d5f11838f 236 * RCC_OscInitTypeDef.
mbed_official 235:685d5f11838f 237 * @param RCC_OscInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official 235:685d5f11838f 238 * contains the configuration information for the RCC Oscillators.
mbed_official 235:685d5f11838f 239 * @note The PLL is not disabled when used as system clock.
mbed_official 235:685d5f11838f 240 * @retval HAL status
mbed_official 235:685d5f11838f 241 */
mbed_official 235:685d5f11838f 242 HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
mbed_official 235:685d5f11838f 243 {
mbed_official 235:685d5f11838f 244 uint32_t tickstart = 0;
mbed_official 235:685d5f11838f 245
mbed_official 235:685d5f11838f 246 /* Check the parameters */
mbed_official 235:685d5f11838f 247 assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
mbed_official 235:685d5f11838f 248 /*------------------------------- HSE Configuration ------------------------*/
mbed_official 235:685d5f11838f 249 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
mbed_official 235:685d5f11838f 250 {
mbed_official 235:685d5f11838f 251 /* Check the parameters */
mbed_official 235:685d5f11838f 252 assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
mbed_official 235:685d5f11838f 253 /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
mbed_official 235:685d5f11838f 254 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
mbed_official 235:685d5f11838f 255 {
mbed_official 235:685d5f11838f 256 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState != RCC_HSE_ON))
mbed_official 235:685d5f11838f 257 {
mbed_official 235:685d5f11838f 258 return HAL_ERROR;
mbed_official 235:685d5f11838f 259 }
mbed_official 235:685d5f11838f 260 }
mbed_official 235:685d5f11838f 261 else
mbed_official 235:685d5f11838f 262 {
mbed_official 235:685d5f11838f 263 /* Reset HSEON and HSEBYP bits before configuring the HSE --------------*/
mbed_official 235:685d5f11838f 264 __HAL_RCC_HSE_CONFIG(RCC_HSE_OFF);
mbed_official 235:685d5f11838f 265
mbed_official 235:685d5f11838f 266 /* Get Start Tick*/
mbed_official 235:685d5f11838f 267 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 268
mbed_official 235:685d5f11838f 269 /* Wait till HSE is disabled */
mbed_official 235:685d5f11838f 270 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
mbed_official 235:685d5f11838f 271 {
mbed_official 235:685d5f11838f 272 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 273 {
mbed_official 235:685d5f11838f 274 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 275 }
mbed_official 235:685d5f11838f 276 }
mbed_official 235:685d5f11838f 277
mbed_official 235:685d5f11838f 278 /* Set the new HSE configuration ---------------------------------------*/
mbed_official 235:685d5f11838f 279 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
mbed_official 235:685d5f11838f 280
mbed_official 235:685d5f11838f 281 /* Check the HSE State */
mbed_official 235:685d5f11838f 282 if((RCC_OscInitStruct->HSEState) == RCC_HSE_ON)
mbed_official 235:685d5f11838f 283 {
mbed_official 235:685d5f11838f 284 /* Get Start Tick*/
mbed_official 235:685d5f11838f 285 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 286
mbed_official 235:685d5f11838f 287 /* Wait till HSE is ready */
mbed_official 235:685d5f11838f 288 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official 235:685d5f11838f 289 {
mbed_official 235:685d5f11838f 290 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 291 {
mbed_official 235:685d5f11838f 292 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 293 }
mbed_official 235:685d5f11838f 294 }
mbed_official 235:685d5f11838f 295 }
mbed_official 235:685d5f11838f 296 else
mbed_official 235:685d5f11838f 297 {
mbed_official 235:685d5f11838f 298 /* Get Start Tick*/
mbed_official 235:685d5f11838f 299 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 300
mbed_official 235:685d5f11838f 301 /* Wait till HSE is bypassed or disabled */
mbed_official 235:685d5f11838f 302 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
mbed_official 235:685d5f11838f 303 {
mbed_official 235:685d5f11838f 304 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 305 {
mbed_official 235:685d5f11838f 306 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 307 }
mbed_official 235:685d5f11838f 308 }
mbed_official 235:685d5f11838f 309 }
mbed_official 235:685d5f11838f 310 }
mbed_official 235:685d5f11838f 311 }
mbed_official 235:685d5f11838f 312 /*----------------------------- HSI Configuration --------------------------*/
mbed_official 235:685d5f11838f 313 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
mbed_official 235:685d5f11838f 314 {
mbed_official 235:685d5f11838f 315 /* Check the parameters */
mbed_official 235:685d5f11838f 316 assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
mbed_official 235:685d5f11838f 317 assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
mbed_official 235:685d5f11838f 318
mbed_official 235:685d5f11838f 319 /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
mbed_official 235:685d5f11838f 320 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
mbed_official 235:685d5f11838f 321 {
mbed_official 235:685d5f11838f 322 /* When HSI is used as system clock it will not disabled */
mbed_official 235:685d5f11838f 323 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
mbed_official 235:685d5f11838f 324 {
mbed_official 235:685d5f11838f 325 return HAL_ERROR;
mbed_official 235:685d5f11838f 326 }
mbed_official 235:685d5f11838f 327 /* Otherwise, just the calibration is allowed */
mbed_official 235:685d5f11838f 328 else
mbed_official 235:685d5f11838f 329 {
mbed_official 235:685d5f11838f 330 /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
mbed_official 235:685d5f11838f 331 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
mbed_official 235:685d5f11838f 332 }
mbed_official 235:685d5f11838f 333 }
mbed_official 235:685d5f11838f 334 else
mbed_official 235:685d5f11838f 335 {
mbed_official 235:685d5f11838f 336 /* Check the HSI State */
mbed_official 235:685d5f11838f 337 if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
mbed_official 235:685d5f11838f 338 {
mbed_official 235:685d5f11838f 339 /* Enable the Internal High Speed oscillator (HSI). */
mbed_official 235:685d5f11838f 340 __HAL_RCC_HSI_ENABLE();
mbed_official 235:685d5f11838f 341
mbed_official 235:685d5f11838f 342 /* Get Start Tick*/
mbed_official 235:685d5f11838f 343 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 344
mbed_official 235:685d5f11838f 345 /* Wait till HSI is ready */
mbed_official 235:685d5f11838f 346 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official 235:685d5f11838f 347 {
mbed_official 235:685d5f11838f 348 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 349 {
mbed_official 235:685d5f11838f 350 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 351 }
mbed_official 235:685d5f11838f 352 }
mbed_official 235:685d5f11838f 353
mbed_official 235:685d5f11838f 354 /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
mbed_official 235:685d5f11838f 355 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
mbed_official 235:685d5f11838f 356 }
mbed_official 235:685d5f11838f 357 else
mbed_official 235:685d5f11838f 358 {
mbed_official 235:685d5f11838f 359 /* Disable the Internal High Speed oscillator (HSI). */
mbed_official 235:685d5f11838f 360 __HAL_RCC_HSI_DISABLE();
mbed_official 235:685d5f11838f 361
mbed_official 235:685d5f11838f 362 /* Get Start Tick*/
mbed_official 235:685d5f11838f 363 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 364
mbed_official 235:685d5f11838f 365 /* Wait till HSI is ready */
mbed_official 235:685d5f11838f 366 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
mbed_official 235:685d5f11838f 367 {
mbed_official 235:685d5f11838f 368 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 369 {
mbed_official 235:685d5f11838f 370 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 371 }
mbed_official 235:685d5f11838f 372 }
mbed_official 235:685d5f11838f 373 }
mbed_official 235:685d5f11838f 374 }
mbed_official 235:685d5f11838f 375 }
mbed_official 235:685d5f11838f 376 /*------------------------------ LSI Configuration -------------------------*/
mbed_official 235:685d5f11838f 377 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
mbed_official 235:685d5f11838f 378 {
mbed_official 235:685d5f11838f 379 /* Check the parameters */
mbed_official 235:685d5f11838f 380 assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
mbed_official 235:685d5f11838f 381
mbed_official 235:685d5f11838f 382 /* Check the LSI State */
mbed_official 235:685d5f11838f 383 if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
mbed_official 235:685d5f11838f 384 {
mbed_official 235:685d5f11838f 385 /* Enable the Internal Low Speed oscillator (LSI). */
mbed_official 235:685d5f11838f 386 __HAL_RCC_LSI_ENABLE();
mbed_official 235:685d5f11838f 387
mbed_official 235:685d5f11838f 388 /* Get Start Tick*/
mbed_official 235:685d5f11838f 389 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 390
mbed_official 235:685d5f11838f 391 /* Wait till LSI is ready */
mbed_official 235:685d5f11838f 392 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
mbed_official 235:685d5f11838f 393 {
mbed_official 235:685d5f11838f 394 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 395 {
mbed_official 235:685d5f11838f 396 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 397 }
mbed_official 235:685d5f11838f 398 }
mbed_official 235:685d5f11838f 399 }
mbed_official 235:685d5f11838f 400 else
mbed_official 235:685d5f11838f 401 {
mbed_official 235:685d5f11838f 402 /* Disable the Internal Low Speed oscillator (LSI). */
mbed_official 235:685d5f11838f 403 __HAL_RCC_LSI_DISABLE();
mbed_official 235:685d5f11838f 404
mbed_official 235:685d5f11838f 405 /* Get Start Tick*/
mbed_official 235:685d5f11838f 406 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 407
mbed_official 235:685d5f11838f 408 /* Wait till LSI is ready */
mbed_official 235:685d5f11838f 409 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
mbed_official 235:685d5f11838f 410 {
mbed_official 235:685d5f11838f 411 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 412 {
mbed_official 235:685d5f11838f 413 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 414 }
mbed_official 235:685d5f11838f 415 }
mbed_official 235:685d5f11838f 416 }
mbed_official 235:685d5f11838f 417 }
mbed_official 235:685d5f11838f 418 /*------------------------------ LSE Configuration -------------------------*/
mbed_official 235:685d5f11838f 419 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
mbed_official 235:685d5f11838f 420 {
mbed_official 235:685d5f11838f 421 /* Check the parameters */
mbed_official 235:685d5f11838f 422 assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
mbed_official 235:685d5f11838f 423
mbed_official 235:685d5f11838f 424 /* Enable Power Clock*/
mbed_official 235:685d5f11838f 425 __PWR_CLK_ENABLE();
mbed_official 235:685d5f11838f 426
mbed_official 235:685d5f11838f 427 /* Enable write access to Backup domain */
mbed_official 235:685d5f11838f 428 PWR->CR |= PWR_CR_DBP;
mbed_official 235:685d5f11838f 429
mbed_official 235:685d5f11838f 430 /* Wait for Backup domain Write protection disable */
mbed_official 235:685d5f11838f 431 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 432
mbed_official 235:685d5f11838f 433 while((PWR->CR & PWR_CR_DBP) == RESET)
mbed_official 235:685d5f11838f 434 {
mbed_official 235:685d5f11838f 435 if((HAL_GetTick() - tickstart ) > DBP_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 436 {
mbed_official 235:685d5f11838f 437 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 438 }
mbed_official 235:685d5f11838f 439 }
mbed_official 235:685d5f11838f 440
mbed_official 235:685d5f11838f 441 /* Reset LSEON and LSEBYP bits before configuring the LSE ----------------*/
mbed_official 235:685d5f11838f 442 __HAL_RCC_LSE_CONFIG(RCC_LSE_OFF);
mbed_official 235:685d5f11838f 443
mbed_official 235:685d5f11838f 444 /* Get Start Tick*/
mbed_official 235:685d5f11838f 445 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 446
mbed_official 235:685d5f11838f 447 /* Wait till LSE is ready */
mbed_official 235:685d5f11838f 448 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
mbed_official 235:685d5f11838f 449 {
mbed_official 235:685d5f11838f 450 if((HAL_GetTick() - tickstart ) > LSE_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 451 {
mbed_official 235:685d5f11838f 452 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 453 }
mbed_official 235:685d5f11838f 454 }
mbed_official 235:685d5f11838f 455
mbed_official 235:685d5f11838f 456 /* Set the new LSE configuration -----------------------------------------*/
mbed_official 235:685d5f11838f 457 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
mbed_official 235:685d5f11838f 458 /* Check the LSE State */
mbed_official 235:685d5f11838f 459 if((RCC_OscInitStruct->LSEState) == RCC_LSE_ON)
mbed_official 235:685d5f11838f 460 {
mbed_official 235:685d5f11838f 461 /* Get Start Tick*/
mbed_official 235:685d5f11838f 462 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 463
mbed_official 235:685d5f11838f 464 /* Wait till LSE is ready */
mbed_official 235:685d5f11838f 465 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
mbed_official 235:685d5f11838f 466 {
mbed_official 235:685d5f11838f 467 if((HAL_GetTick() - tickstart ) > LSE_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 468 {
mbed_official 235:685d5f11838f 469 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 470 }
mbed_official 235:685d5f11838f 471 }
mbed_official 235:685d5f11838f 472 }
mbed_official 235:685d5f11838f 473 else
mbed_official 235:685d5f11838f 474 {
mbed_official 235:685d5f11838f 475 /* Get Start Tick*/
mbed_official 235:685d5f11838f 476 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 477
mbed_official 235:685d5f11838f 478 /* Wait till LSE is ready */
mbed_official 235:685d5f11838f 479 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
mbed_official 235:685d5f11838f 480 {
mbed_official 235:685d5f11838f 481 if((HAL_GetTick() - tickstart ) > LSE_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 482 {
mbed_official 235:685d5f11838f 483 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 484 }
mbed_official 235:685d5f11838f 485 }
mbed_official 235:685d5f11838f 486 }
mbed_official 235:685d5f11838f 487 }
mbed_official 235:685d5f11838f 488 /*-------------------------------- PLL Configuration -----------------------*/
mbed_official 235:685d5f11838f 489 /* Check the parameters */
mbed_official 235:685d5f11838f 490 assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
mbed_official 235:685d5f11838f 491 if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
mbed_official 235:685d5f11838f 492 {
mbed_official 235:685d5f11838f 493 /* Check if the PLL is used as system clock or not */
mbed_official 235:685d5f11838f 494 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
mbed_official 235:685d5f11838f 495 {
mbed_official 235:685d5f11838f 496 if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
mbed_official 235:685d5f11838f 497 {
mbed_official 235:685d5f11838f 498 /* Check the parameters */
mbed_official 235:685d5f11838f 499 assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
mbed_official 235:685d5f11838f 500 assert_param(IS_RCC_PLLM_VALUE(RCC_OscInitStruct->PLL.PLLM));
mbed_official 235:685d5f11838f 501 assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN));
mbed_official 235:685d5f11838f 502 assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
mbed_official 235:685d5f11838f 503 assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
mbed_official 235:685d5f11838f 504
mbed_official 235:685d5f11838f 505 /* Disable the main PLL. */
mbed_official 235:685d5f11838f 506 __HAL_RCC_PLL_DISABLE();
mbed_official 235:685d5f11838f 507
mbed_official 235:685d5f11838f 508 /* Get Start Tick*/
mbed_official 235:685d5f11838f 509 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 510
mbed_official 235:685d5f11838f 511 /* Wait till PLL is ready */
mbed_official 235:685d5f11838f 512 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
mbed_official 235:685d5f11838f 513 {
mbed_official 235:685d5f11838f 514 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 515 {
mbed_official 235:685d5f11838f 516 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 517 }
mbed_official 235:685d5f11838f 518 }
mbed_official 235:685d5f11838f 519
mbed_official 235:685d5f11838f 520 /* Configure the main PLL clock source, multiplication and division factors. */
mbed_official 235:685d5f11838f 521 __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
mbed_official 235:685d5f11838f 522 RCC_OscInitStruct->PLL.PLLM,
mbed_official 235:685d5f11838f 523 RCC_OscInitStruct->PLL.PLLN,
mbed_official 235:685d5f11838f 524 RCC_OscInitStruct->PLL.PLLP,
mbed_official 235:685d5f11838f 525 RCC_OscInitStruct->PLL.PLLQ);
mbed_official 235:685d5f11838f 526 /* Enable the main PLL. */
mbed_official 235:685d5f11838f 527 __HAL_RCC_PLL_ENABLE();
mbed_official 235:685d5f11838f 528
mbed_official 235:685d5f11838f 529 /* Get Start Tick*/
mbed_official 235:685d5f11838f 530 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 531
mbed_official 235:685d5f11838f 532 /* Wait till PLL is ready */
mbed_official 235:685d5f11838f 533 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official 235:685d5f11838f 534 {
mbed_official 235:685d5f11838f 535 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 536 {
mbed_official 235:685d5f11838f 537 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 538 }
mbed_official 235:685d5f11838f 539 }
mbed_official 235:685d5f11838f 540 }
mbed_official 235:685d5f11838f 541 else
mbed_official 235:685d5f11838f 542 {
mbed_official 235:685d5f11838f 543 /* Disable the main PLL. */
mbed_official 235:685d5f11838f 544 __HAL_RCC_PLL_DISABLE();
mbed_official 235:685d5f11838f 545
mbed_official 235:685d5f11838f 546 /* Get Start Tick*/
mbed_official 235:685d5f11838f 547 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 548
mbed_official 235:685d5f11838f 549 /* Wait till PLL is ready */
mbed_official 235:685d5f11838f 550 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
mbed_official 235:685d5f11838f 551 {
mbed_official 235:685d5f11838f 552 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 553 {
mbed_official 235:685d5f11838f 554 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 555 }
mbed_official 235:685d5f11838f 556 }
mbed_official 235:685d5f11838f 557 }
mbed_official 235:685d5f11838f 558 }
mbed_official 235:685d5f11838f 559 else
mbed_official 235:685d5f11838f 560 {
mbed_official 235:685d5f11838f 561 return HAL_ERROR;
mbed_official 235:685d5f11838f 562 }
mbed_official 235:685d5f11838f 563 }
mbed_official 235:685d5f11838f 564 return HAL_OK;
mbed_official 235:685d5f11838f 565 }
mbed_official 235:685d5f11838f 566
mbed_official 235:685d5f11838f 567 /**
mbed_official 235:685d5f11838f 568 * @brief Initializes the CPU, AHB and APB busses clocks according to the specified
mbed_official 235:685d5f11838f 569 * parameters in the RCC_ClkInitStruct.
mbed_official 235:685d5f11838f 570 * @param RCC_ClkInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official 235:685d5f11838f 571 * contains the configuration information for the RCC peripheral.
mbed_official 235:685d5f11838f 572 * @param FLatency: FLASH Latency, this parameter depend on device selected
mbed_official 235:685d5f11838f 573 *
mbed_official 235:685d5f11838f 574 * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
mbed_official 235:685d5f11838f 575 * and updated by HAL_RCC_GetHCLKFreq() function called within this function
mbed_official 235:685d5f11838f 576 *
mbed_official 235:685d5f11838f 577 * @note The HSI is used (enabled by hardware) as system clock source after
mbed_official 235:685d5f11838f 578 * startup from Reset, wake-up from STOP and STANDBY mode, or in case
mbed_official 235:685d5f11838f 579 * of failure of the HSE used directly or indirectly as system clock
mbed_official 235:685d5f11838f 580 * (if the Clock Security System CSS is enabled).
mbed_official 235:685d5f11838f 581 *
mbed_official 235:685d5f11838f 582 * @note A switch from one clock source to another occurs only if the target
mbed_official 235:685d5f11838f 583 * clock source is ready (clock stable after startup delay or PLL locked).
mbed_official 235:685d5f11838f 584 * If a clock source which is not yet ready is selected, the switch will
mbed_official 235:685d5f11838f 585 * occur when the clock source will be ready.
mbed_official 235:685d5f11838f 586 *
mbed_official 235:685d5f11838f 587 * @note Depending on the device voltage range, the software has to set correctly
mbed_official 235:685d5f11838f 588 * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
mbed_official 235:685d5f11838f 589 * (for more details refer to section above "Initialization/de-initialization functions")
mbed_official 235:685d5f11838f 590 * @retval None
mbed_official 235:685d5f11838f 591 */
mbed_official 235:685d5f11838f 592 HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
mbed_official 235:685d5f11838f 593 {
mbed_official 235:685d5f11838f 594 uint32_t tickstart = 0;
mbed_official 235:685d5f11838f 595
mbed_official 235:685d5f11838f 596 /* Check the parameters */
mbed_official 235:685d5f11838f 597 assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType));
mbed_official 235:685d5f11838f 598 assert_param(IS_FLASH_LATENCY(FLatency));
mbed_official 235:685d5f11838f 599
mbed_official 235:685d5f11838f 600 /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
mbed_official 235:685d5f11838f 601 must be correctly programmed according to the frequency of the CPU clock
mbed_official 235:685d5f11838f 602 (HCLK) and the supply voltage of the device. */
mbed_official 235:685d5f11838f 603
mbed_official 235:685d5f11838f 604 /* Increasing the CPU frequency */
mbed_official 235:685d5f11838f 605 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
mbed_official 235:685d5f11838f 606 {
mbed_official 235:685d5f11838f 607 /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
mbed_official 235:685d5f11838f 608 __HAL_FLASH_SET_LATENCY(FLatency);
mbed_official 235:685d5f11838f 609
mbed_official 235:685d5f11838f 610 /* Check that the new number of wait states is taken into account to access the Flash
mbed_official 235:685d5f11838f 611 memory by reading the FLASH_ACR register */
mbed_official 235:685d5f11838f 612 if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
mbed_official 235:685d5f11838f 613 {
mbed_official 235:685d5f11838f 614 return HAL_ERROR;
mbed_official 235:685d5f11838f 615 }
mbed_official 235:685d5f11838f 616
mbed_official 235:685d5f11838f 617 /*-------------------------- HCLK Configuration --------------------------*/
mbed_official 235:685d5f11838f 618 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
mbed_official 235:685d5f11838f 619 {
mbed_official 235:685d5f11838f 620 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
mbed_official 235:685d5f11838f 621 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
mbed_official 235:685d5f11838f 622 }
mbed_official 235:685d5f11838f 623
mbed_official 235:685d5f11838f 624 /*------------------------- SYSCLK Configuration ---------------------------*/
mbed_official 235:685d5f11838f 625 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
mbed_official 235:685d5f11838f 626 {
mbed_official 235:685d5f11838f 627 assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
mbed_official 235:685d5f11838f 628
mbed_official 235:685d5f11838f 629 /* HSE is selected as System Clock Source */
mbed_official 235:685d5f11838f 630 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 235:685d5f11838f 631 {
mbed_official 235:685d5f11838f 632 /* Check the HSE ready flag */
mbed_official 235:685d5f11838f 633 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official 235:685d5f11838f 634 {
mbed_official 235:685d5f11838f 635 return HAL_ERROR;
mbed_official 235:685d5f11838f 636 }
mbed_official 235:685d5f11838f 637 }
mbed_official 235:685d5f11838f 638 /* PLL is selected as System Clock Source */
mbed_official 235:685d5f11838f 639 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official 235:685d5f11838f 640 {
mbed_official 235:685d5f11838f 641 /* Check the PLL ready flag */
mbed_official 235:685d5f11838f 642 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official 235:685d5f11838f 643 {
mbed_official 235:685d5f11838f 644 return HAL_ERROR;
mbed_official 235:685d5f11838f 645 }
mbed_official 235:685d5f11838f 646 }
mbed_official 235:685d5f11838f 647 /* HSI is selected as System Clock Source */
mbed_official 235:685d5f11838f 648 else
mbed_official 235:685d5f11838f 649 {
mbed_official 235:685d5f11838f 650 /* Check the HSI ready flag */
mbed_official 235:685d5f11838f 651 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official 235:685d5f11838f 652 {
mbed_official 235:685d5f11838f 653 return HAL_ERROR;
mbed_official 235:685d5f11838f 654 }
mbed_official 235:685d5f11838f 655 }
mbed_official 235:685d5f11838f 656 MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource);
mbed_official 235:685d5f11838f 657
mbed_official 235:685d5f11838f 658 /* Get Start Tick*/
mbed_official 235:685d5f11838f 659 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 660
mbed_official 235:685d5f11838f 661 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 235:685d5f11838f 662 {
mbed_official 235:685d5f11838f 663 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_HSE)
mbed_official 235:685d5f11838f 664 {
mbed_official 235:685d5f11838f 665 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 666 {
mbed_official 235:685d5f11838f 667 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 668 }
mbed_official 235:685d5f11838f 669 }
mbed_official 235:685d5f11838f 670 }
mbed_official 235:685d5f11838f 671 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official 235:685d5f11838f 672 {
mbed_official 235:685d5f11838f 673 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
mbed_official 235:685d5f11838f 674 {
mbed_official 235:685d5f11838f 675 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 676 {
mbed_official 235:685d5f11838f 677 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 678 }
mbed_official 235:685d5f11838f 679 }
mbed_official 235:685d5f11838f 680 }
mbed_official 235:685d5f11838f 681 else
mbed_official 235:685d5f11838f 682 {
mbed_official 235:685d5f11838f 683 while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_HSI)
mbed_official 235:685d5f11838f 684 {
mbed_official 235:685d5f11838f 685 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 686 {
mbed_official 235:685d5f11838f 687 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 688 }
mbed_official 235:685d5f11838f 689 }
mbed_official 235:685d5f11838f 690 }
mbed_official 235:685d5f11838f 691 }
mbed_official 235:685d5f11838f 692 }
mbed_official 235:685d5f11838f 693 /* Decreasing the CPU frequency */
mbed_official 235:685d5f11838f 694 else
mbed_official 235:685d5f11838f 695 {
mbed_official 235:685d5f11838f 696 /*-------------------------- HCLK Configuration --------------------------*/
mbed_official 235:685d5f11838f 697 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
mbed_official 235:685d5f11838f 698 {
mbed_official 235:685d5f11838f 699 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
mbed_official 235:685d5f11838f 700 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
mbed_official 235:685d5f11838f 701 }
mbed_official 235:685d5f11838f 702
mbed_official 235:685d5f11838f 703 /*------------------------- SYSCLK Configuration -------------------------*/
mbed_official 235:685d5f11838f 704 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
mbed_official 235:685d5f11838f 705 {
mbed_official 235:685d5f11838f 706 assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
mbed_official 235:685d5f11838f 707
mbed_official 235:685d5f11838f 708 /* HSE is selected as System Clock Source */
mbed_official 235:685d5f11838f 709 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 235:685d5f11838f 710 {
mbed_official 235:685d5f11838f 711 /* Check the HSE ready flag */
mbed_official 235:685d5f11838f 712 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official 235:685d5f11838f 713 {
mbed_official 235:685d5f11838f 714 return HAL_ERROR;
mbed_official 235:685d5f11838f 715 }
mbed_official 235:685d5f11838f 716 }
mbed_official 235:685d5f11838f 717 /* PLL is selected as System Clock Source */
mbed_official 235:685d5f11838f 718 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official 235:685d5f11838f 719 {
mbed_official 235:685d5f11838f 720 /* Check the PLL ready flag */
mbed_official 235:685d5f11838f 721 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official 235:685d5f11838f 722 {
mbed_official 235:685d5f11838f 723 return HAL_ERROR;
mbed_official 235:685d5f11838f 724 }
mbed_official 235:685d5f11838f 725 }
mbed_official 235:685d5f11838f 726 /* HSI is selected as System Clock Source */
mbed_official 235:685d5f11838f 727 else
mbed_official 235:685d5f11838f 728 {
mbed_official 235:685d5f11838f 729 /* Check the HSI ready flag */
mbed_official 235:685d5f11838f 730 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official 235:685d5f11838f 731 {
mbed_official 235:685d5f11838f 732 return HAL_ERROR;
mbed_official 235:685d5f11838f 733 }
mbed_official 235:685d5f11838f 734 }
mbed_official 235:685d5f11838f 735 MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource);
mbed_official 235:685d5f11838f 736
mbed_official 235:685d5f11838f 737 /* Get Start Tick*/
mbed_official 235:685d5f11838f 738 tickstart = HAL_GetTick();
mbed_official 235:685d5f11838f 739
mbed_official 235:685d5f11838f 740 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 235:685d5f11838f 741 {
mbed_official 235:685d5f11838f 742 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_HSE)
mbed_official 235:685d5f11838f 743 {
mbed_official 235:685d5f11838f 744 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 745 {
mbed_official 235:685d5f11838f 746 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 747 }
mbed_official 235:685d5f11838f 748 }
mbed_official 235:685d5f11838f 749 }
mbed_official 235:685d5f11838f 750 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official 235:685d5f11838f 751 {
mbed_official 235:685d5f11838f 752 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
mbed_official 235:685d5f11838f 753 {
mbed_official 235:685d5f11838f 754 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 755 {
mbed_official 235:685d5f11838f 756 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 757 }
mbed_official 235:685d5f11838f 758 }
mbed_official 235:685d5f11838f 759 }
mbed_official 235:685d5f11838f 760 else
mbed_official 235:685d5f11838f 761 {
mbed_official 235:685d5f11838f 762 while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_HSI)
mbed_official 235:685d5f11838f 763 {
mbed_official 235:685d5f11838f 764 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 235:685d5f11838f 765 {
mbed_official 235:685d5f11838f 766 return HAL_TIMEOUT;
mbed_official 235:685d5f11838f 767 }
mbed_official 235:685d5f11838f 768 }
mbed_official 235:685d5f11838f 769 }
mbed_official 235:685d5f11838f 770 }
mbed_official 235:685d5f11838f 771
mbed_official 235:685d5f11838f 772 /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
mbed_official 235:685d5f11838f 773 __HAL_FLASH_SET_LATENCY(FLatency);
mbed_official 235:685d5f11838f 774
mbed_official 235:685d5f11838f 775 /* Check that the new number of wait states is taken into account to access the Flash
mbed_official 235:685d5f11838f 776 memory by reading the FLASH_ACR register */
mbed_official 235:685d5f11838f 777 if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
mbed_official 235:685d5f11838f 778 {
mbed_official 235:685d5f11838f 779 return HAL_ERROR;
mbed_official 235:685d5f11838f 780 }
mbed_official 235:685d5f11838f 781 }
mbed_official 235:685d5f11838f 782
mbed_official 235:685d5f11838f 783 /*-------------------------- PCLK1 Configuration ---------------------------*/
mbed_official 235:685d5f11838f 784 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
mbed_official 235:685d5f11838f 785 {
mbed_official 235:685d5f11838f 786 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
mbed_official 235:685d5f11838f 787 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
mbed_official 235:685d5f11838f 788 }
mbed_official 235:685d5f11838f 789
mbed_official 235:685d5f11838f 790 /*-------------------------- PCLK2 Configuration ---------------------------*/
mbed_official 235:685d5f11838f 791 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
mbed_official 235:685d5f11838f 792 {
mbed_official 235:685d5f11838f 793 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
mbed_official 235:685d5f11838f 794 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
mbed_official 235:685d5f11838f 795 }
mbed_official 235:685d5f11838f 796
mbed_official 235:685d5f11838f 797 /* Configure the source of time base considering new system clocks settings*/
mbed_official 235:685d5f11838f 798 HAL_InitTick (TICK_INT_PRIORITY);
mbed_official 235:685d5f11838f 799
mbed_official 235:685d5f11838f 800 return HAL_OK;
mbed_official 235:685d5f11838f 801 }
mbed_official 235:685d5f11838f 802
mbed_official 235:685d5f11838f 803 /**
mbed_official 235:685d5f11838f 804 * @}
mbed_official 235:685d5f11838f 805 */
mbed_official 235:685d5f11838f 806
mbed_official 235:685d5f11838f 807 /** @defgroup RCC_Group2 Peripheral Control functions
mbed_official 235:685d5f11838f 808 * @brief RCC clocks control functions
mbed_official 235:685d5f11838f 809 *
mbed_official 235:685d5f11838f 810 @verbatim
mbed_official 235:685d5f11838f 811 ===============================================================================
mbed_official 235:685d5f11838f 812 ##### Peripheral Control functions #####
mbed_official 235:685d5f11838f 813 ===============================================================================
mbed_official 235:685d5f11838f 814 [..]
mbed_official 235:685d5f11838f 815 This subsection provides a set of functions allowing to control the RCC Clocks
mbed_official 235:685d5f11838f 816 frequencies.
mbed_official 235:685d5f11838f 817
mbed_official 235:685d5f11838f 818 @endverbatim
mbed_official 235:685d5f11838f 819 * @{
mbed_official 235:685d5f11838f 820 */
mbed_official 235:685d5f11838f 821
mbed_official 235:685d5f11838f 822 /**
mbed_official 235:685d5f11838f 823 * @brief Selects the clock source to output on MCO1 pin(PA8) or on MCO2 pin(PC9).
mbed_official 235:685d5f11838f 824 * @note PA8/PC9 should be configured in alternate function mode.
mbed_official 235:685d5f11838f 825 * @param RCC_MCOx: specifies the output direction for the clock source.
mbed_official 235:685d5f11838f 826 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 827 * @arg RCC_MCO1: Clock source to output on MCO1 pin(PA8).
mbed_official 235:685d5f11838f 828 * @arg RCC_MCO2: Clock source to output on MCO2 pin(PC9).
mbed_official 235:685d5f11838f 829 * @param RCC_MCOSource: specifies the clock source to output.
mbed_official 235:685d5f11838f 830 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 831 * @arg RCC_MCO1SOURCE_HSI: HSI clock selected as MCO1 source
mbed_official 235:685d5f11838f 832 * @arg RCC_MCO1SOURCE_LSE: LSE clock selected as MCO1 source
mbed_official 235:685d5f11838f 833 * @arg RCC_MCO1SOURCE_HSE: HSE clock selected as MCO1 source
mbed_official 235:685d5f11838f 834 * @arg RCC_MCO1SOURCE_PLLCLK: main PLL clock selected as MCO1 source
mbed_official 235:685d5f11838f 835 * @arg RCC_MCO2SOURCE_SYSCLK: System clock (SYSCLK) selected as MCO2 source
mbed_official 235:685d5f11838f 836 * @arg RCC_MCO2SOURCE_PLLI2SCLK: PLLI2S clock selected as MCO2 source
mbed_official 235:685d5f11838f 837 * @arg RCC_MCO2SOURCE_HSE: HSE clock selected as MCO2 source
mbed_official 235:685d5f11838f 838 * @arg RCC_MCO2SOURCE_PLLCLK: main PLL clock selected as MCO2 source
mbed_official 235:685d5f11838f 839 * @param RCC_MCODiv: specifies the MCOx prescaler.
mbed_official 235:685d5f11838f 840 * This parameter can be one of the following values:
mbed_official 235:685d5f11838f 841 * @arg RCC_MCODIV_1: no division applied to MCOx clock
mbed_official 235:685d5f11838f 842 * @arg RCC_MCODIV_2: division by 2 applied to MCOx clock
mbed_official 235:685d5f11838f 843 * @arg RCC_MCODIV_3: division by 3 applied to MCOx clock
mbed_official 235:685d5f11838f 844 * @arg RCC_MCODIV_4: division by 4 applied to MCOx clock
mbed_official 235:685d5f11838f 845 * @arg RCC_MCODIV_5: division by 5 applied to MCOx clock
mbed_official 235:685d5f11838f 846 * @retval None
mbed_official 235:685d5f11838f 847 */
mbed_official 235:685d5f11838f 848 void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv)
mbed_official 235:685d5f11838f 849 {
mbed_official 235:685d5f11838f 850 GPIO_InitTypeDef GPIO_InitStruct;
mbed_official 235:685d5f11838f 851 /* Check the parameters */
mbed_official 235:685d5f11838f 852 assert_param(IS_RCC_MCO(RCC_MCOx));
mbed_official 235:685d5f11838f 853 assert_param(IS_RCC_MCODIV(RCC_MCODiv));
mbed_official 235:685d5f11838f 854 /* RCC_MCO1 */
mbed_official 235:685d5f11838f 855 if(RCC_MCOx == RCC_MCO1)
mbed_official 235:685d5f11838f 856 {
mbed_official 235:685d5f11838f 857 assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource));
mbed_official 235:685d5f11838f 858
mbed_official 235:685d5f11838f 859 /* MCO1 Clock Enable */
mbed_official 235:685d5f11838f 860 __MCO1_CLK_ENABLE();
mbed_official 235:685d5f11838f 861
mbed_official 235:685d5f11838f 862 /* Configue the MCO1 pin in alternate function mode */
mbed_official 235:685d5f11838f 863 GPIO_InitStruct.Pin = MCO1_PIN;
mbed_official 235:685d5f11838f 864 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
mbed_official 235:685d5f11838f 865 GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
mbed_official 235:685d5f11838f 866 GPIO_InitStruct.Pull = GPIO_NOPULL;
mbed_official 235:685d5f11838f 867 GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
mbed_official 235:685d5f11838f 868 HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct);
mbed_official 235:685d5f11838f 869
mbed_official 235:685d5f11838f 870 /* Mask MCO1 and MCO1PRE[2:0] bits then Select MCO1 clock source and prescaler */
mbed_official 235:685d5f11838f 871 MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO1 | RCC_CFGR_MCO1PRE), (RCC_MCOSource | RCC_MCODiv));
mbed_official 235:685d5f11838f 872 }
mbed_official 235:685d5f11838f 873 else
mbed_official 235:685d5f11838f 874 {
mbed_official 235:685d5f11838f 875 assert_param(IS_RCC_MCO2SOURCE(RCC_MCOSource));
mbed_official 235:685d5f11838f 876
mbed_official 235:685d5f11838f 877 /* MCO2 Clock Enable */
mbed_official 235:685d5f11838f 878 __MCO2_CLK_ENABLE();
mbed_official 235:685d5f11838f 879
mbed_official 235:685d5f11838f 880 /* Configue the MCO2 pin in alternate function mode */
mbed_official 235:685d5f11838f 881 GPIO_InitStruct.Pin = MCO2_PIN;
mbed_official 235:685d5f11838f 882 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
mbed_official 235:685d5f11838f 883 GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
mbed_official 235:685d5f11838f 884 GPIO_InitStruct.Pull = GPIO_NOPULL;
mbed_official 235:685d5f11838f 885 GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
mbed_official 235:685d5f11838f 886 HAL_GPIO_Init(MCO2_GPIO_PORT, &GPIO_InitStruct);
mbed_official 235:685d5f11838f 887
mbed_official 235:685d5f11838f 888 /* Mask MCO2 and MCO2PRE[2:0] bits then Select MCO2 clock source and prescaler */
mbed_official 235:685d5f11838f 889 MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO2 | RCC_CFGR_MCO2PRE), (RCC_MCOSource | (RCC_MCODiv << 3)));
mbed_official 235:685d5f11838f 890 }
mbed_official 235:685d5f11838f 891 }
mbed_official 235:685d5f11838f 892
mbed_official 235:685d5f11838f 893 /**
mbed_official 235:685d5f11838f 894 * @brief Enables the Clock Security System.
mbed_official 235:685d5f11838f 895 * @note If a failure is detected on the HSE oscillator clock, this oscillator
mbed_official 235:685d5f11838f 896 * is automatically disabled and an interrupt is generated to inform the
mbed_official 235:685d5f11838f 897 * software about the failure (Clock Security System Interrupt, CSSI),
mbed_official 235:685d5f11838f 898 * allowing the MCU to perform rescue operations. The CSSI is linked to
mbed_official 235:685d5f11838f 899 * the Cortex-M4 NMI (Non-Maskable Interrupt) exception vector.
mbed_official 235:685d5f11838f 900 * @param None
mbed_official 235:685d5f11838f 901 * @retval None
mbed_official 235:685d5f11838f 902 */
mbed_official 235:685d5f11838f 903 void HAL_RCC_EnableCSS(void)
mbed_official 235:685d5f11838f 904 {
mbed_official 235:685d5f11838f 905 *(__IO uint32_t *) CR_CSSON_BB = (uint32_t)ENABLE;
mbed_official 235:685d5f11838f 906 }
mbed_official 235:685d5f11838f 907
mbed_official 235:685d5f11838f 908 /**
mbed_official 235:685d5f11838f 909 * @brief Disables the Clock Security System.
mbed_official 235:685d5f11838f 910 * @param None
mbed_official 235:685d5f11838f 911 * @retval None
mbed_official 235:685d5f11838f 912 */
mbed_official 235:685d5f11838f 913 void HAL_RCC_DisableCSS(void)
mbed_official 235:685d5f11838f 914 {
mbed_official 235:685d5f11838f 915 *(__IO uint32_t *) CR_CSSON_BB = (uint32_t)DISABLE;
mbed_official 235:685d5f11838f 916 }
mbed_official 235:685d5f11838f 917
mbed_official 235:685d5f11838f 918 /**
mbed_official 235:685d5f11838f 919 * @brief Returns the SYSCLK frequency
mbed_official 235:685d5f11838f 920 *
mbed_official 235:685d5f11838f 921 * @note The system frequency computed by this function is not the real
mbed_official 235:685d5f11838f 922 * frequency in the chip. It is calculated based on the predefined
mbed_official 235:685d5f11838f 923 * constant and the selected clock source:
mbed_official 235:685d5f11838f 924 * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*)
mbed_official 235:685d5f11838f 925 * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(**)
mbed_official 235:685d5f11838f 926 * @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(**)
mbed_official 235:685d5f11838f 927 * or HSI_VALUE(*) multiplied/divided by the PLL factors.
mbed_official 235:685d5f11838f 928 * @note (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
mbed_official 235:685d5f11838f 929 * 16 MHz) but the real value may vary depending on the variations
mbed_official 235:685d5f11838f 930 * in voltage and temperature.
mbed_official 235:685d5f11838f 931 * @note (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
mbed_official 235:685d5f11838f 932 * 25 MHz), user has to ensure that HSE_VALUE is same as the real
mbed_official 235:685d5f11838f 933 * frequency of the crystal used. Otherwise, this function may
mbed_official 235:685d5f11838f 934 * have wrong result.
mbed_official 235:685d5f11838f 935 *
mbed_official 235:685d5f11838f 936 * @note The result of this function could be not correct when using fractional
mbed_official 235:685d5f11838f 937 * value for HSE crystal.
mbed_official 235:685d5f11838f 938 *
mbed_official 235:685d5f11838f 939 * @note This function can be used by the user application to compute the
mbed_official 235:685d5f11838f 940 * baudrate for the communication peripherals or configure other parameters.
mbed_official 235:685d5f11838f 941 *
mbed_official 235:685d5f11838f 942 * @note Each time SYSCLK changes, this function must be called to update the
mbed_official 235:685d5f11838f 943 * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
mbed_official 235:685d5f11838f 944 *
mbed_official 235:685d5f11838f 945 *
mbed_official 235:685d5f11838f 946 * @param None
mbed_official 235:685d5f11838f 947 * @retval SYSCLK frequency
mbed_official 235:685d5f11838f 948 */
mbed_official 235:685d5f11838f 949 uint32_t HAL_RCC_GetSysClockFreq(void)
mbed_official 235:685d5f11838f 950 {
mbed_official 235:685d5f11838f 951 uint32_t pllm = 0, pllvco = 0, pllp = 0;
mbed_official 235:685d5f11838f 952 uint32_t sysclockfreq = 0;
mbed_official 235:685d5f11838f 953
mbed_official 235:685d5f11838f 954 /* Get SYSCLK source -------------------------------------------------------*/
mbed_official 235:685d5f11838f 955 switch (RCC->CFGR & RCC_CFGR_SWS)
mbed_official 235:685d5f11838f 956 {
mbed_official 235:685d5f11838f 957 case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */
mbed_official 235:685d5f11838f 958 {
mbed_official 235:685d5f11838f 959 sysclockfreq = HSI_VALUE;
mbed_official 235:685d5f11838f 960 break;
mbed_official 235:685d5f11838f 961 }
mbed_official 235:685d5f11838f 962 case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */
mbed_official 235:685d5f11838f 963 {
mbed_official 235:685d5f11838f 964 sysclockfreq = HSE_VALUE;
mbed_official 235:685d5f11838f 965 break;
mbed_official 235:685d5f11838f 966 }
mbed_official 235:685d5f11838f 967 case RCC_CFGR_SWS_PLL: /* PLL used as system clock source */
mbed_official 235:685d5f11838f 968 {
mbed_official 235:685d5f11838f 969 /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
mbed_official 235:685d5f11838f 970 SYSCLK = PLL_VCO / PLLP */
mbed_official 235:685d5f11838f 971 pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
mbed_official 235:685d5f11838f 972 if (__RCC_PLLSRC() != 0)
mbed_official 235:685d5f11838f 973 {
mbed_official 235:685d5f11838f 974 /* HSE used as PLL clock source */
mbed_official 235:685d5f11838f 975 pllvco = ((HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN)));
mbed_official 235:685d5f11838f 976 }
mbed_official 235:685d5f11838f 977 else
mbed_official 235:685d5f11838f 978 {
mbed_official 235:685d5f11838f 979 /* HSI used as PLL clock source */
mbed_official 235:685d5f11838f 980 pllvco = ((HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN)));
mbed_official 235:685d5f11838f 981 }
mbed_official 235:685d5f11838f 982 pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> POSITION_VAL(RCC_PLLCFGR_PLLP)) + 1 ) *2);
mbed_official 235:685d5f11838f 983
mbed_official 235:685d5f11838f 984 sysclockfreq = pllvco/pllp;
mbed_official 235:685d5f11838f 985 break;
mbed_official 235:685d5f11838f 986 }
mbed_official 235:685d5f11838f 987 default:
mbed_official 235:685d5f11838f 988 {
mbed_official 235:685d5f11838f 989 sysclockfreq = HSI_VALUE;
mbed_official 235:685d5f11838f 990 break;
mbed_official 235:685d5f11838f 991 }
mbed_official 235:685d5f11838f 992 }
mbed_official 235:685d5f11838f 993 return sysclockfreq;
mbed_official 235:685d5f11838f 994 }
mbed_official 235:685d5f11838f 995
mbed_official 235:685d5f11838f 996 /**
mbed_official 235:685d5f11838f 997 * @brief Returns the HCLK frequency
mbed_official 235:685d5f11838f 998 * @note Each time HCLK changes, this function must be called to update the
mbed_official 235:685d5f11838f 999 * right HCLK value. Otherwise, any configuration based on this function will be incorrect.
mbed_official 235:685d5f11838f 1000 *
mbed_official 235:685d5f11838f 1001 * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
mbed_official 235:685d5f11838f 1002 * and updated within this function
mbed_official 235:685d5f11838f 1003 * @param None
mbed_official 235:685d5f11838f 1004 * @retval HCLK frequency
mbed_official 235:685d5f11838f 1005 */
mbed_official 235:685d5f11838f 1006 uint32_t HAL_RCC_GetHCLKFreq(void)
mbed_official 235:685d5f11838f 1007 {
mbed_official 235:685d5f11838f 1008 SystemCoreClock = HAL_RCC_GetSysClockFreq() >> APBAHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> POSITION_VAL(RCC_CFGR_HPRE)];
mbed_official 235:685d5f11838f 1009 return SystemCoreClock;
mbed_official 235:685d5f11838f 1010 }
mbed_official 235:685d5f11838f 1011
mbed_official 235:685d5f11838f 1012 /**
mbed_official 235:685d5f11838f 1013 * @brief Returns the PCLK1 frequency
mbed_official 235:685d5f11838f 1014 * @note Each time PCLK1 changes, this function must be called to update the
mbed_official 235:685d5f11838f 1015 * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
mbed_official 235:685d5f11838f 1016 * @param None
mbed_official 235:685d5f11838f 1017 * @retval PCLK1 frequency
mbed_official 235:685d5f11838f 1018 */
mbed_official 235:685d5f11838f 1019 uint32_t HAL_RCC_GetPCLK1Freq(void)
mbed_official 235:685d5f11838f 1020 {
mbed_official 235:685d5f11838f 1021 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
mbed_official 235:685d5f11838f 1022 return (HAL_RCC_GetHCLKFreq() >> APBAHBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> POSITION_VAL(RCC_CFGR_PPRE1)]);
mbed_official 235:685d5f11838f 1023 }
mbed_official 235:685d5f11838f 1024
mbed_official 235:685d5f11838f 1025 /**
mbed_official 235:685d5f11838f 1026 * @brief Returns the PCLK2 frequency
mbed_official 235:685d5f11838f 1027 * @note Each time PCLK2 changes, this function must be called to update the
mbed_official 235:685d5f11838f 1028 * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
mbed_official 235:685d5f11838f 1029 * @param None
mbed_official 235:685d5f11838f 1030 * @retval PCLK2 frequency
mbed_official 235:685d5f11838f 1031 */
mbed_official 235:685d5f11838f 1032 uint32_t HAL_RCC_GetPCLK2Freq(void)
mbed_official 235:685d5f11838f 1033 {
mbed_official 235:685d5f11838f 1034 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
mbed_official 235:685d5f11838f 1035 return (HAL_RCC_GetHCLKFreq()>> APBAHBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> POSITION_VAL(RCC_CFGR_PPRE2)]);
mbed_official 235:685d5f11838f 1036 }
mbed_official 235:685d5f11838f 1037
mbed_official 235:685d5f11838f 1038 /**
mbed_official 235:685d5f11838f 1039 * @brief Configures the RCC_OscInitStruct according to the internal
mbed_official 235:685d5f11838f 1040 * RCC configuration registers.
mbed_official 235:685d5f11838f 1041 * @param RCC_OscInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official 235:685d5f11838f 1042 * will be configured.
mbed_official 235:685d5f11838f 1043 * @retval None
mbed_official 235:685d5f11838f 1044 */
mbed_official 235:685d5f11838f 1045 void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
mbed_official 235:685d5f11838f 1046 {
mbed_official 235:685d5f11838f 1047 /* Set all possible values for the Oscillator type parameter ---------------*/
mbed_official 235:685d5f11838f 1048 RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI;
mbed_official 235:685d5f11838f 1049
mbed_official 235:685d5f11838f 1050 /* Get the HSE configuration -----------------------------------------------*/
mbed_official 235:685d5f11838f 1051 if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP)
mbed_official 235:685d5f11838f 1052 {
mbed_official 235:685d5f11838f 1053 RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS;
mbed_official 235:685d5f11838f 1054 }
mbed_official 235:685d5f11838f 1055 else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON)
mbed_official 235:685d5f11838f 1056 {
mbed_official 235:685d5f11838f 1057 RCC_OscInitStruct->HSEState = RCC_HSE_ON;
mbed_official 235:685d5f11838f 1058 }
mbed_official 235:685d5f11838f 1059 else
mbed_official 235:685d5f11838f 1060 {
mbed_official 235:685d5f11838f 1061 RCC_OscInitStruct->HSEState = RCC_HSE_OFF;
mbed_official 235:685d5f11838f 1062 }
mbed_official 235:685d5f11838f 1063
mbed_official 235:685d5f11838f 1064 /* Get the HSI configuration -----------------------------------------------*/
mbed_official 235:685d5f11838f 1065 if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION)
mbed_official 235:685d5f11838f 1066 {
mbed_official 235:685d5f11838f 1067 RCC_OscInitStruct->HSIState = RCC_HSI_ON;
mbed_official 235:685d5f11838f 1068 }
mbed_official 235:685d5f11838f 1069 else
mbed_official 235:685d5f11838f 1070 {
mbed_official 235:685d5f11838f 1071 RCC_OscInitStruct->HSIState = RCC_HSI_OFF;
mbed_official 235:685d5f11838f 1072 }
mbed_official 235:685d5f11838f 1073
mbed_official 235:685d5f11838f 1074 RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR &RCC_CR_HSITRIM) >> POSITION_VAL(RCC_CR_HSITRIM));
mbed_official 235:685d5f11838f 1075
mbed_official 235:685d5f11838f 1076 /* Get the LSE configuration -----------------------------------------------*/
mbed_official 235:685d5f11838f 1077 if((RCC->BDCR &RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP)
mbed_official 235:685d5f11838f 1078 {
mbed_official 235:685d5f11838f 1079 RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS;
mbed_official 235:685d5f11838f 1080 }
mbed_official 235:685d5f11838f 1081 else if((RCC->BDCR &RCC_BDCR_LSEON) == RCC_BDCR_LSEON)
mbed_official 235:685d5f11838f 1082 {
mbed_official 235:685d5f11838f 1083 RCC_OscInitStruct->LSEState = RCC_LSE_ON;
mbed_official 235:685d5f11838f 1084 }
mbed_official 235:685d5f11838f 1085 else
mbed_official 235:685d5f11838f 1086 {
mbed_official 235:685d5f11838f 1087 RCC_OscInitStruct->LSEState = RCC_LSE_OFF;
mbed_official 235:685d5f11838f 1088 }
mbed_official 235:685d5f11838f 1089
mbed_official 235:685d5f11838f 1090 /* Get the LSI configuration -----------------------------------------------*/
mbed_official 235:685d5f11838f 1091 if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION)
mbed_official 235:685d5f11838f 1092 {
mbed_official 235:685d5f11838f 1093 RCC_OscInitStruct->LSIState = RCC_LSI_ON;
mbed_official 235:685d5f11838f 1094 }
mbed_official 235:685d5f11838f 1095 else
mbed_official 235:685d5f11838f 1096 {
mbed_official 235:685d5f11838f 1097 RCC_OscInitStruct->LSIState = RCC_LSI_OFF;
mbed_official 235:685d5f11838f 1098 }
mbed_official 235:685d5f11838f 1099
mbed_official 235:685d5f11838f 1100 /* Get the PLL configuration -----------------------------------------------*/
mbed_official 235:685d5f11838f 1101 if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON)
mbed_official 235:685d5f11838f 1102 {
mbed_official 235:685d5f11838f 1103 RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON;
mbed_official 235:685d5f11838f 1104 }
mbed_official 235:685d5f11838f 1105 else
mbed_official 235:685d5f11838f 1106 {
mbed_official 235:685d5f11838f 1107 RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF;
mbed_official 235:685d5f11838f 1108 }
mbed_official 235:685d5f11838f 1109 RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
mbed_official 235:685d5f11838f 1110 RCC_OscInitStruct->PLL.PLLM = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM);
mbed_official 235:685d5f11838f 1111 RCC_OscInitStruct->PLL.PLLN = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN));
mbed_official 235:685d5f11838f 1112 RCC_OscInitStruct->PLL.PLLP = (uint32_t)((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) + RCC_PLLCFGR_PLLP_0) << 1) >> POSITION_VAL(RCC_PLLCFGR_PLLP));
mbed_official 235:685d5f11838f 1113 RCC_OscInitStruct->PLL.PLLQ = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLQ) >> POSITION_VAL(RCC_PLLCFGR_PLLQ));
mbed_official 235:685d5f11838f 1114 }
mbed_official 235:685d5f11838f 1115
mbed_official 235:685d5f11838f 1116 /**
mbed_official 235:685d5f11838f 1117 * @brief Configures the RCC_ClkInitStruct according to the internal
mbed_official 235:685d5f11838f 1118 * RCC configuration registers.
mbed_official 235:685d5f11838f 1119 * @param RCC_OscInitStruct: pointer to an RCC_ClkInitTypeDef structure that
mbed_official 235:685d5f11838f 1120 * will be configured.
mbed_official 235:685d5f11838f 1121 * @param pFLatency: Pointer on the Flash Latency.
mbed_official 235:685d5f11838f 1122 * @retval None
mbed_official 235:685d5f11838f 1123 */
mbed_official 235:685d5f11838f 1124 void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency)
mbed_official 235:685d5f11838f 1125 {
mbed_official 235:685d5f11838f 1126 /* Set all possible values for the Clock type parameter --------------------*/
mbed_official 235:685d5f11838f 1127 RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
mbed_official 235:685d5f11838f 1128
mbed_official 235:685d5f11838f 1129 /* Get the SYSCLK configuration --------------------------------------------*/
mbed_official 235:685d5f11838f 1130 RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
mbed_official 235:685d5f11838f 1131
mbed_official 235:685d5f11838f 1132 /* Get the HCLK configuration ----------------------------------------------*/
mbed_official 235:685d5f11838f 1133 RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE);
mbed_official 235:685d5f11838f 1134
mbed_official 235:685d5f11838f 1135 /* Get the APB1 configuration ----------------------------------------------*/
mbed_official 235:685d5f11838f 1136 RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1);
mbed_official 235:685d5f11838f 1137
mbed_official 235:685d5f11838f 1138 /* Get the APB2 configuration ----------------------------------------------*/
mbed_official 235:685d5f11838f 1139 RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3);
mbed_official 235:685d5f11838f 1140
mbed_official 235:685d5f11838f 1141 /* Get the Flash Wait State (Latency) configuration ------------------------*/
mbed_official 235:685d5f11838f 1142 *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
mbed_official 235:685d5f11838f 1143 }
mbed_official 235:685d5f11838f 1144
mbed_official 235:685d5f11838f 1145 /**
mbed_official 235:685d5f11838f 1146 * @brief This function handles the RCC CSS interrupt request.
mbed_official 235:685d5f11838f 1147 * @note This API should be called under the NMI_Handler().
mbed_official 235:685d5f11838f 1148 * @param None
mbed_official 235:685d5f11838f 1149 * @retval None
mbed_official 235:685d5f11838f 1150 */
mbed_official 235:685d5f11838f 1151 void HAL_RCC_NMI_IRQHandler(void)
mbed_official 235:685d5f11838f 1152 {
mbed_official 235:685d5f11838f 1153 /* Check RCC CSSF flag */
mbed_official 235:685d5f11838f 1154 if(__HAL_RCC_GET_IT(RCC_IT_CSS))
mbed_official 235:685d5f11838f 1155 {
mbed_official 235:685d5f11838f 1156 /* RCC Clock Security System interrupt user callback */
mbed_official 235:685d5f11838f 1157 HAL_RCC_CCSCallback();
mbed_official 235:685d5f11838f 1158
mbed_official 235:685d5f11838f 1159 /* Clear RCC CSS pending bit */
mbed_official 235:685d5f11838f 1160 __HAL_RCC_CLEAR_IT(RCC_IT_CSS);
mbed_official 235:685d5f11838f 1161 }
mbed_official 235:685d5f11838f 1162 }
mbed_official 235:685d5f11838f 1163
mbed_official 235:685d5f11838f 1164 /**
mbed_official 235:685d5f11838f 1165 * @brief RCC Clock Security System interrupt callback
mbed_official 235:685d5f11838f 1166 * @param none
mbed_official 235:685d5f11838f 1167 * @retval none
mbed_official 235:685d5f11838f 1168 */
mbed_official 235:685d5f11838f 1169 __weak void HAL_RCC_CCSCallback(void)
mbed_official 235:685d5f11838f 1170 {
mbed_official 235:685d5f11838f 1171 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 235:685d5f11838f 1172 the HAL_RCC_CCSCallback could be implemented in the user file
mbed_official 235:685d5f11838f 1173 */
mbed_official 235:685d5f11838f 1174 }
mbed_official 235:685d5f11838f 1175
mbed_official 235:685d5f11838f 1176 /**
mbed_official 235:685d5f11838f 1177 * @}
mbed_official 235:685d5f11838f 1178 */
mbed_official 235:685d5f11838f 1179
mbed_official 235:685d5f11838f 1180 /**
mbed_official 235:685d5f11838f 1181 * @}
mbed_official 235:685d5f11838f 1182 */
mbed_official 235:685d5f11838f 1183
mbed_official 235:685d5f11838f 1184 #endif /* HAL_RCC_MODULE_ENABLED */
mbed_official 235:685d5f11838f 1185 /**
mbed_official 235:685d5f11838f 1186 * @}
mbed_official 235:685d5f11838f 1187 */
mbed_official 235:685d5f11838f 1188
mbed_official 235:685d5f11838f 1189 /**
mbed_official 235:685d5f11838f 1190 * @}
mbed_official 235:685d5f11838f 1191 */
mbed_official 235:685d5f11838f 1192
mbed_official 235:685d5f11838f 1193 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/