mbed official / mbed-dev

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c@180:96ed750bd169, 2018-01-17 (annotated)

Committer:
Anna Bridge
Date:
Wed Jan 17 15:23:54 2018 +0000
Revision:
180:96ed750bd169
Parent:
177:d650f5d4c87a
Child:
182:a56a73fd2a6f
mbed-dev libray. Release version 158

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 167:e84263d55307 1 /*
AnnaBridge 167:e84263d55307 2 * Copyright (c) 2013-2016 Realtek Semiconductor Corp.
AnnaBridge 167:e84263d55307 3 *
AnnaBridge 167:e84263d55307 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 167:e84263d55307 5 * you may not use this file except in compliance with the License.
AnnaBridge 167:e84263d55307 6 * You may obtain a copy of the License at
AnnaBridge 167:e84263d55307 7 *
AnnaBridge 167:e84263d55307 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 167:e84263d55307 9 *
AnnaBridge 167:e84263d55307 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 167:e84263d55307 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 167:e84263d55307 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 167:e84263d55307 13 * See the License for the specific language governing permissions and
AnnaBridge 167:e84263d55307 14 * limitations under the License.
AnnaBridge 167:e84263d55307 15 */
AnnaBridge 167:e84263d55307 16 #include "rtl8195a.h"
AnnaBridge 173:e131a1973e81 17
AnnaBridge 173:e131a1973e81 18 #if defined(__CC_ARM) || \
AnnaBridge 173:e131a1973e81 19 (defined (__ARMCC_VERSION) && __ARMCC_VERSION >= 6010050)
AnnaBridge 167:e84263d55307 20
AnnaBridge 173:e131a1973e81 21 extern uint8_t Image$$RW_IRAM2$$ZI$$Base[];
AnnaBridge 173:e131a1973e81 22 extern uint8_t Image$$RW_IRAM2$$ZI$$Limit[];
AnnaBridge 173:e131a1973e81 23 extern uint8_t Image$$TCM_OVERLAY$$ZI$$Base[];
AnnaBridge 173:e131a1973e81 24 extern uint8_t Image$$TCM_OVERLAY$$ZI$$Limit[];
AnnaBridge 173:e131a1973e81 25 extern uint8_t Image$$RW_DRAM2$$ZI$$Base[];
AnnaBridge 173:e131a1973e81 26 extern uint8_t Image$$RW_DRAM2$$ZI$$Limit[];
AnnaBridge 173:e131a1973e81 27 #define __bss_sram_start__ Image$$RW_IRAM2$$ZI$$Base
AnnaBridge 173:e131a1973e81 28 #define __bss_sram_end__ Image$$RW_IRAM2$$ZI$$Limit
AnnaBridge 173:e131a1973e81 29 #define __bss_dtcm_start__ Image$$TCM_OVERLAY$$ZI$$Base
AnnaBridge 173:e131a1973e81 30 #define __bss_dtcm_end__ Image$$TCM_OVERLAY$$ZI$$Limit
AnnaBridge 173:e131a1973e81 31 #define __bss_dram_start__ Image$$RW_DRAM2$$ZI$$Base
AnnaBridge 173:e131a1973e81 32 #define __bss_dram_end__ Image$$RW_DRAM2$$ZI$$Limit
AnnaBridge 173:e131a1973e81 33
AnnaBridge 173:e131a1973e81 34 #elif defined (__ICCARM__)
AnnaBridge 173:e131a1973e81 35
AnnaBridge 177:d650f5d4c87a 36 #pragma section=".bss.sram"
AnnaBridge 177:d650f5d4c87a 37 #pragma section=".bss.dtcm"
AnnaBridge 177:d650f5d4c87a 38 #pragma section=".bss.dram"
AnnaBridge 167:e84263d55307 39
AnnaBridge 177:d650f5d4c87a 40 uint8_t *__bss_sram_start__;
AnnaBridge 177:d650f5d4c87a 41 uint8_t *__bss_sram_end__;
AnnaBridge 177:d650f5d4c87a 42 uint8_t *__bss_dtcm_start__;
AnnaBridge 177:d650f5d4c87a 43 uint8_t *__bss_dtcm_end__;
AnnaBridge 177:d650f5d4c87a 44 uint8_t *__bss_dram_start__;
AnnaBridge 177:d650f5d4c87a 45 uint8_t *__bss_dram_end__;
AnnaBridge 167:e84263d55307 46
AnnaBridge 167:e84263d55307 47 void __iar_data_init_app(void)
AnnaBridge 167:e84263d55307 48 {
AnnaBridge 177:d650f5d4c87a 49 __bss_sram_start__ = (uint8_t *)__section_begin(".bss.sram");
AnnaBridge 177:d650f5d4c87a 50 __bss_sram_end__ = (uint8_t *)__section_end(".bss.sram");
AnnaBridge 177:d650f5d4c87a 51 __bss_dtcm_start__ = (uint8_t *)__section_begin(".bss.dtcm");
AnnaBridge 177:d650f5d4c87a 52 __bss_dtcm_end__ = (uint8_t *)__section_end(".bss.dtcm");
AnnaBridge 177:d650f5d4c87a 53 __bss_dram_start__ = (uint8_t *)__section_begin(".bss.dram");
AnnaBridge 177:d650f5d4c87a 54 __bss_dram_end__ = (uint8_t *)__section_end(".bss.dram");
AnnaBridge 167:e84263d55307 55 }
AnnaBridge 173:e131a1973e81 56
AnnaBridge 167:e84263d55307 57 #else
AnnaBridge 173:e131a1973e81 58
AnnaBridge 173:e131a1973e81 59 extern uint8_t __bss_sram_start__[];
AnnaBridge 173:e131a1973e81 60 extern uint8_t __bss_sram_end__[];
AnnaBridge 173:e131a1973e81 61 extern uint8_t __bss_dtcm_start__[];
AnnaBridge 173:e131a1973e81 62 extern uint8_t __bss_dtcm_end__[];
AnnaBridge 173:e131a1973e81 63 extern uint8_t __bss_dram_start__[];
AnnaBridge 173:e131a1973e81 64 extern uint8_t __bss_dram_end__[];
AnnaBridge 173:e131a1973e81 65
AnnaBridge 167:e84263d55307 66 #endif
AnnaBridge 167:e84263d55307 67
AnnaBridge 167:e84263d55307 68 extern VECTOR_Func NewVectorTable[];
AnnaBridge 167:e84263d55307 69 extern void SystemCoreClockUpdate(void);
AnnaBridge 167:e84263d55307 70 extern void PLAT_Start(void);
AnnaBridge 167:e84263d55307 71 extern void PLAT_Main(void);
AnnaBridge 173:e131a1973e81 72
AnnaBridge 173:e131a1973e81 73 IMAGE2_START_RAM_FUN_SECTION
AnnaBridge 173:e131a1973e81 74 const RAM_START_FUNCTION gImage2EntryFun0 = {
AnnaBridge 167:e84263d55307 75 PLAT_Start
AnnaBridge 167:e84263d55307 76 };
AnnaBridge 167:e84263d55307 77
AnnaBridge 173:e131a1973e81 78 IMAGE2_VALID_PATTEN_SECTION
AnnaBridge 173:e131a1973e81 79 const uint8_t IMAGE2_SIGNATURE[20] = {
AnnaBridge 167:e84263d55307 80 'R', 'T', 'K', 'W', 'i', 'n', 0x0, 0xff,
AnnaBridge 167:e84263d55307 81 (FW_VERSION&0xff), ((FW_VERSION >> 8)&0xff),
AnnaBridge 167:e84263d55307 82 (FW_SUBVERSION&0xff), ((FW_SUBVERSION >> 8)&0xff),
AnnaBridge 167:e84263d55307 83 (FW_CHIP_ID&0xff), ((FW_CHIP_ID >> 8)&0xff),
AnnaBridge 167:e84263d55307 84 (FW_CHIP_VER),
AnnaBridge 167:e84263d55307 85 (FW_BUS_TYPE),
AnnaBridge 167:e84263d55307 86 (FW_INFO_RSV1),
AnnaBridge 167:e84263d55307 87 (FW_INFO_RSV2),
AnnaBridge 167:e84263d55307 88 (FW_INFO_RSV3),
AnnaBridge 167:e84263d55307 89 (FW_INFO_RSV4)
AnnaBridge 167:e84263d55307 90 };
AnnaBridge 167:e84263d55307 91
AnnaBridge 167:e84263d55307 92 void TRAP_NMIHandler(void)
AnnaBridge 167:e84263d55307 93 {
AnnaBridge 167:e84263d55307 94 #ifdef CONFIG_WDG_NORMAL
AnnaBridge 167:e84263d55307 95 uint32_t val;
AnnaBridge 167:e84263d55307 96 WDG_REG *ctl;
AnnaBridge 167:e84263d55307 97
AnnaBridge 167:e84263d55307 98 // Check if this NMI is triggered by Watchdog Timer
AnnaBridge 167:e84263d55307 99 val = __RTK_READ32(VENDOR_REG_BASE, 0);
AnnaBridge 167:e84263d55307 100 ctl = (WDG_REG*) &val;
AnnaBridge 167:e84263d55307 101 if (ctl->WdgToISR) {
AnnaBridge 167:e84263d55307 102 INTR_WatchdogHandler();
AnnaBridge 167:e84263d55307 103 }
AnnaBridge 167:e84263d55307 104 #endif
AnnaBridge 167:e84263d55307 105 }
AnnaBridge 167:e84263d55307 106
AnnaBridge 173:e131a1973e81 107 #if defined (__ICCARM__)
AnnaBridge 167:e84263d55307 108 void __TRAP_HardFaultHandler_Patch(uint32_t addr)
AnnaBridge 167:e84263d55307 109 {
AnnaBridge 167:e84263d55307 110 uint32_t cfsr;
AnnaBridge 167:e84263d55307 111 uint32_t bfar;
AnnaBridge 167:e84263d55307 112
AnnaBridge 167:e84263d55307 113 uint32_t stackpc;
AnnaBridge 167:e84263d55307 114 uint16_t asmcode;
AnnaBridge 167:e84263d55307 115
AnnaBridge 167:e84263d55307 116 cfsr = HAL_READ32(0xE000ED28, 0x0);
AnnaBridge 167:e84263d55307 117
AnnaBridge 167:e84263d55307 118 // Violation to memory access protection
AnnaBridge 167:e84263d55307 119 if (cfsr & 0x82) {
AnnaBridge 167:e84263d55307 120
AnnaBridge 167:e84263d55307 121 bfar = HAL_READ32(0xE000ED38, 0x0);
AnnaBridge 167:e84263d55307 122
AnnaBridge 167:e84263d55307 123 // invalid access to wifi register, usually happened in LPS 32K or IPS
AnnaBridge 167:e84263d55307 124 if (bfar >= WIFI_REG_BASE && bfar < WIFI_REG_BASE + 0x40000) {
AnnaBridge 167:e84263d55307 125
AnnaBridge 167:e84263d55307 126 //__BKPT(0);
AnnaBridge 167:e84263d55307 127
AnnaBridge 167:e84263d55307 128 /* Get the MemManage fault PC, and step to next command.
AnnaBridge 167:e84263d55307 129 * Otherwise it will keep hitting MemMange Fault on the same assembly code.
AnnaBridge 167:e84263d55307 130 *
AnnaBridge 167:e84263d55307 131 * To step to next command, we need parse the assembly code to check if
AnnaBridge 173:e131a1973e81 132 * it is 16-bit or 32-bit command.
AnnaBridge 167:e84263d55307 133 * Ref: ARM Architecture Reference Manual (ARMv7-A and ARMv7-R edition),
AnnaBridge 173:e131a1973e81 134 * Chapter A6 - Thumb Instruction Set Encoding
AnnaBridge 167:e84263d55307 135 *
AnnaBridge 167:e84263d55307 136 * However, the fault assembly code (Ex. LDR or ADR) is not actually executed,
AnnaBridge 167:e84263d55307 137 * So the register value is un-predictable.
AnnaBridge 167:e84263d55307 138 **/
AnnaBridge 167:e84263d55307 139 stackpc = HAL_READ32(addr, 0x18);
AnnaBridge 167:e84263d55307 140 asmcode = HAL_READ16(stackpc, 0);
AnnaBridge 167:e84263d55307 141 if ((asmcode & 0xF800) > 0xE000) {
AnnaBridge 167:e84263d55307 142 // 32-bit instruction, (opcode[15:11] = 0b11111, 0b11110, 0b11101)
AnnaBridge 167:e84263d55307 143 HAL_WRITE32(addr, 0x18, stackpc + 4);
AnnaBridge 167:e84263d55307 144 } else {
AnnaBridge 167:e84263d55307 145 // 16-bit instruction
AnnaBridge 167:e84263d55307 146 HAL_WRITE32(addr, 0x18, stackpc + 2);
AnnaBridge 167:e84263d55307 147 }
AnnaBridge 167:e84263d55307 148
AnnaBridge 167:e84263d55307 149 // clear Hard Fault Status Register
AnnaBridge 167:e84263d55307 150 HAL_WRITE32(0xE000ED2C, 0x0, HAL_READ32(0xE000ED2C, 0x0));
AnnaBridge 167:e84263d55307 151 return;
AnnaBridge 167:e84263d55307 152 }
AnnaBridge 167:e84263d55307 153 }
AnnaBridge 167:e84263d55307 154
AnnaBridge 167:e84263d55307 155 __TRAP_HardFaultHandler(addr);
AnnaBridge 167:e84263d55307 156 }
AnnaBridge 167:e84263d55307 157
AnnaBridge 167:e84263d55307 158 void TRAP_HardFaultHandler_Patch(void)
AnnaBridge 167:e84263d55307 159 {
AnnaBridge 167:e84263d55307 160 __asm("TST LR, #4 \n"
AnnaBridge 167:e84263d55307 161 "ITE EQ \n"
AnnaBridge 167:e84263d55307 162 "MRSEQ R0, MSP \n"
AnnaBridge 167:e84263d55307 163 "MRSNE R0, PSP \n"
AnnaBridge 167:e84263d55307 164 "B __TRAP_HardFaultHandler_Patch ");
AnnaBridge 167:e84263d55307 165 }
AnnaBridge 167:e84263d55307 166 #endif
AnnaBridge 167:e84263d55307 167
AnnaBridge 173:e131a1973e81 168 extern _LONG_CALL_ void * __rtl_memset_v1_00(void * m , int c , size_t n);
AnnaBridge 173:e131a1973e81 169 // Image2 Entry Function
AnnaBridge 174:b96e65c34a4d 170 void PLAT_Init(void)
AnnaBridge 167:e84263d55307 171 {
AnnaBridge 167:e84263d55307 172 uint32_t val;
AnnaBridge 167:e84263d55307 173
AnnaBridge 174:b96e65c34a4d 174 // Overwrite vector table
AnnaBridge 174:b96e65c34a4d 175 NewVectorTable[2] = (VECTOR_Func) TRAP_NMIHandler;
AnnaBridge 174:b96e65c34a4d 176 #if defined ( __ICCARM__ )
AnnaBridge 174:b96e65c34a4d 177 NewVectorTable[3] = (VECTOR_Func) TRAP_HardFaultHandler_Patch;
AnnaBridge 173:e131a1973e81 178 #endif
AnnaBridge 173:e131a1973e81 179
AnnaBridge 173:e131a1973e81 180 // Clear RAM BSS
AnnaBridge 173:e131a1973e81 181 #if defined (__ICCARM__)
AnnaBridge 174:b96e65c34a4d 182 __iar_data_init_app();
AnnaBridge 177:d650f5d4c87a 183 #endif
AnnaBridge 173:e131a1973e81 184 __rtl_memset_v1_00((void *)__bss_sram_start__, 0, __bss_sram_end__ - __bss_sram_start__);
AnnaBridge 173:e131a1973e81 185 __rtl_memset_v1_00((void *)__bss_dtcm_start__, 0, __bss_dtcm_end__ - __bss_dtcm_start__);
AnnaBridge 173:e131a1973e81 186 __rtl_memset_v1_00((void *)__bss_dram_start__, 0, __bss_dram_end__ - __bss_dram_start__);
AnnaBridge 173:e131a1973e81 187
AnnaBridge 173:e131a1973e81 188 extern HAL_TIMER_OP_EXT HalTimerOpExt;
AnnaBridge 173:e131a1973e81 189 __rtl_memset_v1_00((void *)&HalTimerOpExt, 0, sizeof(HalTimerOpExt));
AnnaBridge 173:e131a1973e81 190 __rtl_memset_v1_00((void *)&HalTimerOp, 0, sizeof(HalTimerOp));
AnnaBridge 173:e131a1973e81 191
AnnaBridge 173:e131a1973e81 192 HalTimerOpInit_Patch(&HalTimerOp);
AnnaBridge 173:e131a1973e81 193 SystemCoreClockUpdate();
AnnaBridge 173:e131a1973e81 194
AnnaBridge 173:e131a1973e81 195 // Set SPS lower voltage
AnnaBridge 167:e84263d55307 196 val = __RTK_CTRL_READ32(REG_SYS_EFUSE_SYSCFG0);
AnnaBridge 167:e84263d55307 197 val &= 0xf0ffffff;
AnnaBridge 167:e84263d55307 198 val |= 0x6000000;
AnnaBridge 167:e84263d55307 199 __RTK_CTRL_WRITE32(REG_SYS_EFUSE_SYSCFG0, val);
AnnaBridge 173:e131a1973e81 200
AnnaBridge 173:e131a1973e81 201 // xtal buffer driving current
AnnaBridge 167:e84263d55307 202 val = __RTK_CTRL_READ32(REG_SYS_XTAL_CTRL1);
AnnaBridge 167:e84263d55307 203 val &= ~(BIT_MASK_SYS_XTAL_DRV_RF1 << BIT_SHIFT_SYS_XTAL_DRV_RF1);
AnnaBridge 167:e84263d55307 204 val |= BIT_SYS_XTAL_DRV_RF1(1);
AnnaBridge 167:e84263d55307 205 __RTK_CTRL_WRITE32(REG_SYS_XTAL_CTRL1, val);
AnnaBridge 167:e84263d55307 206
AnnaBridge 173:e131a1973e81 207 // Initialize SPIC, then disable it for power saving.
AnnaBridge 173:e131a1973e81 208 if ((HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) & BIT_SOC_FLASH_EN) != 0) {
AnnaBridge 173:e131a1973e81 209 SpicNVMCalLoadAll();
AnnaBridge 173:e131a1973e81 210 SpicReadIDRtl8195A();
AnnaBridge 173:e131a1973e81 211 SpicDisableRtl8195A();
AnnaBridge 173:e131a1973e81 212 }
AnnaBridge 167:e84263d55307 213
AnnaBridge 167:e84263d55307 214 #ifdef CONFIG_TIMER_MODULE
AnnaBridge 173:e131a1973e81 215 Calibration32k();
AnnaBridge 167:e84263d55307 216 #endif
AnnaBridge 167:e84263d55307 217
AnnaBridge 167:e84263d55307 218 #ifndef CONFIG_SDIO_DEVICE_EN
AnnaBridge 167:e84263d55307 219 SDIO_DEV_Disable();
AnnaBridge 167:e84263d55307 220 #endif
AnnaBridge 167:e84263d55307 221
AnnaBridge 167:e84263d55307 222 // Enter App start function
AnnaBridge 167:e84263d55307 223 PLAT_Main();
AnnaBridge 167:e84263d55307 224 }
AnnaBridge 167:e84263d55307 225
AnnaBridge 167:e84263d55307 226 extern void SVC_Handler(void);
AnnaBridge 167:e84263d55307 227 extern void PendSV_Handler(void);
AnnaBridge 167:e84263d55307 228 extern void SysTick_Handler(void);
AnnaBridge 167:e84263d55307 229
AnnaBridge 173:e131a1973e81 230 // The Main App entry point
AnnaBridge 167:e84263d55307 231 #if defined (__CC_ARM)
AnnaBridge 167:e84263d55307 232 __asm void ARM_PLAT_Main(void)
AnnaBridge 167:e84263d55307 233 {
AnnaBridge 173:e131a1973e81 234 IMPORT SystemInit
AnnaBridge 173:e131a1973e81 235 IMPORT __main
AnnaBridge 173:e131a1973e81 236 BL SystemInit
AnnaBridge 173:e131a1973e81 237 BL __main
AnnaBridge 173:e131a1973e81 238 }
AnnaBridge 173:e131a1973e81 239 #elif defined (__ICCARM__)
AnnaBridge 173:e131a1973e81 240 extern void __iar_program_start(void);
AnnaBridge 173:e131a1973e81 241
AnnaBridge 173:e131a1973e81 242 void IAR_PLAT_Main(void)
AnnaBridge 173:e131a1973e81 243 {
AnnaBridge 173:e131a1973e81 244 SystemInit();
AnnaBridge 173:e131a1973e81 245 __iar_program_start();
AnnaBridge 167:e84263d55307 246 }
AnnaBridge 167:e84263d55307 247 #endif
AnnaBridge 167:e84263d55307 248
AnnaBridge 167:e84263d55307 249 void PLAT_Main(void)
AnnaBridge 167:e84263d55307 250 {
AnnaBridge 167:e84263d55307 251 TRAP_Init((void *)SVC_Handler, (void *)PendSV_Handler, (void *)SysTick_Handler);
AnnaBridge 167:e84263d55307 252
AnnaBridge 173:e131a1973e81 253 #if defined (__CC_ARM)
AnnaBridge 173:e131a1973e81 254 ARM_PLAT_Main();
AnnaBridge 173:e131a1973e81 255 #elif defined (__ICCARM__)
AnnaBridge 173:e131a1973e81 256 IAR_PLAT_Main();
AnnaBridge 173:e131a1973e81 257 #else
AnnaBridge 173:e131a1973e81 258 __asm ("ldr r0, =SystemInit \n"
AnnaBridge 167:e84263d55307 259 "blx r0 \n"
AnnaBridge 174:b96e65c34a4d 260 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
AnnaBridge 174:b96e65c34a4d 261 "ldr r0, =__main \n"
AnnaBridge 174:b96e65c34a4d 262 #else
AnnaBridge 167:e84263d55307 263 "ldr r0, =_start \n"
AnnaBridge 174:b96e65c34a4d 264 #endif
AnnaBridge 167:e84263d55307 265 "bx r0 \n"
AnnaBridge 167:e84263d55307 266 );
AnnaBridge 167:e84263d55307 267 #endif
AnnaBridge 173:e131a1973e81 268
AnnaBridge 167:e84263d55307 269 // Never reached
AnnaBridge 173:e131a1973e81 270 for (;;);
AnnaBridge 167:e84263d55307 271 }