mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c@167:e84263d55307, 2017-06-21 (annotated)

Committer:
AnnaBridge
Date:
Wed Jun 21 17:46:44 2017 +0100
Revision:
167:e84263d55307
Child:
173:e131a1973e81
This updates the lib to the mbed lib v 145

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 167:e84263d55307 1 /*
AnnaBridge 167:e84263d55307 2 * Copyright (c) 2013-2016 Realtek Semiconductor Corp.
AnnaBridge 167:e84263d55307 3 *
AnnaBridge 167:e84263d55307 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 167:e84263d55307 5 * you may not use this file except in compliance with the License.
AnnaBridge 167:e84263d55307 6 * You may obtain a copy of the License at
AnnaBridge 167:e84263d55307 7 *
AnnaBridge 167:e84263d55307 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 167:e84263d55307 9 *
AnnaBridge 167:e84263d55307 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 167:e84263d55307 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 167:e84263d55307 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 167:e84263d55307 13 * See the License for the specific language governing permissions and
AnnaBridge 167:e84263d55307 14 * limitations under the License.
AnnaBridge 167:e84263d55307 15 */
AnnaBridge 167:e84263d55307 16 #include "rtl8195a.h"
AnnaBridge 167:e84263d55307 17 #include "system_8195a.h"
AnnaBridge 167:e84263d55307 18 #if defined ( __CC_ARM ) /* ARM Compiler 4/5 */
AnnaBridge 167:e84263d55307 19 extern uint8_t Image$$RW_IRAM1$$ZI$$Base[];
AnnaBridge 167:e84263d55307 20 #define __bss_start__ Image$$RW_IRAM1$$ZI$$Base
AnnaBridge 167:e84263d55307 21 extern uint8_t Image$$RW_IRAM1$$ZI$$Limit[];
AnnaBridge 167:e84263d55307 22 #define __bss_end__ Image$$RW_IRAM1$$ZI$$Limit
AnnaBridge 167:e84263d55307 23 #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler 6 */
AnnaBridge 167:e84263d55307 24 extern uint8_t Image$$RW_IRAM1$$ZI$$Base[];
AnnaBridge 167:e84263d55307 25 #define __bss_start__ Image$$RW_IRAM1$$ZI$$Base
AnnaBridge 167:e84263d55307 26 extern uint8_t Image$$RW_IRAM1$$ZI$$Limit[];
AnnaBridge 167:e84263d55307 27 #define __bss_end__ Image$$RW_IRAM1$$ZI$$Limit
AnnaBridge 167:e84263d55307 28
AnnaBridge 167:e84263d55307 29 #elif defined ( __ICCARM__ )
AnnaBridge 167:e84263d55307 30 #pragma section=".ram.bss"
AnnaBridge 167:e84263d55307 31 #pragma section=".rom.bss"
AnnaBridge 167:e84263d55307 32 #pragma section=".ram.start.table"
AnnaBridge 167:e84263d55307 33 #pragma section=".ram_image1.bss"
AnnaBridge 167:e84263d55307 34 #pragma section=".image2.start.table1"
AnnaBridge 167:e84263d55307 35 #pragma section=".image2.start.table2"
AnnaBridge 167:e84263d55307 36
AnnaBridge 167:e84263d55307 37 uint8_t *__bss_start__;
AnnaBridge 167:e84263d55307 38 uint8_t *__bss_end__;
AnnaBridge 167:e84263d55307 39
AnnaBridge 167:e84263d55307 40 void __iar_data_init_app(void)
AnnaBridge 167:e84263d55307 41 {
AnnaBridge 167:e84263d55307 42 __bss_start__ = (uint8_t *)__section_begin(".ram.bss");
AnnaBridge 167:e84263d55307 43 __bss_end__ = (uint8_t *)__section_end(".ram.bss");
AnnaBridge 167:e84263d55307 44 }
AnnaBridge 167:e84263d55307 45 #else
AnnaBridge 167:e84263d55307 46 extern uint8_t __bss_start__[];
AnnaBridge 167:e84263d55307 47 extern uint8_t __bss_end__[];
AnnaBridge 167:e84263d55307 48 extern uint8_t __image1_bss_start__[];
AnnaBridge 167:e84263d55307 49 extern uint8_t __image1_bss_end__[];
AnnaBridge 167:e84263d55307 50 extern uint8_t __image2_entry_func__[];
AnnaBridge 167:e84263d55307 51 extern uint8_t __image2_validate_code__[];
AnnaBridge 167:e84263d55307 52 #endif
AnnaBridge 167:e84263d55307 53
AnnaBridge 167:e84263d55307 54 extern VECTOR_Func NewVectorTable[];
AnnaBridge 167:e84263d55307 55 extern void SystemCoreClockUpdate(void);
AnnaBridge 167:e84263d55307 56 extern void PLAT_Start(void);
AnnaBridge 167:e84263d55307 57 extern void PLAT_Main(void);
AnnaBridge 167:e84263d55307 58 extern HAL_TIMER_OP HalTimerOp;
AnnaBridge 167:e84263d55307 59
AnnaBridge 167:e84263d55307 60 IMAGE2_START_RAM_FUN_SECTION const RAM_START_FUNCTION gImage2EntryFun0 = {
AnnaBridge 167:e84263d55307 61 PLAT_Start
AnnaBridge 167:e84263d55307 62 };
AnnaBridge 167:e84263d55307 63
AnnaBridge 167:e84263d55307 64 IMAGE1_VALID_PATTEN_SECTION const uint8_t RAM_IMG1_VALID_PATTEN[] = {
AnnaBridge 167:e84263d55307 65 0x23, 0x79, 0x16, 0x88, 0xff, 0xff, 0xff, 0xff
AnnaBridge 167:e84263d55307 66 };
AnnaBridge 167:e84263d55307 67
AnnaBridge 167:e84263d55307 68 IMAGE2_VALID_PATTEN_SECTION const uint8_t RAM_IMG2_VALID_PATTEN[20] = {
AnnaBridge 167:e84263d55307 69 'R', 'T', 'K', 'W', 'i', 'n', 0x0, 0xff,
AnnaBridge 167:e84263d55307 70 (FW_VERSION&0xff), ((FW_VERSION >> 8)&0xff),
AnnaBridge 167:e84263d55307 71 (FW_SUBVERSION&0xff), ((FW_SUBVERSION >> 8)&0xff),
AnnaBridge 167:e84263d55307 72 (FW_CHIP_ID&0xff), ((FW_CHIP_ID >> 8)&0xff),
AnnaBridge 167:e84263d55307 73 (FW_CHIP_VER),
AnnaBridge 167:e84263d55307 74 (FW_BUS_TYPE),
AnnaBridge 167:e84263d55307 75 (FW_INFO_RSV1),
AnnaBridge 167:e84263d55307 76 (FW_INFO_RSV2),
AnnaBridge 167:e84263d55307 77 (FW_INFO_RSV3),
AnnaBridge 167:e84263d55307 78 (FW_INFO_RSV4)
AnnaBridge 167:e84263d55307 79 };
AnnaBridge 167:e84263d55307 80
AnnaBridge 167:e84263d55307 81 void TRAP_NMIHandler(void)
AnnaBridge 167:e84263d55307 82 {
AnnaBridge 167:e84263d55307 83 #ifdef CONFIG_WDG_NORMAL
AnnaBridge 167:e84263d55307 84 uint32_t val;
AnnaBridge 167:e84263d55307 85 WDG_REG *ctl;
AnnaBridge 167:e84263d55307 86
AnnaBridge 167:e84263d55307 87 // Check if this NMI is triggered by Watchdog Timer
AnnaBridge 167:e84263d55307 88 val = __RTK_READ32(VENDOR_REG_BASE, 0);
AnnaBridge 167:e84263d55307 89 ctl = (WDG_REG*) &val;
AnnaBridge 167:e84263d55307 90 if (ctl->WdgToISR) {
AnnaBridge 167:e84263d55307 91 INTR_WatchdogHandler();
AnnaBridge 167:e84263d55307 92 }
AnnaBridge 167:e84263d55307 93 #endif
AnnaBridge 167:e84263d55307 94 }
AnnaBridge 167:e84263d55307 95
AnnaBridge 167:e84263d55307 96 #if defined ( __ICCARM__ )
AnnaBridge 167:e84263d55307 97 void __TRAP_HardFaultHandler_Patch(uint32_t addr)
AnnaBridge 167:e84263d55307 98 {
AnnaBridge 167:e84263d55307 99 uint32_t cfsr;
AnnaBridge 167:e84263d55307 100 uint32_t bfar;
AnnaBridge 167:e84263d55307 101
AnnaBridge 167:e84263d55307 102 uint32_t stackpc;
AnnaBridge 167:e84263d55307 103 uint16_t asmcode;
AnnaBridge 167:e84263d55307 104
AnnaBridge 167:e84263d55307 105 cfsr = HAL_READ32(0xE000ED28, 0x0);
AnnaBridge 167:e84263d55307 106
AnnaBridge 167:e84263d55307 107 // Violation to memory access protection
AnnaBridge 167:e84263d55307 108 if (cfsr & 0x82) {
AnnaBridge 167:e84263d55307 109
AnnaBridge 167:e84263d55307 110 bfar = HAL_READ32(0xE000ED38, 0x0);
AnnaBridge 167:e84263d55307 111
AnnaBridge 167:e84263d55307 112 // invalid access to wifi register, usually happened in LPS 32K or IPS
AnnaBridge 167:e84263d55307 113 if (bfar >= WIFI_REG_BASE && bfar < WIFI_REG_BASE + 0x40000) {
AnnaBridge 167:e84263d55307 114
AnnaBridge 167:e84263d55307 115 //__BKPT(0);
AnnaBridge 167:e84263d55307 116
AnnaBridge 167:e84263d55307 117 /* Get the MemManage fault PC, and step to next command.
AnnaBridge 167:e84263d55307 118 * Otherwise it will keep hitting MemMange Fault on the same assembly code.
AnnaBridge 167:e84263d55307 119 *
AnnaBridge 167:e84263d55307 120 * To step to next command, we need parse the assembly code to check if
AnnaBridge 167:e84263d55307 121 * it is 16-bit or 32-bit command.
AnnaBridge 167:e84263d55307 122 * Ref: ARM Architecture Reference Manual (ARMv7-A and ARMv7-R edition),
AnnaBridge 167:e84263d55307 123 * Chapter A6 - Thumb Instruction Set Encoding
AnnaBridge 167:e84263d55307 124 *
AnnaBridge 167:e84263d55307 125 * However, the fault assembly code (Ex. LDR or ADR) is not actually executed,
AnnaBridge 167:e84263d55307 126 * So the register value is un-predictable.
AnnaBridge 167:e84263d55307 127 **/
AnnaBridge 167:e84263d55307 128 stackpc = HAL_READ32(addr, 0x18);
AnnaBridge 167:e84263d55307 129 asmcode = HAL_READ16(stackpc, 0);
AnnaBridge 167:e84263d55307 130 if ((asmcode & 0xF800) > 0xE000) {
AnnaBridge 167:e84263d55307 131 // 32-bit instruction, (opcode[15:11] = 0b11111, 0b11110, 0b11101)
AnnaBridge 167:e84263d55307 132 HAL_WRITE32(addr, 0x18, stackpc + 4);
AnnaBridge 167:e84263d55307 133 } else {
AnnaBridge 167:e84263d55307 134 // 16-bit instruction
AnnaBridge 167:e84263d55307 135 HAL_WRITE32(addr, 0x18, stackpc + 2);
AnnaBridge 167:e84263d55307 136 }
AnnaBridge 167:e84263d55307 137
AnnaBridge 167:e84263d55307 138 // clear Hard Fault Status Register
AnnaBridge 167:e84263d55307 139 HAL_WRITE32(0xE000ED2C, 0x0, HAL_READ32(0xE000ED2C, 0x0));
AnnaBridge 167:e84263d55307 140 return;
AnnaBridge 167:e84263d55307 141 }
AnnaBridge 167:e84263d55307 142 }
AnnaBridge 167:e84263d55307 143
AnnaBridge 167:e84263d55307 144 __TRAP_HardFaultHandler(addr);
AnnaBridge 167:e84263d55307 145 }
AnnaBridge 167:e84263d55307 146
AnnaBridge 167:e84263d55307 147 void TRAP_HardFaultHandler_Patch(void)
AnnaBridge 167:e84263d55307 148 {
AnnaBridge 167:e84263d55307 149 __asm("TST LR, #4 \n"
AnnaBridge 167:e84263d55307 150 "ITE EQ \n"
AnnaBridge 167:e84263d55307 151 "MRSEQ R0, MSP \n"
AnnaBridge 167:e84263d55307 152 "MRSNE R0, PSP \n"
AnnaBridge 167:e84263d55307 153 "B __TRAP_HardFaultHandler_Patch ");
AnnaBridge 167:e84263d55307 154 }
AnnaBridge 167:e84263d55307 155 #endif
AnnaBridge 167:e84263d55307 156
AnnaBridge 167:e84263d55307 157 // Override original Interrupt Vector Table
AnnaBridge 167:e84263d55307 158 INFRA_START_SECTION void TRAP_OverrideTable(uint32_t stackp)
AnnaBridge 167:e84263d55307 159 {
AnnaBridge 167:e84263d55307 160 // Override NMI Handler
AnnaBridge 167:e84263d55307 161 NewVectorTable[2] = (VECTOR_Func) TRAP_NMIHandler;
AnnaBridge 167:e84263d55307 162
AnnaBridge 167:e84263d55307 163 #if defined ( __ICCARM__ )
AnnaBridge 167:e84263d55307 164 NewVectorTable[3] = (VECTOR_Func) TRAP_HardFaultHandler_Patch;
AnnaBridge 167:e84263d55307 165 #endif
AnnaBridge 167:e84263d55307 166 }
AnnaBridge 167:e84263d55307 167
AnnaBridge 167:e84263d55307 168 INFRA_START_SECTION void PLAT_Init(void)
AnnaBridge 167:e84263d55307 169 {
AnnaBridge 167:e84263d55307 170 uint32_t val;
AnnaBridge 167:e84263d55307 171
AnnaBridge 167:e84263d55307 172 //Set SPS lower voltage
AnnaBridge 167:e84263d55307 173 val = __RTK_CTRL_READ32(REG_SYS_EFUSE_SYSCFG0);
AnnaBridge 167:e84263d55307 174 val &= 0xf0ffffff;
AnnaBridge 167:e84263d55307 175 val |= 0x6000000;
AnnaBridge 167:e84263d55307 176 __RTK_CTRL_WRITE32(REG_SYS_EFUSE_SYSCFG0, val);
AnnaBridge 167:e84263d55307 177
AnnaBridge 167:e84263d55307 178 //xtal buffer driving current
AnnaBridge 167:e84263d55307 179 val = __RTK_CTRL_READ32(REG_SYS_XTAL_CTRL1);
AnnaBridge 167:e84263d55307 180 val &= ~(BIT_MASK_SYS_XTAL_DRV_RF1 << BIT_SHIFT_SYS_XTAL_DRV_RF1);
AnnaBridge 167:e84263d55307 181 val |= BIT_SYS_XTAL_DRV_RF1(1);
AnnaBridge 167:e84263d55307 182 __RTK_CTRL_WRITE32(REG_SYS_XTAL_CTRL1, val);
AnnaBridge 167:e84263d55307 183 }
AnnaBridge 167:e84263d55307 184
AnnaBridge 167:e84263d55307 185 //3 Image 2
AnnaBridge 167:e84263d55307 186 extern _LONG_CALL_ void * __rtl_memset_v1_00(void * m , int c , size_t n);
AnnaBridge 167:e84263d55307 187
AnnaBridge 167:e84263d55307 188 //extern uint32_t mbed_stack_isr_start;
AnnaBridge 167:e84263d55307 189 //extern uint32_t mbed_stack_isr_size;
AnnaBridge 167:e84263d55307 190 INFRA_START_SECTION void PLAT_Start(void)
AnnaBridge 167:e84263d55307 191 {
AnnaBridge 167:e84263d55307 192 u8 isFlashEn;
AnnaBridge 167:e84263d55307 193 #if defined ( __ICCARM__ )
AnnaBridge 167:e84263d55307 194 __iar_data_init_app();
AnnaBridge 167:e84263d55307 195 #endif
AnnaBridge 167:e84263d55307 196 // Clear RAM BSS
AnnaBridge 167:e84263d55307 197 __rtl_memset_v1_00((void *)__bss_start__, 0, __bss_end__ - __bss_start__);
AnnaBridge 167:e84263d55307 198
AnnaBridge 167:e84263d55307 199 TRAP_OverrideTable(0x1FFFFFFC);
AnnaBridge 167:e84263d55307 200 /* add by Ian --for mbed isr stack address setting */
AnnaBridge 167:e84263d55307 201 __set_MSP(0x1fffffbc);
AnnaBridge 167:e84263d55307 202
AnnaBridge 167:e84263d55307 203
AnnaBridge 167:e84263d55307 204 #ifdef CONFIG_SPIC_MODULE
AnnaBridge 167:e84263d55307 205 if ((HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) & BIT_SOC_FLASH_EN) != 0) {
AnnaBridge 167:e84263d55307 206 isFlashEn = 1;
AnnaBridge 167:e84263d55307 207 } else {
AnnaBridge 167:e84263d55307 208 isFlashEn = 0;
AnnaBridge 167:e84263d55307 209 }
AnnaBridge 167:e84263d55307 210 #endif
AnnaBridge 167:e84263d55307 211
AnnaBridge 167:e84263d55307 212 #ifdef CONFIG_TIMER_MODULE
AnnaBridge 167:e84263d55307 213 HalTimerOpInit_Patch(&HalTimerOp);
AnnaBridge 167:e84263d55307 214 #endif
AnnaBridge 167:e84263d55307 215
AnnaBridge 167:e84263d55307 216 //DBG_8195A("===== Enter Image 2 ====\n");
AnnaBridge 167:e84263d55307 217
AnnaBridge 167:e84263d55307 218
AnnaBridge 167:e84263d55307 219 SystemCoreClockUpdate();
AnnaBridge 167:e84263d55307 220
AnnaBridge 167:e84263d55307 221 if (isFlashEn) {
AnnaBridge 167:e84263d55307 222 #if CONFIG_SPIC_EN && SPIC_CALIBRATION_IN_NVM
AnnaBridge 167:e84263d55307 223 SpicNVMCalLoadAll();
AnnaBridge 167:e84263d55307 224 #endif
AnnaBridge 167:e84263d55307 225 SpicReadIDRtl8195A();
AnnaBridge 167:e84263d55307 226 // turn off SPIC for power saving
AnnaBridge 167:e84263d55307 227 SpicDisableRtl8195A();
AnnaBridge 167:e84263d55307 228 }
AnnaBridge 167:e84263d55307 229
AnnaBridge 167:e84263d55307 230
AnnaBridge 167:e84263d55307 231 PLAT_Init();
AnnaBridge 167:e84263d55307 232 #ifdef CONFIG_TIMER_MODULE
AnnaBridge 167:e84263d55307 233 Calibration32k();
AnnaBridge 167:e84263d55307 234
AnnaBridge 167:e84263d55307 235 #ifdef CONFIG_WDG
AnnaBridge 167:e84263d55307 236 #ifdef CONFIG_WDG_TEST
AnnaBridge 167:e84263d55307 237 WDGInit();
AnnaBridge 167:e84263d55307 238 #endif //CONFIG_WDG_TEST
AnnaBridge 167:e84263d55307 239 #endif //CONFIG_WDG
AnnaBridge 167:e84263d55307 240 #endif //CONFIG_TIMER_MODULE
AnnaBridge 167:e84263d55307 241
AnnaBridge 167:e84263d55307 242 #ifdef CONFIG_SOC_PS_MODULE
AnnaBridge 167:e84263d55307 243 //InitSoCPM();
AnnaBridge 167:e84263d55307 244 #endif
AnnaBridge 167:e84263d55307 245 /* GPIOA_7 does not pull high at power on. It causes SDIO Device
AnnaBridge 167:e84263d55307 246 * hardware to enable automatically and occupy GPIOA[7:0] */
AnnaBridge 167:e84263d55307 247 #ifndef CONFIG_SDIO_DEVICE_EN
AnnaBridge 167:e84263d55307 248 SDIO_DEV_Disable();
AnnaBridge 167:e84263d55307 249 #endif
AnnaBridge 167:e84263d55307 250
AnnaBridge 167:e84263d55307 251 // Enter App start function
AnnaBridge 167:e84263d55307 252 PLAT_Main();
AnnaBridge 167:e84263d55307 253 }
AnnaBridge 167:e84263d55307 254
AnnaBridge 167:e84263d55307 255 extern void SVC_Handler(void);
AnnaBridge 167:e84263d55307 256 extern void PendSV_Handler(void);
AnnaBridge 167:e84263d55307 257 extern void SysTick_Handler(void);
AnnaBridge 167:e84263d55307 258
AnnaBridge 167:e84263d55307 259 #if defined (__CC_ARM)
AnnaBridge 167:e84263d55307 260 __asm void ARM_PLAT_Main(void)
AnnaBridge 167:e84263d55307 261 {
AnnaBridge 167:e84263d55307 262 IMPORT SystemInit
AnnaBridge 167:e84263d55307 263 IMPORT __main
AnnaBridge 167:e84263d55307 264 BL SystemInit
AnnaBridge 167:e84263d55307 265 BL __main
AnnaBridge 167:e84263d55307 266 }
AnnaBridge 167:e84263d55307 267 #endif
AnnaBridge 167:e84263d55307 268
AnnaBridge 167:e84263d55307 269 extern void __iar_program_start( void );
AnnaBridge 167:e84263d55307 270 // The Main App entry point
AnnaBridge 167:e84263d55307 271 void PLAT_Main(void)
AnnaBridge 167:e84263d55307 272 {
AnnaBridge 167:e84263d55307 273 TRAP_Init((void *)SVC_Handler, (void *)PendSV_Handler, (void *)SysTick_Handler);
AnnaBridge 167:e84263d55307 274
AnnaBridge 167:e84263d55307 275 #if defined (__ICCARM__)
AnnaBridge 167:e84263d55307 276 //IAR_PLAT_Main();
AnnaBridge 167:e84263d55307 277 SystemInit();
AnnaBridge 167:e84263d55307 278 __iar_program_start();
AnnaBridge 167:e84263d55307 279 #elif defined (__CC_ARM)
AnnaBridge 167:e84263d55307 280 ARM_PLAT_Main();
AnnaBridge 167:e84263d55307 281
AnnaBridge 167:e84263d55307 282 #elif defined (__GNUC__)
AnnaBridge 167:e84263d55307 283 __asm (
AnnaBridge 167:e84263d55307 284 "ldr r0, =SystemInit \n"
AnnaBridge 167:e84263d55307 285 "blx r0 \n"
AnnaBridge 167:e84263d55307 286 "ldr r0, =_start \n"
AnnaBridge 167:e84263d55307 287 "bx r0 \n"
AnnaBridge 167:e84263d55307 288 );
AnnaBridge 167:e84263d55307 289 #endif
AnnaBridge 167:e84263d55307 290 // Never reached
AnnaBridge 167:e84263d55307 291 for(;;);
AnnaBridge 167:e84263d55307 292 }