mbed official
mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
Diff: targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_smbus.c
- Revision:
- 156:95d6b41a828b
- Parent:
- 149:156823d33999
- Child:
- 180:96ed750bd169
--- a/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_smbus.c Thu Jan 05 10:51:54 2017 +0000
+++ b/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_smbus.c Mon Jan 16 15:03:32 2017 +0000
@@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f0xx_hal_smbus.c
* @author MCD Application Team
- * @version V1.4.0
- * @date 27-May-2016
+ * @version V1.5.0
+ * @date 04-November-2016
* @brief SMBUS HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the System Management Bus (SMBus) peripheral,
@@ -143,16 +143,16 @@
/** @defgroup SMBUS_Private_Define SMBUS Private Constants
* @{
*/
-#define TIMING_CLEAR_MASK ((uint32_t)0xF0FFFFFFU) /*!< SMBUS TIMING clear register Mask */
-#define HAL_TIMEOUT_ADDR ((uint32_t)10000) /*!< 10 s */
-#define HAL_TIMEOUT_BUSY ((uint32_t)25) /*!< 25 ms */
-#define HAL_TIMEOUT_DIR ((uint32_t)25) /*!< 25 ms */
-#define HAL_TIMEOUT_RXNE ((uint32_t)25) /*!< 25 ms */
-#define HAL_TIMEOUT_STOPF ((uint32_t)25) /*!< 25 ms */
-#define HAL_TIMEOUT_TC ((uint32_t)25) /*!< 25 ms */
-#define HAL_TIMEOUT_TCR ((uint32_t)25) /*!< 25 ms */
-#define HAL_TIMEOUT_TXIS ((uint32_t)25) /*!< 25 ms */
-#define MAX_NBYTE_SIZE 255
+#define TIMING_CLEAR_MASK (0xF0FFFFFFU) /*!< SMBUS TIMING clear register Mask */
+#define HAL_TIMEOUT_ADDR (10000U) /*!< 10 s */
+#define HAL_TIMEOUT_BUSY (25U) /*!< 25 ms */
+#define HAL_TIMEOUT_DIR (25U) /*!< 25 ms */
+#define HAL_TIMEOUT_RXNE (25U) /*!< 25 ms */
+#define HAL_TIMEOUT_STOPF (25U) /*!< 25 ms */
+#define HAL_TIMEOUT_TC (25U) /*!< 25 ms */
+#define HAL_TIMEOUT_TCR (25U) /*!< 25 ms */
+#define HAL_TIMEOUT_TXIS (25U) /*!< 25 ms */
+#define MAX_NBYTE_SIZE 255U
/**
* @}
*/
@@ -273,7 +273,7 @@
/* Configure SMBUSx: Own Address1 and ack own address1 mode */
hsmbus->Instance->OAR1 &= ~I2C_OAR1_OA1EN;
- if(hsmbus->Init.OwnAddress1 != 0)
+ if(hsmbus->Init.OwnAddress1 != 0U)
{
if(hsmbus->Init.AddressingMode == SMBUS_ADDRESSINGMODE_7BIT)
{
@@ -297,7 +297,7 @@
/*---------------------------- SMBUSx OAR2 Configuration -----------------------*/
/* Configure SMBUSx: Dual mode and Own Address2 */
- hsmbus->Instance->OAR2 = (hsmbus->Init.DualAddressMode | hsmbus->Init.OwnAddress2 | (hsmbus->Init.OwnAddress2Masks << 8));
+ hsmbus->Instance->OAR2 = (hsmbus->Init.DualAddressMode | hsmbus->Init.OwnAddress2 | (hsmbus->Init.OwnAddress2Masks << 8U));
/*---------------------------- SMBUSx CR1 Configuration ------------------------*/
/* Configure SMBUSx: Generalcall and NoStretch mode */
@@ -641,7 +641,7 @@
/* Set NBYTES to 1 to generate a dummy read on SMBUS peripheral */
/* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfer */
- SMBUS_TransferConfig(hsmbus, DevAddress, 1, SMBUS_AUTOEND_MODE, SMBUS_NO_STARTSTOP);
+ SMBUS_TransferConfig(hsmbus, DevAddress, 1U, SMBUS_AUTOEND_MODE, SMBUS_NO_STARTSTOP);
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
@@ -682,7 +682,7 @@
if(hsmbus->State == HAL_SMBUS_STATE_LISTEN)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == NULL) || (Size == 0U))
{
return HAL_ERROR;
}
@@ -720,12 +720,12 @@
/* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
if( (hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount) )
{
- SMBUS_TransferConfig(hsmbus,0,hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP);
+ SMBUS_TransferConfig(hsmbus, 0U,hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP);
}
else
{
/* Set NBYTE to transmit */
- SMBUS_TransferConfig(hsmbus,0,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
+ SMBUS_TransferConfig(hsmbus, 0U,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
/* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
/* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
@@ -773,7 +773,7 @@
if(hsmbus->State == HAL_SMBUS_STATE_LISTEN)
{
- if((pData == NULL) || (Size == 0))
+ if((pData == NULL) || (Size == 0U))
{
return HAL_ERROR;
}
@@ -804,13 +804,13 @@
/* no need to set RELOAD bit mode, a ACK will be automatically generated in that case */
/* else need to set RELOAD bit mode to generate an automatic ACK at each byte Received */
/* This RELOAD bit will be reset for last BYTE to be receive in SMBUS_Slave_ISR */
- if((hsmbus->XferSize == 1) || ((hsmbus->XferSize == 2) && (SMBUS_GET_PEC_MODE(hsmbus) != RESET)))
+ if((hsmbus->XferSize == 1U) || ((hsmbus->XferSize == 2U) && (SMBUS_GET_PEC_MODE(hsmbus) != RESET)))
{
- SMBUS_TransferConfig(hsmbus,0,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
+ SMBUS_TransferConfig(hsmbus, 0U, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
}
else
{
- SMBUS_TransferConfig(hsmbus,0, 1, hsmbus->XferOptions | SMBUS_RELOAD_MODE, SMBUS_NO_STARTSTOP);
+ SMBUS_TransferConfig(hsmbus, 0U, 1U, hsmbus->XferOptions | SMBUS_RELOAD_MODE, SMBUS_NO_STARTSTOP);
}
/* Clear ADDR flag after prepare the transfer parameters */
@@ -922,9 +922,9 @@
*/
HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
{
- uint32_t tickstart = 0;
+ uint32_t tickstart = 0U;
- __IO uint32_t SMBUS_Trials = 0;
+ __IO uint32_t SMBUS_Trials = 0U;
if(hsmbus->State == HAL_SMBUS_STATE_READY)
{
@@ -951,7 +951,7 @@
{
if(Timeout != HAL_MAX_DELAY)
{
- if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
+ if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
{
/* Device is ready */
hsmbus->State = HAL_SMBUS_STATE_READY;
@@ -1043,7 +1043,7 @@
*/
void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus)
{
- uint32_t tmpisrvalue = 0;
+ uint32_t tmpisrvalue = 0U;
/* Use a local variable to store the current ISR flags */
/* This action will avoid a wrong treatment due to ISR flags change during interrupt handler */
@@ -1185,7 +1185,7 @@
UNUSED(hsmbus);
/* NOTE : This function should not be modified, when the callback is needed,
- the HAL_SMBUS_TxCpltCallback() could be implemented in the user file
+ the HAL_SMBUS_MasterTxCpltCallback() could be implemented in the user file
*/
}
@@ -1201,7 +1201,7 @@
UNUSED(hsmbus);
/* NOTE : This function should not be modified, when the callback is needed,
- the HAL_SMBUS_TxCpltCallback() could be implemented in the user file
+ the HAL_SMBUS_MasterRxCpltCallback() could be implemented in the user file
*/
}
@@ -1216,7 +1216,7 @@
UNUSED(hsmbus);
/* NOTE : This function should not be modified, when the callback is needed,
- the HAL_SMBUS_TxCpltCallback() could be implemented in the user file
+ the HAL_SMBUS_SlaveTxCpltCallback() could be implemented in the user file
*/
}
@@ -1232,7 +1232,7 @@
UNUSED(hsmbus);
/* NOTE : This function should not be modified, when the callback is needed,
- the HAL_SMBUS_TxCpltCallback() could be implemented in the user file
+ the HAL_SMBUS_SlaveRxCpltCallback() could be implemented in the user file
*/
}
@@ -1373,7 +1373,6 @@
}
else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) != RESET)
{
-
/* Call the corresponding callback to inform upper layer of End of Transfer */
if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
{
@@ -1403,6 +1402,19 @@
}
else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
{
+ /* Store Last receive data if any */
+ if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET)
+ {
+ /* Read data from RXDR */
+ (*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR;
+
+ if((hsmbus->XferSize > 0U))
+ {
+ hsmbus->XferSize--;
+ hsmbus->XferCount--;
+ }
+ }
+
/* Disable Interrupt */
SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
@@ -1437,7 +1449,7 @@
}
else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TCR) != RESET)
{
- if((hsmbus->XferSize == 0)&&(hsmbus->XferCount!=0))
+ if((hsmbus->XferSize == 0U)&&(hsmbus->XferCount != 0U))
{
DevAddress = (hsmbus->Instance->CR2 & I2C_CR2_SADD);
@@ -1459,7 +1471,7 @@
}
}
}
- else if((hsmbus->XferSize == 0)&&(hsmbus->XferCount==0))
+ else if((hsmbus->XferSize == 0U)&&(hsmbus->XferCount == 0U))
{
/* Call TxCpltCallback() if no stop mode is set */
if(SMBUS_GET_STOP_MODE(hsmbus) != SMBUS_AUTOEND_MODE)
@@ -1493,7 +1505,7 @@
}
else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TC) != RESET)
{
- if(hsmbus->XferCount == 0)
+ if(hsmbus->XferCount == 0U)
{
/* Specific use case for Quick command */
if(hsmbus->pBuffPtr == NULL)
@@ -1548,8 +1560,8 @@
*/
static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus)
{
- uint8_t TransferDirection = 0;
- uint16_t SlaveAddrCode = 0;
+ uint8_t TransferDirection = 0U;
+ uint16_t SlaveAddrCode = 0U;
/* Process Locked */
__HAL_LOCK(hsmbus);
@@ -1560,7 +1572,7 @@
/* if yes, normal usecase, a NACK is sent by the HOST when Transfer is finished */
/* Mean XferCount == 0*/
/* So clear Flag NACKF only */
- if(hsmbus->XferCount == 0)
+ if(hsmbus->XferCount == 0U)
{
/* Clear NACK Flag */
__HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
@@ -1617,15 +1629,15 @@
hsmbus->XferSize--;
hsmbus->XferCount--;
- if(hsmbus->XferCount == 1)
+ if(hsmbus->XferCount == 1U)
{
/* Receive last Byte, can be PEC byte in case of PEC BYTE enabled */
/* or only the last Byte of Transfer */
/* So reset the RELOAD bit mode */
hsmbus->XferOptions &= ~SMBUS_RELOAD_MODE;
- SMBUS_TransferConfig(hsmbus,0 ,1 , hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
+ SMBUS_TransferConfig(hsmbus, 0U ,1U , hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
}
- else if(hsmbus->XferCount == 0)
+ else if(hsmbus->XferCount == 0U)
{
/* Last Byte is received, disable Interrupt */
SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
@@ -1643,7 +1655,7 @@
else
{
/* Set Reload for next Bytes */
- SMBUS_TransferConfig(hsmbus,0, 1, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP);
+ SMBUS_TransferConfig(hsmbus, 0U, 1U, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP);
/* Ack last Byte Read */
hsmbus->Instance->CR2 &= ~I2C_CR2_NACK;
@@ -1651,17 +1663,17 @@
}
else if( (hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
{
- if((hsmbus->XferSize == 0)&&(hsmbus->XferCount!=0))
+ if((hsmbus->XferSize == 0U)&&(hsmbus->XferCount != 0U))
{
if(hsmbus->XferCount > MAX_NBYTE_SIZE)
{
- SMBUS_TransferConfig(hsmbus, 0, MAX_NBYTE_SIZE, (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), SMBUS_NO_STARTSTOP);
+ SMBUS_TransferConfig(hsmbus, 0U, MAX_NBYTE_SIZE, (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), SMBUS_NO_STARTSTOP);
hsmbus->XferSize = MAX_NBYTE_SIZE;
}
else
{
hsmbus->XferSize = hsmbus->XferCount;
- SMBUS_TransferConfig(hsmbus, 0, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
+ SMBUS_TransferConfig(hsmbus, 0U, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
/* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
/* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
if(SMBUS_GET_PEC_MODE(hsmbus) != RESET)
@@ -1677,9 +1689,9 @@
{
/* Write data to TXDR only if XferCount not reach "0" */
/* A TXIS flag can be set, during STOP treatment */
- /* Check if all Datas have already been sent */
+ /* Check if all Data have already been sent */
/* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */
- if(hsmbus->XferCount > 0)
+ if(hsmbus->XferCount > 0U)
{
/* Write data to TXDR */
hsmbus->Instance->TXDR = (*hsmbus->pBuffPtr++);
@@ -1687,7 +1699,7 @@
hsmbus->XferSize--;
}
- if(hsmbus->XferCount == 0)
+ if(hsmbus->XferCount == 0U)
{
/* Last Byte is Transmitted */
/* Remove HAL_SMBUS_STATE_SLAVE_BUSY_TX, keep only HAL_SMBUS_STATE_LISTEN */
@@ -1708,6 +1720,19 @@
{
if((hsmbus->State & HAL_SMBUS_STATE_LISTEN) == HAL_SMBUS_STATE_LISTEN)
{
+ /* Store Last receive data if any */
+ if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET)
+ {
+ /* Read data from RXDR */
+ (*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR;
+
+ if((hsmbus->XferSize > 0U))
+ {
+ hsmbus->XferSize--;
+ hsmbus->XferCount--;
+ }
+ }
+
/* Disable RX and TX Interrupts */
SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_TX);
@@ -1726,7 +1751,7 @@
/* Clear ADDR flag */
__HAL_SMBUS_CLEAR_FLAG(hsmbus,SMBUS_FLAG_ADDR);
- hsmbus->XferOptions = 0;
+ hsmbus->XferOptions = 0U;
hsmbus->PreviousState = hsmbus->State;
hsmbus->State = HAL_SMBUS_STATE_READY;
@@ -1752,7 +1777,7 @@
*/
static HAL_StatusTypeDef SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest)
{
- uint32_t tmpisr = 0;
+ uint32_t tmpisr = 0U;
if((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT)
{
@@ -1794,7 +1819,7 @@
*/
static HAL_StatusTypeDef SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest)
{
- uint32_t tmpisr = 0;
+ uint32_t tmpisr = 0U;
if( ((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT) && (hsmbus->State == HAL_SMBUS_STATE_READY) )
{
@@ -1880,7 +1905,7 @@
/* Check for the Timeout */
if(Timeout != HAL_MAX_DELAY)
{
- if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
+ if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
{
hsmbus->PreviousState = hsmbus->State;
hsmbus->State= HAL_SMBUS_STATE_READY;
@@ -1900,7 +1925,7 @@
/* Check for the Timeout */
if(Timeout != HAL_MAX_DELAY)
{
- if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
+ if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
{
hsmbus->PreviousState = hsmbus->State;
hsmbus->State= HAL_SMBUS_STATE_READY;
@@ -1938,7 +1963,7 @@
*/
static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)
{
- uint32_t tmpreg = 0;
+ uint32_t tmpreg = 0U;
/* Check the parameters */
assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
@@ -1952,7 +1977,7 @@
tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN | I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_PECBYTE));
/* update tmpreg */
- tmpreg |= (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << 16 ) & I2C_CR2_NBYTES) | \
+ tmpreg |= (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << 16U ) & I2C_CR2_NBYTES) | \
(uint32_t)Mode | (uint32_t)Request);
/* update CR2 register */
