mbed official
mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
Diff: targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_smbus.c
- Revision:
- 180:96ed750bd169
- Parent:
- 156:95d6b41a828b
--- a/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_smbus.c Thu Dec 07 14:01:42 2017 +0000
+++ b/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_smbus.c Wed Jan 17 15:23:54 2018 +0000
@@ -2,25 +2,23 @@
******************************************************************************
* @file stm32f0xx_hal_smbus.c
* @author MCD Application Team
- * @version V1.5.0
- * @date 04-November-2016
* @brief SMBUS HAL module driver.
- * This file provides firmware functions to manage the following
+ * This file provides firmware functions to manage the following
* functionalities of the System Management Bus (SMBus) peripheral,
* based on I2C principles of operation :
* + Initialization and de-initialization functions
* + IO operation functions
* + Peripheral State and Errors functions
- *
+ *
@verbatim
==============================================================================
##### How to use this driver #####
==============================================================================
[..]
The SMBUS HAL driver can be used as follows:
-
+
(#) Declare a SMBUS_HandleTypeDef handle structure, for example:
- SMBUS_HandleTypeDef hsmbus;
+ SMBUS_HandleTypeDef hsmbus;
(#)Initialize the SMBUS low level resources by implementing the HAL_SMBUS_MspInit() API:
(##) Enable the SMBUSx interface clock
@@ -28,7 +26,7 @@
(+++) Enable the clock for the SMBUS GPIOs
(+++) Configure SMBUS pins as alternate function open-drain
(##) NVIC configuration if you need to use interrupt process
- (+++) Configure the SMBUSx interrupt priority
+ (+++) Configure the SMBUSx interrupt priority
(+++) Enable the NVIC SMBUS IRQ Channel
(#) Configure the Communication Clock Timing, Bus Timeout, Own Address1, Master Addressing mode,
@@ -92,7 +90,7 @@
[..]
(@) You can refer to the SMBUS HAL driver header file for more useful macros
-
+
@endverbatim
******************************************************************************
* @attention
@@ -121,8 +119,8 @@
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- ******************************************************************************
- */
+ ******************************************************************************
+ */
/* Includes ------------------------------------------------------------------*/
#include "stm32f0xx_hal.h"
@@ -156,7 +154,7 @@
/**
* @}
*/
-
+
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
@@ -170,6 +168,10 @@
static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus);
static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus);
+static void SMBUS_ConvertOtherXferOptions(SMBUS_HandleTypeDef *hsmbus);
+
+static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus);
+
static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request);
/**
* @}
@@ -182,19 +184,19 @@
*/
/** @defgroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions
- * @brief Initialization and Configuration functions
+ * @brief Initialization and Configuration functions
*
-@verbatim
+@verbatim
===============================================================================
##### Initialization and de-initialization functions #####
===============================================================================
- [..] This subsection provides a set of functions allowing to initialize and
+ [..] This subsection provides a set of functions allowing to initialize and
deinitialize the SMBUSx peripheral:
- (+) User must Implement HAL_SMBUS_MspInit() function in which he configures
+ (+) User must Implement HAL_SMBUS_MspInit() function in which he configures
all related peripherals resources (CLOCK, GPIO, IT and NVIC ).
- (+) Call the function HAL_SMBUS_Init() to configure the selected device with
+ (+) Call the function HAL_SMBUS_Init() to configure the selected device with
the selected configuration:
(++) Clock Timing
(++) Bus Timeout
@@ -210,28 +212,31 @@
(++) Peripheral mode
- (+) Call the function HAL_SMBUS_DeInit() to restore the default configuration
- of the selected SMBUSx peripheral.
+ (+) Call the function HAL_SMBUS_DeInit() to restore the default configuration
+ of the selected SMBUSx peripheral.
+
+ (+) Enable/Disable Analog/Digital filters with HAL_SMBUS_ConfigAnalogFilter() and
+ HAL_SMBUS_ConfigDigitalFilter().
@endverbatim
* @{
*/
/**
- * @brief Initialize the SMBUS according to the specified parameters
+ * @brief Initialize the SMBUS according to the specified parameters
* in the SMBUS_InitTypeDef and initialize the associated handle.
* @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
* the configuration information for the specified SMBUS.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus)
-{
+{
/* Check the SMBUS handle allocation */
- if(hsmbus == NULL)
+ if (hsmbus == NULL)
{
return HAL_ERROR;
}
-
+
/* Check the parameters */
assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
assert_param(IS_SMBUS_ANALOG_FILTER(hsmbus->Init.AnalogFilter));
@@ -245,7 +250,7 @@
assert_param(IS_SMBUS_PEC(hsmbus->Init.PacketErrorCheckMode));
assert_param(IS_SMBUS_PERIPHERAL_MODE(hsmbus->Init.PeripheralMode));
- if(hsmbus->State == HAL_SMBUS_STATE_RESET)
+ if (hsmbus->State == HAL_SMBUS_STATE_RESET)
{
/* Allocate lock resource and initialize it */
hsmbus->Lock = HAL_UNLOCKED;
@@ -253,17 +258,17 @@
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_SMBUS_MspInit(hsmbus);
}
-
+
hsmbus->State = HAL_SMBUS_STATE_BUSY;
-
+
/* Disable the selected SMBUS peripheral */
__HAL_SMBUS_DISABLE(hsmbus);
-
- /*---------------------------- SMBUSx TIMINGR Configuration ------------------------*/
+
+ /*---------------------------- SMBUSx TIMINGR Configuration ------------------------*/
/* Configure SMBUSx: Frequency range */
hsmbus->Instance->TIMINGR = hsmbus->Init.Timing & TIMING_CLEAR_MASK;
-
- /*---------------------------- SMBUSx TIMEOUTR Configuration ------------------------*/
+
+ /*---------------------------- SMBUSx TIMEOUTR Configuration ------------------------*/
/* Configure SMBUSx: Bus Timeout */
hsmbus->Instance->TIMEOUTR &= ~I2C_TIMEOUTR_TIMOUTEN;
hsmbus->Instance->TIMEOUTR &= ~I2C_TIMEOUTR_TEXTEN;
@@ -272,10 +277,10 @@
/*---------------------------- SMBUSx OAR1 Configuration -----------------------*/
/* Configure SMBUSx: Own Address1 and ack own address1 mode */
hsmbus->Instance->OAR1 &= ~I2C_OAR1_OA1EN;
-
- if(hsmbus->Init.OwnAddress1 != 0U)
+
+ if (hsmbus->Init.OwnAddress1 != 0U)
{
- if(hsmbus->Init.AddressingMode == SMBUS_ADDRESSINGMODE_7BIT)
+ if (hsmbus->Init.AddressingMode == SMBUS_ADDRESSINGMODE_7BIT)
{
hsmbus->Instance->OAR1 = (I2C_OAR1_OA1EN | hsmbus->Init.OwnAddress1);
}
@@ -287,41 +292,41 @@
/*---------------------------- SMBUSx CR2 Configuration ------------------------*/
/* Configure SMBUSx: Addressing Master mode */
- if(hsmbus->Init.AddressingMode == SMBUS_ADDRESSINGMODE_10BIT)
+ if (hsmbus->Init.AddressingMode == SMBUS_ADDRESSINGMODE_10BIT)
{
hsmbus->Instance->CR2 = (I2C_CR2_ADD10);
}
/* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process) */
/* AUTOEND and NACK bit will be manage during Transfer process */
hsmbus->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK);
-
- /*---------------------------- SMBUSx OAR2 Configuration -----------------------*/
+
+ /*---------------------------- SMBUSx OAR2 Configuration -----------------------*/
/* Configure SMBUSx: Dual mode and Own Address2 */
hsmbus->Instance->OAR2 = (hsmbus->Init.DualAddressMode | hsmbus->Init.OwnAddress2 | (hsmbus->Init.OwnAddress2Masks << 8U));
/*---------------------------- SMBUSx CR1 Configuration ------------------------*/
/* Configure SMBUSx: Generalcall and NoStretch mode */
hsmbus->Instance->CR1 = (hsmbus->Init.GeneralCallMode | hsmbus->Init.NoStretchMode | hsmbus->Init.PacketErrorCheckMode | hsmbus->Init.PeripheralMode | hsmbus->Init.AnalogFilter);
-
+
/* Enable Slave Byte Control only in case of Packet Error Check is enabled and SMBUS Peripheral is set in Slave mode */
- if( (hsmbus->Init.PacketErrorCheckMode == SMBUS_PEC_ENABLE)
- && ( (hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || (hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP) ) )
+ if ((hsmbus->Init.PacketErrorCheckMode == SMBUS_PEC_ENABLE)
+ && ((hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || (hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP)))
{
hsmbus->Instance->CR1 |= I2C_CR1_SBC;
}
/* Enable the selected SMBUS peripheral */
__HAL_SMBUS_ENABLE(hsmbus);
-
+
hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
hsmbus->State = HAL_SMBUS_STATE_READY;
-
+
return HAL_OK;
}
/**
- * @brief DeInitialize the SMBUS peripheral.
+ * @brief DeInitialize the SMBUS peripheral.
* @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
* the configuration information for the specified SMBUS.
* @retval HAL status
@@ -329,29 +334,29 @@
HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus)
{
/* Check the SMBUS handle allocation */
- if(hsmbus == NULL)
+ if (hsmbus == NULL)
{
return HAL_ERROR;
}
-
+
/* Check the parameters */
assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
-
+
hsmbus->State = HAL_SMBUS_STATE_BUSY;
-
+
/* Disable the SMBUS Peripheral Clock */
__HAL_SMBUS_DISABLE(hsmbus);
-
+
/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
HAL_SMBUS_MspDeInit(hsmbus);
-
+
hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
hsmbus->PreviousState = HAL_SMBUS_STATE_RESET;
hsmbus->State = HAL_SMBUS_STATE_RESET;
-
- /* Release Lock */
+
+ /* Release Lock */
__HAL_UNLOCK(hsmbus);
-
+
return HAL_OK;
}
@@ -361,14 +366,14 @@
* the configuration information for the specified SMBUS.
* @retval None
*/
- __weak void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus)
+__weak void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hsmbus);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_SMBUS_MspInit could be implemented in the user file
- */
+ */
}
/**
@@ -377,14 +382,112 @@
* the configuration information for the specified SMBUS.
* @retval None
*/
- __weak void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus)
+__weak void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hsmbus);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_SMBUS_MspDeInit could be implemented in the user file
- */
+ */
+}
+
+/**
+ * @brief Configure Analog noise filter.
+ * @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
+ * the configuration information for the specified SMBUS.
+ * @param AnalogFilter This parameter can be one of the following values:
+ * @arg @ref SMBUS_ANALOGFILTER_ENABLE
+ * @arg @ref SMBUS_ANALOGFILTER_DISABLE
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_SMBUS_ConfigAnalogFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t AnalogFilter)
+{
+ /* Check the parameters */
+ assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
+ assert_param(IS_SMBUS_ANALOG_FILTER(AnalogFilter));
+
+ if (hsmbus->State == HAL_SMBUS_STATE_READY)
+ {
+ /* Process Locked */
+ __HAL_LOCK(hsmbus);
+
+ hsmbus->State = HAL_SMBUS_STATE_BUSY;
+
+ /* Disable the selected SMBUS peripheral */
+ __HAL_SMBUS_DISABLE(hsmbus);
+
+ /* Reset ANOFF bit */
+ hsmbus->Instance->CR1 &= ~(I2C_CR1_ANFOFF);
+
+ /* Set analog filter bit*/
+ hsmbus->Instance->CR1 |= AnalogFilter;
+
+ __HAL_SMBUS_ENABLE(hsmbus);
+
+ hsmbus->State = HAL_SMBUS_STATE_READY;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hsmbus);
+
+ return HAL_OK;
+ }
+ else
+ {
+ return HAL_BUSY;
+ }
+}
+
+/**
+ * @brief Configure Digital noise filter.
+ * @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
+ * the configuration information for the specified SMBUS.
+ * @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_SMBUS_ConfigDigitalFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t DigitalFilter)
+{
+ uint32_t tmpreg = 0U;
+
+ /* Check the parameters */
+ assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
+ assert_param(IS_SMBUS_DIGITAL_FILTER(DigitalFilter));
+
+ if (hsmbus->State == HAL_SMBUS_STATE_READY)
+ {
+ /* Process Locked */
+ __HAL_LOCK(hsmbus);
+
+ hsmbus->State = HAL_SMBUS_STATE_BUSY;
+
+ /* Disable the selected SMBUS peripheral */
+ __HAL_SMBUS_DISABLE(hsmbus);
+
+ /* Get the old register value */
+ tmpreg = hsmbus->Instance->CR1;
+
+ /* Reset I2C DNF bits [11:8] */
+ tmpreg &= ~(I2C_CR1_DNF);
+
+ /* Set I2Cx DNF coefficient */
+ tmpreg |= DigitalFilter << I2C_CR1_DNF_Pos;
+
+ /* Store the new register value */
+ hsmbus->Instance->CR1 = tmpreg;
+
+ __HAL_SMBUS_ENABLE(hsmbus);
+
+ hsmbus->State = HAL_SMBUS_STATE_READY;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hsmbus);
+
+ return HAL_OK;
+ }
+ else
+ {
+ return HAL_BUSY;
+ }
}
/**
@@ -392,14 +495,14 @@
*/
/** @defgroup SMBUS_Exported_Functions_Group2 Input and Output operation functions
- * @brief Data transfers functions
+ * @brief Data transfers functions
*
-@verbatim
+@verbatim
===============================================================================
##### IO operation functions #####
- ===============================================================================
+ ===============================================================================
[..]
- This subsection provides a set of functions allowing to manage the SMBUS data
+ This subsection provides a set of functions allowing to manage the SMBUS data
transfers.
(#) Blocking mode function to check if device is ready for usage is :
@@ -408,7 +511,7 @@
(#) There is only one mode of transfer:
(++) Non-Blocking mode : The communication is performed using Interrupts.
These functions return the status of the transfer startup.
- The end of the data processing will be indicated through the
+ The end of the data processing will be indicated through the
dedicated SMBUS IRQ when using Interrupt mode.
(#) Non-Blocking mode functions with Interrupt are :
@@ -446,15 +549,15 @@
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
-{
+{
/* Check the parameters */
assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
- if(hsmbus->State == HAL_SMBUS_STATE_READY)
+ if (hsmbus->State == HAL_SMBUS_STATE_READY)
{
/* Process Locked */
__HAL_LOCK(hsmbus);
-
+
hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_TX;
hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
/* Prepare transfer parameters */
@@ -464,12 +567,12 @@
/* In case of Quick command, remove autoend mode */
/* Manage the stop generation by software */
- if(hsmbus->pBuffPtr == NULL)
+ if (hsmbus->pBuffPtr == NULL)
{
hsmbus->XferOptions &= ~SMBUS_AUTOEND_MODE;
}
- if(Size > MAX_NBYTE_SIZE)
+ if (Size > MAX_NBYTE_SIZE)
{
hsmbus->XferSize = MAX_NBYTE_SIZE;
}
@@ -477,50 +580,54 @@
{
hsmbus->XferSize = Size;
}
-
+
/* Send Slave Address */
/* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
- if( (hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount) )
+ if ((hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount))
{
- SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_WRITE);
+ SMBUS_TransferConfig(hsmbus, DevAddress, hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_WRITE);
}
else
{
/* If transfer direction not change, do not generate Restart Condition */
/* Mean Previous state is same as current state */
- if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX)
+ if ((hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX) && (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(hsmbus->XferOptions) == 0))
{
- SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
+ SMBUS_TransferConfig(hsmbus, DevAddress, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
}
/* Else transfer direction change, so generate Restart with new transfer direction */
else
{
- SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_WRITE);
+ /* Convert OTHER_xxx XferOptions if any */
+ SMBUS_ConvertOtherXferOptions(hsmbus);
+
+ /* Handle Transfer */
+ SMBUS_TransferConfig(hsmbus, DevAddress, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_WRITE);
}
/* If PEC mode is enable, size to transmit manage by SW part should be Size-1 byte, corresponding to PEC byte */
/* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
- if(SMBUS_GET_PEC_MODE(hsmbus) != RESET)
+ if (SMBUS_GET_PEC_MODE(hsmbus) != RESET)
{
hsmbus->XferSize--;
hsmbus->XferCount--;
}
}
-
+
/* Process Unlocked */
- __HAL_UNLOCK(hsmbus);
+ __HAL_UNLOCK(hsmbus);
- /* Note : The SMBUS interrupts must be enabled after unlocking current process
+ /* Note : The SMBUS interrupts must be enabled after unlocking current process
to avoid the risk of SMBUS interrupt handle execution before current
process unlock */
SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX);
-
+
return HAL_OK;
}
else
{
return HAL_BUSY;
- }
+ }
}
/**
@@ -539,27 +646,27 @@
/* Check the parameters */
assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
- if(hsmbus->State == HAL_SMBUS_STATE_READY)
+ if (hsmbus->State == HAL_SMBUS_STATE_READY)
{
/* Process Locked */
__HAL_LOCK(hsmbus);
-
+
hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_RX;
hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
-
+
/* Prepare transfer parameters */
hsmbus->pBuffPtr = pData;
hsmbus->XferCount = Size;
hsmbus->XferOptions = XferOptions;
-
+
/* In case of Quick command, remove autoend mode */
/* Manage the stop generation by software */
- if(hsmbus->pBuffPtr == NULL)
+ if (hsmbus->pBuffPtr == NULL)
{
hsmbus->XferOptions &= ~SMBUS_AUTOEND_MODE;
}
-
- if(Size > MAX_NBYTE_SIZE)
+
+ if (Size > MAX_NBYTE_SIZE)
{
hsmbus->XferSize = MAX_NBYTE_SIZE;
}
@@ -567,42 +674,46 @@
{
hsmbus->XferSize = Size;
}
-
+
/* Send Slave Address */
/* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
- if( (hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount) )
+ if ((hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount))
{
- SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_READ);
+ SMBUS_TransferConfig(hsmbus, DevAddress, hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_READ);
}
else
{
/* If transfer direction not change, do not generate Restart Condition */
/* Mean Previous state is same as current state */
- if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX)
+ if ((hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX) && (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(hsmbus->XferOptions) == 0))
{
- SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
+ SMBUS_TransferConfig(hsmbus, DevAddress, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
}
/* Else transfer direction change, so generate Restart with new transfer direction */
else
{
- SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_READ);
+ /* Convert OTHER_xxx XferOptions if any */
+ SMBUS_ConvertOtherXferOptions(hsmbus);
+
+ /* Handle Transfer */
+ SMBUS_TransferConfig(hsmbus, DevAddress, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_READ);
}
}
-
+
/* Process Unlocked */
- __HAL_UNLOCK(hsmbus);
+ __HAL_UNLOCK(hsmbus);
- /* Note : The SMBUS interrupts must be enabled after unlocking current process
+ /* Note : The SMBUS interrupts must be enabled after unlocking current process
to avoid the risk of SMBUS interrupt handle execution before current
process unlock */
SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX);
-
+
return HAL_OK;
}
else
{
- return HAL_BUSY;
- }
+ return HAL_BUSY;
+ }
}
/**
@@ -616,18 +727,18 @@
*/
HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress)
{
- if(hsmbus->State == HAL_SMBUS_STATE_READY)
+ if (hsmbus->State == HAL_SMBUS_STATE_READY)
{
/* Process Locked */
__HAL_LOCK(hsmbus);
-
+
/* Keep the same state as previous */
/* to perform as well the call of the corresponding end of transfer callback */
- if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX)
+ if (hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX)
{
hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_TX;
}
- else if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX)
+ else if (hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX)
{
hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_RX;
}
@@ -638,32 +749,32 @@
return HAL_ERROR;
}
hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
-
+
/* Set NBYTES to 1 to generate a dummy read on SMBUS peripheral */
/* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfer */
SMBUS_TransferConfig(hsmbus, DevAddress, 1U, SMBUS_AUTOEND_MODE, SMBUS_NO_STARTSTOP);
-
+
/* Process Unlocked */
- __HAL_UNLOCK(hsmbus);
+ __HAL_UNLOCK(hsmbus);
- /* Note : The SMBUS interrupts must be enabled after unlocking current process
+ /* Note : The SMBUS interrupts must be enabled after unlocking current process
to avoid the risk of SMBUS interrupt handle execution before current
process unlock */
- if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
+ if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
{
SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX);
}
- else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
+ else if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
{
SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX);
}
-
+
return HAL_OK;
}
else
{
- return HAL_BUSY;
- }
+ return HAL_BUSY;
+ }
}
/**
@@ -680,11 +791,11 @@
/* Check the parameters */
assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
- if(hsmbus->State == HAL_SMBUS_STATE_LISTEN)
+ if (hsmbus->State == HAL_SMBUS_STATE_LISTEN)
{
- if((pData == NULL) || (Size == 0U))
+ if ((pData == NULL) || (Size == 0U))
{
- return HAL_ERROR;
+ return HAL_ERROR;
}
/* Disable Interrupts, to prevent preemption during treatment in case of multicall */
@@ -692,10 +803,10 @@
/* Process Locked */
__HAL_LOCK(hsmbus);
-
+
hsmbus->State |= HAL_SMBUS_STATE_SLAVE_BUSY_TX;
hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
-
+
/* Set SBC bit to manage Acknowledge at each bit */
hsmbus->Instance->CR1 |= I2C_CR1_SBC;
@@ -704,11 +815,13 @@
/* Prepare transfer parameters */
hsmbus->pBuffPtr = pData;
- hsmbus->XferSize = Size;
hsmbus->XferCount = Size;
hsmbus->XferOptions = XferOptions;
- if(Size > MAX_NBYTE_SIZE)
+ /* Convert OTHER_xxx XferOptions if any */
+ SMBUS_ConvertOtherXferOptions(hsmbus);
+
+ if (Size > MAX_NBYTE_SIZE)
{
hsmbus->XferSize = MAX_NBYTE_SIZE;
}
@@ -718,32 +831,32 @@
}
/* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
- if( (hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount) )
+ if ((hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount))
{
- SMBUS_TransferConfig(hsmbus, 0U,hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP);
+ SMBUS_TransferConfig(hsmbus, 0U, hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP);
}
else
{
/* Set NBYTE to transmit */
- SMBUS_TransferConfig(hsmbus, 0U,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
+ SMBUS_TransferConfig(hsmbus, 0U, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
/* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
/* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
- if(SMBUS_GET_PEC_MODE(hsmbus) != RESET)
+ if (SMBUS_GET_PEC_MODE(hsmbus) != RESET)
{
hsmbus->XferSize--;
hsmbus->XferCount--;
}
}
-
+
/* Clear ADDR flag after prepare the transfer parameters */
/* This action will generate an acknowledge to the HOST */
- __HAL_SMBUS_CLEAR_FLAG(hsmbus,SMBUS_FLAG_ADDR);
+ __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ADDR);
/* Process Unlocked */
- __HAL_UNLOCK(hsmbus);
+ __HAL_UNLOCK(hsmbus);
- /* Note : The SMBUS interrupts must be enabled after unlocking current process
+ /* Note : The SMBUS interrupts must be enabled after unlocking current process
to avoid the risk of SMBUS interrupt handle execution before current
process unlock */
/* REnable ADDR interrupt */
@@ -753,8 +866,8 @@
}
else
{
- return HAL_ERROR;
- }
+ return HAL_ERROR;
+ }
}
/**
@@ -771,22 +884,22 @@
/* Check the parameters */
assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
- if(hsmbus->State == HAL_SMBUS_STATE_LISTEN)
+ if (hsmbus->State == HAL_SMBUS_STATE_LISTEN)
{
- if((pData == NULL) || (Size == 0U))
+ if ((pData == NULL) || (Size == 0U))
{
- return HAL_ERROR;
+ return HAL_ERROR;
}
-
+
/* Disable Interrupts, to prevent preemption during treatment in case of multicall */
SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR | SMBUS_IT_RX);
/* Process Locked */
__HAL_LOCK(hsmbus);
-
+
hsmbus->State |= HAL_SMBUS_STATE_SLAVE_BUSY_RX;
hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
-
+
/* Set SBC bit to manage Acknowledge at each bit */
hsmbus->Instance->CR1 |= I2C_CR1_SBC;
@@ -798,13 +911,16 @@
hsmbus->XferSize = Size;
hsmbus->XferCount = Size;
hsmbus->XferOptions = XferOptions;
-
+
+ /* Convert OTHER_xxx XferOptions if any */
+ SMBUS_ConvertOtherXferOptions(hsmbus);
+
/* Set NBYTE to receive */
/* If XferSize equal "1", or XferSize equal "2" with PEC requested (mean 1 data byte + 1 PEC byte */
/* no need to set RELOAD bit mode, a ACK will be automatically generated in that case */
/* else need to set RELOAD bit mode to generate an automatic ACK at each byte Received */
/* This RELOAD bit will be reset for last BYTE to be receive in SMBUS_Slave_ISR */
- if((hsmbus->XferSize == 1U) || ((hsmbus->XferSize == 2U) && (SMBUS_GET_PEC_MODE(hsmbus) != RESET)))
+ if ((hsmbus->XferSize == 1U) || ((hsmbus->XferSize == 2U) && (SMBUS_GET_PEC_MODE(hsmbus) != RESET)))
{
SMBUS_TransferConfig(hsmbus, 0U, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
}
@@ -815,12 +931,12 @@
/* Clear ADDR flag after prepare the transfer parameters */
/* This action will generate an acknowledge to the HOST */
- __HAL_SMBUS_CLEAR_FLAG(hsmbus,SMBUS_FLAG_ADDR);
+ __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ADDR);
/* Process Unlocked */
- __HAL_UNLOCK(hsmbus);
+ __HAL_UNLOCK(hsmbus);
- /* Note : The SMBUS interrupts must be enabled after unlocking current process
+ /* Note : The SMBUS interrupts must be enabled after unlocking current process
to avoid the risk of SMBUS interrupt handle execution before current
process unlock */
/* REnable ADDR interrupt */
@@ -830,7 +946,7 @@
}
else
{
- return HAL_ERROR;
+ return HAL_ERROR;
}
}
@@ -843,10 +959,10 @@
HAL_StatusTypeDef HAL_SMBUS_EnableListen_IT(SMBUS_HandleTypeDef *hsmbus)
{
hsmbus->State = HAL_SMBUS_STATE_LISTEN;
-
+
/* Enable the Address Match interrupt */
SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_ADDR);
-
+
return HAL_OK;
}
@@ -859,13 +975,13 @@
HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus)
{
/* Disable Address listen mode only if a transfer is not ongoing */
- if(hsmbus->State == HAL_SMBUS_STATE_LISTEN)
+ if (hsmbus->State == HAL_SMBUS_STATE_LISTEN)
{
hsmbus->State = HAL_SMBUS_STATE_READY;
-
+
/* Disable the Address Match interrupt */
SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR);
-
+
return HAL_OK;
}
else
@@ -883,7 +999,7 @@
HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus)
{
/* Enable SMBus alert */
- hsmbus->Instance->CR1 |= I2C_CR1_ALERTEN;
+ hsmbus->Instance->CR1 |= I2C_CR1_ALERTEN;
/* Clear ALERT flag */
__HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ALERT);
@@ -891,7 +1007,7 @@
/* Enable Alert Interrupt */
SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_ALERT);
- return HAL_OK;
+ return HAL_OK;
}
/**
* @brief Disable the SMBUS alert mode with Interrupt.
@@ -902,16 +1018,16 @@
HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus)
{
/* Enable SMBus alert */
- hsmbus->Instance->CR1 &= ~I2C_CR1_ALERTEN;
-
+ hsmbus->Instance->CR1 &= ~I2C_CR1_ALERTEN;
+
/* Disable Alert Interrupt */
SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ALERT);
- return HAL_OK;
+ return HAL_OK;
}
/**
- * @brief Check if target device is ready for communication.
+ * @brief Check if target device is ready for communication.
* @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
* the configuration information for the specified SMBUS.
* @param DevAddress Target device address: The device 7 bits address value
@@ -921,72 +1037,72 @@
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
-{
+{
uint32_t tickstart = 0U;
-
+
__IO uint32_t SMBUS_Trials = 0U;
-
- if(hsmbus->State == HAL_SMBUS_STATE_READY)
+
+ if (hsmbus->State == HAL_SMBUS_STATE_READY)
{
- if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_BUSY) != RESET)
+ if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_BUSY) != RESET)
{
return HAL_BUSY;
}
/* Process Locked */
__HAL_LOCK(hsmbus);
-
+
hsmbus->State = HAL_SMBUS_STATE_BUSY;
hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
-
+
do
{
/* Generate Start */
- hsmbus->Instance->CR2 = SMBUS_GENERATE_START(hsmbus->Init.AddressingMode,DevAddress);
-
+ hsmbus->Instance->CR2 = SMBUS_GENERATE_START(hsmbus->Init.AddressingMode, DevAddress);
+
/* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
/* Wait until STOPF flag is set or a NACK flag is set*/
tickstart = HAL_GetTick();
- while((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) == RESET) && (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) == RESET) && (hsmbus->State != HAL_SMBUS_STATE_TIMEOUT))
+ while ((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) == RESET) && (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) == RESET) && (hsmbus->State != HAL_SMBUS_STATE_TIMEOUT))
{
- if(Timeout != HAL_MAX_DELAY)
- {
- if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
+ if (Timeout != HAL_MAX_DELAY)
+ {
+ if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
{
/* Device is ready */
hsmbus->State = HAL_SMBUS_STATE_READY;
-
+
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
return HAL_TIMEOUT;
}
- }
+ }
}
-
+
/* Check if the NACKF flag has not been set */
if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) == RESET)
{
- /* Wait until STOPF flag is reset */
- if(SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
+ /* Wait until STOPF flag is reset */
+ if (SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
{
return HAL_TIMEOUT;
}
-
+
/* Clear STOP Flag */
__HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
/* Device is ready */
hsmbus->State = HAL_SMBUS_STATE_READY;
-
+
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
-
+
return HAL_OK;
}
else
{
- /* Wait until STOPF flag is reset */
- if(SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
+ /* Wait until STOPF flag is reset */
+ if (SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
{
return HAL_TIMEOUT;
}
@@ -997,31 +1113,32 @@
/* Clear STOP Flag, auto generated with autoend*/
__HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
}
-
+
/* Check if the maximum allowed number of trials has been reached */
if (SMBUS_Trials++ == Trials)
{
/* Generate Stop */
hsmbus->Instance->CR2 |= I2C_CR2_STOP;
-
- /* Wait until STOPF flag is reset */
- if(SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
+
+ /* Wait until STOPF flag is reset */
+ if (SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
{
return HAL_TIMEOUT;
}
-
+
/* Clear STOP Flag */
__HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
- }
- }while(SMBUS_Trials < Trials);
+ }
+ }
+ while (SMBUS_Trials < Trials);
hsmbus->State = HAL_SMBUS_STATE_READY;
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
-
+
return HAL_TIMEOUT;
- }
+ }
else
{
return HAL_BUSY;
@@ -1044,28 +1161,28 @@
void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus)
{
uint32_t tmpisrvalue = 0U;
-
+
/* Use a local variable to store the current ISR flags */
/* This action will avoid a wrong treatment due to ISR flags change during interrupt handler */
tmpisrvalue = SMBUS_GET_ISR_REG(hsmbus);
-
+
/* SMBUS in mode Transmitter ---------------------------------------------------*/
- if (((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TXIS) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET)) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, (SMBUS_IT_TCI| SMBUS_IT_STOPI| SMBUS_IT_NACKI | SMBUS_IT_TXI)) != RESET))
- {
+ if (((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TXIS) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET)) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, (SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI)) != RESET))
+ {
/* Slave mode selected */
if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
{
SMBUS_Slave_ISR(hsmbus);
}
/* Master mode selected */
- else if((hsmbus->State & HAL_SMBUS_STATE_MASTER_BUSY_TX) == HAL_SMBUS_STATE_MASTER_BUSY_TX)
+ else if ((hsmbus->State & HAL_SMBUS_STATE_MASTER_BUSY_TX) == HAL_SMBUS_STATE_MASTER_BUSY_TX)
{
SMBUS_Master_ISR(hsmbus);
}
}
-
+
/* SMBUS in mode Receiver ----------------------------------------------------*/
- if (((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_RXNE) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET)) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, (SMBUS_IT_TCI| SMBUS_IT_STOPI| SMBUS_IT_NACKI | SMBUS_IT_RXI)) != RESET))
+ if (((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_RXNE) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET)) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, (SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_RXI)) != RESET))
{
/* Slave mode selected */
if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX)
@@ -1073,15 +1190,15 @@
SMBUS_Slave_ISR(hsmbus);
}
/* Master mode selected */
- else if((hsmbus->State & HAL_SMBUS_STATE_MASTER_BUSY_RX) == HAL_SMBUS_STATE_MASTER_BUSY_RX)
+ else if ((hsmbus->State & HAL_SMBUS_STATE_MASTER_BUSY_RX) == HAL_SMBUS_STATE_MASTER_BUSY_RX)
{
SMBUS_Master_ISR(hsmbus);
}
- }
-
- /* SMBUS in mode Listener Only --------------------------------------------------*/
+ }
+
+ /* SMBUS in mode Listener Only --------------------------------------------------*/
if (((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_ADDR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET))
- && ((__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ADDRI) != RESET) || (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_STOPI) != RESET) || (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_NACKI) != RESET)))
+ && ((__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ADDRI) != RESET) || (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_STOPI) != RESET) || (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_NACKI) != RESET)))
{
if (hsmbus->State == HAL_SMBUS_STATE_LISTEN)
{
@@ -1098,79 +1215,7 @@
*/
void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus)
{
- /* SMBUS Bus error interrupt occurred ------------------------------------*/
- if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_BERR) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
- {
- hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BERR;
-
- /* Clear BERR flag */
- __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_BERR);
- }
-
- /* SMBUS Over-Run/Under-Run interrupt occurred ----------------------------------------*/
- if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_OVR) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
- {
- hsmbus->ErrorCode |= HAL_SMBUS_ERROR_OVR;
-
- /* Clear OVR flag */
- __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_OVR);
- }
-
- /* SMBUS Arbitration Loss error interrupt occurred ------------------------------------*/
- if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ARLO) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
- {
- hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ARLO;
-
- /* Clear ARLO flag */
- __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ARLO);
- }
-
- /* SMBUS Timeout error interrupt occurred ---------------------------------------------*/
- if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TIMEOUT) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
- {
- hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BUSTIMEOUT;
-
- /* Clear TIMEOUT flag */
- __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_TIMEOUT);
- }
-
- /* SMBUS Alert error interrupt occurred -----------------------------------------------*/
- if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ALERT) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
- {
- hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ALERT;
-
- /* Clear ALERT flag */
- __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ALERT);
- }
-
- /* SMBUS Packet Error Check error interrupt occurred ----------------------------------*/
- if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_PECERR) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
- {
- hsmbus->ErrorCode |= HAL_SMBUS_ERROR_PECERR;
-
- /* Clear PEC error flag */
- __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_PECERR);
- }
-
- /* Call the Error Callback in case of Error detected */
- if((hsmbus->ErrorCode != HAL_SMBUS_ERROR_NONE)&&(hsmbus->ErrorCode != HAL_SMBUS_ERROR_ACKF))
- {
- /* Do not Reset the HAL state in case of ALERT error */
- if((hsmbus->ErrorCode & HAL_SMBUS_ERROR_ALERT) != HAL_SMBUS_ERROR_ALERT)
- {
- if(((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
- || ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX))
- {
- /* Reset only HAL_SMBUS_STATE_SLAVE_BUSY_XX */
- /* keep HAL_SMBUS_STATE_LISTEN if set */
- hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
- hsmbus->State = HAL_SMBUS_STATE_LISTEN;
- }
- }
-
- /* Call the Error callback to prevent upper layer */
- HAL_SMBUS_ErrorCallback(hsmbus);
- }
+ SMBUS_ITErrorHandler(hsmbus);
}
/**
@@ -1179,14 +1224,14 @@
* the configuration information for the specified SMBUS.
* @retval None
*/
- __weak void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
+__weak void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hsmbus);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_SMBUS_MasterTxCpltCallback() could be implemented in the user file
- */
+ */
}
/**
@@ -1210,14 +1255,14 @@
* the configuration information for the specified SMBUS.
* @retval None
*/
- __weak void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
+__weak void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hsmbus);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_SMBUS_SlaveTxCpltCallback() could be implemented in the user file
- */
+ */
}
/**
@@ -1240,8 +1285,8 @@
* @brief Slave Address Match callback.
* @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
* the configuration information for the specified SMBUS.
- * @param TransferDirection: Master request Transfer Direction (Write/Read)
- * @param AddrMatchCode: Address Match Code
+ * @param TransferDirection Master request Transfer Direction (Write/Read)
+ * @param AddrMatchCode Address Match Code
* @retval None
*/
__weak void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode)
@@ -1267,7 +1312,7 @@
/* Prevent unused argument(s) compilation warning */
UNUSED(hsmbus);
- /* NOTE : This function should not be modified, when the callback is needed,
+ /* NOTE : This function should not be modified, when the callback is needed,
the HAL_SMBUS_ListenCpltCallback() could be implemented in the user file
*/
}
@@ -1278,29 +1323,29 @@
* the configuration information for the specified SMBUS.
* @retval None
*/
- __weak void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus)
+__weak void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(hsmbus);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_SMBUS_ErrorCallback() could be implemented in the user file
- */
+ */
}
/**
* @}
- */
+ */
-/** @defgroup SMBUS_Exported_Functions_Group3 Peripheral State and Errors functions
- * @brief Peripheral State and Errors functions
+/** @defgroup SMBUS_Exported_Functions_Group3 Peripheral State and Errors functions
+ * @brief Peripheral State and Errors functions
*
-@verbatim
+@verbatim
===============================================================================
##### Peripheral State and Errors functions #####
- ===============================================================================
+ ===============================================================================
[..]
- This subsection permit to get in run-time the status of the peripheral
+ This subsection permits to get in run-time the status of the peripheral
and the data flow.
@endverbatim
@@ -1332,14 +1377,14 @@
/**
* @}
- */
+ */
/**
* @}
- */
+ */
/** @addtogroup SMBUS_Private_Functions SMBUS Private Functions
- * @brief Data transfers Private functions
+ * @brief Data transfers Private functions
* @{
*/
@@ -1349,42 +1394,45 @@
* the configuration information for the specified SMBUS.
* @retval HAL status
*/
-static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus)
+static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus)
{
uint16_t DevAddress;
/* Process Locked */
__HAL_LOCK(hsmbus);
-
- if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) != RESET)
+
+ if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) != RESET)
{
/* Clear NACK Flag */
__HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
-
+
/* Set corresponding Error Code */
/* No need to generate STOP, it is automatically done */
hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ACKF;
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
-
- /* Call the Error callback to prevent upper layer */
+
+ /* Call the Error callback to inform upper layer */
HAL_SMBUS_ErrorCallback(hsmbus);
}
- else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) != RESET)
+ else if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) != RESET)
{
+ /* Check and treat errors if errors occurs during STOP process */
+ SMBUS_ITErrorHandler(hsmbus);
+
/* Call the corresponding callback to inform upper layer of End of Transfer */
- if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
+ if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
{
/* Disable Interrupt */
SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
/* Clear STOP Flag */
__HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
-
+
/* Clear Configuration Register 2 */
SMBUS_RESET_CR2(hsmbus);
-
+
/* Flush remaining data in Fifo register in case of error occurs before TXEmpty */
/* Disable the selected SMBUS peripheral */
__HAL_SMBUS_DISABLE(hsmbus);
@@ -1394,21 +1442,21 @@
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
-
+
/* REenable the selected SMBUS peripheral */
__HAL_SMBUS_ENABLE(hsmbus);
HAL_SMBUS_MasterTxCpltCallback(hsmbus);
}
- else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
+ else if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
{
/* Store Last receive data if any */
- if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET)
+ if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET)
{
/* Read data from RXDR */
(*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR;
- if((hsmbus->XferSize > 0U))
+ if ((hsmbus->XferSize > 0U))
{
hsmbus->XferSize--;
hsmbus->XferCount--;
@@ -1420,64 +1468,64 @@
/* Clear STOP Flag */
__HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
-
+
/* Clear Configuration Register 2 */
SMBUS_RESET_CR2(hsmbus);
-
+
hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
hsmbus->State = HAL_SMBUS_STATE_READY;
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
-
+
HAL_SMBUS_MasterRxCpltCallback(hsmbus);
}
}
- else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET)
- {
+ else if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET)
+ {
/* Read data from RXDR */
(*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR;
hsmbus->XferSize--;
hsmbus->XferCount--;
}
- else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXIS) != RESET)
+ else if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXIS) != RESET)
{
/* Write data to TXDR */
hsmbus->Instance->TXDR = (*hsmbus->pBuffPtr++);
hsmbus->XferSize--;
- hsmbus->XferCount--;
+ hsmbus->XferCount--;
}
- else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TCR) != RESET)
+ else if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TCR) != RESET)
{
- if((hsmbus->XferSize == 0U)&&(hsmbus->XferCount != 0U))
+ if ((hsmbus->XferSize == 0U) && (hsmbus->XferCount != 0U))
{
DevAddress = (hsmbus->Instance->CR2 & I2C_CR2_SADD);
-
- if(hsmbus->XferCount > MAX_NBYTE_SIZE)
- {
+
+ if (hsmbus->XferCount > MAX_NBYTE_SIZE)
+ {
SMBUS_TransferConfig(hsmbus, DevAddress, MAX_NBYTE_SIZE, (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), SMBUS_NO_STARTSTOP);
hsmbus->XferSize = MAX_NBYTE_SIZE;
}
else
{
hsmbus->XferSize = hsmbus->XferCount;
- SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
+ SMBUS_TransferConfig(hsmbus, DevAddress, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
/* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
/* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
- if(SMBUS_GET_PEC_MODE(hsmbus) != RESET)
+ if (SMBUS_GET_PEC_MODE(hsmbus) != RESET)
{
hsmbus->XferSize--;
hsmbus->XferCount--;
}
}
}
- else if((hsmbus->XferSize == 0U)&&(hsmbus->XferCount == 0U))
+ else if ((hsmbus->XferSize == 0U) && (hsmbus->XferCount == 0U))
{
/* Call TxCpltCallback() if no stop mode is set */
- if(SMBUS_GET_STOP_MODE(hsmbus) != SMBUS_AUTOEND_MODE)
+ if (SMBUS_GET_STOP_MODE(hsmbus) != SMBUS_AUTOEND_MODE)
{
/* Call the corresponding callback to inform upper layer of End of Transfer */
- if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
+ if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
{
/* Disable Interrupt */
SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
@@ -1486,10 +1534,10 @@
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
-
+
HAL_SMBUS_MasterTxCpltCallback(hsmbus);
}
- else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
+ else if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
{
SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
hsmbus->PreviousState = hsmbus->State;
@@ -1497,30 +1545,30 @@
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
-
+
HAL_SMBUS_MasterRxCpltCallback(hsmbus);
}
}
}
}
- else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TC) != RESET)
+ else if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TC) != RESET)
{
- if(hsmbus->XferCount == 0U)
+ if (hsmbus->XferCount == 0U)
{
/* Specific use case for Quick command */
- if(hsmbus->pBuffPtr == NULL)
+ if (hsmbus->pBuffPtr == NULL)
{
/* Generate a Stop command */
hsmbus->Instance->CR2 |= I2C_CR2_STOP;
}
/* Call TxCpltCallback() if no stop mode is set */
- else if(SMBUS_GET_STOP_MODE(hsmbus) != SMBUS_AUTOEND_MODE)
+ else if (SMBUS_GET_STOP_MODE(hsmbus) != SMBUS_AUTOEND_MODE)
{
/* No Generate Stop, to permit restart mode */
/* The stop will be done at the end of transfer, when SMBUS_AUTOEND_MODE enable */
-
+
/* Call the corresponding callback to inform upper layer of End of Transfer */
- if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
+ if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
{
/* Disable Interrupt */
SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
@@ -1529,10 +1577,10 @@
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
-
+
HAL_SMBUS_MasterTxCpltCallback(hsmbus);
}
- else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
+ else if (hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
{
SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
hsmbus->PreviousState = hsmbus->State;
@@ -1540,39 +1588,39 @@
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
-
+
HAL_SMBUS_MasterRxCpltCallback(hsmbus);
}
}
}
}
-
+
/* Process Unlocked */
- __HAL_UNLOCK(hsmbus);
-
- return HAL_OK;
-}
+ __HAL_UNLOCK(hsmbus);
+
+ return HAL_OK;
+}
/**
* @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode.
* @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
* the configuration information for the specified SMBUS.
* @retval HAL status
*/
-static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus)
+static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus)
{
uint8_t TransferDirection = 0U;
uint16_t SlaveAddrCode = 0U;
/* Process Locked */
__HAL_LOCK(hsmbus);
-
- if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) != RESET)
+
+ if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) != RESET)
{
/* Check that SMBUS transfer finished */
/* if yes, normal usecase, a NACK is sent by the HOST when Transfer is finished */
/* Mean XferCount == 0*/
/* So clear Flag NACKF only */
- if(hsmbus->XferCount == 0U)
+ if (hsmbus->XferCount == 0U)
{
/* Clear NACK Flag */
__HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
@@ -1594,58 +1642,58 @@
/* Disable RX/TX Interrupts, keep only ADDR Interrupt */
SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_TX);
-
+
/* Set ErrorCode corresponding to a Non-Acknowledge */
hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ACKF;
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
-
- /* Call the Error callback to prevent upper layer */
+
+ /* Call the Error callback to inform upper layer */
HAL_SMBUS_ErrorCallback(hsmbus);
}
}
- else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ADDR) != RESET)
+ else if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ADDR) != RESET)
{
TransferDirection = SMBUS_GET_DIR(hsmbus);
SlaveAddrCode = SMBUS_GET_ADDR_MATCH(hsmbus);
-
+
/* Disable ADDR interrupt to prevent multiple ADDRInterrupt*/
/* Other ADDRInterrupt will be treat in next Listen usecase */
__HAL_SMBUS_DISABLE_IT(hsmbus, SMBUS_IT_ADDRI);
-
+
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
/* Call Slave Addr callback */
HAL_SMBUS_AddrCallback(hsmbus, TransferDirection, SlaveAddrCode);
}
- else if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET) || (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TCR) != RESET))
+ else if ((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET) || (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TCR) != RESET))
{
- if( (hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX)
+ if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX)
{
/* Read data from RXDR */
(*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR;
hsmbus->XferSize--;
hsmbus->XferCount--;
- if(hsmbus->XferCount == 1U)
+ if (hsmbus->XferCount == 1U)
{
/* Receive last Byte, can be PEC byte in case of PEC BYTE enabled */
/* or only the last Byte of Transfer */
/* So reset the RELOAD bit mode */
hsmbus->XferOptions &= ~SMBUS_RELOAD_MODE;
- SMBUS_TransferConfig(hsmbus, 0U ,1U , hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
+ SMBUS_TransferConfig(hsmbus, 0U , 1U , hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
}
- else if(hsmbus->XferCount == 0U)
+ else if (hsmbus->XferCount == 0U)
{
/* Last Byte is received, disable Interrupt */
SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
-
+
/* Remove HAL_SMBUS_STATE_SLAVE_BUSY_RX, keep only HAL_SMBUS_STATE_LISTEN */
hsmbus->PreviousState = hsmbus->State;
hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_RX);
-
+
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
@@ -1660,13 +1708,13 @@
/* Ack last Byte Read */
hsmbus->Instance->CR2 &= ~I2C_CR2_NACK;
}
- }
- else if( (hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
+ }
+ else if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
{
- if((hsmbus->XferSize == 0U)&&(hsmbus->XferCount != 0U))
+ if ((hsmbus->XferSize == 0U) && (hsmbus->XferCount != 0U))
{
- if(hsmbus->XferCount > MAX_NBYTE_SIZE)
- {
+ if (hsmbus->XferCount > MAX_NBYTE_SIZE)
+ {
SMBUS_TransferConfig(hsmbus, 0U, MAX_NBYTE_SIZE, (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), SMBUS_NO_STARTSTOP);
hsmbus->XferSize = MAX_NBYTE_SIZE;
}
@@ -1676,7 +1724,7 @@
SMBUS_TransferConfig(hsmbus, 0U, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
/* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
/* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
- if(SMBUS_GET_PEC_MODE(hsmbus) != RESET)
+ if (SMBUS_GET_PEC_MODE(hsmbus) != RESET)
{
hsmbus->XferSize--;
hsmbus->XferCount--;
@@ -1685,21 +1733,21 @@
}
}
}
- else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXIS) != RESET)
+ else if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXIS) != RESET)
{
/* Write data to TXDR only if XferCount not reach "0" */
/* A TXIS flag can be set, during STOP treatment */
/* Check if all Data have already been sent */
/* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */
- if(hsmbus->XferCount > 0U)
+ if (hsmbus->XferCount > 0U)
{
/* Write data to TXDR */
hsmbus->Instance->TXDR = (*hsmbus->pBuffPtr++);
hsmbus->XferCount--;
hsmbus->XferSize--;
}
-
- if(hsmbus->XferCount == 0U)
+
+ if (hsmbus->XferCount == 0U)
{
/* Last Byte is Transmitted */
/* Remove HAL_SMBUS_STATE_SLAVE_BUSY_TX, keep only HAL_SMBUS_STATE_LISTEN */
@@ -1716,17 +1764,17 @@
}
/* Check if STOPF is set */
- if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) != RESET)
+ if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) != RESET)
{
- if((hsmbus->State & HAL_SMBUS_STATE_LISTEN) == HAL_SMBUS_STATE_LISTEN)
+ if ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) == HAL_SMBUS_STATE_LISTEN)
{
/* Store Last receive data if any */
- if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET)
+ if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET)
{
/* Read data from RXDR */
(*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR;
- if((hsmbus->XferSize > 0U))
+ if ((hsmbus->XferSize > 0U))
{
hsmbus->XferSize--;
hsmbus->XferCount--;
@@ -1744,30 +1792,30 @@
/* Clear Configuration Register 2 */
SMBUS_RESET_CR2(hsmbus);
-
+
/* Clear STOP Flag */
__HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
- /* Clear ADDR flag */
- __HAL_SMBUS_CLEAR_FLAG(hsmbus,SMBUS_FLAG_ADDR);
+ /* Clear ADDR flag */
+ __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ADDR);
hsmbus->XferOptions = 0U;
hsmbus->PreviousState = hsmbus->State;
hsmbus->State = HAL_SMBUS_STATE_READY;
-
+
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
- /* Call the Listen Complete callback, to prevent upper layer of the end of Listen usecase */
+ /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
HAL_SMBUS_ListenCpltCallback(hsmbus);
}
}
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
-
- return HAL_OK;
-}
+
+ return HAL_OK;
+}
/**
* @brief Manage the enabling of Interrupts.
* @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
@@ -1775,40 +1823,40 @@
* @param InterruptRequest Value of @ref SMBUS_Interrupt_configuration_definition.
* @retval HAL status
*/
-static HAL_StatusTypeDef SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest)
+static HAL_StatusTypeDef SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest)
{
uint32_t tmpisr = 0U;
- if((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT)
+ if ((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT)
{
/* Enable ERR interrupt */
tmpisr |= SMBUS_IT_ERRI;
}
-
- if((InterruptRequest & SMBUS_IT_ADDR) == SMBUS_IT_ADDR)
+
+ if ((InterruptRequest & SMBUS_IT_ADDR) == SMBUS_IT_ADDR)
{
/* Enable ADDR, STOP interrupt */
tmpisr |= SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_ERRI;
}
-
- if((InterruptRequest & SMBUS_IT_TX) == SMBUS_IT_TX)
+
+ if ((InterruptRequest & SMBUS_IT_TX) == SMBUS_IT_TX)
{
/* Enable ERR, TC, STOP, NACK, RXI interrupt */
tmpisr |= SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI;
}
-
- if((InterruptRequest & SMBUS_IT_RX) == SMBUS_IT_RX)
+
+ if ((InterruptRequest & SMBUS_IT_RX) == SMBUS_IT_RX)
{
/* Enable ERR, TC, STOP, NACK, TXI interrupt */
tmpisr |= SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_RXI;
}
-
+
/* Enable interrupts only at the end */
/* to avoid the risk of SMBUS interrupt handle execution before */
/* all interrupts requested done */
__HAL_SMBUS_ENABLE_IT(hsmbus, tmpisr);
- return HAL_OK;
+ return HAL_OK;
}
/**
* @brief Manage the disabling of Interrupts.
@@ -1817,60 +1865,60 @@
* @param InterruptRequest Value of @ref SMBUS_Interrupt_configuration_definition.
* @retval HAL status
*/
-static HAL_StatusTypeDef SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest)
+static HAL_StatusTypeDef SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest)
{
uint32_t tmpisr = 0U;
- if( ((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT) && (hsmbus->State == HAL_SMBUS_STATE_READY) )
+ if (((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT) && (hsmbus->State == HAL_SMBUS_STATE_READY))
{
/* Disable ERR interrupt */
tmpisr |= SMBUS_IT_ERRI;
}
-
- if((InterruptRequest & SMBUS_IT_TX) == SMBUS_IT_TX)
+
+ if ((InterruptRequest & SMBUS_IT_TX) == SMBUS_IT_TX)
{
/* Disable TC, STOP, NACK, TXI interrupt */
tmpisr |= SMBUS_IT_TCI | SMBUS_IT_TXI;
-
- if((SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
- && ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN))
+
+ if ((SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
+ && ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN))
{
/* Disable ERR interrupt */
tmpisr |= SMBUS_IT_ERRI;
}
-
- if((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN)
+
+ if ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN)
{
/* Disable STOPI, NACKI */
tmpisr |= SMBUS_IT_STOPI | SMBUS_IT_NACKI;
}
}
-
- if((InterruptRequest & SMBUS_IT_RX) == SMBUS_IT_RX)
+
+ if ((InterruptRequest & SMBUS_IT_RX) == SMBUS_IT_RX)
{
/* Disable TC, STOP, NACK, RXI interrupt */
tmpisr |= SMBUS_IT_TCI | SMBUS_IT_RXI;
-
- if((SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
- && ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN))
+
+ if ((SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
+ && ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN))
{
/* Disable ERR interrupt */
tmpisr |= SMBUS_IT_ERRI;
}
- if((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN)
+ if ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN)
{
/* Disable STOPI, NACKI */
tmpisr |= SMBUS_IT_STOPI | SMBUS_IT_NACKI;
}
}
-
- if((InterruptRequest & SMBUS_IT_ADDR) == SMBUS_IT_ADDR)
+
+ if ((InterruptRequest & SMBUS_IT_ADDR) == SMBUS_IT_ADDR)
{
/* Enable ADDR, STOP interrupt */
tmpisr |= SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI;
- if(SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
+ if (SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
{
/* Disable ERR interrupt */
tmpisr |= SMBUS_IT_ERRI;
@@ -1881,9 +1929,95 @@
/* to avoid a breaking situation like at "t" time */
/* all disable interrupts request are not done */
__HAL_SMBUS_DISABLE_IT(hsmbus, tmpisr);
-
+
return HAL_OK;
}
+
+/**
+ * @brief SMBUS interrupts error handler.
+ * @param hsmbus SMBUS handle.
+ * @retval None
+ */
+static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus)
+{
+ uint32_t itflags = READ_REG(hsmbus->Instance->ISR);
+ uint32_t itsources = READ_REG(hsmbus->Instance->CR1);
+
+ /* SMBUS Bus error interrupt occurred ------------------------------------*/
+ if (((itflags & SMBUS_FLAG_BERR) != RESET) && ((itsources & SMBUS_IT_ERRI) != RESET))
+ {
+ hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BERR;
+
+ /* Clear BERR flag */
+ __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_BERR);
+ }
+
+ /* SMBUS Over-Run/Under-Run interrupt occurred ----------------------------------------*/
+ if (((itflags & SMBUS_FLAG_OVR) != RESET) && ((itsources & SMBUS_IT_ERRI) != RESET))
+ {
+ hsmbus->ErrorCode |= HAL_SMBUS_ERROR_OVR;
+
+ /* Clear OVR flag */
+ __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_OVR);
+ }
+
+ /* SMBUS Arbitration Loss error interrupt occurred ------------------------------------*/
+ if (((itflags & SMBUS_FLAG_ARLO) != RESET) && ((itsources & SMBUS_IT_ERRI) != RESET))
+ {
+ hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ARLO;
+
+ /* Clear ARLO flag */
+ __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ARLO);
+ }
+
+ /* SMBUS Timeout error interrupt occurred ---------------------------------------------*/
+ if (((itflags & SMBUS_FLAG_TIMEOUT) != RESET) && ((itsources & SMBUS_IT_ERRI) != RESET))
+ {
+ hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BUSTIMEOUT;
+
+ /* Clear TIMEOUT flag */
+ __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_TIMEOUT);
+ }
+
+ /* SMBUS Alert error interrupt occurred -----------------------------------------------*/
+ if (((itflags & SMBUS_FLAG_ALERT) != RESET) && ((itsources & SMBUS_IT_ERRI) != RESET))
+ {
+ hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ALERT;
+
+ /* Clear ALERT flag */
+ __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ALERT);
+ }
+
+ /* SMBUS Packet Error Check error interrupt occurred ----------------------------------*/
+ if (((itflags & SMBUS_FLAG_PECERR) != RESET) && ((itsources & SMBUS_IT_ERRI) != RESET))
+ {
+ hsmbus->ErrorCode |= HAL_SMBUS_ERROR_PECERR;
+
+ /* Clear PEC error flag */
+ __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_PECERR);
+ }
+
+ /* Call the Error Callback in case of Error detected */
+ if ((hsmbus->ErrorCode != HAL_SMBUS_ERROR_NONE) && (hsmbus->ErrorCode != HAL_SMBUS_ERROR_ACKF))
+ {
+ /* Do not Reset the HAL state in case of ALERT error */
+ if ((hsmbus->ErrorCode & HAL_SMBUS_ERROR_ALERT) != HAL_SMBUS_ERROR_ALERT)
+ {
+ if (((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
+ || ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX))
+ {
+ /* Reset only HAL_SMBUS_STATE_SLAVE_BUSY_XX */
+ /* keep HAL_SMBUS_STATE_LISTEN if set */
+ hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
+ hsmbus->State = HAL_SMBUS_STATE_LISTEN;
+ }
+ }
+
+ /* Call the Error callback to inform upper layer */
+ HAL_SMBUS_ErrorCallback(hsmbus);
+ }
+}
+
/**
* @brief Handle SMBUS Communication Timeout.
* @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains
@@ -1893,26 +2027,26 @@
* @param Timeout Timeout duration
* @retval HAL status
*/
-static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
-{
+static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
+{
uint32_t tickstart = HAL_GetTick();
-
+
/* Wait until flag is set */
- if(Status == RESET)
- {
- while(__HAL_SMBUS_GET_FLAG(hsmbus, Flag) == RESET)
+ if (Status == RESET)
+ {
+ while (__HAL_SMBUS_GET_FLAG(hsmbus, Flag) == RESET)
{
/* Check for the Timeout */
- if(Timeout != HAL_MAX_DELAY)
+ if (Timeout != HAL_MAX_DELAY)
{
- if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
+ if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
{
hsmbus->PreviousState = hsmbus->State;
- hsmbus->State= HAL_SMBUS_STATE_READY;
-
+ hsmbus->State = HAL_SMBUS_STATE_READY;
+
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
-
+
return HAL_TIMEOUT;
}
}
@@ -1920,25 +2054,25 @@
}
else
{
- while(__HAL_SMBUS_GET_FLAG(hsmbus, Flag) != RESET)
+ while (__HAL_SMBUS_GET_FLAG(hsmbus, Flag) != RESET)
{
/* Check for the Timeout */
- if(Timeout != HAL_MAX_DELAY)
+ if (Timeout != HAL_MAX_DELAY)
{
- if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
+ if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
{
hsmbus->PreviousState = hsmbus->State;
- hsmbus->State= HAL_SMBUS_STATE_READY;
-
+ hsmbus->State = HAL_SMBUS_STATE_READY;
+
/* Process Unlocked */
__HAL_UNLOCK(hsmbus);
-
+
return HAL_TIMEOUT;
}
}
}
}
- return HAL_OK;
+ return HAL_OK;
}
/**
@@ -1964,25 +2098,64 @@
static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)
{
uint32_t tmpreg = 0U;
-
+
/* Check the parameters */
assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
assert_param(IS_SMBUS_TRANSFER_MODE(Mode));
assert_param(IS_SMBUS_TRANSFER_REQUEST(Request));
-
+
/* Get the CR2 register value */
tmpreg = hsmbus->Instance->CR2;
-
+
/* clear tmpreg specific bits */
tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN | I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_PECBYTE));
-
+
/* update tmpreg */
- tmpreg |= (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << 16U ) & I2C_CR2_NBYTES) | \
- (uint32_t)Mode | (uint32_t)Request);
-
+ tmpreg |= (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << 16U) & I2C_CR2_NBYTES) | \
+ (uint32_t)Mode | (uint32_t)Request);
+
/* update CR2 register */
- hsmbus->Instance->CR2 = tmpreg;
-}
+ hsmbus->Instance->CR2 = tmpreg;
+}
+
+/**
+ * @brief Convert SMBUSx OTHER_xxx XferOptions to functionnal XferOptions.
+ * @param hsmbus SMBUS handle.
+ * @retval None
+ */
+static void SMBUS_ConvertOtherXferOptions(SMBUS_HandleTypeDef *hsmbus)
+{
+ /* if user set XferOptions to SMBUS_OTHER_FRAME_NO_PEC */
+ /* it request implicitly to generate a restart condition */
+ /* set XferOptions to SMBUS_FIRST_FRAME */
+ if (hsmbus->XferOptions == SMBUS_OTHER_FRAME_NO_PEC)
+ {
+ hsmbus->XferOptions = SMBUS_FIRST_FRAME;
+ }
+ /* else if user set XferOptions to SMBUS_OTHER_FRAME_WITH_PEC */
+ /* it request implicitly to generate a restart condition */
+ /* set XferOptions to SMBUS_FIRST_FRAME | SMBUS_SENDPEC_MODE */
+ else if (hsmbus->XferOptions == SMBUS_OTHER_FRAME_WITH_PEC)
+ {
+ hsmbus->XferOptions = SMBUS_FIRST_FRAME | SMBUS_SENDPEC_MODE;
+ }
+ /* else if user set XferOptions to SMBUS_OTHER_AND_LAST_FRAME_NO_PEC */
+ /* it request implicitly to generate a restart condition */
+ /* then generate a stop condition at the end of transfer */
+ /* set XferOptions to SMBUS_FIRST_AND_LAST_FRAME_NO_PEC */
+ else if (hsmbus->XferOptions == SMBUS_OTHER_AND_LAST_FRAME_NO_PEC)
+ {
+ hsmbus->XferOptions = SMBUS_FIRST_AND_LAST_FRAME_NO_PEC;
+ }
+ /* else if user set XferOptions to SMBUS_OTHER_AND_LAST_FRAME_WITH_PEC */
+ /* it request implicitly to generate a restart condition */
+ /* then generate a stop condition at the end of transfer */
+ /* set XferOptions to SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC */
+ else if (hsmbus->XferOptions == SMBUS_OTHER_AND_LAST_FRAME_WITH_PEC)
+ {
+ hsmbus->XferOptions = SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC;
+ }
+}
/**
* @}
*/
