mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_rtc_ex.c@182:a56a73fd2a6f, 2018-03-20 (annotated)

Committer:
AnnaBridge
Date:
Tue Mar 20 16:56:18 2018 +0000
Revision:
182:a56a73fd2a6f
Parent:
167:e84263d55307 
mbed-dev library. Release version 160

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f4xx_hal_rtc_ex.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @brief RTC HAL module driver.
<> 144:ef7eb2e8f9f7 6 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 7 * functionalities of the Real Time Clock (RTC) Extension peripheral:
<> 144:ef7eb2e8f9f7 8 * + RTC Time Stamp functions
<> 144:ef7eb2e8f9f7 9 * + RTC Tamper functions
<> 144:ef7eb2e8f9f7 10 * + RTC Wake-up functions
<> 144:ef7eb2e8f9f7 11 * + Extension Control functions
<> 144:ef7eb2e8f9f7 12 * + Extension RTC features functions
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 @verbatim
<> 144:ef7eb2e8f9f7 15 ==============================================================================
<> 144:ef7eb2e8f9f7 16 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 17 ==============================================================================
<> 144:ef7eb2e8f9f7 18 [..]
<> 144:ef7eb2e8f9f7 19 (+) Enable the RTC domain access.
<> 144:ef7eb2e8f9f7 20 (+) Configure the RTC Prescaler (Asynchronous and Synchronous) and RTC hour
<> 144:ef7eb2e8f9f7 21 format using the HAL_RTC_Init() function.
<> 144:ef7eb2e8f9f7 22
<> 144:ef7eb2e8f9f7 23 *** RTC Wake-up configuration ***
<> 144:ef7eb2e8f9f7 24 ================================
<> 144:ef7eb2e8f9f7 25 [..]
<> 144:ef7eb2e8f9f7 26 (+) To configure the RTC Wake-up Clock source and Counter use the HAL_RTC_SetWakeUpTimer()
<> 144:ef7eb2e8f9f7 27 function. You can also configure the RTC Wake-up timer in interrupt mode
<> 144:ef7eb2e8f9f7 28 using the HAL_RTC_SetWakeUpTimer_IT() function.
<> 144:ef7eb2e8f9f7 29 (+) To read the RTC Wake-up Counter register, use the HAL_RTC_GetWakeUpTimer()
<> 144:ef7eb2e8f9f7 30 function.
<> 144:ef7eb2e8f9f7 31
<> 144:ef7eb2e8f9f7 32 *** TimeStamp configuration ***
<> 144:ef7eb2e8f9f7 33 ===============================
<> 144:ef7eb2e8f9f7 34 [..]
<> 144:ef7eb2e8f9f7 35 (+) Configure the RTC_AFx trigger and enable the RTC TimeStamp using the
<> 144:ef7eb2e8f9f7 36 HAL_RTC_SetTimeStamp() function. You can also configure the RTC TimeStamp with
<> 144:ef7eb2e8f9f7 37 interrupt mode using the HAL_RTC_SetTimeStamp_IT() function.
<> 144:ef7eb2e8f9f7 38 (+) To read the RTC TimeStamp Time and Date register, use the HAL_RTC_GetTimeStamp()
<> 144:ef7eb2e8f9f7 39 function.
<> 144:ef7eb2e8f9f7 40 (+) The TIMESTAMP alternate function can be mapped either to RTC_AF1 (PC13)
<> 144:ef7eb2e8f9f7 41 or RTC_AF2 (PI8 or PA0 only for STM32F446xx devices) depending on the value of TSINSEL bit in
<> 144:ef7eb2e8f9f7 42 RTC_TAFCR register. The corresponding pin is also selected by HAL_RTC_SetTimeStamp()
<> 144:ef7eb2e8f9f7 43 or HAL_RTC_SetTimeStamp_IT() function.
<> 144:ef7eb2e8f9f7 44
<> 144:ef7eb2e8f9f7 45 *** Tamper configuration ***
<> 144:ef7eb2e8f9f7 46 ============================
<> 144:ef7eb2e8f9f7 47 [..]
<> 144:ef7eb2e8f9f7 48 (+) Enable the RTC Tamper and configure the Tamper filter count, trigger Edge
<> 144:ef7eb2e8f9f7 49 or Level according to the Tamper filter (if equal to 0 Edge else Level)
<> 144:ef7eb2e8f9f7 50 value, sampling frequency, precharge or discharge and Pull-UP using the
<> 144:ef7eb2e8f9f7 51 HAL_RTC_SetTamper() function. You can configure RTC Tamper in interrupt
<> 144:ef7eb2e8f9f7 52 mode using HAL_RTC_SetTamper_IT() function.
<> 144:ef7eb2e8f9f7 53 (+) The TAMPER1 alternate function can be mapped either to RTC_AF1 (PC13)
<> 144:ef7eb2e8f9f7 54 or RTC_AF2 (PI8 or PA0 only for STM32F446xx devices) depending on the value of TAMP1INSEL bit in
<> 144:ef7eb2e8f9f7 55 RTC_TAFCR register. The corresponding pin is also selected by HAL_RTC_SetTamper()
<> 144:ef7eb2e8f9f7 56 or HAL_RTC_SetTamper_IT() function.
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 *** Backup Data Registers configuration ***
<> 144:ef7eb2e8f9f7 59 ===========================================
<> 144:ef7eb2e8f9f7 60 [..]
<> 144:ef7eb2e8f9f7 61 (+) To write to the RTC Backup Data registers, use the HAL_RTC_BKUPWrite()
<> 144:ef7eb2e8f9f7 62 function.
<> 144:ef7eb2e8f9f7 63 (+) To read the RTC Backup Data registers, use the HAL_RTC_BKUPRead()
<> 144:ef7eb2e8f9f7 64 function.
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66 @endverbatim
<> 144:ef7eb2e8f9f7 67 ******************************************************************************
<> 144:ef7eb2e8f9f7 68 * @attention
<> 144:ef7eb2e8f9f7 69 *
AnnaBridge 167:e84263d55307 70 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 71 *
<> 144:ef7eb2e8f9f7 72 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 73 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 74 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 75 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 76 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 77 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 78 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 79 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 80 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 81 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 82 *
<> 144:ef7eb2e8f9f7 83 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 84 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 85 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 86 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 87 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 88 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 89 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 90 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 91 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 92 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 93 *
<> 144:ef7eb2e8f9f7 94 ******************************************************************************
<> 144:ef7eb2e8f9f7 95 */
<> 144:ef7eb2e8f9f7 96
<> 144:ef7eb2e8f9f7 97 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 98 #include "stm32f4xx_hal.h"
<> 144:ef7eb2e8f9f7 99
<> 144:ef7eb2e8f9f7 100 /** @addtogroup STM32F4xx_HAL_Driver
<> 144:ef7eb2e8f9f7 101 * @{
<> 144:ef7eb2e8f9f7 102 */
<> 144:ef7eb2e8f9f7 103
<> 144:ef7eb2e8f9f7 104 /** @defgroup RTCEx RTCEx
<> 144:ef7eb2e8f9f7 105 * @brief RTC HAL module driver
<> 144:ef7eb2e8f9f7 106 * @{
<> 144:ef7eb2e8f9f7 107 */
<> 144:ef7eb2e8f9f7 108
<> 144:ef7eb2e8f9f7 109 #ifdef HAL_RTC_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 110
<> 144:ef7eb2e8f9f7 111 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 112 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 113 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 114 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 115 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 116 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 /** @defgroup RTCEx_Exported_Functions RTCEx Exported Functions
<> 144:ef7eb2e8f9f7 119 * @{
<> 144:ef7eb2e8f9f7 120 */
<> 144:ef7eb2e8f9f7 121
<> 144:ef7eb2e8f9f7 122 /** @defgroup RTCEx_Exported_Functions_Group1 RTC TimeStamp and Tamper functions
<> 144:ef7eb2e8f9f7 123 * @brief RTC TimeStamp and Tamper functions
<> 144:ef7eb2e8f9f7 124 *
<> 144:ef7eb2e8f9f7 125 @verbatim
<> 144:ef7eb2e8f9f7 126 ===============================================================================
<> 144:ef7eb2e8f9f7 127 ##### RTC TimeStamp and Tamper functions #####
<> 144:ef7eb2e8f9f7 128 ===============================================================================
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 [..] This section provides functions allowing to configure TimeStamp feature
<> 144:ef7eb2e8f9f7 131
<> 144:ef7eb2e8f9f7 132 @endverbatim
<> 144:ef7eb2e8f9f7 133 * @{
<> 144:ef7eb2e8f9f7 134 */
<> 144:ef7eb2e8f9f7 135
<> 144:ef7eb2e8f9f7 136 /**
<> 144:ef7eb2e8f9f7 137 * @brief Sets TimeStamp.
<> 144:ef7eb2e8f9f7 138 * @note This API must be called before enabling the TimeStamp feature.
AnnaBridge 182:a56a73fd2a6f 139 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 140 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 141 * @param TimeStampEdge Specifies the pin edge on which the TimeStamp is
<> 144:ef7eb2e8f9f7 142 * activated.
<> 144:ef7eb2e8f9f7 143 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 144 * @arg RTC_TIMESTAMPEDGE_RISING: the Time stamp event occurs on the
<> 144:ef7eb2e8f9f7 145 * rising edge of the related pin.
<> 144:ef7eb2e8f9f7 146 * @arg RTC_TIMESTAMPEDGE_FALLING: the Time stamp event occurs on the
<> 144:ef7eb2e8f9f7 147 * falling edge of the related pin.
AnnaBridge 182:a56a73fd2a6f 148 * @param RTC_TimeStampPin specifies the RTC TimeStamp Pin.
<> 144:ef7eb2e8f9f7 149 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 150 * @arg RTC_TIMESTAMPPIN_DEFAULT: PC13 is selected as RTC TimeStamp Pin.
AnnaBridge 167:e84263d55307 151 * @arg RTC_TIMESTAMPPIN_POS1: PI8/PA0 is selected as RTC TimeStamp Pin.
AnnaBridge 167:e84263d55307 152 * (not applicable in the case of STM32F412xx, STM32F413xx and STM32F423xx devices)
<> 144:ef7eb2e8f9f7 153 * (PI8 for all STM32 devices except for STM32F446xx devices the PA0 is used)
<> 144:ef7eb2e8f9f7 154 * @arg RTC_TIMESTAMPPIN_PA0: PA0 is selected as RTC TimeStamp Pin only for STM32F446xx devices
<> 144:ef7eb2e8f9f7 155 * @retval HAL status
<> 144:ef7eb2e8f9f7 156 */
<> 144:ef7eb2e8f9f7 157 HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin)
<> 144:ef7eb2e8f9f7 158 {
<> 144:ef7eb2e8f9f7 159 uint32_t tmpreg = 0U;
<> 144:ef7eb2e8f9f7 160
<> 144:ef7eb2e8f9f7 161 /* Check the parameters */
<> 144:ef7eb2e8f9f7 162 assert_param(IS_TIMESTAMP_EDGE(TimeStampEdge));
<> 144:ef7eb2e8f9f7 163 assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin));
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 /* Process Locked */
<> 144:ef7eb2e8f9f7 166 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 167
<> 144:ef7eb2e8f9f7 168 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 169
<> 144:ef7eb2e8f9f7 170 /* Get the RTC_CR register and clear the bits to be configured */
<> 144:ef7eb2e8f9f7 171 tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
<> 144:ef7eb2e8f9f7 172
<> 144:ef7eb2e8f9f7 173 tmpreg|= TimeStampEdge;
<> 144:ef7eb2e8f9f7 174
<> 144:ef7eb2e8f9f7 175 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 176 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 177
<> 144:ef7eb2e8f9f7 178 hrtc->Instance->TAFCR &= (uint32_t)~RTC_TAFCR_TSINSEL;
<> 144:ef7eb2e8f9f7 179 hrtc->Instance->TAFCR |= (uint32_t)(RTC_TimeStampPin);
<> 144:ef7eb2e8f9f7 180
<> 144:ef7eb2e8f9f7 181 /* Configure the Time Stamp TSEDGE and Enable bits */
<> 144:ef7eb2e8f9f7 182 hrtc->Instance->CR = (uint32_t)tmpreg;
<> 144:ef7eb2e8f9f7 183
<> 144:ef7eb2e8f9f7 184 __HAL_RTC_TIMESTAMP_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 185
<> 144:ef7eb2e8f9f7 186 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 187 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 188
<> 144:ef7eb2e8f9f7 189 /* Change RTC state */
<> 144:ef7eb2e8f9f7 190 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 191
<> 144:ef7eb2e8f9f7 192 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 193 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 194
<> 144:ef7eb2e8f9f7 195 return HAL_OK;
<> 144:ef7eb2e8f9f7 196 }
<> 144:ef7eb2e8f9f7 197
<> 144:ef7eb2e8f9f7 198 /**
<> 144:ef7eb2e8f9f7 199 * @brief Sets TimeStamp with Interrupt.
AnnaBridge 182:a56a73fd2a6f 200 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 201 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 202 * @note This API must be called before enabling the TimeStamp feature.
AnnaBridge 182:a56a73fd2a6f 203 * @param TimeStampEdge Specifies the pin edge on which the TimeStamp is
<> 144:ef7eb2e8f9f7 204 * activated.
<> 144:ef7eb2e8f9f7 205 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 206 * @arg RTC_TIMESTAMPEDGE_RISING: the Time stamp event occurs on the
<> 144:ef7eb2e8f9f7 207 * rising edge of the related pin.
<> 144:ef7eb2e8f9f7 208 * @arg RTC_TIMESTAMPEDGE_FALLING: the Time stamp event occurs on the
<> 144:ef7eb2e8f9f7 209 * falling edge of the related pin.
AnnaBridge 182:a56a73fd2a6f 210 * @param RTC_TimeStampPin Specifies the RTC TimeStamp Pin.
<> 144:ef7eb2e8f9f7 211 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 212 * @arg RTC_TIMESTAMPPIN_DEFAULT: PC13 is selected as RTC TimeStamp Pin.
AnnaBridge 167:e84263d55307 213 * @arg RTC_TIMESTAMPPIN_PI8: PI8 is selected as RTC TimeStamp Pin. (not applicable in the case of STM32F446xx, STM32F412xx, STM32F413xx and STM32F423xx devices)
<> 144:ef7eb2e8f9f7 214 * @arg RTC_TIMESTAMPPIN_PA0: PA0 is selected as RTC TimeStamp Pin only for STM32F446xx devices
<> 144:ef7eb2e8f9f7 215 * @retval HAL status
<> 144:ef7eb2e8f9f7 216 */
<> 144:ef7eb2e8f9f7 217 HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin)
<> 144:ef7eb2e8f9f7 218 {
<> 144:ef7eb2e8f9f7 219 uint32_t tmpreg = 0U;
<> 144:ef7eb2e8f9f7 220
<> 144:ef7eb2e8f9f7 221 /* Check the parameters */
<> 144:ef7eb2e8f9f7 222 assert_param(IS_TIMESTAMP_EDGE(TimeStampEdge));
<> 144:ef7eb2e8f9f7 223 assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin));
<> 144:ef7eb2e8f9f7 224
<> 144:ef7eb2e8f9f7 225 /* Process Locked */
<> 144:ef7eb2e8f9f7 226 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 227
<> 144:ef7eb2e8f9f7 228 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 229
<> 144:ef7eb2e8f9f7 230 /* Get the RTC_CR register and clear the bits to be configured */
<> 144:ef7eb2e8f9f7 231 tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
<> 144:ef7eb2e8f9f7 232
<> 144:ef7eb2e8f9f7 233 tmpreg |= TimeStampEdge;
<> 144:ef7eb2e8f9f7 234
<> 144:ef7eb2e8f9f7 235 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 236 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 237
<> 144:ef7eb2e8f9f7 238 /* Configure the Time Stamp TSEDGE and Enable bits */
<> 144:ef7eb2e8f9f7 239 hrtc->Instance->CR = (uint32_t)tmpreg;
<> 144:ef7eb2e8f9f7 240
<> 144:ef7eb2e8f9f7 241 hrtc->Instance->TAFCR &= (uint32_t)~RTC_TAFCR_TSINSEL;
<> 144:ef7eb2e8f9f7 242 hrtc->Instance->TAFCR |= (uint32_t)(RTC_TimeStampPin);
<> 144:ef7eb2e8f9f7 243
<> 144:ef7eb2e8f9f7 244 /* Clear RTC Timestamp flag */
<> 144:ef7eb2e8f9f7 245 __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSF);
<> 144:ef7eb2e8f9f7 246
<> 144:ef7eb2e8f9f7 247 __HAL_RTC_TIMESTAMP_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 248
<> 144:ef7eb2e8f9f7 249 /* Enable IT timestamp */
<> 144:ef7eb2e8f9f7 250 __HAL_RTC_TIMESTAMP_ENABLE_IT(hrtc,RTC_IT_TS);
<> 144:ef7eb2e8f9f7 251
<> 144:ef7eb2e8f9f7 252 /* RTC timestamp Interrupt Configuration: EXTI configuration */
<> 144:ef7eb2e8f9f7 253 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT();
<> 144:ef7eb2e8f9f7 254
<> 144:ef7eb2e8f9f7 255 EXTI->RTSR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT;
<> 144:ef7eb2e8f9f7 256
<> 144:ef7eb2e8f9f7 257 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 258 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 259
<> 144:ef7eb2e8f9f7 260 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 261
<> 144:ef7eb2e8f9f7 262 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 263 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 264
<> 144:ef7eb2e8f9f7 265 return HAL_OK;
<> 144:ef7eb2e8f9f7 266 }
<> 144:ef7eb2e8f9f7 267
<> 144:ef7eb2e8f9f7 268 /**
<> 144:ef7eb2e8f9f7 269 * @brief Deactivates TimeStamp.
AnnaBridge 182:a56a73fd2a6f 270 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 271 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 272 * @retval HAL status
<> 144:ef7eb2e8f9f7 273 */
<> 144:ef7eb2e8f9f7 274 HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 275 {
<> 144:ef7eb2e8f9f7 276 uint32_t tmpreg = 0U;
<> 144:ef7eb2e8f9f7 277
<> 144:ef7eb2e8f9f7 278 /* Process Locked */
<> 144:ef7eb2e8f9f7 279 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 280
<> 144:ef7eb2e8f9f7 281 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 282
<> 144:ef7eb2e8f9f7 283 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 284 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 285
<> 144:ef7eb2e8f9f7 286 /* In case of interrupt mode is used, the interrupt source must disabled */
<> 144:ef7eb2e8f9f7 287 __HAL_RTC_TIMESTAMP_DISABLE_IT(hrtc, RTC_IT_TS);
<> 144:ef7eb2e8f9f7 288
<> 144:ef7eb2e8f9f7 289 /* Get the RTC_CR register and clear the bits to be configured */
<> 144:ef7eb2e8f9f7 290 tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
<> 144:ef7eb2e8f9f7 291
<> 144:ef7eb2e8f9f7 292 /* Configure the Time Stamp TSEDGE and Enable bits */
<> 144:ef7eb2e8f9f7 293 hrtc->Instance->CR = (uint32_t)tmpreg;
<> 144:ef7eb2e8f9f7 294
<> 144:ef7eb2e8f9f7 295 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 296 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 297
<> 144:ef7eb2e8f9f7 298 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 299
<> 144:ef7eb2e8f9f7 300 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 301 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 302
<> 144:ef7eb2e8f9f7 303 return HAL_OK;
<> 144:ef7eb2e8f9f7 304 }
<> 144:ef7eb2e8f9f7 305
<> 144:ef7eb2e8f9f7 306 /**
<> 144:ef7eb2e8f9f7 307 * @brief Gets the RTC TimeStamp value.
AnnaBridge 182:a56a73fd2a6f 308 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 309 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 310 * @param sTimeStamp Pointer to Time structure
AnnaBridge 182:a56a73fd2a6f 311 * @param sTimeStampDate Pointer to Date structure
AnnaBridge 182:a56a73fd2a6f 312 * @param Format specifies the format of the entered parameters.
<> 144:ef7eb2e8f9f7 313 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 314 * RTC_FORMAT_BIN: Binary data format
<> 144:ef7eb2e8f9f7 315 * RTC_FORMAT_BCD: BCD data format
<> 144:ef7eb2e8f9f7 316 * @retval HAL status
<> 144:ef7eb2e8f9f7 317 */
<> 144:ef7eb2e8f9f7 318 HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef* sTimeStamp, RTC_DateTypeDef* sTimeStampDate, uint32_t Format)
<> 144:ef7eb2e8f9f7 319 {
<> 144:ef7eb2e8f9f7 320 uint32_t tmptime = 0U, tmpdate = 0U;
<> 144:ef7eb2e8f9f7 321
<> 144:ef7eb2e8f9f7 322 /* Check the parameters */
<> 144:ef7eb2e8f9f7 323 assert_param(IS_RTC_FORMAT(Format));
<> 144:ef7eb2e8f9f7 324
<> 144:ef7eb2e8f9f7 325 /* Get the TimeStamp time and date registers values */
<> 144:ef7eb2e8f9f7 326 tmptime = (uint32_t)(hrtc->Instance->TSTR & RTC_TR_RESERVED_MASK);
<> 144:ef7eb2e8f9f7 327 tmpdate = (uint32_t)(hrtc->Instance->TSDR & RTC_DR_RESERVED_MASK);
<> 144:ef7eb2e8f9f7 328
<> 144:ef7eb2e8f9f7 329 /* Fill the Time structure fields with the read parameters */
<> 144:ef7eb2e8f9f7 330 sTimeStamp->Hours = (uint8_t)((tmptime & (RTC_TR_HT | RTC_TR_HU)) >> 16U);
<> 144:ef7eb2e8f9f7 331 sTimeStamp->Minutes = (uint8_t)((tmptime & (RTC_TR_MNT | RTC_TR_MNU)) >> 8U);
<> 144:ef7eb2e8f9f7 332 sTimeStamp->Seconds = (uint8_t)(tmptime & (RTC_TR_ST | RTC_TR_SU));
<> 144:ef7eb2e8f9f7 333 sTimeStamp->TimeFormat = (uint8_t)((tmptime & (RTC_TR_PM)) >> 16U);
<> 144:ef7eb2e8f9f7 334 sTimeStamp->SubSeconds = (uint32_t) hrtc->Instance->TSSSR;
<> 144:ef7eb2e8f9f7 335
<> 144:ef7eb2e8f9f7 336 /* Fill the Date structure fields with the read parameters */
<> 144:ef7eb2e8f9f7 337 sTimeStampDate->Year = 0U;
<> 144:ef7eb2e8f9f7 338 sTimeStampDate->Month = (uint8_t)((tmpdate & (RTC_DR_MT | RTC_DR_MU)) >> 8U);
<> 144:ef7eb2e8f9f7 339 sTimeStampDate->Date = (uint8_t)(tmpdate & (RTC_DR_DT | RTC_DR_DU));
<> 144:ef7eb2e8f9f7 340 sTimeStampDate->WeekDay = (uint8_t)((tmpdate & (RTC_DR_WDU)) >> 13U);
<> 144:ef7eb2e8f9f7 341
<> 144:ef7eb2e8f9f7 342 /* Check the input parameters format */
<> 144:ef7eb2e8f9f7 343 if(Format == RTC_FORMAT_BIN)
<> 144:ef7eb2e8f9f7 344 {
<> 144:ef7eb2e8f9f7 345 /* Convert the TimeStamp structure parameters to Binary format */
<> 144:ef7eb2e8f9f7 346 sTimeStamp->Hours = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Hours);
<> 144:ef7eb2e8f9f7 347 sTimeStamp->Minutes = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Minutes);
<> 144:ef7eb2e8f9f7 348 sTimeStamp->Seconds = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Seconds);
<> 144:ef7eb2e8f9f7 349
<> 144:ef7eb2e8f9f7 350 /* Convert the DateTimeStamp structure parameters to Binary format */
<> 144:ef7eb2e8f9f7 351 sTimeStampDate->Month = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->Month);
<> 144:ef7eb2e8f9f7 352 sTimeStampDate->Date = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->Date);
<> 144:ef7eb2e8f9f7 353 sTimeStampDate->WeekDay = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->WeekDay);
<> 144:ef7eb2e8f9f7 354 }
<> 144:ef7eb2e8f9f7 355
<> 144:ef7eb2e8f9f7 356 /* Clear the TIMESTAMP Flag */
<> 144:ef7eb2e8f9f7 357 __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSF);
<> 144:ef7eb2e8f9f7 358
<> 144:ef7eb2e8f9f7 359 return HAL_OK;
<> 144:ef7eb2e8f9f7 360 }
<> 144:ef7eb2e8f9f7 361
<> 144:ef7eb2e8f9f7 362 /**
<> 144:ef7eb2e8f9f7 363 * @brief Sets Tamper
<> 144:ef7eb2e8f9f7 364 * @note By calling this API we disable the tamper interrupt for all tampers.
AnnaBridge 182:a56a73fd2a6f 365 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 366 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 367 * @param sTamper Pointer to Tamper Structure.
<> 144:ef7eb2e8f9f7 368 * @retval HAL status
<> 144:ef7eb2e8f9f7 369 */
<> 144:ef7eb2e8f9f7 370 HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper)
<> 144:ef7eb2e8f9f7 371 {
<> 144:ef7eb2e8f9f7 372 uint32_t tmpreg = 0U;
<> 144:ef7eb2e8f9f7 373
<> 144:ef7eb2e8f9f7 374 /* Check the parameters */
<> 144:ef7eb2e8f9f7 375 assert_param(IS_RTC_TAMPER(sTamper->Tamper));
<> 144:ef7eb2e8f9f7 376 assert_param(IS_RTC_TAMPER_PIN(sTamper->PinSelection));
<> 144:ef7eb2e8f9f7 377 assert_param(IS_RTC_TAMPER_TRIGGER(sTamper->Trigger));
<> 144:ef7eb2e8f9f7 378 assert_param(IS_RTC_TAMPER_FILTER(sTamper->Filter));
<> 144:ef7eb2e8f9f7 379 assert_param(IS_RTC_TAMPER_SAMPLING_FREQ(sTamper->SamplingFrequency));
<> 144:ef7eb2e8f9f7 380 assert_param(IS_RTC_TAMPER_PRECHARGE_DURATION(sTamper->PrechargeDuration));
<> 144:ef7eb2e8f9f7 381 assert_param(IS_RTC_TAMPER_PULLUP_STATE(sTamper->TamperPullUp));
<> 144:ef7eb2e8f9f7 382 assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sTamper->TimeStampOnTamperDetection));
<> 144:ef7eb2e8f9f7 383
<> 144:ef7eb2e8f9f7 384 /* Process Locked */
<> 144:ef7eb2e8f9f7 385 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 386
<> 144:ef7eb2e8f9f7 387 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 388
<> 144:ef7eb2e8f9f7 389 if(sTamper->Trigger != RTC_TAMPERTRIGGER_RISINGEDGE)
<> 144:ef7eb2e8f9f7 390 {
<> 144:ef7eb2e8f9f7 391 sTamper->Trigger = (uint32_t)(sTamper->Tamper << 1U);
<> 144:ef7eb2e8f9f7 392 }
<> 144:ef7eb2e8f9f7 393
<> 144:ef7eb2e8f9f7 394 tmpreg = ((uint32_t)sTamper->Tamper | (uint32_t)sTamper->PinSelection | (uint32_t)sTamper->Trigger |\
<> 144:ef7eb2e8f9f7 395 (uint32_t)sTamper->Filter | (uint32_t)sTamper->SamplingFrequency | (uint32_t)sTamper->PrechargeDuration |\
<> 144:ef7eb2e8f9f7 396 (uint32_t)sTamper->TamperPullUp | sTamper->TimeStampOnTamperDetection);
<> 144:ef7eb2e8f9f7 397
<> 144:ef7eb2e8f9f7 398 hrtc->Instance->TAFCR &= (uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1U) | (uint32_t)RTC_TAFCR_TAMPTS |\
<> 144:ef7eb2e8f9f7 399 (uint32_t)RTC_TAFCR_TAMPFREQ | (uint32_t)RTC_TAFCR_TAMPFLT | (uint32_t)RTC_TAFCR_TAMPPRCH |\
<> 144:ef7eb2e8f9f7 400 (uint32_t)RTC_TAFCR_TAMPPUDIS | (uint32_t)RTC_TAFCR_TAMPINSEL | (uint32_t)RTC_TAFCR_TAMPIE);
<> 144:ef7eb2e8f9f7 401
<> 144:ef7eb2e8f9f7 402 hrtc->Instance->TAFCR |= tmpreg;
<> 144:ef7eb2e8f9f7 403
<> 144:ef7eb2e8f9f7 404 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 405
<> 144:ef7eb2e8f9f7 406 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 407 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 408
<> 144:ef7eb2e8f9f7 409 return HAL_OK;
<> 144:ef7eb2e8f9f7 410 }
<> 144:ef7eb2e8f9f7 411
<> 144:ef7eb2e8f9f7 412 /**
<> 144:ef7eb2e8f9f7 413 * @brief Sets Tamper with interrupt.
<> 144:ef7eb2e8f9f7 414 * @note By calling this API we force the tamper interrupt for all tampers.
AnnaBridge 182:a56a73fd2a6f 415 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 416 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 417 * @param sTamper Pointer to RTC Tamper.
<> 144:ef7eb2e8f9f7 418 * @retval HAL status
<> 144:ef7eb2e8f9f7 419 */
<> 144:ef7eb2e8f9f7 420 HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper)
<> 144:ef7eb2e8f9f7 421 {
<> 144:ef7eb2e8f9f7 422 uint32_t tmpreg = 0U;
<> 144:ef7eb2e8f9f7 423
<> 144:ef7eb2e8f9f7 424 /* Check the parameters */
<> 144:ef7eb2e8f9f7 425 assert_param(IS_RTC_TAMPER(sTamper->Tamper));
<> 144:ef7eb2e8f9f7 426 assert_param(IS_RTC_TAMPER_PIN(sTamper->PinSelection));
<> 144:ef7eb2e8f9f7 427 assert_param(IS_RTC_TAMPER_TRIGGER(sTamper->Trigger));
<> 144:ef7eb2e8f9f7 428 assert_param(IS_RTC_TAMPER_FILTER(sTamper->Filter));
<> 144:ef7eb2e8f9f7 429 assert_param(IS_RTC_TAMPER_SAMPLING_FREQ(sTamper->SamplingFrequency));
<> 144:ef7eb2e8f9f7 430 assert_param(IS_RTC_TAMPER_PRECHARGE_DURATION(sTamper->PrechargeDuration));
<> 144:ef7eb2e8f9f7 431 assert_param(IS_RTC_TAMPER_PULLUP_STATE(sTamper->TamperPullUp));
<> 144:ef7eb2e8f9f7 432 assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sTamper->TimeStampOnTamperDetection));
<> 144:ef7eb2e8f9f7 433
<> 144:ef7eb2e8f9f7 434 /* Process Locked */
<> 144:ef7eb2e8f9f7 435 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 436
<> 144:ef7eb2e8f9f7 437 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 438
<> 144:ef7eb2e8f9f7 439 /* Configure the tamper trigger */
<> 144:ef7eb2e8f9f7 440 if(sTamper->Trigger != RTC_TAMPERTRIGGER_RISINGEDGE)
<> 144:ef7eb2e8f9f7 441 {
<> 144:ef7eb2e8f9f7 442 sTamper->Trigger = (uint32_t)(sTamper->Tamper << 1U);
<> 144:ef7eb2e8f9f7 443 }
<> 144:ef7eb2e8f9f7 444
<> 144:ef7eb2e8f9f7 445 tmpreg = ((uint32_t)sTamper->Tamper | (uint32_t)sTamper->PinSelection | (uint32_t)sTamper->Trigger |\
<> 144:ef7eb2e8f9f7 446 (uint32_t)sTamper->Filter | (uint32_t)sTamper->SamplingFrequency | (uint32_t)sTamper->PrechargeDuration |\
<> 144:ef7eb2e8f9f7 447 (uint32_t)sTamper->TamperPullUp | sTamper->TimeStampOnTamperDetection);
<> 144:ef7eb2e8f9f7 448
<> 144:ef7eb2e8f9f7 449 hrtc->Instance->TAFCR &= (uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1U) | (uint32_t)RTC_TAFCR_TAMPTS |\
<> 144:ef7eb2e8f9f7 450 (uint32_t)RTC_TAFCR_TAMPFREQ | (uint32_t)RTC_TAFCR_TAMPFLT | (uint32_t)RTC_TAFCR_TAMPPRCH |\
<> 144:ef7eb2e8f9f7 451 (uint32_t)RTC_TAFCR_TAMPPUDIS | (uint32_t)RTC_TAFCR_TAMPINSEL);
<> 144:ef7eb2e8f9f7 452
<> 144:ef7eb2e8f9f7 453 hrtc->Instance->TAFCR |= tmpreg;
<> 144:ef7eb2e8f9f7 454
<> 144:ef7eb2e8f9f7 455 /* Configure the Tamper Interrupt in the RTC_TAFCR */
<> 144:ef7eb2e8f9f7 456 hrtc->Instance->TAFCR |= (uint32_t)RTC_TAFCR_TAMPIE;
<> 144:ef7eb2e8f9f7 457
<> 144:ef7eb2e8f9f7 458 if(sTamper->Tamper == RTC_TAMPER_1)
<> 144:ef7eb2e8f9f7 459 {
<> 144:ef7eb2e8f9f7 460 /* Clear RTC Tamper 1 flag */
<> 144:ef7eb2e8f9f7 461 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP1F);
<> 144:ef7eb2e8f9f7 462 }
<> 144:ef7eb2e8f9f7 463 else
<> 144:ef7eb2e8f9f7 464 {
<> 144:ef7eb2e8f9f7 465 /* Clear RTC Tamper 2 flag */
<> 144:ef7eb2e8f9f7 466 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP2F);
<> 144:ef7eb2e8f9f7 467 }
<> 144:ef7eb2e8f9f7 468
<> 144:ef7eb2e8f9f7 469 /* RTC Tamper Interrupt Configuration: EXTI configuration */
<> 144:ef7eb2e8f9f7 470 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT();
<> 144:ef7eb2e8f9f7 471
<> 144:ef7eb2e8f9f7 472 EXTI->RTSR |= RTC_EXTI_LINE_TAMPER_TIMESTAMP_EVENT;
<> 144:ef7eb2e8f9f7 473
<> 144:ef7eb2e8f9f7 474 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 475
<> 144:ef7eb2e8f9f7 476 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 477 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 478
<> 144:ef7eb2e8f9f7 479 return HAL_OK;
<> 144:ef7eb2e8f9f7 480 }
<> 144:ef7eb2e8f9f7 481
<> 144:ef7eb2e8f9f7 482 /**
<> 144:ef7eb2e8f9f7 483 * @brief Deactivates Tamper.
AnnaBridge 182:a56a73fd2a6f 484 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 485 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 486 * @param Tamper Selected tamper pin.
<> 144:ef7eb2e8f9f7 487 * This parameter can be RTC_Tamper_1 and/or RTC_TAMPER_2.
<> 144:ef7eb2e8f9f7 488 * @retval HAL status
<> 144:ef7eb2e8f9f7 489 */
<> 144:ef7eb2e8f9f7 490 HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper)
<> 144:ef7eb2e8f9f7 491 {
<> 144:ef7eb2e8f9f7 492 assert_param(IS_RTC_TAMPER(Tamper));
<> 144:ef7eb2e8f9f7 493
<> 144:ef7eb2e8f9f7 494 /* Process Locked */
<> 144:ef7eb2e8f9f7 495 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 496
<> 144:ef7eb2e8f9f7 497 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 498
<> 144:ef7eb2e8f9f7 499 /* Disable the selected Tamper pin */
<> 144:ef7eb2e8f9f7 500 hrtc->Instance->TAFCR &= (uint32_t)~Tamper;
<> 144:ef7eb2e8f9f7 501
<> 144:ef7eb2e8f9f7 502 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 503
<> 144:ef7eb2e8f9f7 504 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 505 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 506
<> 144:ef7eb2e8f9f7 507 return HAL_OK;
<> 144:ef7eb2e8f9f7 508 }
<> 144:ef7eb2e8f9f7 509
<> 144:ef7eb2e8f9f7 510 /**
<> 144:ef7eb2e8f9f7 511 * @brief This function handles TimeStamp interrupt request.
AnnaBridge 182:a56a73fd2a6f 512 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 513 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 514 * @retval None
<> 144:ef7eb2e8f9f7 515 */
<> 144:ef7eb2e8f9f7 516 void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 517 {
<> 144:ef7eb2e8f9f7 518 if(__HAL_RTC_TIMESTAMP_GET_IT(hrtc, RTC_IT_TS))
<> 144:ef7eb2e8f9f7 519 {
<> 144:ef7eb2e8f9f7 520 /* Get the status of the Interrupt */
<> 144:ef7eb2e8f9f7 521 if((uint32_t)(hrtc->Instance->CR & RTC_IT_TS) != (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 522 {
<> 144:ef7eb2e8f9f7 523 /* TIMESTAMP callback */
<> 144:ef7eb2e8f9f7 524 HAL_RTCEx_TimeStampEventCallback(hrtc);
<> 144:ef7eb2e8f9f7 525
<> 144:ef7eb2e8f9f7 526 /* Clear the TIMESTAMP interrupt pending bit */
<> 144:ef7eb2e8f9f7 527 __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc,RTC_FLAG_TSF);
<> 144:ef7eb2e8f9f7 528 }
<> 144:ef7eb2e8f9f7 529 }
<> 144:ef7eb2e8f9f7 530
<> 144:ef7eb2e8f9f7 531 /* Get the status of the Interrupt */
<> 144:ef7eb2e8f9f7 532 if(__HAL_RTC_TAMPER_GET_IT(hrtc,RTC_IT_TAMP1))
<> 144:ef7eb2e8f9f7 533 {
<> 144:ef7eb2e8f9f7 534 /* Get the TAMPER Interrupt enable bit and pending bit */
<> 144:ef7eb2e8f9f7 535 if(((hrtc->Instance->TAFCR & (RTC_TAFCR_TAMPIE))) != (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 536 {
<> 144:ef7eb2e8f9f7 537 /* Tamper callback */
<> 144:ef7eb2e8f9f7 538 HAL_RTCEx_Tamper1EventCallback(hrtc);
<> 144:ef7eb2e8f9f7 539
<> 144:ef7eb2e8f9f7 540 /* Clear the Tamper interrupt pending bit */
<> 144:ef7eb2e8f9f7 541 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc,RTC_FLAG_TAMP1F);
<> 144:ef7eb2e8f9f7 542 }
<> 144:ef7eb2e8f9f7 543 }
<> 144:ef7eb2e8f9f7 544
<> 144:ef7eb2e8f9f7 545 /* Get the status of the Interrupt */
<> 144:ef7eb2e8f9f7 546 if(__HAL_RTC_TAMPER_GET_IT(hrtc, RTC_IT_TAMP2))
<> 144:ef7eb2e8f9f7 547 {
<> 144:ef7eb2e8f9f7 548 /* Get the TAMPER Interrupt enable bit and pending bit */
<> 144:ef7eb2e8f9f7 549 if(((hrtc->Instance->TAFCR & RTC_TAFCR_TAMPIE)) != (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 550 {
<> 144:ef7eb2e8f9f7 551 /* Tamper callback */
<> 144:ef7eb2e8f9f7 552 HAL_RTCEx_Tamper2EventCallback(hrtc);
<> 144:ef7eb2e8f9f7 553
<> 144:ef7eb2e8f9f7 554 /* Clear the Tamper interrupt pending bit */
<> 144:ef7eb2e8f9f7 555 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP2F);
<> 144:ef7eb2e8f9f7 556 }
<> 144:ef7eb2e8f9f7 557 }
<> 144:ef7eb2e8f9f7 558 /* Clear the EXTI's Flag for RTC TimeStamp and Tamper */
<> 144:ef7eb2e8f9f7 559 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG();
<> 144:ef7eb2e8f9f7 560
<> 144:ef7eb2e8f9f7 561 /* Change RTC state */
<> 144:ef7eb2e8f9f7 562 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 563 }
<> 144:ef7eb2e8f9f7 564
<> 144:ef7eb2e8f9f7 565 /**
<> 144:ef7eb2e8f9f7 566 * @brief TimeStamp callback.
AnnaBridge 182:a56a73fd2a6f 567 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 568 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 569 * @retval None
<> 144:ef7eb2e8f9f7 570 */
<> 144:ef7eb2e8f9f7 571 __weak void HAL_RTCEx_TimeStampEventCallback(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 572 {
<> 144:ef7eb2e8f9f7 573 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 574 UNUSED(hrtc);
<> 144:ef7eb2e8f9f7 575 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 576 the HAL_RTC_TimeStampEventCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 577 */
<> 144:ef7eb2e8f9f7 578 }
<> 144:ef7eb2e8f9f7 579
<> 144:ef7eb2e8f9f7 580 /**
<> 144:ef7eb2e8f9f7 581 * @brief Tamper 1 callback.
AnnaBridge 182:a56a73fd2a6f 582 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 583 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 584 * @retval None
<> 144:ef7eb2e8f9f7 585 */
<> 144:ef7eb2e8f9f7 586 __weak void HAL_RTCEx_Tamper1EventCallback(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 587 {
<> 144:ef7eb2e8f9f7 588 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 589 UNUSED(hrtc);
<> 144:ef7eb2e8f9f7 590 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 591 the HAL_RTC_Tamper1EventCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 592 */
<> 144:ef7eb2e8f9f7 593 }
<> 144:ef7eb2e8f9f7 594
<> 144:ef7eb2e8f9f7 595 /**
<> 144:ef7eb2e8f9f7 596 * @brief Tamper 2 callback.
AnnaBridge 182:a56a73fd2a6f 597 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 598 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 599 * @retval None
<> 144:ef7eb2e8f9f7 600 */
<> 144:ef7eb2e8f9f7 601 __weak void HAL_RTCEx_Tamper2EventCallback(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 602 {
<> 144:ef7eb2e8f9f7 603 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 604 UNUSED(hrtc);
<> 144:ef7eb2e8f9f7 605 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 606 the HAL_RTC_Tamper2EventCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 607 */
<> 144:ef7eb2e8f9f7 608 }
<> 144:ef7eb2e8f9f7 609
<> 144:ef7eb2e8f9f7 610 /**
<> 144:ef7eb2e8f9f7 611 * @brief This function handles TimeStamp polling request.
AnnaBridge 182:a56a73fd2a6f 612 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 613 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 614 * @param Timeout Timeout duration
<> 144:ef7eb2e8f9f7 615 * @retval HAL status
<> 144:ef7eb2e8f9f7 616 */
<> 144:ef7eb2e8f9f7 617 HAL_StatusTypeDef HAL_RTCEx_PollForTimeStampEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 618 {
<> 144:ef7eb2e8f9f7 619 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 620
<> 144:ef7eb2e8f9f7 621 /* Get tick */
<> 144:ef7eb2e8f9f7 622 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 623
<> 144:ef7eb2e8f9f7 624 while(__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSF) == RESET)
<> 144:ef7eb2e8f9f7 625 {
<> 144:ef7eb2e8f9f7 626 if(__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSOVF) != RESET)
<> 144:ef7eb2e8f9f7 627 {
<> 144:ef7eb2e8f9f7 628 /* Clear the TIMESTAMP Overrun Flag */
<> 144:ef7eb2e8f9f7 629 __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSOVF);
<> 144:ef7eb2e8f9f7 630
<> 144:ef7eb2e8f9f7 631 /* Change TIMESTAMP state */
<> 144:ef7eb2e8f9f7 632 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 633
<> 144:ef7eb2e8f9f7 634 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 635 }
<> 144:ef7eb2e8f9f7 636
<> 144:ef7eb2e8f9f7 637 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 638 {
<> 144:ef7eb2e8f9f7 639 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
<> 144:ef7eb2e8f9f7 640 {
<> 144:ef7eb2e8f9f7 641 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 642 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 643 }
<> 144:ef7eb2e8f9f7 644 }
<> 144:ef7eb2e8f9f7 645 }
<> 144:ef7eb2e8f9f7 646
<> 144:ef7eb2e8f9f7 647 /* Change RTC state */
<> 144:ef7eb2e8f9f7 648 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 649
<> 144:ef7eb2e8f9f7 650 return HAL_OK;
<> 144:ef7eb2e8f9f7 651 }
<> 144:ef7eb2e8f9f7 652
<> 144:ef7eb2e8f9f7 653 /**
<> 144:ef7eb2e8f9f7 654 * @brief This function handles Tamper1 Polling.
AnnaBridge 182:a56a73fd2a6f 655 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 656 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 657 * @param Timeout Timeout duration
<> 144:ef7eb2e8f9f7 658 * @retval HAL status
<> 144:ef7eb2e8f9f7 659 */
<> 144:ef7eb2e8f9f7 660 HAL_StatusTypeDef HAL_RTCEx_PollForTamper1Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 661 {
<> 144:ef7eb2e8f9f7 662 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 663
<> 144:ef7eb2e8f9f7 664 /* Get tick */
<> 144:ef7eb2e8f9f7 665 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 666
<> 144:ef7eb2e8f9f7 667 /* Get the status of the Interrupt */
<> 144:ef7eb2e8f9f7 668 while(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP1F)== RESET)
<> 144:ef7eb2e8f9f7 669 {
<> 144:ef7eb2e8f9f7 670 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 671 {
<> 144:ef7eb2e8f9f7 672 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
<> 144:ef7eb2e8f9f7 673 {
<> 144:ef7eb2e8f9f7 674 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 675 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 676 }
<> 144:ef7eb2e8f9f7 677 }
<> 144:ef7eb2e8f9f7 678 }
<> 144:ef7eb2e8f9f7 679
<> 144:ef7eb2e8f9f7 680 /* Clear the Tamper Flag */
<> 144:ef7eb2e8f9f7 681 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc,RTC_FLAG_TAMP1F);
<> 144:ef7eb2e8f9f7 682
<> 144:ef7eb2e8f9f7 683 /* Change RTC state */
<> 144:ef7eb2e8f9f7 684 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 685
<> 144:ef7eb2e8f9f7 686 return HAL_OK;
<> 144:ef7eb2e8f9f7 687 }
<> 144:ef7eb2e8f9f7 688
<> 144:ef7eb2e8f9f7 689 /**
<> 144:ef7eb2e8f9f7 690 * @brief This function handles Tamper2 Polling.
AnnaBridge 182:a56a73fd2a6f 691 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 692 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 693 * @param Timeout Timeout duration
<> 144:ef7eb2e8f9f7 694 * @retval HAL status
<> 144:ef7eb2e8f9f7 695 */
<> 144:ef7eb2e8f9f7 696 HAL_StatusTypeDef HAL_RTCEx_PollForTamper2Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 697 {
<> 144:ef7eb2e8f9f7 698 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 699
<> 144:ef7eb2e8f9f7 700 /* Get tick */
<> 144:ef7eb2e8f9f7 701 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 702
<> 144:ef7eb2e8f9f7 703 /* Get the status of the Interrupt */
<> 144:ef7eb2e8f9f7 704 while(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP2F) == RESET)
<> 144:ef7eb2e8f9f7 705 {
<> 144:ef7eb2e8f9f7 706 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 707 {
<> 144:ef7eb2e8f9f7 708 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
<> 144:ef7eb2e8f9f7 709 {
<> 144:ef7eb2e8f9f7 710 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 711 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 712 }
<> 144:ef7eb2e8f9f7 713 }
<> 144:ef7eb2e8f9f7 714 }
<> 144:ef7eb2e8f9f7 715
<> 144:ef7eb2e8f9f7 716 /* Clear the Tamper Flag */
<> 144:ef7eb2e8f9f7 717 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc,RTC_FLAG_TAMP2F);
<> 144:ef7eb2e8f9f7 718
<> 144:ef7eb2e8f9f7 719 /* Change RTC state */
<> 144:ef7eb2e8f9f7 720 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 721
<> 144:ef7eb2e8f9f7 722 return HAL_OK;
<> 144:ef7eb2e8f9f7 723 }
<> 144:ef7eb2e8f9f7 724
<> 144:ef7eb2e8f9f7 725 /**
<> 144:ef7eb2e8f9f7 726 * @}
<> 144:ef7eb2e8f9f7 727 */
<> 144:ef7eb2e8f9f7 728
<> 144:ef7eb2e8f9f7 729 /** @defgroup RTCEx_Exported_Functions_Group2 RTC Wake-up functions
<> 144:ef7eb2e8f9f7 730 * @brief RTC Wake-up functions
<> 144:ef7eb2e8f9f7 731 *
<> 144:ef7eb2e8f9f7 732 @verbatim
<> 144:ef7eb2e8f9f7 733 ===============================================================================
<> 144:ef7eb2e8f9f7 734 ##### RTC Wake-up functions #####
<> 144:ef7eb2e8f9f7 735 ===============================================================================
<> 144:ef7eb2e8f9f7 736
<> 144:ef7eb2e8f9f7 737 [..] This section provides functions allowing to configure Wake-up feature
<> 144:ef7eb2e8f9f7 738
<> 144:ef7eb2e8f9f7 739 @endverbatim
<> 144:ef7eb2e8f9f7 740 * @{
<> 144:ef7eb2e8f9f7 741 */
<> 144:ef7eb2e8f9f7 742
<> 144:ef7eb2e8f9f7 743 /**
<> 144:ef7eb2e8f9f7 744 * @brief Sets wake up timer.
AnnaBridge 182:a56a73fd2a6f 745 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 746 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 747 * @param WakeUpCounter Wake up counter
AnnaBridge 182:a56a73fd2a6f 748 * @param WakeUpClock Wake up clock
<> 144:ef7eb2e8f9f7 749 * @retval HAL status
<> 144:ef7eb2e8f9f7 750 */
<> 144:ef7eb2e8f9f7 751 HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock)
<> 144:ef7eb2e8f9f7 752 {
<> 144:ef7eb2e8f9f7 753 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 754
<> 144:ef7eb2e8f9f7 755 /* Check the parameters */
<> 144:ef7eb2e8f9f7 756 assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock));
<> 144:ef7eb2e8f9f7 757 assert_param(IS_RTC_WAKEUP_COUNTER(WakeUpCounter));
<> 144:ef7eb2e8f9f7 758
<> 144:ef7eb2e8f9f7 759 /* Process Locked */
<> 144:ef7eb2e8f9f7 760 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 761
<> 144:ef7eb2e8f9f7 762 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 763
<> 144:ef7eb2e8f9f7 764 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 765 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 766
<> 144:ef7eb2e8f9f7 767 /*Check RTC WUTWF flag is reset only when wake up timer enabled*/
<> 144:ef7eb2e8f9f7 768 if((hrtc->Instance->CR & RTC_CR_WUTE) != RESET)
<> 144:ef7eb2e8f9f7 769 {
<> 144:ef7eb2e8f9f7 770 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 771
<> 144:ef7eb2e8f9f7 772 /* Wait till RTC WUTWF flag is reset and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 773 while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == SET)
<> 144:ef7eb2e8f9f7 774 {
<> 144:ef7eb2e8f9f7 775 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 776 {
<> 144:ef7eb2e8f9f7 777 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 778 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 779
<> 144:ef7eb2e8f9f7 780 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 781
<> 144:ef7eb2e8f9f7 782 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 783 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 784
<> 144:ef7eb2e8f9f7 785 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 786 }
<> 144:ef7eb2e8f9f7 787 }
<> 144:ef7eb2e8f9f7 788 }
<> 144:ef7eb2e8f9f7 789
<> 144:ef7eb2e8f9f7 790 __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 791
<> 144:ef7eb2e8f9f7 792 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 793
<> 144:ef7eb2e8f9f7 794 /* Wait till RTC WUTWF flag is set and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 795 while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET)
<> 144:ef7eb2e8f9f7 796 {
<> 144:ef7eb2e8f9f7 797 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 798 {
<> 144:ef7eb2e8f9f7 799 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 800 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 801
<> 144:ef7eb2e8f9f7 802 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 803
<> 144:ef7eb2e8f9f7 804 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 805 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 806
<> 144:ef7eb2e8f9f7 807 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 808 }
<> 144:ef7eb2e8f9f7 809 }
<> 144:ef7eb2e8f9f7 810
<> 144:ef7eb2e8f9f7 811 /* Clear the Wake-up Timer clock source bits in CR register */
<> 144:ef7eb2e8f9f7 812 hrtc->Instance->CR &= (uint32_t)~RTC_CR_WUCKSEL;
<> 144:ef7eb2e8f9f7 813
<> 144:ef7eb2e8f9f7 814 /* Configure the clock source */
<> 144:ef7eb2e8f9f7 815 hrtc->Instance->CR |= (uint32_t)WakeUpClock;
<> 144:ef7eb2e8f9f7 816
<> 144:ef7eb2e8f9f7 817 /* Configure the Wake-up Timer counter */
<> 144:ef7eb2e8f9f7 818 hrtc->Instance->WUTR = (uint32_t)WakeUpCounter;
<> 144:ef7eb2e8f9f7 819
<> 144:ef7eb2e8f9f7 820 /* Enable the Wake-up Timer */
<> 144:ef7eb2e8f9f7 821 __HAL_RTC_WAKEUPTIMER_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 822
<> 144:ef7eb2e8f9f7 823 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 824 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 825
<> 144:ef7eb2e8f9f7 826 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 827
<> 144:ef7eb2e8f9f7 828 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 829 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 830
<> 144:ef7eb2e8f9f7 831 return HAL_OK;
<> 144:ef7eb2e8f9f7 832 }
<> 144:ef7eb2e8f9f7 833
<> 144:ef7eb2e8f9f7 834 /**
<> 144:ef7eb2e8f9f7 835 * @brief Sets wake up timer with interrupt
AnnaBridge 182:a56a73fd2a6f 836 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 837 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 838 * @param WakeUpCounter Wake up counter
AnnaBridge 182:a56a73fd2a6f 839 * @param WakeUpClock Wake up clock
<> 144:ef7eb2e8f9f7 840 * @retval HAL status
<> 144:ef7eb2e8f9f7 841 */
<> 144:ef7eb2e8f9f7 842 HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock)
<> 144:ef7eb2e8f9f7 843 {
<> 144:ef7eb2e8f9f7 844 __IO uint32_t count;
<> 144:ef7eb2e8f9f7 845
<> 144:ef7eb2e8f9f7 846 /* Check the parameters */
<> 144:ef7eb2e8f9f7 847 assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock));
<> 144:ef7eb2e8f9f7 848 assert_param(IS_RTC_WAKEUP_COUNTER(WakeUpCounter));
<> 144:ef7eb2e8f9f7 849
<> 144:ef7eb2e8f9f7 850 /* Process Locked */
<> 144:ef7eb2e8f9f7 851 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 852
<> 144:ef7eb2e8f9f7 853 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 854
<> 144:ef7eb2e8f9f7 855 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 856 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 857
<> 144:ef7eb2e8f9f7 858 /* Check RTC WUTWF flag is reset only when wake up timer enabled */
<> 144:ef7eb2e8f9f7 859 if((hrtc->Instance->CR & RTC_CR_WUTE) != RESET)
<> 144:ef7eb2e8f9f7 860 {
<> 144:ef7eb2e8f9f7 861 /* Wait till RTC WUTWF flag is reset and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 862 count = RTC_TIMEOUT_VALUE * (SystemCoreClock / 32U / 1000U);
<> 144:ef7eb2e8f9f7 863 do
<> 144:ef7eb2e8f9f7 864 {
<> 144:ef7eb2e8f9f7 865 if(count-- == 0U)
<> 144:ef7eb2e8f9f7 866 {
<> 144:ef7eb2e8f9f7 867 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 868 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 869
<> 144:ef7eb2e8f9f7 870 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 871
<> 144:ef7eb2e8f9f7 872 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 873 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 874
<> 144:ef7eb2e8f9f7 875 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 876 }
<> 144:ef7eb2e8f9f7 877 }
<> 144:ef7eb2e8f9f7 878 while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == SET);
<> 144:ef7eb2e8f9f7 879 }
<> 144:ef7eb2e8f9f7 880
<> 144:ef7eb2e8f9f7 881 __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 882
<> 144:ef7eb2e8f9f7 883 /* Wait till RTC WUTWF flag is set and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 884 count = RTC_TIMEOUT_VALUE * (SystemCoreClock / 32U / 1000U);
<> 144:ef7eb2e8f9f7 885 do
<> 144:ef7eb2e8f9f7 886 {
<> 144:ef7eb2e8f9f7 887 if(count-- == 0U)
<> 144:ef7eb2e8f9f7 888 {
<> 144:ef7eb2e8f9f7 889 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 890 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 891
<> 144:ef7eb2e8f9f7 892 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 893
<> 144:ef7eb2e8f9f7 894 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 895 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 896
<> 144:ef7eb2e8f9f7 897 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 898 }
<> 144:ef7eb2e8f9f7 899 }
<> 144:ef7eb2e8f9f7 900 while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET);
<> 144:ef7eb2e8f9f7 901
<> 144:ef7eb2e8f9f7 902 /* Configure the Wake-up Timer counter */
<> 144:ef7eb2e8f9f7 903 hrtc->Instance->WUTR = (uint32_t)WakeUpCounter;
<> 144:ef7eb2e8f9f7 904
<> 144:ef7eb2e8f9f7 905 /* Clear the Wake-up Timer clock source bits in CR register */
<> 144:ef7eb2e8f9f7 906 hrtc->Instance->CR &= (uint32_t)~RTC_CR_WUCKSEL;
<> 144:ef7eb2e8f9f7 907
<> 144:ef7eb2e8f9f7 908 /* Configure the clock source */
<> 144:ef7eb2e8f9f7 909 hrtc->Instance->CR |= (uint32_t)WakeUpClock;
<> 144:ef7eb2e8f9f7 910
<> 144:ef7eb2e8f9f7 911 /* RTC WakeUpTimer Interrupt Configuration: EXTI configuration */
<> 144:ef7eb2e8f9f7 912 __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT();
<> 144:ef7eb2e8f9f7 913
<> 144:ef7eb2e8f9f7 914 EXTI->RTSR |= RTC_EXTI_LINE_WAKEUPTIMER_EVENT;
<> 144:ef7eb2e8f9f7 915
<> 144:ef7eb2e8f9f7 916 /* Clear RTC Wake Up timer Flag */
<> 144:ef7eb2e8f9f7 917 __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF);
<> 144:ef7eb2e8f9f7 918
<> 144:ef7eb2e8f9f7 919 /* Configure the Interrupt in the RTC_CR register */
<> 144:ef7eb2e8f9f7 920 __HAL_RTC_WAKEUPTIMER_ENABLE_IT(hrtc,RTC_IT_WUT);
<> 144:ef7eb2e8f9f7 921
<> 144:ef7eb2e8f9f7 922 /* Enable the Wake-up Timer */
<> 144:ef7eb2e8f9f7 923 __HAL_RTC_WAKEUPTIMER_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 924
<> 144:ef7eb2e8f9f7 925 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 926 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 927
<> 144:ef7eb2e8f9f7 928 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 929
<> 144:ef7eb2e8f9f7 930 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 931 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 932
<> 144:ef7eb2e8f9f7 933 return HAL_OK;
<> 144:ef7eb2e8f9f7 934 }
<> 144:ef7eb2e8f9f7 935
<> 144:ef7eb2e8f9f7 936 /**
<> 144:ef7eb2e8f9f7 937 * @brief Deactivates wake up timer counter.
AnnaBridge 182:a56a73fd2a6f 938 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 939 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 940 * @retval HAL status
<> 144:ef7eb2e8f9f7 941 */
<> 144:ef7eb2e8f9f7 942 uint32_t HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 943 {
<> 144:ef7eb2e8f9f7 944 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 945
<> 144:ef7eb2e8f9f7 946 /* Process Locked */
<> 144:ef7eb2e8f9f7 947 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 948
<> 144:ef7eb2e8f9f7 949 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 950
<> 144:ef7eb2e8f9f7 951 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 952 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 953
<> 144:ef7eb2e8f9f7 954 /* Disable the Wake-up Timer */
<> 144:ef7eb2e8f9f7 955 __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 956
<> 144:ef7eb2e8f9f7 957 /* In case of interrupt mode is used, the interrupt source must disabled */
<> 144:ef7eb2e8f9f7 958 __HAL_RTC_WAKEUPTIMER_DISABLE_IT(hrtc,RTC_IT_WUT);
<> 144:ef7eb2e8f9f7 959
<> 144:ef7eb2e8f9f7 960 /* Get tick */
<> 144:ef7eb2e8f9f7 961 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 962
<> 144:ef7eb2e8f9f7 963 /* Wait till RTC WUTWF flag is set and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 964 while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET)
<> 144:ef7eb2e8f9f7 965 {
<> 144:ef7eb2e8f9f7 966 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 967 {
<> 144:ef7eb2e8f9f7 968 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 969 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 970
<> 144:ef7eb2e8f9f7 971 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 972
<> 144:ef7eb2e8f9f7 973 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 974 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 975
<> 144:ef7eb2e8f9f7 976 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 977 }
<> 144:ef7eb2e8f9f7 978 }
<> 144:ef7eb2e8f9f7 979
<> 144:ef7eb2e8f9f7 980 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 981 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 982
<> 144:ef7eb2e8f9f7 983 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 984
<> 144:ef7eb2e8f9f7 985 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 986 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 987
<> 144:ef7eb2e8f9f7 988 return HAL_OK;
<> 144:ef7eb2e8f9f7 989 }
<> 144:ef7eb2e8f9f7 990
<> 144:ef7eb2e8f9f7 991 /**
<> 144:ef7eb2e8f9f7 992 * @brief Gets wake up timer counter.
AnnaBridge 182:a56a73fd2a6f 993 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 994 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 995 * @retval Counter value
<> 144:ef7eb2e8f9f7 996 */
<> 144:ef7eb2e8f9f7 997 uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 998 {
<> 144:ef7eb2e8f9f7 999 /* Get the counter value */
<> 144:ef7eb2e8f9f7 1000 return ((uint32_t)(hrtc->Instance->WUTR & RTC_WUTR_WUT));
<> 144:ef7eb2e8f9f7 1001 }
<> 144:ef7eb2e8f9f7 1002
<> 144:ef7eb2e8f9f7 1003 /**
<> 144:ef7eb2e8f9f7 1004 * @brief This function handles Wake Up Timer interrupt request.
AnnaBridge 182:a56a73fd2a6f 1005 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1006 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 1007 * @retval None
<> 144:ef7eb2e8f9f7 1008 */
<> 144:ef7eb2e8f9f7 1009 void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 1010 {
<> 144:ef7eb2e8f9f7 1011 if(__HAL_RTC_WAKEUPTIMER_GET_IT(hrtc, RTC_IT_WUT))
<> 144:ef7eb2e8f9f7 1012 {
<> 144:ef7eb2e8f9f7 1013 /* Get the status of the Interrupt */
<> 144:ef7eb2e8f9f7 1014 if((uint32_t)(hrtc->Instance->CR & RTC_IT_WUT) != (uint32_t)RESET)
<> 144:ef7eb2e8f9f7 1015 {
<> 144:ef7eb2e8f9f7 1016 /* WAKEUPTIMER callback */
<> 144:ef7eb2e8f9f7 1017 HAL_RTCEx_WakeUpTimerEventCallback(hrtc);
<> 144:ef7eb2e8f9f7 1018
<> 144:ef7eb2e8f9f7 1019 /* Clear the WAKEUPTIMER interrupt pending bit */
<> 144:ef7eb2e8f9f7 1020 __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF);
<> 144:ef7eb2e8f9f7 1021 }
<> 144:ef7eb2e8f9f7 1022 }
<> 144:ef7eb2e8f9f7 1023
<> 144:ef7eb2e8f9f7 1024 /* Clear the EXTI's line Flag for RTC WakeUpTimer */
<> 144:ef7eb2e8f9f7 1025 __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG();
<> 144:ef7eb2e8f9f7 1026
<> 144:ef7eb2e8f9f7 1027 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1028 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1029 }
<> 144:ef7eb2e8f9f7 1030
<> 144:ef7eb2e8f9f7 1031 /**
<> 144:ef7eb2e8f9f7 1032 * @brief Wake Up Timer callback.
AnnaBridge 182:a56a73fd2a6f 1033 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1034 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 1035 * @retval None
<> 144:ef7eb2e8f9f7 1036 */
<> 144:ef7eb2e8f9f7 1037 __weak void HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 1038 {
<> 144:ef7eb2e8f9f7 1039 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1040 UNUSED(hrtc);
<> 144:ef7eb2e8f9f7 1041 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1042 the HAL_RTC_WakeUpTimerEventCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1043 */
<> 144:ef7eb2e8f9f7 1044 }
<> 144:ef7eb2e8f9f7 1045
<> 144:ef7eb2e8f9f7 1046 /**
<> 144:ef7eb2e8f9f7 1047 * @brief This function handles Wake Up Timer Polling.
AnnaBridge 182:a56a73fd2a6f 1048 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1049 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 1050 * @param Timeout Timeout duration
<> 144:ef7eb2e8f9f7 1051 * @retval HAL status
<> 144:ef7eb2e8f9f7 1052 */
<> 144:ef7eb2e8f9f7 1053 HAL_StatusTypeDef HAL_RTCEx_PollForWakeUpTimerEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 1054 {
<> 144:ef7eb2e8f9f7 1055 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 1056
<> 144:ef7eb2e8f9f7 1057 /* Get tick */
<> 144:ef7eb2e8f9f7 1058 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1059
<> 144:ef7eb2e8f9f7 1060 while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTF) == RESET)
<> 144:ef7eb2e8f9f7 1061 {
<> 144:ef7eb2e8f9f7 1062 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 1063 {
<> 144:ef7eb2e8f9f7 1064 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
<> 144:ef7eb2e8f9f7 1065 {
<> 144:ef7eb2e8f9f7 1066 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1067
<> 144:ef7eb2e8f9f7 1068 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1069 }
<> 144:ef7eb2e8f9f7 1070 }
<> 144:ef7eb2e8f9f7 1071 }
<> 144:ef7eb2e8f9f7 1072
<> 144:ef7eb2e8f9f7 1073 /* Clear the WAKEUPTIMER Flag */
<> 144:ef7eb2e8f9f7 1074 __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF);
<> 144:ef7eb2e8f9f7 1075
<> 144:ef7eb2e8f9f7 1076 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1077 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1078
<> 144:ef7eb2e8f9f7 1079 return HAL_OK;
<> 144:ef7eb2e8f9f7 1080 }
<> 144:ef7eb2e8f9f7 1081
<> 144:ef7eb2e8f9f7 1082 /**
<> 144:ef7eb2e8f9f7 1083 * @}
<> 144:ef7eb2e8f9f7 1084 */
<> 144:ef7eb2e8f9f7 1085
<> 144:ef7eb2e8f9f7 1086
<> 144:ef7eb2e8f9f7 1087 /** @defgroup RTCEx_Exported_Functions_Group3 Extension Peripheral Control functions
<> 144:ef7eb2e8f9f7 1088 * @brief Extension Peripheral Control functions
<> 144:ef7eb2e8f9f7 1089 *
<> 144:ef7eb2e8f9f7 1090 @verbatim
<> 144:ef7eb2e8f9f7 1091 ===============================================================================
<> 144:ef7eb2e8f9f7 1092 ##### Extension Peripheral Control functions #####
<> 144:ef7eb2e8f9f7 1093 ===============================================================================
<> 144:ef7eb2e8f9f7 1094 [..]
<> 144:ef7eb2e8f9f7 1095 This subsection provides functions allowing to
<> 144:ef7eb2e8f9f7 1096 (+) Write a data in a specified RTC Backup data register
<> 144:ef7eb2e8f9f7 1097 (+) Read a data in a specified RTC Backup data register
<> 144:ef7eb2e8f9f7 1098 (+) Set the Coarse calibration parameters.
<> 144:ef7eb2e8f9f7 1099 (+) Deactivate the Coarse calibration parameters
<> 144:ef7eb2e8f9f7 1100 (+) Set the Smooth calibration parameters.
<> 144:ef7eb2e8f9f7 1101 (+) Configure the Synchronization Shift Control Settings.
<> 144:ef7eb2e8f9f7 1102 (+) Configure the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz).
<> 144:ef7eb2e8f9f7 1103 (+) Deactivate the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz).
<> 144:ef7eb2e8f9f7 1104 (+) Enable the RTC reference clock detection.
<> 144:ef7eb2e8f9f7 1105 (+) Disable the RTC reference clock detection.
<> 144:ef7eb2e8f9f7 1106 (+) Enable the Bypass Shadow feature.
<> 144:ef7eb2e8f9f7 1107 (+) Disable the Bypass Shadow feature.
<> 144:ef7eb2e8f9f7 1108
<> 144:ef7eb2e8f9f7 1109 @endverbatim
<> 144:ef7eb2e8f9f7 1110 * @{
<> 144:ef7eb2e8f9f7 1111 */
<> 144:ef7eb2e8f9f7 1112
<> 144:ef7eb2e8f9f7 1113 /**
<> 144:ef7eb2e8f9f7 1114 * @brief Writes a data in a specified RTC Backup data register.
AnnaBridge 182:a56a73fd2a6f 1115 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1116 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 1117 * @param BackupRegister RTC Backup data Register number.
<> 144:ef7eb2e8f9f7 1118 * This parameter can be: RTC_BKP_DRx where x can be from 0 to 19 to
<> 144:ef7eb2e8f9f7 1119 * specify the register.
AnnaBridge 182:a56a73fd2a6f 1120 * @param Data Data to be written in the specified RTC Backup data register.
<> 144:ef7eb2e8f9f7 1121 * @retval None
<> 144:ef7eb2e8f9f7 1122 */
<> 144:ef7eb2e8f9f7 1123 void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint32_t Data)
<> 144:ef7eb2e8f9f7 1124 {
<> 144:ef7eb2e8f9f7 1125 uint32_t tmp = 0U;
<> 144:ef7eb2e8f9f7 1126
<> 144:ef7eb2e8f9f7 1127 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1128 assert_param(IS_RTC_BKP(BackupRegister));
<> 144:ef7eb2e8f9f7 1129
<> 144:ef7eb2e8f9f7 1130 tmp = (uint32_t)&(hrtc->Instance->BKP0R);
<> 144:ef7eb2e8f9f7 1131 tmp += (BackupRegister * 4U);
<> 144:ef7eb2e8f9f7 1132
<> 144:ef7eb2e8f9f7 1133 /* Write the specified register */
<> 144:ef7eb2e8f9f7 1134 *(__IO uint32_t *)tmp = (uint32_t)Data;
<> 144:ef7eb2e8f9f7 1135 }
<> 144:ef7eb2e8f9f7 1136
<> 144:ef7eb2e8f9f7 1137 /**
<> 144:ef7eb2e8f9f7 1138 * @brief Reads data from the specified RTC Backup data Register.
AnnaBridge 182:a56a73fd2a6f 1139 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1140 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 1141 * @param BackupRegister RTC Backup data Register number.
<> 144:ef7eb2e8f9f7 1142 * This parameter can be: RTC_BKP_DRx where x can be from 0 to 19 to
<> 144:ef7eb2e8f9f7 1143 * specify the register.
<> 144:ef7eb2e8f9f7 1144 * @retval Read value
<> 144:ef7eb2e8f9f7 1145 */
<> 144:ef7eb2e8f9f7 1146 uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister)
<> 144:ef7eb2e8f9f7 1147 {
<> 144:ef7eb2e8f9f7 1148 uint32_t tmp = 0U;
<> 144:ef7eb2e8f9f7 1149
<> 144:ef7eb2e8f9f7 1150 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1151 assert_param(IS_RTC_BKP(BackupRegister));
<> 144:ef7eb2e8f9f7 1152
<> 144:ef7eb2e8f9f7 1153 tmp = (uint32_t)&(hrtc->Instance->BKP0R);
<> 144:ef7eb2e8f9f7 1154 tmp += (BackupRegister * 4U);
<> 144:ef7eb2e8f9f7 1155
<> 144:ef7eb2e8f9f7 1156 /* Read the specified register */
<> 144:ef7eb2e8f9f7 1157 return (*(__IO uint32_t *)tmp);
<> 144:ef7eb2e8f9f7 1158 }
<> 144:ef7eb2e8f9f7 1159
<> 144:ef7eb2e8f9f7 1160 /**
<> 144:ef7eb2e8f9f7 1161 * @brief Sets the Coarse calibration parameters.
AnnaBridge 182:a56a73fd2a6f 1162 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1163 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 1164 * @param CalibSign Specifies the sign of the coarse calibration value.
<> 144:ef7eb2e8f9f7 1165 * This parameter can be one of the following values :
<> 144:ef7eb2e8f9f7 1166 * @arg RTC_CALIBSIGN_POSITIVE: The value sign is positive
<> 144:ef7eb2e8f9f7 1167 * @arg RTC_CALIBSIGN_NEGATIVE: The value sign is negative
AnnaBridge 182:a56a73fd2a6f 1168 * @param Value value of coarse calibration expressed in ppm (coded on 5 bits).
<> 144:ef7eb2e8f9f7 1169 *
<> 144:ef7eb2e8f9f7 1170 * @note This Calibration value should be between 0 and 63 when using negative
<> 144:ef7eb2e8f9f7 1171 * sign with a 2-ppm step.
<> 144:ef7eb2e8f9f7 1172 *
<> 144:ef7eb2e8f9f7 1173 * @note This Calibration value should be between 0 and 126 when using positive
<> 144:ef7eb2e8f9f7 1174 * sign with a 4-ppm step.
<> 144:ef7eb2e8f9f7 1175 * @retval HAL status
<> 144:ef7eb2e8f9f7 1176 */
<> 144:ef7eb2e8f9f7 1177 HAL_StatusTypeDef HAL_RTCEx_SetCoarseCalib(RTC_HandleTypeDef* hrtc, uint32_t CalibSign, uint32_t Value)
<> 144:ef7eb2e8f9f7 1178 {
<> 144:ef7eb2e8f9f7 1179 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1180 assert_param(IS_RTC_CALIB_SIGN(CalibSign));
<> 144:ef7eb2e8f9f7 1181 assert_param(IS_RTC_CALIB_VALUE(Value));
<> 144:ef7eb2e8f9f7 1182
<> 144:ef7eb2e8f9f7 1183 /* Process Locked */
<> 144:ef7eb2e8f9f7 1184 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1185
<> 144:ef7eb2e8f9f7 1186 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1187
<> 144:ef7eb2e8f9f7 1188 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1189 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1190
<> 144:ef7eb2e8f9f7 1191 /* Set Initialization mode */
<> 144:ef7eb2e8f9f7 1192 if(RTC_EnterInitMode(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 1193 {
<> 144:ef7eb2e8f9f7 1194 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1195 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1196
<> 144:ef7eb2e8f9f7 1197 /* Set RTC state*/
<> 144:ef7eb2e8f9f7 1198 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 1199
<> 144:ef7eb2e8f9f7 1200 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1201 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1202
<> 144:ef7eb2e8f9f7 1203 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1204 }
<> 144:ef7eb2e8f9f7 1205 else
<> 144:ef7eb2e8f9f7 1206 {
<> 144:ef7eb2e8f9f7 1207 /* Enable the Coarse Calibration */
<> 144:ef7eb2e8f9f7 1208 __HAL_RTC_COARSE_CALIB_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1209
<> 144:ef7eb2e8f9f7 1210 /* Set the coarse calibration value */
<> 144:ef7eb2e8f9f7 1211 hrtc->Instance->CALIBR = (uint32_t)(CalibSign|Value);
<> 144:ef7eb2e8f9f7 1212
<> 144:ef7eb2e8f9f7 1213 /* Exit Initialization mode */
<> 144:ef7eb2e8f9f7 1214 hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
<> 144:ef7eb2e8f9f7 1215 }
<> 144:ef7eb2e8f9f7 1216
<> 144:ef7eb2e8f9f7 1217 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1218 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1219
<> 144:ef7eb2e8f9f7 1220 /* Change state */
<> 144:ef7eb2e8f9f7 1221 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1222
<> 144:ef7eb2e8f9f7 1223 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1224 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1225
<> 144:ef7eb2e8f9f7 1226 return HAL_OK;
<> 144:ef7eb2e8f9f7 1227 }
<> 144:ef7eb2e8f9f7 1228
<> 144:ef7eb2e8f9f7 1229 /**
<> 144:ef7eb2e8f9f7 1230 * @brief Deactivates the Coarse calibration parameters.
AnnaBridge 182:a56a73fd2a6f 1231 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1232 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 1233 * @retval HAL status
<> 144:ef7eb2e8f9f7 1234 */
<> 144:ef7eb2e8f9f7 1235 HAL_StatusTypeDef HAL_RTCEx_DeactivateCoarseCalib(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1236 {
<> 144:ef7eb2e8f9f7 1237 /* Process Locked */
<> 144:ef7eb2e8f9f7 1238 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1239
<> 144:ef7eb2e8f9f7 1240 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1241
<> 144:ef7eb2e8f9f7 1242 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1243 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1244
<> 144:ef7eb2e8f9f7 1245 /* Set Initialization mode */
<> 144:ef7eb2e8f9f7 1246 if(RTC_EnterInitMode(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 1247 {
<> 144:ef7eb2e8f9f7 1248 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1249 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1250
<> 144:ef7eb2e8f9f7 1251 /* Set RTC state*/
<> 144:ef7eb2e8f9f7 1252 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 1253
<> 144:ef7eb2e8f9f7 1254 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1255 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1256
<> 144:ef7eb2e8f9f7 1257 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1258 }
<> 144:ef7eb2e8f9f7 1259 else
<> 144:ef7eb2e8f9f7 1260 {
<> 144:ef7eb2e8f9f7 1261 /* Enable the Coarse Calibration */
<> 144:ef7eb2e8f9f7 1262 __HAL_RTC_COARSE_CALIB_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1263
<> 144:ef7eb2e8f9f7 1264 /* Exit Initialization mode */
<> 144:ef7eb2e8f9f7 1265 hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
<> 144:ef7eb2e8f9f7 1266 }
<> 144:ef7eb2e8f9f7 1267
<> 144:ef7eb2e8f9f7 1268 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1269 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1270
<> 144:ef7eb2e8f9f7 1271 /* Change state */
<> 144:ef7eb2e8f9f7 1272 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1273
<> 144:ef7eb2e8f9f7 1274 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1275 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1276
<> 144:ef7eb2e8f9f7 1277 return HAL_OK;
<> 144:ef7eb2e8f9f7 1278 }
<> 144:ef7eb2e8f9f7 1279
<> 144:ef7eb2e8f9f7 1280 /**
<> 144:ef7eb2e8f9f7 1281 * @brief Sets the Smooth calibration parameters.
AnnaBridge 182:a56a73fd2a6f 1282 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1283 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 1284 * @param SmoothCalibPeriod Select the Smooth Calibration Period.
<> 144:ef7eb2e8f9f7 1285 * This parameter can be can be one of the following values :
<> 144:ef7eb2e8f9f7 1286 * @arg RTC_SMOOTHCALIB_PERIOD_32SEC: The smooth calibration period is 32s.
<> 144:ef7eb2e8f9f7 1287 * @arg RTC_SMOOTHCALIB_PERIOD_16SEC: The smooth calibration period is 16s.
<> 144:ef7eb2e8f9f7 1288 * @arg RTC_SMOOTHCALIB_PERIOD_8SEC: The smooth calibration period is 8s.
AnnaBridge 182:a56a73fd2a6f 1289 * @param SmoothCalibPlusPulses Select to Set or reset the CALP bit.
<> 144:ef7eb2e8f9f7 1290 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 1291 * @arg RTC_SMOOTHCALIB_PLUSPULSES_SET: Add one RTCCLK pulse every 2*11 pulses.
<> 144:ef7eb2e8f9f7 1292 * @arg RTC_SMOOTHCALIB_PLUSPULSES_RESET: No RTCCLK pulses are added.
AnnaBridge 182:a56a73fd2a6f 1293 * @param SmouthCalibMinusPulsesValue Select the value of CALM[80] bits.
<> 144:ef7eb2e8f9f7 1294 * This parameter can be one any value from 0 to 0x000001FF.
<> 144:ef7eb2e8f9f7 1295 * @note To deactivate the smooth calibration, the field SmoothCalibPlusPulses
<> 144:ef7eb2e8f9f7 1296 * must be equal to SMOOTHCALIB_PLUSPULSES_RESET and the field
<> 144:ef7eb2e8f9f7 1297 * SmouthCalibMinusPulsesValue must be equal to 0.
<> 144:ef7eb2e8f9f7 1298 * @retval HAL status
<> 144:ef7eb2e8f9f7 1299 */
<> 144:ef7eb2e8f9f7 1300 HAL_StatusTypeDef HAL_RTCEx_SetSmoothCalib(RTC_HandleTypeDef* hrtc, uint32_t SmoothCalibPeriod, uint32_t SmoothCalibPlusPulses, uint32_t SmouthCalibMinusPulsesValue)
<> 144:ef7eb2e8f9f7 1301 {
<> 144:ef7eb2e8f9f7 1302 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 1303
<> 144:ef7eb2e8f9f7 1304 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1305 assert_param(IS_RTC_SMOOTH_CALIB_PERIOD(SmoothCalibPeriod));
<> 144:ef7eb2e8f9f7 1306 assert_param(IS_RTC_SMOOTH_CALIB_PLUS(SmoothCalibPlusPulses));
<> 144:ef7eb2e8f9f7 1307 assert_param(IS_RTC_SMOOTH_CALIB_MINUS(SmouthCalibMinusPulsesValue));
<> 144:ef7eb2e8f9f7 1308
<> 144:ef7eb2e8f9f7 1309 /* Process Locked */
<> 144:ef7eb2e8f9f7 1310 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1311
<> 144:ef7eb2e8f9f7 1312 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1313
<> 144:ef7eb2e8f9f7 1314 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1315 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1316
<> 144:ef7eb2e8f9f7 1317 /* check if a calibration is pending*/
<> 144:ef7eb2e8f9f7 1318 if((hrtc->Instance->ISR & RTC_ISR_RECALPF) != RESET)
<> 144:ef7eb2e8f9f7 1319 {
<> 144:ef7eb2e8f9f7 1320 /* Get tick */
<> 144:ef7eb2e8f9f7 1321 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1322
<> 144:ef7eb2e8f9f7 1323 /* check if a calibration is pending*/
<> 144:ef7eb2e8f9f7 1324 while((hrtc->Instance->ISR & RTC_ISR_RECALPF) != RESET)
<> 144:ef7eb2e8f9f7 1325 {
<> 144:ef7eb2e8f9f7 1326 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1327 {
<> 144:ef7eb2e8f9f7 1328 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1329 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1330
<> 144:ef7eb2e8f9f7 1331 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1332 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1333
<> 144:ef7eb2e8f9f7 1334 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1335 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1336
<> 144:ef7eb2e8f9f7 1337 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1338 }
<> 144:ef7eb2e8f9f7 1339 }
<> 144:ef7eb2e8f9f7 1340 }
<> 144:ef7eb2e8f9f7 1341
<> 144:ef7eb2e8f9f7 1342 /* Configure the Smooth calibration settings */
<> 144:ef7eb2e8f9f7 1343 hrtc->Instance->CALR = (uint32_t)((uint32_t)SmoothCalibPeriod | (uint32_t)SmoothCalibPlusPulses | (uint32_t)SmouthCalibMinusPulsesValue);
<> 144:ef7eb2e8f9f7 1344
<> 144:ef7eb2e8f9f7 1345 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1346 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1347
<> 144:ef7eb2e8f9f7 1348 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1349 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1350
<> 144:ef7eb2e8f9f7 1351 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1352 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1353
<> 144:ef7eb2e8f9f7 1354 return HAL_OK;
<> 144:ef7eb2e8f9f7 1355 }
<> 144:ef7eb2e8f9f7 1356
<> 144:ef7eb2e8f9f7 1357 /**
<> 144:ef7eb2e8f9f7 1358 * @brief Configures the Synchronization Shift Control Settings.
<> 144:ef7eb2e8f9f7 1359 * @note When REFCKON is set, firmware must not write to Shift control register.
AnnaBridge 182:a56a73fd2a6f 1360 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1361 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 1362 * @param ShiftAdd1S Select to add or not 1 second to the time calendar.
<> 144:ef7eb2e8f9f7 1363 * This parameter can be one of the following values :
<> 144:ef7eb2e8f9f7 1364 * @arg RTC_SHIFTADD1S_SET: Add one second to the clock calendar.
<> 144:ef7eb2e8f9f7 1365 * @arg RTC_SHIFTADD1S_RESET: No effect.
AnnaBridge 182:a56a73fd2a6f 1366 * @param ShiftSubFS Select the number of Second Fractions to substitute.
<> 144:ef7eb2e8f9f7 1367 * This parameter can be one any value from 0 to 0x7FFF.
<> 144:ef7eb2e8f9f7 1368 * @retval HAL status
<> 144:ef7eb2e8f9f7 1369 */
<> 144:ef7eb2e8f9f7 1370 HAL_StatusTypeDef HAL_RTCEx_SetSynchroShift(RTC_HandleTypeDef* hrtc, uint32_t ShiftAdd1S, uint32_t ShiftSubFS)
<> 144:ef7eb2e8f9f7 1371 {
<> 144:ef7eb2e8f9f7 1372 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 1373
<> 144:ef7eb2e8f9f7 1374 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1375 assert_param(IS_RTC_SHIFT_ADD1S(ShiftAdd1S));
<> 144:ef7eb2e8f9f7 1376 assert_param(IS_RTC_SHIFT_SUBFS(ShiftSubFS));
<> 144:ef7eb2e8f9f7 1377
<> 144:ef7eb2e8f9f7 1378 /* Process Locked */
<> 144:ef7eb2e8f9f7 1379 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1380
<> 144:ef7eb2e8f9f7 1381 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1382
<> 144:ef7eb2e8f9f7 1383 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1384 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1385
<> 144:ef7eb2e8f9f7 1386 /* Get tick */
<> 144:ef7eb2e8f9f7 1387 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1388
<> 144:ef7eb2e8f9f7 1389 /* Wait until the shift is completed*/
<> 144:ef7eb2e8f9f7 1390 while((hrtc->Instance->ISR & RTC_ISR_SHPF) != RESET)
<> 144:ef7eb2e8f9f7 1391 {
<> 144:ef7eb2e8f9f7 1392 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1393 {
<> 144:ef7eb2e8f9f7 1394 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1395 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1396
<> 144:ef7eb2e8f9f7 1397 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1398
<> 144:ef7eb2e8f9f7 1399 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1400 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1401
<> 144:ef7eb2e8f9f7 1402 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1403 }
<> 144:ef7eb2e8f9f7 1404 }
<> 144:ef7eb2e8f9f7 1405
<> 144:ef7eb2e8f9f7 1406 /* Check if the reference clock detection is disabled */
<> 144:ef7eb2e8f9f7 1407 if((hrtc->Instance->CR & RTC_CR_REFCKON) == RESET)
<> 144:ef7eb2e8f9f7 1408 {
<> 144:ef7eb2e8f9f7 1409 /* Configure the Shift settings */
<> 144:ef7eb2e8f9f7 1410 hrtc->Instance->SHIFTR = (uint32_t)(uint32_t)(ShiftSubFS) | (uint32_t)(ShiftAdd1S);
<> 144:ef7eb2e8f9f7 1411
<> 144:ef7eb2e8f9f7 1412 /* If RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
<> 144:ef7eb2e8f9f7 1413 if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
<> 144:ef7eb2e8f9f7 1414 {
<> 144:ef7eb2e8f9f7 1415 if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 1416 {
<> 144:ef7eb2e8f9f7 1417 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1418 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1419
<> 144:ef7eb2e8f9f7 1420 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 1421
<> 144:ef7eb2e8f9f7 1422 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1423 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1424
<> 144:ef7eb2e8f9f7 1425 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1426 }
<> 144:ef7eb2e8f9f7 1427 }
<> 144:ef7eb2e8f9f7 1428 }
<> 144:ef7eb2e8f9f7 1429 else
<> 144:ef7eb2e8f9f7 1430 {
<> 144:ef7eb2e8f9f7 1431 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1432 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1433
<> 144:ef7eb2e8f9f7 1434 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1435 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 1436
<> 144:ef7eb2e8f9f7 1437 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1438 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1439
<> 144:ef7eb2e8f9f7 1440 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1441 }
<> 144:ef7eb2e8f9f7 1442
<> 144:ef7eb2e8f9f7 1443 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1444 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1445
<> 144:ef7eb2e8f9f7 1446 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1447 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1448
<> 144:ef7eb2e8f9f7 1449 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1450 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1451
<> 144:ef7eb2e8f9f7 1452 return HAL_OK;
<> 144:ef7eb2e8f9f7 1453 }
<> 144:ef7eb2e8f9f7 1454
<> 144:ef7eb2e8f9f7 1455 /**
<> 144:ef7eb2e8f9f7 1456 * @brief Configures the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz).
AnnaBridge 182:a56a73fd2a6f 1457 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1458 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 1459 * @param CalibOutput Select the Calibration output Selection .
<> 144:ef7eb2e8f9f7 1460 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 1461 * @arg RTC_CALIBOUTPUT_512HZ: A signal has a regular waveform at 512Hz.
<> 144:ef7eb2e8f9f7 1462 * @arg RTC_CALIBOUTPUT_1HZ: A signal has a regular waveform at 1Hz.
<> 144:ef7eb2e8f9f7 1463 * @retval HAL status
<> 144:ef7eb2e8f9f7 1464 */
<> 144:ef7eb2e8f9f7 1465 HAL_StatusTypeDef HAL_RTCEx_SetCalibrationOutPut(RTC_HandleTypeDef* hrtc, uint32_t CalibOutput)
<> 144:ef7eb2e8f9f7 1466 {
<> 144:ef7eb2e8f9f7 1467 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1468 assert_param(IS_RTC_CALIB_OUTPUT(CalibOutput));
<> 144:ef7eb2e8f9f7 1469
<> 144:ef7eb2e8f9f7 1470 /* Process Locked */
<> 144:ef7eb2e8f9f7 1471 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1472
<> 144:ef7eb2e8f9f7 1473 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1474
<> 144:ef7eb2e8f9f7 1475 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1476 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1477
<> 144:ef7eb2e8f9f7 1478 /* Clear flags before config */
<> 144:ef7eb2e8f9f7 1479 hrtc->Instance->CR &= (uint32_t)~RTC_CR_COSEL;
<> 144:ef7eb2e8f9f7 1480
<> 144:ef7eb2e8f9f7 1481 /* Configure the RTC_CR register */
<> 144:ef7eb2e8f9f7 1482 hrtc->Instance->CR |= (uint32_t)CalibOutput;
<> 144:ef7eb2e8f9f7 1483
<> 144:ef7eb2e8f9f7 1484 __HAL_RTC_CALIBRATION_OUTPUT_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1485
<> 144:ef7eb2e8f9f7 1486 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1487 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1488
<> 144:ef7eb2e8f9f7 1489 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1490 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1491
<> 144:ef7eb2e8f9f7 1492 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1493 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1494
<> 144:ef7eb2e8f9f7 1495 return HAL_OK;
<> 144:ef7eb2e8f9f7 1496 }
<> 144:ef7eb2e8f9f7 1497
<> 144:ef7eb2e8f9f7 1498 /**
<> 144:ef7eb2e8f9f7 1499 * @brief Deactivates the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz).
AnnaBridge 182:a56a73fd2a6f 1500 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1501 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 1502 * @retval HAL status
<> 144:ef7eb2e8f9f7 1503 */
<> 144:ef7eb2e8f9f7 1504 HAL_StatusTypeDef HAL_RTCEx_DeactivateCalibrationOutPut(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1505 {
<> 144:ef7eb2e8f9f7 1506 /* Process Locked */
<> 144:ef7eb2e8f9f7 1507 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1508
<> 144:ef7eb2e8f9f7 1509 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1510
<> 144:ef7eb2e8f9f7 1511 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1512 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1513
<> 144:ef7eb2e8f9f7 1514 __HAL_RTC_CALIBRATION_OUTPUT_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1515
<> 144:ef7eb2e8f9f7 1516 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1517 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1518
<> 144:ef7eb2e8f9f7 1519 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1520 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1521
<> 144:ef7eb2e8f9f7 1522 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1523 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1524
<> 144:ef7eb2e8f9f7 1525 return HAL_OK;
<> 144:ef7eb2e8f9f7 1526 }
<> 144:ef7eb2e8f9f7 1527
<> 144:ef7eb2e8f9f7 1528 /**
<> 144:ef7eb2e8f9f7 1529 * @brief Enables the RTC reference clock detection.
AnnaBridge 182:a56a73fd2a6f 1530 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1531 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 1532 * @retval HAL status
<> 144:ef7eb2e8f9f7 1533 */
<> 144:ef7eb2e8f9f7 1534 HAL_StatusTypeDef HAL_RTCEx_SetRefClock(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1535 {
<> 144:ef7eb2e8f9f7 1536 /* Process Locked */
<> 144:ef7eb2e8f9f7 1537 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1538
<> 144:ef7eb2e8f9f7 1539 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1540
<> 144:ef7eb2e8f9f7 1541 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1542 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1543
<> 144:ef7eb2e8f9f7 1544 /* Set Initialization mode */
<> 144:ef7eb2e8f9f7 1545 if(RTC_EnterInitMode(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 1546 {
<> 144:ef7eb2e8f9f7 1547 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1548 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1549
<> 144:ef7eb2e8f9f7 1550 /* Set RTC state*/
<> 144:ef7eb2e8f9f7 1551 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 1552
<> 144:ef7eb2e8f9f7 1553 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1554 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1555
<> 144:ef7eb2e8f9f7 1556 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1557 }
<> 144:ef7eb2e8f9f7 1558 else
<> 144:ef7eb2e8f9f7 1559 {
<> 144:ef7eb2e8f9f7 1560 __HAL_RTC_CLOCKREF_DETECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1561
<> 144:ef7eb2e8f9f7 1562 /* Exit Initialization mode */
<> 144:ef7eb2e8f9f7 1563 hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
<> 144:ef7eb2e8f9f7 1564 }
<> 144:ef7eb2e8f9f7 1565
<> 144:ef7eb2e8f9f7 1566 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1567 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1568
<> 144:ef7eb2e8f9f7 1569 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1570 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1571
<> 144:ef7eb2e8f9f7 1572 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1573 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1574
<> 144:ef7eb2e8f9f7 1575 return HAL_OK;
<> 144:ef7eb2e8f9f7 1576 }
<> 144:ef7eb2e8f9f7 1577
<> 144:ef7eb2e8f9f7 1578 /**
<> 144:ef7eb2e8f9f7 1579 * @brief Disable the RTC reference clock detection.
AnnaBridge 182:a56a73fd2a6f 1580 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1581 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 1582 * @retval HAL status
<> 144:ef7eb2e8f9f7 1583 */
<> 144:ef7eb2e8f9f7 1584 HAL_StatusTypeDef HAL_RTCEx_DeactivateRefClock(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1585 {
<> 144:ef7eb2e8f9f7 1586 /* Process Locked */
<> 144:ef7eb2e8f9f7 1587 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1588
<> 144:ef7eb2e8f9f7 1589 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1590
<> 144:ef7eb2e8f9f7 1591 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1592 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1593
<> 144:ef7eb2e8f9f7 1594 /* Set Initialization mode */
<> 144:ef7eb2e8f9f7 1595 if(RTC_EnterInitMode(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 1596 {
<> 144:ef7eb2e8f9f7 1597 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1598 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1599
<> 144:ef7eb2e8f9f7 1600 /* Set RTC state*/
<> 144:ef7eb2e8f9f7 1601 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 1602
<> 144:ef7eb2e8f9f7 1603 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1604 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1605
<> 144:ef7eb2e8f9f7 1606 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1607 }
<> 144:ef7eb2e8f9f7 1608 else
<> 144:ef7eb2e8f9f7 1609 {
<> 144:ef7eb2e8f9f7 1610 __HAL_RTC_CLOCKREF_DETECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1611
<> 144:ef7eb2e8f9f7 1612 /* Exit Initialization mode */
<> 144:ef7eb2e8f9f7 1613 hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
<> 144:ef7eb2e8f9f7 1614 }
<> 144:ef7eb2e8f9f7 1615
<> 144:ef7eb2e8f9f7 1616 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1617 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1618
<> 144:ef7eb2e8f9f7 1619 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1620 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1621
<> 144:ef7eb2e8f9f7 1622 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1623 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1624
<> 144:ef7eb2e8f9f7 1625 return HAL_OK;
<> 144:ef7eb2e8f9f7 1626 }
<> 144:ef7eb2e8f9f7 1627
<> 144:ef7eb2e8f9f7 1628 /**
<> 144:ef7eb2e8f9f7 1629 * @brief Enables the Bypass Shadow feature.
AnnaBridge 182:a56a73fd2a6f 1630 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1631 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 1632 * @note When the Bypass Shadow is enabled the calendar value are taken
<> 144:ef7eb2e8f9f7 1633 * directly from the Calendar counter.
<> 144:ef7eb2e8f9f7 1634 * @retval HAL status
<> 144:ef7eb2e8f9f7 1635 */
<> 144:ef7eb2e8f9f7 1636 HAL_StatusTypeDef HAL_RTCEx_EnableBypassShadow(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1637 {
<> 144:ef7eb2e8f9f7 1638 /* Process Locked */
<> 144:ef7eb2e8f9f7 1639 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1640
<> 144:ef7eb2e8f9f7 1641 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1642
<> 144:ef7eb2e8f9f7 1643 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1644 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1645
<> 144:ef7eb2e8f9f7 1646 /* Set the BYPSHAD bit */
<> 144:ef7eb2e8f9f7 1647 hrtc->Instance->CR |= (uint8_t)RTC_CR_BYPSHAD;
<> 144:ef7eb2e8f9f7 1648
<> 144:ef7eb2e8f9f7 1649 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1650 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1651
<> 144:ef7eb2e8f9f7 1652 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1653 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1654
<> 144:ef7eb2e8f9f7 1655 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1656 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1657
<> 144:ef7eb2e8f9f7 1658 return HAL_OK;
<> 144:ef7eb2e8f9f7 1659 }
<> 144:ef7eb2e8f9f7 1660
<> 144:ef7eb2e8f9f7 1661 /**
<> 144:ef7eb2e8f9f7 1662 * @brief Disables the Bypass Shadow feature.
AnnaBridge 182:a56a73fd2a6f 1663 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1664 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 1665 * @note When the Bypass Shadow is enabled the calendar value are taken
<> 144:ef7eb2e8f9f7 1666 * directly from the Calendar counter.
<> 144:ef7eb2e8f9f7 1667 * @retval HAL status
<> 144:ef7eb2e8f9f7 1668 */
<> 144:ef7eb2e8f9f7 1669 HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1670 {
<> 144:ef7eb2e8f9f7 1671 /* Process Locked */
<> 144:ef7eb2e8f9f7 1672 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1673
<> 144:ef7eb2e8f9f7 1674 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1675
<> 144:ef7eb2e8f9f7 1676 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1677 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1678
<> 144:ef7eb2e8f9f7 1679 /* Reset the BYPSHAD bit */
<> 144:ef7eb2e8f9f7 1680 hrtc->Instance->CR &= (uint8_t)~RTC_CR_BYPSHAD;
<> 144:ef7eb2e8f9f7 1681
<> 144:ef7eb2e8f9f7 1682 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1683 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1684
<> 144:ef7eb2e8f9f7 1685 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1686 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1687
<> 144:ef7eb2e8f9f7 1688 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1689 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1690
<> 144:ef7eb2e8f9f7 1691 return HAL_OK;
<> 144:ef7eb2e8f9f7 1692 }
<> 144:ef7eb2e8f9f7 1693
<> 144:ef7eb2e8f9f7 1694 /**
<> 144:ef7eb2e8f9f7 1695 * @}
<> 144:ef7eb2e8f9f7 1696 */
<> 144:ef7eb2e8f9f7 1697
<> 144:ef7eb2e8f9f7 1698 /** @defgroup RTCEx_Exported_Functions_Group4 Extended features functions
<> 144:ef7eb2e8f9f7 1699 * @brief Extended features functions
<> 144:ef7eb2e8f9f7 1700 *
<> 144:ef7eb2e8f9f7 1701 @verbatim
<> 144:ef7eb2e8f9f7 1702 ===============================================================================
<> 144:ef7eb2e8f9f7 1703 ##### Extended features functions #####
<> 144:ef7eb2e8f9f7 1704 ===============================================================================
<> 144:ef7eb2e8f9f7 1705 [..] This section provides functions allowing to:
<> 144:ef7eb2e8f9f7 1706 (+) RTC Alarm B callback
<> 144:ef7eb2e8f9f7 1707 (+) RTC Poll for Alarm B request
<> 144:ef7eb2e8f9f7 1708
<> 144:ef7eb2e8f9f7 1709 @endverbatim
<> 144:ef7eb2e8f9f7 1710 * @{
<> 144:ef7eb2e8f9f7 1711 */
<> 144:ef7eb2e8f9f7 1712
<> 144:ef7eb2e8f9f7 1713 /**
<> 144:ef7eb2e8f9f7 1714 * @brief Alarm B callback.
AnnaBridge 182:a56a73fd2a6f 1715 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1716 * the configuration information for RTC.
<> 144:ef7eb2e8f9f7 1717 * @retval None
<> 144:ef7eb2e8f9f7 1718 */
<> 144:ef7eb2e8f9f7 1719 __weak void HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 1720 {
<> 144:ef7eb2e8f9f7 1721 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1722 UNUSED(hrtc);
<> 144:ef7eb2e8f9f7 1723 /* NOTE : This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1724 the HAL_RTC_AlarmBEventCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1725 */
<> 144:ef7eb2e8f9f7 1726 }
<> 144:ef7eb2e8f9f7 1727
<> 144:ef7eb2e8f9f7 1728 /**
<> 144:ef7eb2e8f9f7 1729 * @brief This function handles AlarmB Polling request.
AnnaBridge 182:a56a73fd2a6f 1730 * @param hrtc pointer to a RTC_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1731 * the configuration information for RTC.
AnnaBridge 182:a56a73fd2a6f 1732 * @param Timeout Timeout duration
<> 144:ef7eb2e8f9f7 1733 * @retval HAL status
<> 144:ef7eb2e8f9f7 1734 */
<> 144:ef7eb2e8f9f7 1735 HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 1736 {
<> 144:ef7eb2e8f9f7 1737 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 1738
<> 144:ef7eb2e8f9f7 1739 /* Get tick */
<> 144:ef7eb2e8f9f7 1740 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1741
<> 144:ef7eb2e8f9f7 1742 while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBF) == RESET)
<> 144:ef7eb2e8f9f7 1743 {
<> 144:ef7eb2e8f9f7 1744 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 1745 {
<> 144:ef7eb2e8f9f7 1746 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
<> 144:ef7eb2e8f9f7 1747 {
<> 144:ef7eb2e8f9f7 1748 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1749 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1750 }
<> 144:ef7eb2e8f9f7 1751 }
<> 144:ef7eb2e8f9f7 1752 }
<> 144:ef7eb2e8f9f7 1753
<> 144:ef7eb2e8f9f7 1754 /* Clear the Alarm Flag */
<> 144:ef7eb2e8f9f7 1755 __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF);
<> 144:ef7eb2e8f9f7 1756
<> 144:ef7eb2e8f9f7 1757 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1758 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1759
<> 144:ef7eb2e8f9f7 1760 return HAL_OK;
<> 144:ef7eb2e8f9f7 1761 }
<> 144:ef7eb2e8f9f7 1762
<> 144:ef7eb2e8f9f7 1763 /**
<> 144:ef7eb2e8f9f7 1764 * @}
<> 144:ef7eb2e8f9f7 1765 */
<> 144:ef7eb2e8f9f7 1766
<> 144:ef7eb2e8f9f7 1767 /**
<> 144:ef7eb2e8f9f7 1768 * @}
<> 144:ef7eb2e8f9f7 1769 */
<> 144:ef7eb2e8f9f7 1770
<> 144:ef7eb2e8f9f7 1771 #endif /* HAL_RTC_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 1772 /**
<> 144:ef7eb2e8f9f7 1773 * @}
<> 144:ef7eb2e8f9f7 1774 */
<> 144:ef7eb2e8f9f7 1775
<> 144:ef7eb2e8f9f7 1776 /**
<> 144:ef7eb2e8f9f7 1777 * @}
<> 144:ef7eb2e8f9f7 1778 */
<> 144:ef7eb2e8f9f7 1779
<> 144:ef7eb2e8f9f7 1780 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/