mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

hal/mbed_itm_api.c@187:0387e8f68319, 2018-09-06 (annotated)

Committer:
AnnaBridge
Date:
Thu Sep 06 13:40:20 2018 +0100
Revision:
187:0387e8f68319
Parent:
184:08ed48f1de7f
Child:
189:f392fc9709a3
mbed-dev library. Release version 163

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 184:08ed48f1de7f 1 /* mbed Microcontroller Library
AnnaBridge 184:08ed48f1de7f 2 * Copyright (c) 2017 ARM Limited
AnnaBridge 184:08ed48f1de7f 3 *
AnnaBridge 184:08ed48f1de7f 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 184:08ed48f1de7f 5 * you may not use this file except in compliance with the License.
AnnaBridge 184:08ed48f1de7f 6 * You may obtain a copy of the License at
AnnaBridge 184:08ed48f1de7f 7 *
AnnaBridge 184:08ed48f1de7f 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 184:08ed48f1de7f 9 *
AnnaBridge 184:08ed48f1de7f 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 184:08ed48f1de7f 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 184:08ed48f1de7f 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 184:08ed48f1de7f 13 * See the License for the specific language governing permissions and
AnnaBridge 184:08ed48f1de7f 14 * limitations under the License.
AnnaBridge 184:08ed48f1de7f 15 */
AnnaBridge 184:08ed48f1de7f 16
AnnaBridge 184:08ed48f1de7f 17 #if defined(DEVICE_ITM)
AnnaBridge 184:08ed48f1de7f 18
AnnaBridge 184:08ed48f1de7f 19 #include "hal/itm_api.h"
AnnaBridge 184:08ed48f1de7f 20 #include "cmsis.h"
AnnaBridge 184:08ed48f1de7f 21
AnnaBridge 184:08ed48f1de7f 22 #include <stdbool.h>
AnnaBridge 184:08ed48f1de7f 23
AnnaBridge 187:0387e8f68319 24 #ifndef ITM_STIM_FIFOREADY_Msk
AnnaBridge 187:0387e8f68319 25 #define ITM_STIM_FIFOREADY_Msk 1
AnnaBridge 187:0387e8f68319 26 #endif
AnnaBridge 187:0387e8f68319 27
AnnaBridge 187:0387e8f68319 28 #define ITM_ENABLE_WRITE 0xC5ACCE55
AnnaBridge 184:08ed48f1de7f 29
AnnaBridge 184:08ed48f1de7f 30 #define SWO_NRZ 0x02
AnnaBridge 184:08ed48f1de7f 31 #define SWO_STIMULUS_PORT 0x01
AnnaBridge 184:08ed48f1de7f 32
AnnaBridge 184:08ed48f1de7f 33 void mbed_itm_init(void)
AnnaBridge 184:08ed48f1de7f 34 {
AnnaBridge 184:08ed48f1de7f 35 static bool do_init = true;
AnnaBridge 184:08ed48f1de7f 36
AnnaBridge 184:08ed48f1de7f 37 if (do_init) {
AnnaBridge 184:08ed48f1de7f 38 do_init = false;
AnnaBridge 184:08ed48f1de7f 39
AnnaBridge 184:08ed48f1de7f 40 itm_init();
AnnaBridge 184:08ed48f1de7f 41
AnnaBridge 184:08ed48f1de7f 42 /* Enable write access to ITM registers. */
AnnaBridge 184:08ed48f1de7f 43 ITM->LAR = ITM_ENABLE_WRITE;
AnnaBridge 184:08ed48f1de7f 44
AnnaBridge 184:08ed48f1de7f 45 /* Trace Port Interface Selected Pin Protocol Register. */
AnnaBridge 184:08ed48f1de7f 46 TPI->SPPR = (SWO_NRZ << TPI_SPPR_TXMODE_Pos);
AnnaBridge 184:08ed48f1de7f 47
AnnaBridge 184:08ed48f1de7f 48 /* Trace Port Interface Formatter and Flush Control Register */
AnnaBridge 184:08ed48f1de7f 49 TPI->FFCR = (1 << TPI_FFCR_TrigIn_Pos);
AnnaBridge 184:08ed48f1de7f 50
AnnaBridge 184:08ed48f1de7f 51 /* Data Watchpoint and Trace Control Register */
AnnaBridge 184:08ed48f1de7f 52 DWT->CTRL = (1 << DWT_CTRL_CYCTAP_Pos) |
AnnaBridge 184:08ed48f1de7f 53 (0xF << DWT_CTRL_POSTINIT_Pos) |
AnnaBridge 184:08ed48f1de7f 54 (0xF << DWT_CTRL_POSTPRESET_Pos) |
AnnaBridge 184:08ed48f1de7f 55 (1 << DWT_CTRL_CYCCNTENA_Pos);
AnnaBridge 184:08ed48f1de7f 56
AnnaBridge 184:08ed48f1de7f 57 /* Trace Privilege Register.
AnnaBridge 184:08ed48f1de7f 58 * Disable access to trace channel configuration from non-privileged mode.
AnnaBridge 184:08ed48f1de7f 59 */
AnnaBridge 184:08ed48f1de7f 60 ITM->TPR = 0x0;
AnnaBridge 184:08ed48f1de7f 61
AnnaBridge 184:08ed48f1de7f 62 /* Trace Control Register */
AnnaBridge 187:0387e8f68319 63 ITM->TCR = (1 << ITM_TCR_TraceBusID_Pos) |
AnnaBridge 187:0387e8f68319 64 (1 << ITM_TCR_DWTENA_Pos) |
AnnaBridge 184:08ed48f1de7f 65 (1 << ITM_TCR_SYNCENA_Pos) |
AnnaBridge 184:08ed48f1de7f 66 (1 << ITM_TCR_ITMENA_Pos);
AnnaBridge 184:08ed48f1de7f 67
AnnaBridge 184:08ed48f1de7f 68 /* Trace Enable Register */
AnnaBridge 187:0387e8f68319 69 ITM->TER = SWO_STIMULUS_PORT;
AnnaBridge 187:0387e8f68319 70 }
AnnaBridge 187:0387e8f68319 71 }
AnnaBridge 187:0387e8f68319 72
AnnaBridge 187:0387e8f68319 73 static void itm_out8(uint32_t port, uint8_t data)
AnnaBridge 187:0387e8f68319 74 {
AnnaBridge 187:0387e8f68319 75 /* Wait until port is available */
AnnaBridge 187:0387e8f68319 76 while ((ITM->PORT[port].u32 & ITM_STIM_FIFOREADY_Msk) == 0) {
AnnaBridge 187:0387e8f68319 77 __NOP();
AnnaBridge 184:08ed48f1de7f 78 }
AnnaBridge 187:0387e8f68319 79
AnnaBridge 187:0387e8f68319 80 /* write data to port */
AnnaBridge 187:0387e8f68319 81 ITM->PORT[port].u8 = data;
AnnaBridge 187:0387e8f68319 82 }
AnnaBridge 187:0387e8f68319 83
AnnaBridge 187:0387e8f68319 84 static void itm_out32(uint32_t port, uint32_t data)
AnnaBridge 187:0387e8f68319 85 {
AnnaBridge 187:0387e8f68319 86 /* Wait until port is available */
AnnaBridge 187:0387e8f68319 87 while ((ITM->PORT[port].u32 & ITM_STIM_FIFOREADY_Msk) == 0) {
AnnaBridge 187:0387e8f68319 88 __NOP();
AnnaBridge 187:0387e8f68319 89 }
AnnaBridge 187:0387e8f68319 90
AnnaBridge 187:0387e8f68319 91 /* write data to port */
AnnaBridge 187:0387e8f68319 92 ITM->PORT[port].u32 = data;
AnnaBridge 184:08ed48f1de7f 93 }
AnnaBridge 184:08ed48f1de7f 94
AnnaBridge 184:08ed48f1de7f 95 uint32_t mbed_itm_send(uint32_t port, uint32_t data)
AnnaBridge 184:08ed48f1de7f 96 {
AnnaBridge 184:08ed48f1de7f 97 /* Check if ITM and port is enabled */
AnnaBridge 184:08ed48f1de7f 98 if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
AnnaBridge 187:0387e8f68319 99 ((ITM->TER & (1UL << port)) != 0UL)) { /* ITM Port enabled */
AnnaBridge 187:0387e8f68319 100 itm_out32(port, data);
AnnaBridge 184:08ed48f1de7f 101 }
AnnaBridge 184:08ed48f1de7f 102
AnnaBridge 184:08ed48f1de7f 103 return data;
AnnaBridge 184:08ed48f1de7f 104 }
AnnaBridge 184:08ed48f1de7f 105
AnnaBridge 187:0387e8f68319 106 void mbed_itm_send_block(uint32_t port, const void *data, size_t len)
AnnaBridge 187:0387e8f68319 107 {
AnnaBridge 187:0387e8f68319 108 const char *ptr = data;
AnnaBridge 187:0387e8f68319 109
AnnaBridge 187:0387e8f68319 110 /* Check if ITM and port is enabled */
AnnaBridge 187:0387e8f68319 111 if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
AnnaBridge 187:0387e8f68319 112 ((ITM->TER & (1UL << port)) != 0UL)) { /* ITM Port enabled */
AnnaBridge 187:0387e8f68319 113 /* Output single byte at a time until data is aligned */
AnnaBridge 187:0387e8f68319 114 while ((((uintptr_t) ptr) & 3) && len != 0) {
AnnaBridge 187:0387e8f68319 115 itm_out8(port, *ptr++);
AnnaBridge 187:0387e8f68319 116 len--;
AnnaBridge 187:0387e8f68319 117 }
AnnaBridge 187:0387e8f68319 118
AnnaBridge 187:0387e8f68319 119 /* Output bulk of data one word at a time */
AnnaBridge 187:0387e8f68319 120 while (len >= 4) {
AnnaBridge 187:0387e8f68319 121 itm_out32(port, *(const uint32_t *) ptr);
AnnaBridge 187:0387e8f68319 122 ptr += 4;
AnnaBridge 187:0387e8f68319 123 len -= 4;
AnnaBridge 187:0387e8f68319 124 }
AnnaBridge 187:0387e8f68319 125
AnnaBridge 187:0387e8f68319 126 /* Output any trailing bytes */
AnnaBridge 187:0387e8f68319 127 while (len != 0) {
AnnaBridge 187:0387e8f68319 128 itm_out8(port, *ptr++);
AnnaBridge 187:0387e8f68319 129 len--;
AnnaBridge 187:0387e8f68319 130 }
AnnaBridge 187:0387e8f68319 131 }
AnnaBridge 187:0387e8f68319 132 }
AnnaBridge 184:08ed48f1de7f 133 #endif // defined(DEVICE_ITM)