Diff: hal/mbed_itm_api.c

Revision:

187:0387e8f68319

Parent:

184:08ed48f1de7f

Child:

189:f392fc9709a3

--- a/hal/mbed_itm_api.c	Fri Jun 22 16:45:37 2018 +0100
+++ b/hal/mbed_itm_api.c	Thu Sep 06 13:40:20 2018 +0100
@@ -21,7 +21,11 @@
 
 #include <stdbool.h>
 
-#define ITM_ENABLE_WRITE 0xC5ACCE55 
+#ifndef ITM_STIM_FIFOREADY_Msk
+#define ITM_STIM_FIFOREADY_Msk 1
+#endif
+
+#define ITM_ENABLE_WRITE 0xC5ACCE55
 
 #define SWO_NRZ 0x02
 #define SWO_STIMULUS_PORT 0x01
@@ -56,32 +60,74 @@
         ITM->TPR  = 0x0;
 
         /* Trace Control Register */
-        ITM->TCR  = (1 << ITM_TCR_TraceBusID_Pos) | 
-                    (1 << ITM_TCR_DWTENA_Pos)     | 
+        ITM->TCR  = (1 << ITM_TCR_TraceBusID_Pos) |
+                    (1 << ITM_TCR_DWTENA_Pos)     |
                     (1 << ITM_TCR_SYNCENA_Pos)    |
                     (1 << ITM_TCR_ITMENA_Pos);
 
         /* Trace Enable Register */
-        ITM->TER = SWO_STIMULUS_PORT;    
+        ITM->TER = SWO_STIMULUS_PORT;
+    }
+}
+
+static void itm_out8(uint32_t port, uint8_t data)
+{
+    /* Wait until port is available */
+    while ((ITM->PORT[port].u32 & ITM_STIM_FIFOREADY_Msk) == 0) {
+        __NOP();
     }
+
+    /* write data to port */
+    ITM->PORT[port].u8 = data;
+}
+
+static void itm_out32(uint32_t port, uint32_t data)
+{
+    /* Wait until port is available */
+    while ((ITM->PORT[port].u32 & ITM_STIM_FIFOREADY_Msk) == 0) {
+        __NOP();
+    }
+
+    /* write data to port */
+    ITM->PORT[port].u32 = data;
 }
 
 uint32_t mbed_itm_send(uint32_t port, uint32_t data)
 {
     /* Check if ITM and port is enabled */
     if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
-        ((ITM->TER & (1UL << port)     ) != 0UL)   )     /* ITM Port enabled */
-    {
-        /* write data to port */
-        ITM->PORT[port].u32 = data;
-
-        /* Wait until data has been clocked out */
-        while (ITM->PORT[port].u32 == 0UL) {
-            __NOP();
-        }
+            ((ITM->TER & (1UL << port)) != 0UL)) {       /* ITM Port enabled */
+        itm_out32(port, data);
     }
 
     return data;
 }
 
+void mbed_itm_send_block(uint32_t port, const void *data, size_t len)
+{
+    const char *ptr = data;
+
+    /* Check if ITM and port is enabled */
+    if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
+            ((ITM->TER & (1UL << port)) != 0UL)) {       /* ITM Port enabled */
+        /* Output single byte at a time until data is aligned */
+        while ((((uintptr_t) ptr) & 3) && len != 0) {
+            itm_out8(port, *ptr++);
+            len--;
+        }
+
+        /* Output bulk of data one word at a time */
+        while (len >= 4) {
+            itm_out32(port, *(const uint32_t *) ptr);
+            ptr += 4;
+            len -= 4;
+        }
+
+        /* Output any trailing bytes */
+        while (len != 0) {
+            itm_out8(port, *ptr++);
+            len--;
+        }
+    }
+}
 #endif // defined(DEVICE_ITM)