mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

hal/mbed_itm_api.c@184:08ed48f1de7f, 2018-04-19 (annotated)

Committer:
AnnaBridge
Date:
Thu Apr 19 17:12:19 2018 +0100
Revision:
184:08ed48f1de7f
Child:
187:0387e8f68319
mbed-dev library. Release version 161

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 184:08ed48f1de7f 1 /* mbed Microcontroller Library
AnnaBridge 184:08ed48f1de7f 2 * Copyright (c) 2017 ARM Limited
AnnaBridge 184:08ed48f1de7f 3 *
AnnaBridge 184:08ed48f1de7f 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 184:08ed48f1de7f 5 * you may not use this file except in compliance with the License.
AnnaBridge 184:08ed48f1de7f 6 * You may obtain a copy of the License at
AnnaBridge 184:08ed48f1de7f 7 *
AnnaBridge 184:08ed48f1de7f 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 184:08ed48f1de7f 9 *
AnnaBridge 184:08ed48f1de7f 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 184:08ed48f1de7f 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 184:08ed48f1de7f 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 184:08ed48f1de7f 13 * See the License for the specific language governing permissions and
AnnaBridge 184:08ed48f1de7f 14 * limitations under the License.
AnnaBridge 184:08ed48f1de7f 15 */
AnnaBridge 184:08ed48f1de7f 16
AnnaBridge 184:08ed48f1de7f 17 #if defined(DEVICE_ITM)
AnnaBridge 184:08ed48f1de7f 18
AnnaBridge 184:08ed48f1de7f 19 #include "hal/itm_api.h"
AnnaBridge 184:08ed48f1de7f 20 #include "cmsis.h"
AnnaBridge 184:08ed48f1de7f 21
AnnaBridge 184:08ed48f1de7f 22 #include <stdbool.h>
AnnaBridge 184:08ed48f1de7f 23
AnnaBridge 184:08ed48f1de7f 24 #define ITM_ENABLE_WRITE 0xC5ACCE55
AnnaBridge 184:08ed48f1de7f 25
AnnaBridge 184:08ed48f1de7f 26 #define SWO_NRZ 0x02
AnnaBridge 184:08ed48f1de7f 27 #define SWO_STIMULUS_PORT 0x01
AnnaBridge 184:08ed48f1de7f 28
AnnaBridge 184:08ed48f1de7f 29 void mbed_itm_init(void)
AnnaBridge 184:08ed48f1de7f 30 {
AnnaBridge 184:08ed48f1de7f 31 static bool do_init = true;
AnnaBridge 184:08ed48f1de7f 32
AnnaBridge 184:08ed48f1de7f 33 if (do_init) {
AnnaBridge 184:08ed48f1de7f 34 do_init = false;
AnnaBridge 184:08ed48f1de7f 35
AnnaBridge 184:08ed48f1de7f 36 itm_init();
AnnaBridge 184:08ed48f1de7f 37
AnnaBridge 184:08ed48f1de7f 38 /* Enable write access to ITM registers. */
AnnaBridge 184:08ed48f1de7f 39 ITM->LAR = ITM_ENABLE_WRITE;
AnnaBridge 184:08ed48f1de7f 40
AnnaBridge 184:08ed48f1de7f 41 /* Trace Port Interface Selected Pin Protocol Register. */
AnnaBridge 184:08ed48f1de7f 42 TPI->SPPR = (SWO_NRZ << TPI_SPPR_TXMODE_Pos);
AnnaBridge 184:08ed48f1de7f 43
AnnaBridge 184:08ed48f1de7f 44 /* Trace Port Interface Formatter and Flush Control Register */
AnnaBridge 184:08ed48f1de7f 45 TPI->FFCR = (1 << TPI_FFCR_TrigIn_Pos);
AnnaBridge 184:08ed48f1de7f 46
AnnaBridge 184:08ed48f1de7f 47 /* Data Watchpoint and Trace Control Register */
AnnaBridge 184:08ed48f1de7f 48 DWT->CTRL = (1 << DWT_CTRL_CYCTAP_Pos) |
AnnaBridge 184:08ed48f1de7f 49 (0xF << DWT_CTRL_POSTINIT_Pos) |
AnnaBridge 184:08ed48f1de7f 50 (0xF << DWT_CTRL_POSTPRESET_Pos) |
AnnaBridge 184:08ed48f1de7f 51 (1 << DWT_CTRL_CYCCNTENA_Pos);
AnnaBridge 184:08ed48f1de7f 52
AnnaBridge 184:08ed48f1de7f 53 /* Trace Privilege Register.
AnnaBridge 184:08ed48f1de7f 54 * Disable access to trace channel configuration from non-privileged mode.
AnnaBridge 184:08ed48f1de7f 55 */
AnnaBridge 184:08ed48f1de7f 56 ITM->TPR = 0x0;
AnnaBridge 184:08ed48f1de7f 57
AnnaBridge 184:08ed48f1de7f 58 /* Trace Control Register */
AnnaBridge 184:08ed48f1de7f 59 ITM->TCR = (1 << ITM_TCR_TraceBusID_Pos) |
AnnaBridge 184:08ed48f1de7f 60 (1 << ITM_TCR_DWTENA_Pos) |
AnnaBridge 184:08ed48f1de7f 61 (1 << ITM_TCR_SYNCENA_Pos) |
AnnaBridge 184:08ed48f1de7f 62 (1 << ITM_TCR_ITMENA_Pos);
AnnaBridge 184:08ed48f1de7f 63
AnnaBridge 184:08ed48f1de7f 64 /* Trace Enable Register */
AnnaBridge 184:08ed48f1de7f 65 ITM->TER = SWO_STIMULUS_PORT;
AnnaBridge 184:08ed48f1de7f 66 }
AnnaBridge 184:08ed48f1de7f 67 }
AnnaBridge 184:08ed48f1de7f 68
AnnaBridge 184:08ed48f1de7f 69 uint32_t mbed_itm_send(uint32_t port, uint32_t data)
AnnaBridge 184:08ed48f1de7f 70 {
AnnaBridge 184:08ed48f1de7f 71 /* Check if ITM and port is enabled */
AnnaBridge 184:08ed48f1de7f 72 if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
AnnaBridge 184:08ed48f1de7f 73 ((ITM->TER & (1UL << port) ) != 0UL) ) /* ITM Port enabled */
AnnaBridge 184:08ed48f1de7f 74 {
AnnaBridge 184:08ed48f1de7f 75 /* write data to port */
AnnaBridge 184:08ed48f1de7f 76 ITM->PORT[port].u32 = data;
AnnaBridge 184:08ed48f1de7f 77
AnnaBridge 184:08ed48f1de7f 78 /* Wait until data has been clocked out */
AnnaBridge 184:08ed48f1de7f 79 while (ITM->PORT[port].u32 == 0UL) {
AnnaBridge 184:08ed48f1de7f 80 __NOP();
AnnaBridge 184:08ed48f1de7f 81 }
AnnaBridge 184:08ed48f1de7f 82 }
AnnaBridge 184:08ed48f1de7f 83
AnnaBridge 184:08ed48f1de7f 84 return data;
AnnaBridge 184:08ed48f1de7f 85 }
AnnaBridge 184:08ed48f1de7f 86
AnnaBridge 184:08ed48f1de7f 87 #endif // defined(DEVICE_ITM)