36372 mbed / Mbed 2 deprecated SP14P1_skeleton

skeleton for lab1

Dependencies:   AvailableMemory mbed-rtos mbed

Fork of helloaabbc by 32314 mbed

mbed-rtos/rtx/LPC1768/ARM/HAL_CM3.c@1:55e99f6e2aa5, 2014-04-04 (annotated)

Committer:
mbed36372
Date:
Fri Apr 04 21:31:22 2014 +0000
Revision:
1:55e99f6e2aa5
Parent:
0:1c8f2727e9f5 
SP14_lab1

Who changed what in which revision?

UserRevisionLine numberNew contents of line
y7jin 0:1c8f2727e9f5 1 /*----------------------------------------------------------------------------
y7jin 0:1c8f2727e9f5 2 * RL-ARM - RTX
y7jin 0:1c8f2727e9f5 3 *----------------------------------------------------------------------------
y7jin 0:1c8f2727e9f5 4 * Name: HAL_CM3.C
y7jin 0:1c8f2727e9f5 5 * Purpose: Hardware Abstraction Layer for Cortex-M3
y7jin 0:1c8f2727e9f5 6 * Rev.: V4.60
y7jin 0:1c8f2727e9f5 7 *----------------------------------------------------------------------------
y7jin 0:1c8f2727e9f5 8 *
y7jin 0:1c8f2727e9f5 9 * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
y7jin 0:1c8f2727e9f5 10 * All rights reserved.
y7jin 0:1c8f2727e9f5 11 * Redistribution and use in source and binary forms, with or without
y7jin 0:1c8f2727e9f5 12 * modification, are permitted provided that the following conditions are met:
y7jin 0:1c8f2727e9f5 13 * - Redistributions of source code must retain the above copyright
y7jin 0:1c8f2727e9f5 14 * notice, this list of conditions and the following disclaimer.
y7jin 0:1c8f2727e9f5 15 * - Redistributions in binary form must reproduce the above copyright
y7jin 0:1c8f2727e9f5 16 * notice, this list of conditions and the following disclaimer in the
y7jin 0:1c8f2727e9f5 17 * documentation and/or other materials provided with the distribution.
y7jin 0:1c8f2727e9f5 18 * - Neither the name of ARM nor the names of its contributors may be used
y7jin 0:1c8f2727e9f5 19 * to endorse or promote products derived from this software without
y7jin 0:1c8f2727e9f5 20 * specific prior written permission.
y7jin 0:1c8f2727e9f5 21 *
y7jin 0:1c8f2727e9f5 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
y7jin 0:1c8f2727e9f5 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
y7jin 0:1c8f2727e9f5 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
y7jin 0:1c8f2727e9f5 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
y7jin 0:1c8f2727e9f5 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
y7jin 0:1c8f2727e9f5 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
y7jin 0:1c8f2727e9f5 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
y7jin 0:1c8f2727e9f5 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
y7jin 0:1c8f2727e9f5 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
y7jin 0:1c8f2727e9f5 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
y7jin 0:1c8f2727e9f5 32 * POSSIBILITY OF SUCH DAMAGE.
y7jin 0:1c8f2727e9f5 33 *---------------------------------------------------------------------------*/
y7jin 0:1c8f2727e9f5 34
y7jin 0:1c8f2727e9f5 35 #include "rt_TypeDef.h"
y7jin 0:1c8f2727e9f5 36 #include "RTX_Config.h"
y7jin 0:1c8f2727e9f5 37 #include "rt_System.h"
y7jin 0:1c8f2727e9f5 38 #include "rt_HAL_CM.h"
y7jin 0:1c8f2727e9f5 39 #include "rt_Task.h"
y7jin 0:1c8f2727e9f5 40 #include "rt_MemBox.h"
y7jin 0:1c8f2727e9f5 41
y7jin 0:1c8f2727e9f5 42
y7jin 0:1c8f2727e9f5 43 /*----------------------------------------------------------------------------
y7jin 0:1c8f2727e9f5 44 * Functions
y7jin 0:1c8f2727e9f5 45 *---------------------------------------------------------------------------*/
y7jin 0:1c8f2727e9f5 46
y7jin 0:1c8f2727e9f5 47
y7jin 0:1c8f2727e9f5 48 /*--------------------------- rt_set_PSP ------------------------------------*/
y7jin 0:1c8f2727e9f5 49
y7jin 0:1c8f2727e9f5 50 __asm void rt_set_PSP (U32 stack) {
y7jin 0:1c8f2727e9f5 51 MSR PSP,R0
y7jin 0:1c8f2727e9f5 52 BX LR
y7jin 0:1c8f2727e9f5 53 }
y7jin 0:1c8f2727e9f5 54
y7jin 0:1c8f2727e9f5 55
y7jin 0:1c8f2727e9f5 56 /*--------------------------- rt_get_PSP ------------------------------------*/
y7jin 0:1c8f2727e9f5 57
y7jin 0:1c8f2727e9f5 58 __asm U32 rt_get_PSP (void) {
y7jin 0:1c8f2727e9f5 59 MRS R0,PSP
y7jin 0:1c8f2727e9f5 60 BX LR
y7jin 0:1c8f2727e9f5 61 }
y7jin 0:1c8f2727e9f5 62
y7jin 0:1c8f2727e9f5 63
y7jin 0:1c8f2727e9f5 64 /*--------------------------- os_set_env ------------------------------------*/
y7jin 0:1c8f2727e9f5 65
y7jin 0:1c8f2727e9f5 66 __asm void os_set_env (void) {
y7jin 0:1c8f2727e9f5 67 /* Switch to Unprivileged/Privileged Thread mode, use PSP. */
y7jin 0:1c8f2727e9f5 68 MOV R0,SP ; PSP = MSP
y7jin 0:1c8f2727e9f5 69 MSR PSP,R0
y7jin 0:1c8f2727e9f5 70 LDR R0,=__cpp(&os_flags)
y7jin 0:1c8f2727e9f5 71 LDRB R0,[R0]
y7jin 0:1c8f2727e9f5 72 LSLS R0,#31
y7jin 0:1c8f2727e9f5 73 MOVNE R0,#0x02 ; Privileged Thread mode, use PSP
y7jin 0:1c8f2727e9f5 74 MOVEQ R0,#0x03 ; Unprivileged Thread mode, use PSP
y7jin 0:1c8f2727e9f5 75 MSR CONTROL,R0
y7jin 0:1c8f2727e9f5 76 BX LR
y7jin 0:1c8f2727e9f5 77
y7jin 0:1c8f2727e9f5 78 ALIGN
y7jin 0:1c8f2727e9f5 79 }
y7jin 0:1c8f2727e9f5 80
y7jin 0:1c8f2727e9f5 81
y7jin 0:1c8f2727e9f5 82 /*--------------------------- _alloc_box ------------------------------------*/
y7jin 0:1c8f2727e9f5 83
y7jin 0:1c8f2727e9f5 84 __asm void *_alloc_box (void *box_mem) {
y7jin 0:1c8f2727e9f5 85 /* Function wrapper for Unprivileged/Privileged mode. */
y7jin 0:1c8f2727e9f5 86 LDR R12,=__cpp(rt_alloc_box)
y7jin 0:1c8f2727e9f5 87 MRS R3,IPSR
y7jin 0:1c8f2727e9f5 88 LSLS R3,#24
y7jin 0:1c8f2727e9f5 89 BXNE R12
y7jin 0:1c8f2727e9f5 90 MRS R3,CONTROL
y7jin 0:1c8f2727e9f5 91 LSLS R3,#31
y7jin 0:1c8f2727e9f5 92 BXEQ R12
y7jin 0:1c8f2727e9f5 93 SVC 0
y7jin 0:1c8f2727e9f5 94 BX LR
y7jin 0:1c8f2727e9f5 95
y7jin 0:1c8f2727e9f5 96 ALIGN
y7jin 0:1c8f2727e9f5 97 }
y7jin 0:1c8f2727e9f5 98
y7jin 0:1c8f2727e9f5 99
y7jin 0:1c8f2727e9f5 100 /*--------------------------- _free_box -------------------------------------*/
y7jin 0:1c8f2727e9f5 101
y7jin 0:1c8f2727e9f5 102 __asm int _free_box (void *box_mem, void *box) {
y7jin 0:1c8f2727e9f5 103 /* Function wrapper for Unprivileged/Privileged mode. */
y7jin 0:1c8f2727e9f5 104 LDR R12,=__cpp(rt_free_box)
y7jin 0:1c8f2727e9f5 105 MRS R3,IPSR
y7jin 0:1c8f2727e9f5 106 LSLS R3,#24
y7jin 0:1c8f2727e9f5 107 BXNE R12
y7jin 0:1c8f2727e9f5 108 MRS R3,CONTROL
y7jin 0:1c8f2727e9f5 109 LSLS R3,#31
y7jin 0:1c8f2727e9f5 110 BXEQ R12
y7jin 0:1c8f2727e9f5 111 SVC 0
y7jin 0:1c8f2727e9f5 112 BX LR
y7jin 0:1c8f2727e9f5 113
y7jin 0:1c8f2727e9f5 114 ALIGN
y7jin 0:1c8f2727e9f5 115 }
y7jin 0:1c8f2727e9f5 116
y7jin 0:1c8f2727e9f5 117
y7jin 0:1c8f2727e9f5 118 /*-------------------------- SVC_Handler ------------------------------------*/
y7jin 0:1c8f2727e9f5 119
y7jin 0:1c8f2727e9f5 120 __asm void SVC_Handler (void) {
y7jin 0:1c8f2727e9f5 121 PRESERVE8
y7jin 0:1c8f2727e9f5 122
y7jin 0:1c8f2727e9f5 123 IMPORT SVC_Count
y7jin 0:1c8f2727e9f5 124 IMPORT SVC_Table
y7jin 0:1c8f2727e9f5 125 IMPORT rt_stk_check
y7jin 0:1c8f2727e9f5 126
y7jin 0:1c8f2727e9f5 127 MRS R0,PSP ; Read PSP
y7jin 0:1c8f2727e9f5 128 LDR R1,[R0,#24] ; Read Saved PC from Stack
y7jin 0:1c8f2727e9f5 129 LDRB R1,[R1,#-2] ; Load SVC Number
y7jin 0:1c8f2727e9f5 130 CBNZ R1,SVC_User
y7jin 0:1c8f2727e9f5 131
y7jin 0:1c8f2727e9f5 132 LDM R0,{R0-R3,R12} ; Read R0-R3,R12 from stack
y7jin 0:1c8f2727e9f5 133 BLX R12 ; Call SVC Function
y7jin 0:1c8f2727e9f5 134
y7jin 0:1c8f2727e9f5 135 MRS R12,PSP ; Read PSP
y7jin 0:1c8f2727e9f5 136 STM R12,{R0-R2} ; Store return values
y7jin 0:1c8f2727e9f5 137
y7jin 0:1c8f2727e9f5 138 LDR R3,=__cpp(&os_tsk)
y7jin 0:1c8f2727e9f5 139 LDM R3,{R1,R2} ; os_tsk.run, os_tsk.new
y7jin 0:1c8f2727e9f5 140 CMP R1,R2
y7jin 0:1c8f2727e9f5 141 BEQ SVC_Exit ; no task switch
y7jin 0:1c8f2727e9f5 142
y7jin 0:1c8f2727e9f5 143 CBZ R1,SVC_Next ; Runtask deleted?
y7jin 0:1c8f2727e9f5 144 STMDB R12!,{R4-R11} ; Save Old context
y7jin 0:1c8f2727e9f5 145 STR R12,[R1,#TCB_TSTACK] ; Update os_tsk.run->tsk_stack
y7jin 0:1c8f2727e9f5 146
y7jin 0:1c8f2727e9f5 147 PUSH {R2,R3}
y7jin 0:1c8f2727e9f5 148 BL rt_stk_check ; Check for Stack overflow
y7jin 0:1c8f2727e9f5 149 POP {R2,R3}
y7jin 0:1c8f2727e9f5 150
y7jin 0:1c8f2727e9f5 151 SVC_Next
y7jin 0:1c8f2727e9f5 152 STR R2,[R3] ; os_tsk.run = os_tsk.new
y7jin 0:1c8f2727e9f5 153
y7jin 0:1c8f2727e9f5 154 LDR R12,[R2,#TCB_TSTACK] ; os_tsk.new->tsk_stack
y7jin 0:1c8f2727e9f5 155 LDMIA R12!,{R4-R11} ; Restore New Context
y7jin 0:1c8f2727e9f5 156 MSR PSP,R12 ; Write PSP
y7jin 0:1c8f2727e9f5 157
y7jin 0:1c8f2727e9f5 158 SVC_Exit
y7jin 0:1c8f2727e9f5 159 MVN LR,#:NOT:0xFFFFFFFD ; set EXC_RETURN value
y7jin 0:1c8f2727e9f5 160 BX LR
y7jin 0:1c8f2727e9f5 161
y7jin 0:1c8f2727e9f5 162 /*------------------- User SVC ------------------------------*/
y7jin 0:1c8f2727e9f5 163
y7jin 0:1c8f2727e9f5 164 SVC_User
y7jin 0:1c8f2727e9f5 165 PUSH {R4,LR} ; Save Registers
y7jin 0:1c8f2727e9f5 166 LDR R2,=SVC_Count
y7jin 0:1c8f2727e9f5 167 LDR R2,[R2]
y7jin 0:1c8f2727e9f5 168 CMP R1,R2
y7jin 0:1c8f2727e9f5 169 BHI SVC_Done ; Overflow
y7jin 0:1c8f2727e9f5 170
y7jin 0:1c8f2727e9f5 171 LDR R4,=SVC_Table-4
y7jin 0:1c8f2727e9f5 172 LDR R4,[R4,R1,LSL #2] ; Load SVC Function Address
y7jin 0:1c8f2727e9f5 173
y7jin 0:1c8f2727e9f5 174 LDM R0,{R0-R3,R12} ; Read R0-R3,R12 from stack
y7jin 0:1c8f2727e9f5 175 BLX R4 ; Call SVC Function
y7jin 0:1c8f2727e9f5 176
y7jin 0:1c8f2727e9f5 177 MRS R12,PSP
y7jin 0:1c8f2727e9f5 178 STM R12,{R0-R3} ; Function return values
y7jin 0:1c8f2727e9f5 179 SVC_Done
y7jin 0:1c8f2727e9f5 180 POP {R4,PC} ; RETI
y7jin 0:1c8f2727e9f5 181
y7jin 0:1c8f2727e9f5 182 ALIGN
y7jin 0:1c8f2727e9f5 183 }
y7jin 0:1c8f2727e9f5 184
y7jin 0:1c8f2727e9f5 185
y7jin 0:1c8f2727e9f5 186 /*-------------------------- PendSV_Handler ---------------------------------*/
y7jin 0:1c8f2727e9f5 187
y7jin 0:1c8f2727e9f5 188 __asm void PendSV_Handler (void) {
y7jin 0:1c8f2727e9f5 189 PRESERVE8
y7jin 0:1c8f2727e9f5 190
y7jin 0:1c8f2727e9f5 191 BL __cpp(rt_pop_req)
y7jin 0:1c8f2727e9f5 192
y7jin 0:1c8f2727e9f5 193 Sys_Switch
y7jin 0:1c8f2727e9f5 194 LDR R3,=__cpp(&os_tsk)
y7jin 0:1c8f2727e9f5 195 LDM R3,{R1,R2} ; os_tsk.run, os_tsk.new
y7jin 0:1c8f2727e9f5 196 CMP R1,R2
y7jin 0:1c8f2727e9f5 197 BEQ Sys_Exit
y7jin 0:1c8f2727e9f5 198
y7jin 0:1c8f2727e9f5 199 MRS R12,PSP ; Read PSP
y7jin 0:1c8f2727e9f5 200 STMDB R12!,{R4-R11} ; Save Old context
y7jin 0:1c8f2727e9f5 201 STR R12,[R1,#TCB_TSTACK] ; Update os_tsk.run->tsk_stack
y7jin 0:1c8f2727e9f5 202
y7jin 0:1c8f2727e9f5 203 PUSH {R2,R3}
y7jin 0:1c8f2727e9f5 204 BL rt_stk_check ; Check for Stack overflow
y7jin 0:1c8f2727e9f5 205 POP {R2,R3}
y7jin 0:1c8f2727e9f5 206
y7jin 0:1c8f2727e9f5 207 STR R2,[R3] ; os_tsk.run = os_tsk.new
y7jin 0:1c8f2727e9f5 208
y7jin 0:1c8f2727e9f5 209 LDR R12,[R2,#TCB_TSTACK] ; os_tsk.new->tsk_stack
y7jin 0:1c8f2727e9f5 210 LDMIA R12!,{R4-R11} ; Restore New Context
y7jin 0:1c8f2727e9f5 211 MSR PSP,R12 ; Write PSP
y7jin 0:1c8f2727e9f5 212
y7jin 0:1c8f2727e9f5 213 Sys_Exit
y7jin 0:1c8f2727e9f5 214 MVN LR,#:NOT:0xFFFFFFFD ; set EXC_RETURN value
y7jin 0:1c8f2727e9f5 215 BX LR ; Return to Thread Mode
y7jin 0:1c8f2727e9f5 216
y7jin 0:1c8f2727e9f5 217 ALIGN
y7jin 0:1c8f2727e9f5 218 }
y7jin 0:1c8f2727e9f5 219
y7jin 0:1c8f2727e9f5 220
y7jin 0:1c8f2727e9f5 221 /*-------------------------- SysTick_Handler --------------------------------*/
y7jin 0:1c8f2727e9f5 222
y7jin 0:1c8f2727e9f5 223 __asm void SysTick_Handler (void) {
y7jin 0:1c8f2727e9f5 224 PRESERVE8
y7jin 0:1c8f2727e9f5 225
y7jin 0:1c8f2727e9f5 226 BL __cpp(rt_systick)
y7jin 0:1c8f2727e9f5 227 B Sys_Switch
y7jin 0:1c8f2727e9f5 228
y7jin 0:1c8f2727e9f5 229 ALIGN
y7jin 0:1c8f2727e9f5 230 }
y7jin 0:1c8f2727e9f5 231
y7jin 0:1c8f2727e9f5 232
y7jin 0:1c8f2727e9f5 233 /*-------------------------- OS_Tick_Handler --------------------------------*/
y7jin 0:1c8f2727e9f5 234
y7jin 0:1c8f2727e9f5 235 __asm void OS_Tick_Handler (void) {
y7jin 0:1c8f2727e9f5 236 PRESERVE8
y7jin 0:1c8f2727e9f5 237
y7jin 0:1c8f2727e9f5 238 BL __cpp(os_tick_irqack)
y7jin 0:1c8f2727e9f5 239 BL __cpp(rt_systick)
y7jin 0:1c8f2727e9f5 240 B Sys_Switch
y7jin 0:1c8f2727e9f5 241
y7jin 0:1c8f2727e9f5 242 ALIGN
y7jin 0:1c8f2727e9f5 243 }
y7jin 0:1c8f2727e9f5 244
y7jin 0:1c8f2727e9f5 245
y7jin 0:1c8f2727e9f5 246 /*----------------------------------------------------------------------------
y7jin 0:1c8f2727e9f5 247 * end of file
y7jin 0:1c8f2727e9f5 248 *---------------------------------------------------------------------------*/
y7jin 0:1c8f2727e9f5 249