36372 mbed / Mbed 2 deprecated SP14P1_skeleton

skeleton for lab1

Dependencies:   AvailableMemory mbed-rtos mbed

Fork of helloaabbc by 32314 mbed

mbed-rtos/rtx/LPC11U24/uARM/HAL_CM0.c@1:55e99f6e2aa5, 2014-04-04 (annotated)

Committer:
mbed36372
Date:
Fri Apr 04 21:31:22 2014 +0000
Revision:
1:55e99f6e2aa5
Parent:
0:1c8f2727e9f5 
SP14_lab1

Who changed what in which revision?

UserRevisionLine numberNew contents of line
y7jin 0:1c8f2727e9f5 1 /*----------------------------------------------------------------------------
y7jin 0:1c8f2727e9f5 2 * RL-ARM - RTX
y7jin 0:1c8f2727e9f5 3 *----------------------------------------------------------------------------
y7jin 0:1c8f2727e9f5 4 * Name: HAL_CM0.C
y7jin 0:1c8f2727e9f5 5 * Purpose: Hardware Abstraction Layer for Cortex-M0
y7jin 0:1c8f2727e9f5 6 * Rev.: V4.60
y7jin 0:1c8f2727e9f5 7 *----------------------------------------------------------------------------
y7jin 0:1c8f2727e9f5 8 *
y7jin 0:1c8f2727e9f5 9 * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
y7jin 0:1c8f2727e9f5 10 * All rights reserved.
y7jin 0:1c8f2727e9f5 11 * Redistribution and use in source and binary forms, with or without
y7jin 0:1c8f2727e9f5 12 * modification, are permitted provided that the following conditions are met:
y7jin 0:1c8f2727e9f5 13 * - Redistributions of source code must retain the above copyright
y7jin 0:1c8f2727e9f5 14 * notice, this list of conditions and the following disclaimer.
y7jin 0:1c8f2727e9f5 15 * - Redistributions in binary form must reproduce the above copyright
y7jin 0:1c8f2727e9f5 16 * notice, this list of conditions and the following disclaimer in the
y7jin 0:1c8f2727e9f5 17 * documentation and/or other materials provided with the distribution.
y7jin 0:1c8f2727e9f5 18 * - Neither the name of ARM nor the names of its contributors may be used
y7jin 0:1c8f2727e9f5 19 * to endorse or promote products derived from this software without
y7jin 0:1c8f2727e9f5 20 * specific prior written permission.
y7jin 0:1c8f2727e9f5 21 *
y7jin 0:1c8f2727e9f5 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
y7jin 0:1c8f2727e9f5 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
y7jin 0:1c8f2727e9f5 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
y7jin 0:1c8f2727e9f5 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
y7jin 0:1c8f2727e9f5 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
y7jin 0:1c8f2727e9f5 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
y7jin 0:1c8f2727e9f5 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
y7jin 0:1c8f2727e9f5 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
y7jin 0:1c8f2727e9f5 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
y7jin 0:1c8f2727e9f5 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
y7jin 0:1c8f2727e9f5 32 * POSSIBILITY OF SUCH DAMAGE.
y7jin 0:1c8f2727e9f5 33 *---------------------------------------------------------------------------*/
y7jin 0:1c8f2727e9f5 34
y7jin 0:1c8f2727e9f5 35 #include "rt_TypeDef.h"
y7jin 0:1c8f2727e9f5 36 #include "RTX_Config.h"
y7jin 0:1c8f2727e9f5 37 #include "rt_System.h"
y7jin 0:1c8f2727e9f5 38 #include "rt_HAL_CM.h"
y7jin 0:1c8f2727e9f5 39 #include "rt_Task.h"
y7jin 0:1c8f2727e9f5 40 #include "rt_MemBox.h"
y7jin 0:1c8f2727e9f5 41
y7jin 0:1c8f2727e9f5 42
y7jin 0:1c8f2727e9f5 43 /*----------------------------------------------------------------------------
y7jin 0:1c8f2727e9f5 44 * Functions
y7jin 0:1c8f2727e9f5 45 *---------------------------------------------------------------------------*/
y7jin 0:1c8f2727e9f5 46
y7jin 0:1c8f2727e9f5 47
y7jin 0:1c8f2727e9f5 48 /*--------------------------- rt_set_PSP ------------------------------------*/
y7jin 0:1c8f2727e9f5 49
y7jin 0:1c8f2727e9f5 50 __asm void rt_set_PSP (U32 stack) {
y7jin 0:1c8f2727e9f5 51 MSR PSP,R0
y7jin 0:1c8f2727e9f5 52 BX LR
y7jin 0:1c8f2727e9f5 53 }
y7jin 0:1c8f2727e9f5 54
y7jin 0:1c8f2727e9f5 55
y7jin 0:1c8f2727e9f5 56 /*--------------------------- rt_get_PSP ------------------------------------*/
y7jin 0:1c8f2727e9f5 57
y7jin 0:1c8f2727e9f5 58 __asm U32 rt_get_PSP (void) {
y7jin 0:1c8f2727e9f5 59 MRS R0,PSP
y7jin 0:1c8f2727e9f5 60 BX LR
y7jin 0:1c8f2727e9f5 61 }
y7jin 0:1c8f2727e9f5 62
y7jin 0:1c8f2727e9f5 63
y7jin 0:1c8f2727e9f5 64 /*--------------------------- os_set_env ------------------------------------*/
y7jin 0:1c8f2727e9f5 65
y7jin 0:1c8f2727e9f5 66 __asm void os_set_env (void) {
y7jin 0:1c8f2727e9f5 67 /* Switch to Unprivileged/Privileged Thread mode, use PSP. */
y7jin 0:1c8f2727e9f5 68 MOV R0,SP ; PSP = MSP
y7jin 0:1c8f2727e9f5 69 MSR PSP,R0
y7jin 0:1c8f2727e9f5 70 LDR R0,=__cpp(&os_flags)
y7jin 0:1c8f2727e9f5 71 LDRB R0,[R0]
y7jin 0:1c8f2727e9f5 72 LSLS R0,#31
y7jin 0:1c8f2727e9f5 73 BNE PrivilegedE
y7jin 0:1c8f2727e9f5 74 MOVS R0,#0x03 ; Unprivileged Thread mode, use PSP
y7jin 0:1c8f2727e9f5 75 MSR CONTROL,R0
y7jin 0:1c8f2727e9f5 76 BX LR
y7jin 0:1c8f2727e9f5 77 PrivilegedE
y7jin 0:1c8f2727e9f5 78 MOVS R0,#0x02 ; Privileged Thread mode, use PSP
y7jin 0:1c8f2727e9f5 79 MSR CONTROL,R0
y7jin 0:1c8f2727e9f5 80 BX LR
y7jin 0:1c8f2727e9f5 81
y7jin 0:1c8f2727e9f5 82 ALIGN
y7jin 0:1c8f2727e9f5 83 }
y7jin 0:1c8f2727e9f5 84
y7jin 0:1c8f2727e9f5 85
y7jin 0:1c8f2727e9f5 86 /*--------------------------- _alloc_box ------------------------------------*/
y7jin 0:1c8f2727e9f5 87
y7jin 0:1c8f2727e9f5 88 __asm void *_alloc_box (void *box_mem) {
y7jin 0:1c8f2727e9f5 89 /* Function wrapper for Unprivileged/Privileged mode. */
y7jin 0:1c8f2727e9f5 90 LDR R3,=__cpp(rt_alloc_box)
y7jin 0:1c8f2727e9f5 91 MOV R12,R3
y7jin 0:1c8f2727e9f5 92 MRS R3,IPSR
y7jin 0:1c8f2727e9f5 93 LSLS R3,#24
y7jin 0:1c8f2727e9f5 94 BNE PrivilegedA
y7jin 0:1c8f2727e9f5 95 MRS R3,CONTROL
y7jin 0:1c8f2727e9f5 96 LSLS R3,#31
y7jin 0:1c8f2727e9f5 97 BEQ PrivilegedA
y7jin 0:1c8f2727e9f5 98 SVC 0
y7jin 0:1c8f2727e9f5 99 BX LR
y7jin 0:1c8f2727e9f5 100 PrivilegedA
y7jin 0:1c8f2727e9f5 101 BX R12
y7jin 0:1c8f2727e9f5 102
y7jin 0:1c8f2727e9f5 103 ALIGN
y7jin 0:1c8f2727e9f5 104 }
y7jin 0:1c8f2727e9f5 105
y7jin 0:1c8f2727e9f5 106
y7jin 0:1c8f2727e9f5 107 /*--------------------------- _free_box -------------------------------------*/
y7jin 0:1c8f2727e9f5 108
y7jin 0:1c8f2727e9f5 109 __asm int _free_box (void *box_mem, void *box) {
y7jin 0:1c8f2727e9f5 110 /* Function wrapper for Unprivileged/Privileged mode. */
y7jin 0:1c8f2727e9f5 111 LDR R3,=__cpp(rt_free_box)
y7jin 0:1c8f2727e9f5 112 MOV R12,R3
y7jin 0:1c8f2727e9f5 113 MRS R3,IPSR
y7jin 0:1c8f2727e9f5 114 LSLS R3,#24
y7jin 0:1c8f2727e9f5 115 BNE PrivilegedF
y7jin 0:1c8f2727e9f5 116 MRS R3,CONTROL
y7jin 0:1c8f2727e9f5 117 LSLS R3,#31
y7jin 0:1c8f2727e9f5 118 BEQ PrivilegedF
y7jin 0:1c8f2727e9f5 119 SVC 0
y7jin 0:1c8f2727e9f5 120 BX LR
y7jin 0:1c8f2727e9f5 121 PrivilegedF
y7jin 0:1c8f2727e9f5 122 BX R12
y7jin 0:1c8f2727e9f5 123
y7jin 0:1c8f2727e9f5 124 ALIGN
y7jin 0:1c8f2727e9f5 125 }
y7jin 0:1c8f2727e9f5 126
y7jin 0:1c8f2727e9f5 127
y7jin 0:1c8f2727e9f5 128 /*-------------------------- SVC_Handler ------------------------------------*/
y7jin 0:1c8f2727e9f5 129
y7jin 0:1c8f2727e9f5 130 __asm void SVC_Handler (void) {
y7jin 0:1c8f2727e9f5 131 PRESERVE8
y7jin 0:1c8f2727e9f5 132
y7jin 0:1c8f2727e9f5 133 IMPORT SVC_Count
y7jin 0:1c8f2727e9f5 134 IMPORT SVC_Table
y7jin 0:1c8f2727e9f5 135 IMPORT rt_stk_check
y7jin 0:1c8f2727e9f5 136
y7jin 0:1c8f2727e9f5 137 MRS R0,PSP ; Read PSP
y7jin 0:1c8f2727e9f5 138 LDR R1,[R0,#24] ; Read Saved PC from Stack
y7jin 0:1c8f2727e9f5 139 SUBS R1,R1,#2 ; Point to SVC Instruction
y7jin 0:1c8f2727e9f5 140 LDRB R1,[R1] ; Load SVC Number
y7jin 0:1c8f2727e9f5 141 CMP R1,#0
y7jin 0:1c8f2727e9f5 142 BNE SVC_User ; User SVC Number > 0
y7jin 0:1c8f2727e9f5 143
y7jin 0:1c8f2727e9f5 144 MOV LR,R4
y7jin 0:1c8f2727e9f5 145 LDMIA R0,{R0-R3,R4} ; Read R0-R3,R12 from stack
y7jin 0:1c8f2727e9f5 146 MOV R12,R4
y7jin 0:1c8f2727e9f5 147 MOV R4,LR
y7jin 0:1c8f2727e9f5 148 BLX R12 ; Call SVC Function
y7jin 0:1c8f2727e9f5 149
y7jin 0:1c8f2727e9f5 150 MRS R3,PSP ; Read PSP
y7jin 0:1c8f2727e9f5 151 STMIA R3!,{R0-R2} ; Store return values
y7jin 0:1c8f2727e9f5 152
y7jin 0:1c8f2727e9f5 153 LDR R3,=__cpp(&os_tsk)
y7jin 0:1c8f2727e9f5 154 LDMIA R3!,{R1,R2} ; os_tsk.run, os_tsk.new
y7jin 0:1c8f2727e9f5 155 CMP R1,R2
y7jin 0:1c8f2727e9f5 156 BEQ SVC_Exit ; no task switch
y7jin 0:1c8f2727e9f5 157
y7jin 0:1c8f2727e9f5 158 SUBS R3,#8
y7jin 0:1c8f2727e9f5 159 CMP R1,#0 ; Runtask deleted?
y7jin 0:1c8f2727e9f5 160 BEQ SVC_Next
y7jin 0:1c8f2727e9f5 161
y7jin 0:1c8f2727e9f5 162 MRS R0,PSP ; Read PSP
y7jin 0:1c8f2727e9f5 163 SUBS R0,R0,#32 ; Adjust Start Address
y7jin 0:1c8f2727e9f5 164 STR R0,[R1,#TCB_TSTACK] ; Update os_tsk.run->tsk_stack
y7jin 0:1c8f2727e9f5 165 STMIA R0!,{R4-R7} ; Save old context (R4-R7)
y7jin 0:1c8f2727e9f5 166 MOV R4,R8
y7jin 0:1c8f2727e9f5 167 MOV R5,R9
y7jin 0:1c8f2727e9f5 168 MOV R6,R10
y7jin 0:1c8f2727e9f5 169 MOV R7,R11
y7jin 0:1c8f2727e9f5 170 STMIA R0!,{R4-R7} ; Save old context (R8-R11)
y7jin 0:1c8f2727e9f5 171
y7jin 0:1c8f2727e9f5 172 PUSH {R2,R3}
y7jin 0:1c8f2727e9f5 173 BL rt_stk_check ; Check for Stack overflow
y7jin 0:1c8f2727e9f5 174 POP {R2,R3}
y7jin 0:1c8f2727e9f5 175
y7jin 0:1c8f2727e9f5 176 SVC_Next
y7jin 0:1c8f2727e9f5 177 STR R2,[R3] ; os_tsk.run = os_tsk.new
y7jin 0:1c8f2727e9f5 178
y7jin 0:1c8f2727e9f5 179 LDR R0,[R2,#TCB_TSTACK] ; os_tsk.new->tsk_stack
y7jin 0:1c8f2727e9f5 180 ADDS R0,R0,#16 ; Adjust Start Address
y7jin 0:1c8f2727e9f5 181 LDMIA R0!,{R4-R7} ; Restore new Context (R8-R11)
y7jin 0:1c8f2727e9f5 182 MOV R8,R4
y7jin 0:1c8f2727e9f5 183 MOV R9,R5
y7jin 0:1c8f2727e9f5 184 MOV R10,R6
y7jin 0:1c8f2727e9f5 185 MOV R11,R7
y7jin 0:1c8f2727e9f5 186 MSR PSP,R0 ; Write PSP
y7jin 0:1c8f2727e9f5 187 SUBS R0,R0,#32 ; Adjust Start Address
y7jin 0:1c8f2727e9f5 188 LDMIA R0!,{R4-R7} ; Restore new Context (R4-R7)
y7jin 0:1c8f2727e9f5 189
y7jin 0:1c8f2727e9f5 190 SVC_Exit
y7jin 0:1c8f2727e9f5 191 MOVS R0,#:NOT:0xFFFFFFFD ; Set EXC_RETURN value
y7jin 0:1c8f2727e9f5 192 MVNS R0,R0
y7jin 0:1c8f2727e9f5 193 BX R0 ; RETI to Thread Mode, use PSP
y7jin 0:1c8f2727e9f5 194
y7jin 0:1c8f2727e9f5 195 /*------------------- User SVC ------------------------------*/
y7jin 0:1c8f2727e9f5 196
y7jin 0:1c8f2727e9f5 197 SVC_User
y7jin 0:1c8f2727e9f5 198 PUSH {R4,LR} ; Save Registers
y7jin 0:1c8f2727e9f5 199 LDR R2,=SVC_Count
y7jin 0:1c8f2727e9f5 200 LDR R2,[R2]
y7jin 0:1c8f2727e9f5 201 CMP R1,R2
y7jin 0:1c8f2727e9f5 202 BHI SVC_Done ; Overflow
y7jin 0:1c8f2727e9f5 203
y7jin 0:1c8f2727e9f5 204 LDR R4,=SVC_Table-4
y7jin 0:1c8f2727e9f5 205 LSLS R1,R1,#2
y7jin 0:1c8f2727e9f5 206 LDR R4,[R4,R1] ; Load SVC Function Address
y7jin 0:1c8f2727e9f5 207 MOV LR,R4
y7jin 0:1c8f2727e9f5 208
y7jin 0:1c8f2727e9f5 209 LDMIA R0,{R0-R3,R4} ; Read R0-R3,R12 from stack
y7jin 0:1c8f2727e9f5 210 MOV R12,R4
y7jin 0:1c8f2727e9f5 211 BLX LR ; Call SVC Function
y7jin 0:1c8f2727e9f5 212
y7jin 0:1c8f2727e9f5 213 MRS R4,PSP ; Read PSP
y7jin 0:1c8f2727e9f5 214 STMIA R4!,{R0-R3} ; Function return values
y7jin 0:1c8f2727e9f5 215 SVC_Done
y7jin 0:1c8f2727e9f5 216 POP {R4,PC} ; RETI
y7jin 0:1c8f2727e9f5 217
y7jin 0:1c8f2727e9f5 218 ALIGN
y7jin 0:1c8f2727e9f5 219 }
y7jin 0:1c8f2727e9f5 220
y7jin 0:1c8f2727e9f5 221
y7jin 0:1c8f2727e9f5 222 /*-------------------------- PendSV_Handler ---------------------------------*/
y7jin 0:1c8f2727e9f5 223
y7jin 0:1c8f2727e9f5 224 __asm void PendSV_Handler (void) {
y7jin 0:1c8f2727e9f5 225 PRESERVE8
y7jin 0:1c8f2727e9f5 226
y7jin 0:1c8f2727e9f5 227 BL __cpp(rt_pop_req)
y7jin 0:1c8f2727e9f5 228
y7jin 0:1c8f2727e9f5 229 Sys_Switch
y7jin 0:1c8f2727e9f5 230 LDR R3,=__cpp(&os_tsk)
y7jin 0:1c8f2727e9f5 231 LDMIA R3!,{R1,R2} ; os_tsk.run, os_tsk.new
y7jin 0:1c8f2727e9f5 232 CMP R1,R2
y7jin 0:1c8f2727e9f5 233 BEQ Sys_Exit ; no task switch
y7jin 0:1c8f2727e9f5 234
y7jin 0:1c8f2727e9f5 235 SUBS R3,#8
y7jin 0:1c8f2727e9f5 236
y7jin 0:1c8f2727e9f5 237 MRS R0,PSP ; Read PSP
y7jin 0:1c8f2727e9f5 238 SUBS R0,R0,#32 ; Adjust Start Address
y7jin 0:1c8f2727e9f5 239 STR R0,[R1,#TCB_TSTACK] ; Update os_tsk.run->tsk_stack
y7jin 0:1c8f2727e9f5 240 STMIA R0!,{R4-R7} ; Save old context (R4-R7)
y7jin 0:1c8f2727e9f5 241 MOV R4,R8
y7jin 0:1c8f2727e9f5 242 MOV R5,R9
y7jin 0:1c8f2727e9f5 243 MOV R6,R10
y7jin 0:1c8f2727e9f5 244 MOV R7,R11
y7jin 0:1c8f2727e9f5 245 STMIA R0!,{R4-R7} ; Save old context (R8-R11)
y7jin 0:1c8f2727e9f5 246
y7jin 0:1c8f2727e9f5 247 PUSH {R2,R3}
y7jin 0:1c8f2727e9f5 248 BL rt_stk_check ; Check for Stack overflow
y7jin 0:1c8f2727e9f5 249 POP {R2,R3}
y7jin 0:1c8f2727e9f5 250
y7jin 0:1c8f2727e9f5 251 STR R2,[R3] ; os_tsk.run = os_tsk.new
y7jin 0:1c8f2727e9f5 252
y7jin 0:1c8f2727e9f5 253 LDR R0,[R2,#TCB_TSTACK] ; os_tsk.new->tsk_stack
y7jin 0:1c8f2727e9f5 254 ADDS R0,R0,#16 ; Adjust Start Address
y7jin 0:1c8f2727e9f5 255 LDMIA R0!,{R4-R7} ; Restore new Context (R8-R11)
y7jin 0:1c8f2727e9f5 256 MOV R8,R4
y7jin 0:1c8f2727e9f5 257 MOV R9,R5
y7jin 0:1c8f2727e9f5 258 MOV R10,R6
y7jin 0:1c8f2727e9f5 259 MOV R11,R7
y7jin 0:1c8f2727e9f5 260 MSR PSP,R0 ; Write PSP
y7jin 0:1c8f2727e9f5 261 SUBS R0,R0,#32 ; Adjust Start Address
y7jin 0:1c8f2727e9f5 262 LDMIA R0!,{R4-R7} ; Restore new Context (R4-R7)
y7jin 0:1c8f2727e9f5 263
y7jin 0:1c8f2727e9f5 264 Sys_Exit
y7jin 0:1c8f2727e9f5 265 MOVS R0,#:NOT:0xFFFFFFFD ; Set EXC_RETURN value
y7jin 0:1c8f2727e9f5 266 MVNS R0,R0
y7jin 0:1c8f2727e9f5 267 BX R0 ; RETI to Thread Mode, use PSP
y7jin 0:1c8f2727e9f5 268
y7jin 0:1c8f2727e9f5 269 ALIGN
y7jin 0:1c8f2727e9f5 270 }
y7jin 0:1c8f2727e9f5 271
y7jin 0:1c8f2727e9f5 272
y7jin 0:1c8f2727e9f5 273 /*-------------------------- SysTick_Handler --------------------------------*/
y7jin 0:1c8f2727e9f5 274
y7jin 0:1c8f2727e9f5 275 __asm void SysTick_Handler (void) {
y7jin 0:1c8f2727e9f5 276 PRESERVE8
y7jin 0:1c8f2727e9f5 277
y7jin 0:1c8f2727e9f5 278 BL __cpp(rt_systick)
y7jin 0:1c8f2727e9f5 279 B Sys_Switch
y7jin 0:1c8f2727e9f5 280
y7jin 0:1c8f2727e9f5 281 ALIGN
y7jin 0:1c8f2727e9f5 282 }
y7jin 0:1c8f2727e9f5 283
y7jin 0:1c8f2727e9f5 284
y7jin 0:1c8f2727e9f5 285 /*-------------------------- OS_Tick_Handler --------------------------------*/
y7jin 0:1c8f2727e9f5 286
y7jin 0:1c8f2727e9f5 287 __asm void OS_Tick_Handler (void) {
y7jin 0:1c8f2727e9f5 288 PRESERVE8
y7jin 0:1c8f2727e9f5 289
y7jin 0:1c8f2727e9f5 290 BL __cpp(os_tick_irqack)
y7jin 0:1c8f2727e9f5 291 BL __cpp(rt_systick)
y7jin 0:1c8f2727e9f5 292 B Sys_Switch
y7jin 0:1c8f2727e9f5 293
y7jin 0:1c8f2727e9f5 294 ALIGN
y7jin 0:1c8f2727e9f5 295 }
y7jin 0:1c8f2727e9f5 296
y7jin 0:1c8f2727e9f5 297
y7jin 0:1c8f2727e9f5 298 /*----------------------------------------------------------------------------
y7jin 0:1c8f2727e9f5 299 * end of file
y7jin 0:1c8f2727e9f5 300 *---------------------------------------------------------------------------*/
y7jin 0:1c8f2727e9f5 301