Maxim Ibragimov / mbed-dev

mbed library sources. Supersedes mbed-src. Fixed broken STM32F1xx RTC on rtc_api.c

Dependents:   Nucleo_F103RB_RTC_battery_bkup_pwr_off_okay

Fork of mbed-dev by mbed official

targets/TARGET_NORDIC/TARGET_NRF5/us_ticker.c@165:e614a9f1c9e2, 2017-05-26 (annotated)

Committer:
AnnaBridge
Date:
Fri May 26 12:39:01 2017 +0100
Revision:
165:e614a9f1c9e2
Parent:
163:74e0ce7f98e8
Child:
167:e84263d55307
This updates the lib to the mbed lib v 143

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /*
<> 149:156823d33999 2 * Copyright (c) 2013 Nordic Semiconductor ASA
<> 149:156823d33999 3 * All rights reserved.
<> 149:156823d33999 4 *
<> 149:156823d33999 5 * Redistribution and use in source and binary forms, with or without modification,
<> 149:156823d33999 6 * are permitted provided that the following conditions are met:
<> 149:156823d33999 7 *
<> 149:156823d33999 8 * 1. Redistributions of source code must retain the above copyright notice, this list
<> 149:156823d33999 9 * of conditions and the following disclaimer.
<> 149:156823d33999 10 *
<> 149:156823d33999 11 * 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
<> 149:156823d33999 12 * integrated circuit in a product or a software update for such product, must reproduce
<> 149:156823d33999 13 * the above copyright notice, this list of conditions and the following disclaimer in
<> 149:156823d33999 14 * the documentation and/or other materials provided with the distribution.
<> 149:156823d33999 15 *
<> 149:156823d33999 16 * 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
<> 149:156823d33999 17 * used to endorse or promote products derived from this software without specific prior
<> 149:156823d33999 18 * written permission.
<> 149:156823d33999 19 *
<> 149:156823d33999 20 * 4. This software, with or without modification, must only be used with a
<> 149:156823d33999 21 * Nordic Semiconductor ASA integrated circuit.
<> 149:156823d33999 22 *
<> 149:156823d33999 23 * 5. Any software provided in binary or object form under this license must not be reverse
<> 149:156823d33999 24 * engineered, decompiled, modified and/or disassembled.
<> 149:156823d33999 25 *
<> 149:156823d33999 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 149:156823d33999 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 149:156823d33999 28 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 149:156823d33999 29 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 149:156823d33999 30 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 149:156823d33999 31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 149:156823d33999 32 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 149:156823d33999 33 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 149:156823d33999 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 149:156823d33999 35 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 149:156823d33999 36 *
<> 149:156823d33999 37 */
<> 149:156823d33999 38
<> 149:156823d33999 39 #include "us_ticker_api.h"
<> 149:156823d33999 40 #include "common_rtc.h"
<> 149:156823d33999 41 #include "app_util.h"
<> 149:156823d33999 42 #include "nrf_drv_common.h"
<> 149:156823d33999 43 #include "lp_ticker_api.h"
Anna Bridge 163:74e0ce7f98e8 44 #include "mbed_critical.h"
<> 149:156823d33999 45
AnnaBridge 165:e614a9f1c9e2 46 #if defined(NRF52_ERRATA_20)
AnnaBridge 165:e614a9f1c9e2 47 #include "softdevice_handler.h"
AnnaBridge 165:e614a9f1c9e2 48 #endif
<> 149:156823d33999 49
<> 149:156823d33999 50 //------------------------------------------------------------------------------
<> 149:156823d33999 51 // Common stuff used also by lp_ticker and rtc_api (see "common_rtc.h").
<> 149:156823d33999 52 //
<> 149:156823d33999 53 #include "app_util_platform.h"
<> 149:156823d33999 54
<> 149:156823d33999 55 bool m_common_rtc_enabled = false;
<> 149:156823d33999 56 uint32_t volatile m_common_rtc_overflows = 0;
<> 149:156823d33999 57
Anna Bridge 163:74e0ce7f98e8 58 __STATIC_INLINE void rtc_ovf_event_check(void)
Anna Bridge 163:74e0ce7f98e8 59 {
Anna Bridge 163:74e0ce7f98e8 60 if (nrf_rtc_event_pending(COMMON_RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW)) {
Anna Bridge 163:74e0ce7f98e8 61 nrf_rtc_event_clear(COMMON_RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW);
Anna Bridge 163:74e0ce7f98e8 62 // Don't disable this event. It shall occur periodically.
Anna Bridge 163:74e0ce7f98e8 63
Anna Bridge 163:74e0ce7f98e8 64 ++m_common_rtc_overflows;
Anna Bridge 163:74e0ce7f98e8 65 }
Anna Bridge 163:74e0ce7f98e8 66 }
Anna Bridge 163:74e0ce7f98e8 67
<> 149:156823d33999 68 #if defined(TARGET_MCU_NRF51822)
<> 149:156823d33999 69 void common_rtc_irq_handler(void)
<> 149:156823d33999 70 #else
<> 149:156823d33999 71 void COMMON_RTC_IRQ_HANDLER(void)
<> 149:156823d33999 72 #endif
<> 149:156823d33999 73 {
Anna Bridge 163:74e0ce7f98e8 74
Anna Bridge 163:74e0ce7f98e8 75 rtc_ovf_event_check();
Anna Bridge 163:74e0ce7f98e8 76
<> 149:156823d33999 77 if (nrf_rtc_event_pending(COMMON_RTC_INSTANCE, US_TICKER_EVENT)) {
<> 149:156823d33999 78 us_ticker_irq_handler();
<> 149:156823d33999 79 }
<> 149:156823d33999 80
<> 149:156823d33999 81 #if DEVICE_LOWPOWERTIMER
<> 149:156823d33999 82 if (nrf_rtc_event_pending(COMMON_RTC_INSTANCE, LP_TICKER_EVENT)) {
<> 149:156823d33999 83
<> 149:156823d33999 84 lp_ticker_irq_handler();
<> 149:156823d33999 85 }
<> 149:156823d33999 86 #endif
AnnaBridge 165:e614a9f1c9e2 87 }
<> 149:156823d33999 88
AnnaBridge 165:e614a9f1c9e2 89 // Function for fix errata 20: RTC Register values are invalid
AnnaBridge 165:e614a9f1c9e2 90 __STATIC_INLINE void errata_20(void)
AnnaBridge 165:e614a9f1c9e2 91 {
AnnaBridge 165:e614a9f1c9e2 92 #if defined(NRF52_ERRATA_20)
AnnaBridge 165:e614a9f1c9e2 93 if (!softdevice_handler_is_enabled())
AnnaBridge 165:e614a9f1c9e2 94 {
AnnaBridge 165:e614a9f1c9e2 95 NRF_CLOCK->EVENTS_LFCLKSTARTED = 0;
AnnaBridge 165:e614a9f1c9e2 96 NRF_CLOCK->TASKS_LFCLKSTART = 1;
AnnaBridge 165:e614a9f1c9e2 97
AnnaBridge 165:e614a9f1c9e2 98 while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0)
AnnaBridge 165:e614a9f1c9e2 99 {
AnnaBridge 165:e614a9f1c9e2 100 }
AnnaBridge 165:e614a9f1c9e2 101 }
AnnaBridge 165:e614a9f1c9e2 102 NRF_RTC1->TASKS_STOP = 0;
AnnaBridge 165:e614a9f1c9e2 103 #endif
<> 149:156823d33999 104 }
<> 149:156823d33999 105
<> 150:02e0a0aed4ec 106 #if (defined (__ICCARM__)) && defined(TARGET_MCU_NRF51822)//IAR
<> 150:02e0a0aed4ec 107 __stackless __task
<> 150:02e0a0aed4ec 108 #endif
<> 150:02e0a0aed4ec 109 void RTC1_IRQHandler(void);
<> 150:02e0a0aed4ec 110
<> 149:156823d33999 111 void common_rtc_init(void)
<> 149:156823d33999 112 {
<> 149:156823d33999 113 if (m_common_rtc_enabled) {
<> 149:156823d33999 114 return;
<> 149:156823d33999 115 }
<> 149:156823d33999 116
AnnaBridge 165:e614a9f1c9e2 117 errata_20();
AnnaBridge 165:e614a9f1c9e2 118
<> 150:02e0a0aed4ec 119 NVIC_SetVector(RTC1_IRQn, (uint32_t)RTC1_IRQHandler);
<> 150:02e0a0aed4ec 120
<> 149:156823d33999 121 // RTC is driven by the low frequency (32.768 kHz) clock, a proper request
<> 149:156823d33999 122 // must be made to have it running.
<> 149:156823d33999 123 // Currently this clock is started in 'SystemInit' (see "system_nrf51.c"
<> 149:156823d33999 124 // or "system_nrf52.c", respectively).
<> 149:156823d33999 125
<> 149:156823d33999 126 nrf_rtc_prescaler_set(COMMON_RTC_INSTANCE, 0);
<> 149:156823d33999 127
<> 149:156823d33999 128 nrf_rtc_event_clear(COMMON_RTC_INSTANCE, US_TICKER_EVENT);
<> 149:156823d33999 129 #if defined(TARGET_MCU_NRF51822)
<> 149:156823d33999 130 nrf_rtc_event_clear(COMMON_RTC_INSTANCE, OS_TICK_EVENT);
<> 149:156823d33999 131 #endif
<> 149:156823d33999 132 #if DEVICE_LOWPOWERTIMER
<> 149:156823d33999 133 nrf_rtc_event_clear(COMMON_RTC_INSTANCE, LP_TICKER_EVENT);
<> 149:156823d33999 134 #endif
<> 149:156823d33999 135 nrf_rtc_event_clear(COMMON_RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW);
<> 149:156823d33999 136
<> 149:156823d33999 137 // Interrupts on all related events are enabled permanently. Particular
<> 149:156823d33999 138 // events will be enabled or disabled as needed (such approach is more
<> 149:156823d33999 139 // energy efficient).
<> 149:156823d33999 140 nrf_rtc_int_enable(COMMON_RTC_INSTANCE,
AnnaBridge 165:e614a9f1c9e2 141 #if DEVICE_LOWPOWERTIMER
<> 149:156823d33999 142 LP_TICKER_INT_MASK |
AnnaBridge 165:e614a9f1c9e2 143 #endif
<> 149:156823d33999 144 US_TICKER_INT_MASK |
<> 149:156823d33999 145 NRF_RTC_INT_OVERFLOW_MASK);
<> 149:156823d33999 146
<> 149:156823d33999 147 // This event is enabled permanently, since overflow indications are needed
<> 149:156823d33999 148 // continuously.
<> 149:156823d33999 149 nrf_rtc_event_enable(COMMON_RTC_INSTANCE, NRF_RTC_INT_OVERFLOW_MASK);
<> 149:156823d33999 150 // All other relevant events are initially disabled.
<> 149:156823d33999 151 nrf_rtc_event_disable(COMMON_RTC_INSTANCE,
AnnaBridge 165:e614a9f1c9e2 152 #if defined(TARGET_MCU_NRF51822)
<> 149:156823d33999 153 OS_TICK_INT_MASK |
AnnaBridge 165:e614a9f1c9e2 154 #endif
AnnaBridge 165:e614a9f1c9e2 155 #if DEVICE_LOWPOWERTIMER
<> 149:156823d33999 156 LP_TICKER_INT_MASK |
AnnaBridge 165:e614a9f1c9e2 157 #endif
<> 149:156823d33999 158 US_TICKER_INT_MASK);
<> 149:156823d33999 159
<> 149:156823d33999 160 nrf_drv_common_irq_enable(nrf_drv_get_IRQn(COMMON_RTC_INSTANCE),
<> 150:02e0a0aed4ec 161 #ifdef NRF51
<> 150:02e0a0aed4ec 162 APP_IRQ_PRIORITY_LOW
AnnaBridge 165:e614a9f1c9e2 163 #elif defined(NRF52) || defined(NRF52840_XXAA)
<> 150:02e0a0aed4ec 164 APP_IRQ_PRIORITY_LOWEST
<> 150:02e0a0aed4ec 165 #endif
<> 150:02e0a0aed4ec 166 );
<> 149:156823d33999 167
<> 149:156823d33999 168 nrf_rtc_task_trigger(COMMON_RTC_INSTANCE, NRF_RTC_TASK_START);
<> 149:156823d33999 169
<> 149:156823d33999 170 m_common_rtc_enabled = true;
<> 149:156823d33999 171 }
<> 149:156823d33999 172
Anna Bridge 163:74e0ce7f98e8 173 __STATIC_INLINE void rtc_ovf_event_safe_check(void)
Anna Bridge 163:74e0ce7f98e8 174 {
Anna Bridge 163:74e0ce7f98e8 175 core_util_critical_section_enter();
Anna Bridge 163:74e0ce7f98e8 176
Anna Bridge 163:74e0ce7f98e8 177 rtc_ovf_event_check();
Anna Bridge 163:74e0ce7f98e8 178
Anna Bridge 163:74e0ce7f98e8 179 core_util_critical_section_exit();
Anna Bridge 163:74e0ce7f98e8 180 }
Anna Bridge 163:74e0ce7f98e8 181
Anna Bridge 163:74e0ce7f98e8 182
<> 149:156823d33999 183 uint32_t common_rtc_32bit_ticks_get(void)
<> 149:156823d33999 184 {
Anna Bridge 163:74e0ce7f98e8 185 uint32_t ticks;
Anna Bridge 163:74e0ce7f98e8 186 uint32_t prev_overflows;
Anna Bridge 163:74e0ce7f98e8 187
Anna Bridge 163:74e0ce7f98e8 188 do {
Anna Bridge 163:74e0ce7f98e8 189 prev_overflows = m_common_rtc_overflows;
Anna Bridge 163:74e0ce7f98e8 190
Anna Bridge 163:74e0ce7f98e8 191 ticks = nrf_rtc_counter_get(COMMON_RTC_INSTANCE);
Anna Bridge 163:74e0ce7f98e8 192 // The counter used for time measurements is less than 32 bit wide,
Anna Bridge 163:74e0ce7f98e8 193 // so its value is complemented with the number of registered overflows
Anna Bridge 163:74e0ce7f98e8 194 // of the counter.
Anna Bridge 163:74e0ce7f98e8 195 ticks += (m_common_rtc_overflows << RTC_COUNTER_BITS);
Anna Bridge 163:74e0ce7f98e8 196
Anna Bridge 163:74e0ce7f98e8 197 // Check in case that OVF occurred during execution of a RTC handler (apply if call was from RTC handler)
Anna Bridge 163:74e0ce7f98e8 198 // m_common_rtc_overflows might been updated in this call.
Anna Bridge 163:74e0ce7f98e8 199 rtc_ovf_event_safe_check();
Anna Bridge 163:74e0ce7f98e8 200
Anna Bridge 163:74e0ce7f98e8 201 // If call was made from a low priority level m_common_rtc_overflows might have been updated in RTC handler.
Anna Bridge 163:74e0ce7f98e8 202 } while (m_common_rtc_overflows != prev_overflows);
Anna Bridge 163:74e0ce7f98e8 203
<> 149:156823d33999 204 return ticks;
<> 149:156823d33999 205 }
<> 149:156823d33999 206
<> 149:156823d33999 207 uint64_t common_rtc_64bit_us_get(void)
<> 149:156823d33999 208 {
<> 149:156823d33999 209 uint32_t ticks = common_rtc_32bit_ticks_get();
<> 149:156823d33999 210 // [ticks -> microseconds]
<> 149:156823d33999 211 return ROUNDED_DIV(((uint64_t)ticks) * 1000000, RTC_INPUT_FREQ);
<> 149:156823d33999 212 }
<> 149:156823d33999 213
<> 149:156823d33999 214 void common_rtc_set_interrupt(uint32_t us_timestamp, uint32_t cc_channel,
<> 149:156823d33999 215 uint32_t int_mask)
<> 149:156823d33999 216 {
<> 149:156823d33999 217 // The internal counter is clocked with a frequency that cannot be easily
<> 149:156823d33999 218 // multiplied to 1 MHz, therefore besides the translation of values
<> 149:156823d33999 219 // (microsecond <-> ticks) a special care of overflows handling must be
<> 149:156823d33999 220 // taken. Here the 32-bit timestamp value is complemented with information
<> 149:156823d33999 221 // about current the system up time of (ticks + number of overflows of tick
<> 149:156823d33999 222 // counter on upper bits, converted to microseconds), and such 64-bit value
<> 149:156823d33999 223 // is then translated to counter ticks. Finally, the lower 24 bits of thus
<> 149:156823d33999 224 // calculated value is written to the counter compare register to prepare
<> 149:156823d33999 225 // the interrupt generation.
<> 149:156823d33999 226 uint64_t current_time64 = common_rtc_64bit_us_get();
<> 149:156823d33999 227 // [add upper 32 bits from the current time to the timestamp value]
<> 149:156823d33999 228 uint64_t timestamp64 = us_timestamp +
<> 149:156823d33999 229 (current_time64 & ~(uint64_t)0xFFFFFFFF);
<> 149:156823d33999 230 // [if the original timestamp value happens to be after the 32 bit counter
<> 149:156823d33999 231 // of microsends overflows, correct the upper 32 bits accordingly]
<> 149:156823d33999 232 if (us_timestamp < (uint32_t)(current_time64 & 0xFFFFFFFF)) {
<> 149:156823d33999 233 timestamp64 += ((uint64_t)1 << 32);
<> 149:156823d33999 234 }
<> 149:156823d33999 235 // [microseconds -> ticks, always round the result up to avoid too early
<> 149:156823d33999 236 // interrupt generation]
<> 149:156823d33999 237 uint32_t compare_value =
<> 149:156823d33999 238 (uint32_t)CEIL_DIV((timestamp64) * RTC_INPUT_FREQ, 1000000);
<> 149:156823d33999 239
Anna Bridge 163:74e0ce7f98e8 240
Anna Bridge 163:74e0ce7f98e8 241 core_util_critical_section_enter();
<> 149:156823d33999 242 // The COMPARE event occurs when the value in compare register is N and
<> 149:156823d33999 243 // the counter value changes from N-1 to N. Therefore, the minimal safe
<> 149:156823d33999 244 // difference between the compare value to be set and the current counter
<> 149:156823d33999 245 // value is 2 ticks. This guarantees that the compare trigger is properly
<> 149:156823d33999 246 // setup before the compare condition occurs.
<> 149:156823d33999 247 uint32_t closest_safe_compare = common_rtc_32bit_ticks_get() + 2;
<> 149:156823d33999 248 if ((int)(compare_value - closest_safe_compare) <= 0) {
<> 149:156823d33999 249 compare_value = closest_safe_compare;
<> 149:156823d33999 250 }
<> 149:156823d33999 251
<> 149:156823d33999 252 nrf_rtc_cc_set(COMMON_RTC_INSTANCE, cc_channel, RTC_WRAP(compare_value));
<> 149:156823d33999 253 nrf_rtc_event_enable(COMMON_RTC_INSTANCE, int_mask);
Anna Bridge 163:74e0ce7f98e8 254
Anna Bridge 163:74e0ce7f98e8 255 core_util_critical_section_exit();
<> 149:156823d33999 256 }
<> 149:156823d33999 257 //------------------------------------------------------------------------------
<> 149:156823d33999 258
<> 149:156823d33999 259
<> 149:156823d33999 260 void us_ticker_init(void)
<> 149:156823d33999 261 {
<> 149:156823d33999 262 common_rtc_init();
<> 149:156823d33999 263 }
<> 149:156823d33999 264
<> 149:156823d33999 265 uint32_t us_ticker_read()
<> 149:156823d33999 266 {
<> 149:156823d33999 267 us_ticker_init();
<> 149:156823d33999 268 return (uint32_t)common_rtc_64bit_us_get();
<> 149:156823d33999 269 }
<> 149:156823d33999 270
<> 149:156823d33999 271 void us_ticker_set_interrupt(timestamp_t timestamp)
<> 149:156823d33999 272 {
<> 149:156823d33999 273 common_rtc_set_interrupt(timestamp,
<> 149:156823d33999 274 US_TICKER_CC_CHANNEL, US_TICKER_INT_MASK);
<> 149:156823d33999 275 }
<> 149:156823d33999 276
<> 149:156823d33999 277 void us_ticker_disable_interrupt(void)
<> 149:156823d33999 278 {
<> 149:156823d33999 279 nrf_rtc_event_disable(COMMON_RTC_INSTANCE, US_TICKER_INT_MASK);
<> 149:156823d33999 280 }
<> 149:156823d33999 281
<> 149:156823d33999 282 void us_ticker_clear_interrupt(void)
<> 149:156823d33999 283 {
<> 149:156823d33999 284 nrf_rtc_event_clear(COMMON_RTC_INSTANCE, US_TICKER_EVENT);
<> 149:156823d33999 285 }
<> 149:156823d33999 286
<> 149:156823d33999 287
<> 149:156823d33999 288 // Since there is no SysTick on NRF51, the RTC1 channel 1 is used as an
<> 149:156823d33999 289 // alternative source of RTOS ticks.
<> 149:156823d33999 290 #if defined(TARGET_MCU_NRF51822)
<> 149:156823d33999 291
<> 160:d5399cc887bb 292 #include "mbed_toolchain.h"
<> 149:156823d33999 293
<> 149:156823d33999 294
<> 149:156823d33999 295 #define MAX_RTC_COUNTER_VAL ((1uL << RTC_COUNTER_BITS) - 1)
<> 149:156823d33999 296
<> 149:156823d33999 297 /**
<> 149:156823d33999 298 * The value previously set in the capture compare register of channel 1
<> 149:156823d33999 299 */
<> 149:156823d33999 300 static uint32_t previous_tick_cc_value = 0;
<> 149:156823d33999 301
<> 149:156823d33999 302 /*
<> 149:156823d33999 303 RTX provide the following definitions which are used by the tick code:
<> 149:156823d33999 304 * os_trv: The number (minus 1) of clock cycle between two tick.
<> 149:156823d33999 305 * os_clockrate: Time duration between two ticks (in us).
<> 149:156823d33999 306 * OS_Tick_Handler: The function which handle a tick event.
<> 149:156823d33999 307 This function is special because it never returns.
<> 149:156823d33999 308 Those definitions are used by the code which handle the os tick.
<> 149:156823d33999 309 To allow compilation of us_ticker programs without RTOS, those symbols are
<> 149:156823d33999 310 exported from this module as weak ones.
<> 149:156823d33999 311 */
<> 149:156823d33999 312 MBED_WEAK uint32_t const os_trv;
<> 149:156823d33999 313 MBED_WEAK uint32_t const os_clockrate;
AnnaBridge 165:e614a9f1c9e2 314 MBED_WEAK void OS_Tick_Handler(void)
AnnaBridge 165:e614a9f1c9e2 315 {
AnnaBridge 165:e614a9f1c9e2 316 }
<> 149:156823d33999 317
<> 149:156823d33999 318
<> 149:156823d33999 319 #if defined (__CC_ARM) /* ARMCC Compiler */
<> 149:156823d33999 320
<> 149:156823d33999 321 __asm void COMMON_RTC_IRQ_HANDLER(void)
<> 149:156823d33999 322 {
<> 149:156823d33999 323 IMPORT OS_Tick_Handler
<> 149:156823d33999 324 IMPORT common_rtc_irq_handler
<> 149:156823d33999 325
<> 149:156823d33999 326 /**
<> 149:156823d33999 327 * Chanel 1 of RTC1 is used by RTX as a systick.
<> 149:156823d33999 328 * If the compare event on channel 1 is set, then branch to OS_Tick_Handler.
<> 149:156823d33999 329 * Otherwise, just execute common_rtc_irq_handler.
<> 149:156823d33999 330 * This function has to be written in assembly and tagged as naked because OS_Tick_Handler
<> 149:156823d33999 331 * will never return.
<> 149:156823d33999 332 * A c function would put lr on the stack before calling OS_Tick_Handler and this value
<> 149:156823d33999 333 * would never been dequeued.
<> 149:156823d33999 334 *
<> 149:156823d33999 335 * \code
<> 149:156823d33999 336 * void COMMON_RTC_IRQ_HANDLER(void) {
<> 149:156823d33999 337 if(NRF_RTC1->EVENTS_COMPARE[1]) {
<> 149:156823d33999 338 // never return...
<> 149:156823d33999 339 OS_Tick_Handler();
<> 149:156823d33999 340 } else {
<> 149:156823d33999 341 common_rtc_irq_handler();
<> 149:156823d33999 342 }
<> 149:156823d33999 343 }
<> 149:156823d33999 344 * \endcode
<> 149:156823d33999 345 */
<> 149:156823d33999 346 ldr r0,=0x40011144
<> 149:156823d33999 347 ldr r1, [r0, #0]
<> 149:156823d33999 348 cmp r1, #0
<> 149:156823d33999 349 beq US_TICKER_HANDLER
<> 149:156823d33999 350 bl OS_Tick_Handler
<> 149:156823d33999 351 US_TICKER_HANDLER
<> 149:156823d33999 352 push {r3, lr}
<> 149:156823d33999 353 bl common_rtc_irq_handler
<> 149:156823d33999 354 pop {r3, pc}
<> 149:156823d33999 355 ; ALIGN ;
<> 149:156823d33999 356 }
<> 149:156823d33999 357
<> 149:156823d33999 358 #elif defined (__GNUC__) /* GNU Compiler */
<> 149:156823d33999 359
<> 149:156823d33999 360 __attribute__((naked)) void COMMON_RTC_IRQ_HANDLER(void)
<> 149:156823d33999 361 {
<> 149:156823d33999 362 /**
<> 149:156823d33999 363 * Chanel 1 of RTC1 is used by RTX as a systick.
<> 149:156823d33999 364 * If the compare event on channel 1 is set, then branch to OS_Tick_Handler.
<> 149:156823d33999 365 * Otherwise, just execute common_rtc_irq_handler.
<> 149:156823d33999 366 * This function has to be written in assembly and tagged as naked because OS_Tick_Handler
<> 149:156823d33999 367 * will never return.
<> 149:156823d33999 368 * A c function would put lr on the stack before calling OS_Tick_Handler and this value
<> 149:156823d33999 369 * would never been dequeued.
<> 149:156823d33999 370 *
<> 149:156823d33999 371 * \code
<> 149:156823d33999 372 * void COMMON_RTC_IRQ_HANDLER(void) {
<> 149:156823d33999 373 if(NRF_RTC1->EVENTS_COMPARE[1]) {
<> 149:156823d33999 374 // never return...
<> 149:156823d33999 375 OS_Tick_Handler();
<> 149:156823d33999 376 } else {
<> 149:156823d33999 377 common_rtc_irq_handler();
<> 149:156823d33999 378 }
<> 149:156823d33999 379 }
<> 149:156823d33999 380 * \endcode
<> 149:156823d33999 381 */
<> 149:156823d33999 382 __asm__ (
<> 149:156823d33999 383 "ldr r0,=0x40011144\n"
<> 149:156823d33999 384 "ldr r1, [r0, #0]\n"
<> 149:156823d33999 385 "cmp r1, #0\n"
<> 149:156823d33999 386 "beq US_TICKER_HANDLER\n"
<> 149:156823d33999 387 "bl OS_Tick_Handler\n"
<> 149:156823d33999 388 "US_TICKER_HANDLER:\n"
<> 149:156823d33999 389 "push {r3, lr}\n"
<> 149:156823d33999 390 "bl common_rtc_irq_handler\n"
<> 149:156823d33999 391 "pop {r3, pc}\n"
<> 149:156823d33999 392 "nop"
<> 149:156823d33999 393 );
<> 149:156823d33999 394 }
<> 149:156823d33999 395
<> 149:156823d33999 396 #elif defined (__ICCARM__)//IAR
<> 149:156823d33999 397 void common_rtc_irq_handler(void);
<> 149:156823d33999 398
<> 149:156823d33999 399 __stackless __task void COMMON_RTC_IRQ_HANDLER(void)
<> 149:156823d33999 400 {
<> 149:156823d33999 401 uint32_t temp;
<> 149:156823d33999 402
<> 149:156823d33999 403 __asm volatile(
<> 149:156823d33999 404 " ldr %[temp], [%[reg2check]] \n"
<> 149:156823d33999 405 " cmp %[temp], #0 \n"
<> 149:156823d33999 406 " beq 1f \n"
<> 149:156823d33999 407 " bl.w OS_Tick_Handler \n"
<> 149:156823d33999 408 "1: \n"
<> 149:156823d33999 409 " push {r3, lr}\n"
<> 149:156823d33999 410 " blx %[rtc_irq] \n"
<> 149:156823d33999 411 " pop {r3, pc}\n"
<> 149:156823d33999 412
<> 149:156823d33999 413 : /* Outputs */
<> 149:156823d33999 414 [temp] "=&r"(temp)
<> 149:156823d33999 415 : /* Inputs */
<> 149:156823d33999 416 [reg2check] "r"(0x40011144),
<> 149:156823d33999 417 [rtc_irq] "r"(common_rtc_irq_handler)
<> 149:156823d33999 418 : /* Clobbers */
<> 149:156823d33999 419 "cc"
<> 149:156823d33999 420 );
<> 149:156823d33999 421 (void)temp;
<> 149:156823d33999 422 }
<> 149:156823d33999 423
<> 149:156823d33999 424
<> 149:156823d33999 425 #else
<> 149:156823d33999 426
<> 149:156823d33999 427 #error Compiler not supported.
<> 149:156823d33999 428 #error Provide a definition of COMMON_RTC_IRQ_HANDLER.
<> 149:156823d33999 429
<> 149:156823d33999 430 /*
<> 149:156823d33999 431 * Chanel 1 of RTC1 is used by RTX as a systick.
<> 149:156823d33999 432 * If the compare event on channel 1 is set, then branch to OS_Tick_Handler.
<> 149:156823d33999 433 * Otherwise, just execute common_rtc_irq_handler.
<> 149:156823d33999 434 * This function has to be written in assembly and tagged as naked because OS_Tick_Handler
<> 149:156823d33999 435 * will never return.
<> 149:156823d33999 436 * A c function would put lr on the stack before calling OS_Tick_Handler and this value
<> 149:156823d33999 437 * will never been dequeued. After a certain time a stack overflow will happen.
<> 149:156823d33999 438 *
<> 149:156823d33999 439 * \code
<> 149:156823d33999 440 * void COMMON_RTC_IRQ_HANDLER(void) {
<> 149:156823d33999 441 if(NRF_RTC1->EVENTS_COMPARE[1]) {
<> 149:156823d33999 442 // never return...
<> 149:156823d33999 443 OS_Tick_Handler();
<> 149:156823d33999 444 } else {
<> 149:156823d33999 445 common_rtc_irq_handler();
<> 149:156823d33999 446 }
<> 149:156823d33999 447 }
<> 149:156823d33999 448 * \endcode
<> 149:156823d33999 449 */
<> 149:156823d33999 450
<> 149:156823d33999 451 #endif
<> 149:156823d33999 452
<> 149:156823d33999 453 /**
<> 149:156823d33999 454 * Return the next number of clock cycle needed for the next tick.
<> 149:156823d33999 455 * @note This function has been carrefuly optimized for a systick occuring every 1000us.
<> 149:156823d33999 456 */
AnnaBridge 165:e614a9f1c9e2 457 static uint32_t get_next_tick_cc_delta()
AnnaBridge 165:e614a9f1c9e2 458 {
<> 149:156823d33999 459 uint32_t delta = 0;
<> 149:156823d33999 460
<> 149:156823d33999 461 if (os_clockrate != 1000) {
<> 149:156823d33999 462 // In RTX, by default SYSTICK is is used.
<> 149:156823d33999 463 // A tick event is generated every os_trv + 1 clock cycles of the system timer.
<> 149:156823d33999 464 delta = os_trv + 1;
<> 149:156823d33999 465 } else {
<> 149:156823d33999 466 // If the clockrate is set to 1000us then 1000 tick should happen every second.
<> 149:156823d33999 467 // Unfortunatelly, when clockrate is set to 1000, os_trv is equal to 31.
<> 149:156823d33999 468 // If (os_trv + 1) is used as the delta value between two ticks, 1000 ticks will be
<> 149:156823d33999 469 // generated in 32000 clock cycle instead of 32768 clock cycles.
<> 149:156823d33999 470 // As a result, if a user schedule an OS timer to start in 100s, the timer will start
<> 149:156823d33999 471 // instead after 97.656s
<> 149:156823d33999 472 // The code below fix this issue, a clock rate of 1000s will generate 1000 ticks in 32768
<> 149:156823d33999 473 // clock cycles.
<> 149:156823d33999 474 // The strategy is simple, for 1000 ticks:
<> 149:156823d33999 475 // * 768 ticks will occur 33 clock cycles after the previous tick
<> 149:156823d33999 476 // * 232 ticks will occur 32 clock cycles after the previous tick
<> 149:156823d33999 477 // By default every delta is equal to 33.
<> 149:156823d33999 478 // Every five ticks (20%, 200 delta in one second), the delta is equal to 32
<> 149:156823d33999 479 // The remaining (32) deltas equal to 32 are distributed using primes numbers.
<> 149:156823d33999 480 static uint32_t counter = 0;
<> 149:156823d33999 481 if ((counter % 5) == 0 || (counter % 31) == 0 || (counter % 139) == 0 || (counter == 503)) {
<> 149:156823d33999 482 delta = 32;
<> 149:156823d33999 483 } else {
<> 149:156823d33999 484 delta = 33;
<> 149:156823d33999 485 }
<> 149:156823d33999 486 ++counter;
<> 149:156823d33999 487 if (counter == 1000) {
<> 149:156823d33999 488 counter = 0;
<> 149:156823d33999 489 }
<> 149:156823d33999 490 }
<> 149:156823d33999 491 return delta;
<> 149:156823d33999 492 }
<> 149:156823d33999 493
AnnaBridge 165:e614a9f1c9e2 494 static inline void clear_tick_interrupt()
AnnaBridge 165:e614a9f1c9e2 495 {
<> 149:156823d33999 496 nrf_rtc_event_clear(COMMON_RTC_INSTANCE, OS_TICK_EVENT);
<> 149:156823d33999 497 nrf_rtc_event_disable(COMMON_RTC_INSTANCE, OS_TICK_INT_MASK);
<> 149:156823d33999 498 }
<> 149:156823d33999 499
<> 149:156823d33999 500 /**
<> 149:156823d33999 501 * Indicate if a value is included in a range which can be wrapped.
<> 149:156823d33999 502 * @param begin start of the range
<> 149:156823d33999 503 * @param end end of the range
<> 149:156823d33999 504 * @param val value to check
<> 149:156823d33999 505 * @return true if the value is included in the range and false otherwise.
<> 149:156823d33999 506 */
AnnaBridge 165:e614a9f1c9e2 507 static inline bool is_in_wrapped_range(uint32_t begin, uint32_t end, uint32_t val)
AnnaBridge 165:e614a9f1c9e2 508 {
<> 149:156823d33999 509 // regular case, begin < end
<> 149:156823d33999 510 // return true if begin <= val < end
<> 149:156823d33999 511 if (begin < end) {
<> 149:156823d33999 512 if (begin <= val && val < end) {
<> 149:156823d33999 513 return true;
<> 149:156823d33999 514 } else {
<> 149:156823d33999 515 return false;
<> 149:156823d33999 516 }
<> 149:156823d33999 517 } else {
<> 149:156823d33999 518 // In this case end < begin because it has wrap around the limits
<> 149:156823d33999 519 // return false if end < val < begin
<> 149:156823d33999 520 if (end < val && val < begin) {
<> 149:156823d33999 521 return false;
<> 149:156823d33999 522 } else {
<> 149:156823d33999 523 return true;
<> 149:156823d33999 524 }
<> 149:156823d33999 525 }
<> 149:156823d33999 526
<> 149:156823d33999 527 }
<> 149:156823d33999 528
<> 149:156823d33999 529 /**
<> 149:156823d33999 530 * Register the next tick.
<> 149:156823d33999 531 */
AnnaBridge 165:e614a9f1c9e2 532 static void register_next_tick()
AnnaBridge 165:e614a9f1c9e2 533 {
<> 149:156823d33999 534 previous_tick_cc_value = nrf_rtc_cc_get(COMMON_RTC_INSTANCE, OS_TICK_CC_CHANNEL);
<> 149:156823d33999 535 uint32_t delta = get_next_tick_cc_delta();
<> 149:156823d33999 536 uint32_t new_compare_value = (previous_tick_cc_value + delta) & MAX_RTC_COUNTER_VAL;
<> 149:156823d33999 537
<> 149:156823d33999 538 // Disable irq directly for few cycles,
<> 149:156823d33999 539 // Validation of the new CC value against the COUNTER,
<> 149:156823d33999 540 // Setting the new CC value and enabling CC IRQ should be an atomic operation
<> 149:156823d33999 541 // Otherwise, there is a possibility to set an invalid CC value because
<> 149:156823d33999 542 // the RTC1 keeps running.
<> 149:156823d33999 543 // This code is very short 20-38 cycles in the worst case, it shouldn't
<> 149:156823d33999 544 // disturb softdevice.
<> 149:156823d33999 545 __disable_irq();
<> 149:156823d33999 546 uint32_t current_counter = nrf_rtc_counter_get(COMMON_RTC_INSTANCE);
<> 149:156823d33999 547
<> 149:156823d33999 548 // If an overflow occur, set the next tick in COUNTER + delta clock cycles
<> 149:156823d33999 549 if (is_in_wrapped_range(previous_tick_cc_value, new_compare_value, current_counter + 1) == false) {
<> 149:156823d33999 550 new_compare_value = current_counter + delta;
<> 149:156823d33999 551 }
<> 149:156823d33999 552 nrf_rtc_cc_set(COMMON_RTC_INSTANCE, OS_TICK_CC_CHANNEL, new_compare_value);
<> 149:156823d33999 553 // Enable generation of the compare event for the value set above (this
<> 149:156823d33999 554 // event will trigger the interrupt).
<> 149:156823d33999 555 nrf_rtc_event_enable(COMMON_RTC_INSTANCE, OS_TICK_INT_MASK);
<> 149:156823d33999 556 __enable_irq();
<> 149:156823d33999 557 }
<> 149:156823d33999 558
<> 149:156823d33999 559 /**
<> 149:156823d33999 560 * Initialize alternative hardware timer as RTX kernel timer
<> 149:156823d33999 561 * This function is directly called by RTX.
<> 149:156823d33999 562 * @note this function shouldn't be called directly.
<> 149:156823d33999 563 * @return IRQ number of the alternative hardware timer
<> 149:156823d33999 564 */
<> 149:156823d33999 565 int os_tick_init (void)
<> 149:156823d33999 566 {
<> 149:156823d33999 567 common_rtc_init();
<> 151:5eaa88a5bcc7 568 nrf_rtc_int_enable(COMMON_RTC_INSTANCE, OS_TICK_INT_MASK);
<> 149:156823d33999 569
<> 149:156823d33999 570 nrf_rtc_cc_set(COMMON_RTC_INSTANCE, OS_TICK_CC_CHANNEL, 0);
<> 149:156823d33999 571 register_next_tick();
<> 149:156823d33999 572
<> 149:156823d33999 573 return nrf_drv_get_IRQn(COMMON_RTC_INSTANCE);
<> 149:156823d33999 574 }
<> 149:156823d33999 575
<> 149:156823d33999 576 /**
<> 149:156823d33999 577 * Acknowledge the tick interrupt.
<> 149:156823d33999 578 * This function is called by the function OS_Tick_Handler of RTX.
<> 149:156823d33999 579 * @note this function shouldn't be called directly.
<> 149:156823d33999 580 */
<> 149:156823d33999 581 void os_tick_irqack(void)
<> 149:156823d33999 582 {
<> 149:156823d33999 583 clear_tick_interrupt();
<> 149:156823d33999 584 register_next_tick();
<> 149:156823d33999 585 }
<> 149:156823d33999 586
<> 149:156823d33999 587 /**
<> 149:156823d33999 588 * Returns the overflow flag of the alternative hardware timer.
<> 149:156823d33999 589 * @note This function is exposed by RTX kernel.
<> 149:156823d33999 590 * @return 1 if the timer has overflowed and 0 otherwise.
<> 149:156823d33999 591 */
AnnaBridge 165:e614a9f1c9e2 592 uint32_t os_tick_ovf(void)
AnnaBridge 165:e614a9f1c9e2 593 {
AnnaBridge 165:e614a9f1c9e2 594 uint32_t current_counter = nrf_rtc_counter_get(COMMON_RTC_INSTANCE);
<> 149:156823d33999 595 uint32_t next_tick_cc_value = nrf_rtc_cc_get(COMMON_RTC_INSTANCE, OS_TICK_CC_CHANNEL);
<> 149:156823d33999 596
<> 149:156823d33999 597 return is_in_wrapped_range(previous_tick_cc_value, next_tick_cc_value, current_counter) ? 0 : 1;
<> 149:156823d33999 598 }
<> 149:156823d33999 599
<> 149:156823d33999 600 /**
<> 149:156823d33999 601 * Return the value of the alternative hardware timer.
<> 149:156823d33999 602 * @note The documentation is not very clear about what is expected as a result,
<> 149:156823d33999 603 * is it an ascending counter, a descending one ?
<> 149:156823d33999 604 * None of this is specified.
<> 149:156823d33999 605 * The default systick is a descending counter and this function return values in
<> 149:156823d33999 606 * descending order, even if the internal counter used is an ascending one.
<> 149:156823d33999 607 * @return the value of the alternative hardware timer.
<> 149:156823d33999 608 */
AnnaBridge 165:e614a9f1c9e2 609 uint32_t os_tick_val(void)
AnnaBridge 165:e614a9f1c9e2 610 {
AnnaBridge 165:e614a9f1c9e2 611 uint32_t current_counter = nrf_rtc_counter_get(COMMON_RTC_INSTANCE);
<> 149:156823d33999 612 uint32_t next_tick_cc_value = nrf_rtc_cc_get(COMMON_RTC_INSTANCE, OS_TICK_CC_CHANNEL);
<> 149:156823d33999 613
<> 149:156823d33999 614 // do not use os_tick_ovf because its counter value can be different
<> 149:156823d33999 615 if(is_in_wrapped_range(previous_tick_cc_value, next_tick_cc_value, current_counter)) {
<> 149:156823d33999 616 if (next_tick_cc_value > previous_tick_cc_value) {
<> 149:156823d33999 617 return next_tick_cc_value - current_counter;
<> 149:156823d33999 618 } else if(current_counter <= next_tick_cc_value) {
<> 149:156823d33999 619 return next_tick_cc_value - current_counter;
<> 149:156823d33999 620 } else {
<> 149:156823d33999 621 return next_tick_cc_value + (MAX_RTC_COUNTER_VAL - current_counter);
<> 149:156823d33999 622 }
<> 149:156823d33999 623 } else {
<> 149:156823d33999 624 // use (os_trv + 1) has the base step, can be totally inacurate ...
<> 149:156823d33999 625 uint32_t clock_cycles_by_tick = os_trv + 1;
<> 149:156823d33999 626
<> 149:156823d33999 627 // if current counter has wrap arround, add the limit to it.
<> 149:156823d33999 628 if (current_counter < next_tick_cc_value) {
<> 149:156823d33999 629 current_counter = current_counter + MAX_RTC_COUNTER_VAL;
<> 149:156823d33999 630 }
<> 149:156823d33999 631
<> 149:156823d33999 632 return clock_cycles_by_tick - ((current_counter - next_tick_cc_value) % clock_cycles_by_tick);
<> 149:156823d33999 633 }
<> 149:156823d33999 634
<> 149:156823d33999 635 }
<> 149:156823d33999 636
<> 149:156823d33999 637 #endif // defined(TARGET_MCU_NRF51822)