Set write permission for 'write without response' characteristics.

Fork of nRF51822 by Nordic Semiconductor

Committer:
marcuschang
Date:
Fri Dec 12 17:12:35 2014 +0000
Revision:
85:17fe69405098
Parent:
37:c29c330d942c
Write permission was not set for 'write without response' characteristics.

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bogdanm 0:eff01767de02 1 /*
bogdanm 0:eff01767de02 2 * Copyright (c) 2011 Nordic Semiconductor. All Rights Reserved.
bogdanm 0:eff01767de02 3 *
bogdanm 0:eff01767de02 4 * The information contained herein is confidential property of Nordic Semiconductor. The use,
bogdanm 0:eff01767de02 5 * copying, transfer or disclosure of such information is prohibited except by express written
bogdanm 0:eff01767de02 6 * agreement with Nordic Semiconductor.
bogdanm 0:eff01767de02 7 *
bogdanm 0:eff01767de02 8 */
bogdanm 0:eff01767de02 9 /**
bogdanm 0:eff01767de02 10 @defgroup nrf_sdm_api SoftDevice Manager API
bogdanm 0:eff01767de02 11 @{
bogdanm 0:eff01767de02 12
bogdanm 0:eff01767de02 13 @brief APIs for SoftDevice management.
bogdanm 0:eff01767de02 14
bogdanm 0:eff01767de02 15 */
bogdanm 0:eff01767de02 16
bogdanm 0:eff01767de02 17 /* Header guard */
bogdanm 0:eff01767de02 18 #ifndef NRF_SDM_H__
bogdanm 0:eff01767de02 19 #define NRF_SDM_H__
bogdanm 0:eff01767de02 20
bogdanm 0:eff01767de02 21 #include "nrf_svc.h"
bogdanm 0:eff01767de02 22 #include "nrf51.h"
bogdanm 0:eff01767de02 23 #include "nrf_soc.h"
bogdanm 0:eff01767de02 24 #include "nrf_error_sdm.h"
bogdanm 0:eff01767de02 25
bogdanm 0:eff01767de02 26 /** @addtogroup NRF_SDM_DEFINES Defines
bogdanm 0:eff01767de02 27 * @{ */
bogdanm 0:eff01767de02 28
bogdanm 0:eff01767de02 29 /**@brief SoftDevice Manager SVC Base number. */
Rohit Grover 37:c29c330d942c 30 #define SDM_SVC_BASE (0x10)
bogdanm 0:eff01767de02 31
bogdanm 0:eff01767de02 32 /** @} */
bogdanm 0:eff01767de02 33
bogdanm 0:eff01767de02 34 /** @addtogroup NRF_SDM_ENUMS Enumerations
bogdanm 0:eff01767de02 35 * @{ */
bogdanm 0:eff01767de02 36
bogdanm 0:eff01767de02 37 /**@brief nRF SoftDevice Manager API SVC numbers. */
bogdanm 0:eff01767de02 38 enum NRF_SD_SVCS
bogdanm 0:eff01767de02 39 {
bogdanm 0:eff01767de02 40 SD_SOFTDEVICE_ENABLE = SDM_SVC_BASE, /**< ::sd_softdevice_enable */
bogdanm 0:eff01767de02 41 SD_SOFTDEVICE_DISABLE, /**< ::sd_softdevice_disable */
bogdanm 0:eff01767de02 42 SD_SOFTDEVICE_IS_ENABLED, /**< ::sd_softdevice_is_enabled */
Rohit Grover 37:c29c330d942c 43 SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, /**< ::sd_softdevice_vector_table_base_set */
bogdanm 0:eff01767de02 44 SVC_SDM_LAST /**< Placeholder for last SDM SVC */
bogdanm 0:eff01767de02 45 };
bogdanm 0:eff01767de02 46
bogdanm 0:eff01767de02 47 /**@brief Possible lfclk oscillator sources. */
bogdanm 0:eff01767de02 48 enum NRF_CLOCK_LFCLKSRCS
bogdanm 0:eff01767de02 49 {
bogdanm 0:eff01767de02 50 NRF_CLOCK_LFCLKSRC_SYNTH_250_PPM, /**< LFCLK Synthesized from HFCLK. */
bogdanm 0:eff01767de02 51 NRF_CLOCK_LFCLKSRC_XTAL_500_PPM, /**< LFCLK crystal oscillator 500 PPM accuracy. */
bogdanm 0:eff01767de02 52 NRF_CLOCK_LFCLKSRC_XTAL_250_PPM, /**< LFCLK crystal oscillator 250 PPM accuracy. */
bogdanm 0:eff01767de02 53 NRF_CLOCK_LFCLKSRC_XTAL_150_PPM, /**< LFCLK crystal oscillator 150 PPM accuracy. */
bogdanm 0:eff01767de02 54 NRF_CLOCK_LFCLKSRC_XTAL_100_PPM, /**< LFCLK crystal oscillator 100 PPM accuracy. */
bogdanm 0:eff01767de02 55 NRF_CLOCK_LFCLKSRC_XTAL_75_PPM, /**< LFCLK crystal oscillator 75 PPM accuracy. */
bogdanm 0:eff01767de02 56 NRF_CLOCK_LFCLKSRC_XTAL_50_PPM, /**< LFCLK crystal oscillator 50 PPM accuracy. */
bogdanm 0:eff01767de02 57 NRF_CLOCK_LFCLKSRC_XTAL_30_PPM, /**< LFCLK crystal oscillator 30 PPM accuracy. */
bogdanm 0:eff01767de02 58 NRF_CLOCK_LFCLKSRC_XTAL_20_PPM, /**< LFCLK crystal oscillator 20 PPM accuracy. */
bogdanm 0:eff01767de02 59 NRF_CLOCK_LFCLKSRC_RC_250_PPM_250MS_CALIBRATION, /**< LFCLK RC oscillator, 250ms calibration interval.*/
bogdanm 0:eff01767de02 60 NRF_CLOCK_LFCLKSRC_RC_250_PPM_500MS_CALIBRATION, /**< LFCLK RC oscillator, 500ms calibration interval.*/
bogdanm 0:eff01767de02 61 NRF_CLOCK_LFCLKSRC_RC_250_PPM_1000MS_CALIBRATION, /**< LFCLK RC oscillator, 1000ms calibration interval.*/
bogdanm 0:eff01767de02 62 NRF_CLOCK_LFCLKSRC_RC_250_PPM_2000MS_CALIBRATION, /**< LFCLK RC oscillator, 2000ms calibration interval.*/
bogdanm 0:eff01767de02 63 NRF_CLOCK_LFCLKSRC_RC_250_PPM_4000MS_CALIBRATION, /**< LFCLK RC oscillator, 4000ms calibration interval.*/
bogdanm 0:eff01767de02 64 NRF_CLOCK_LFCLKSRC_RC_250_PPM_8000MS_CALIBRATION, /**< LFCLK RC oscillator, 8000ms calibration interval.*/
Rohit Grover 37:c29c330d942c 65 NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_1000MS_CALIBRATION, /**< LFCLK RC oscillator. Temperature checked every 1000ms, if changed above a threshold, a calibration is done.*/
Rohit Grover 37:c29c330d942c 66 NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_2000MS_CALIBRATION, /**< LFCLK RC oscillator. Temperature checked every 2000ms, if changed above a threshold, a calibration is done.*/
Rohit Grover 37:c29c330d942c 67 NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_4000MS_CALIBRATION, /**< LFCLK RC oscillator. Temperature checked every 4000ms, if changed above a threshold, a calibration is done.*/
Rohit Grover 37:c29c330d942c 68 NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_8000MS_CALIBRATION, /**< LFCLK RC oscillator. Temperature checked every 8000ms, if changed above a threshold, a calibration is done.*/
Rohit Grover 37:c29c330d942c 69 NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_16000MS_CALIBRATION, /**< LFCLK RC oscillator. Temperature checked every 16000ms, if changed above a threshold, a calibration is done.*/
bogdanm 0:eff01767de02 70 };
bogdanm 0:eff01767de02 71
bogdanm 0:eff01767de02 72 /** @} */
bogdanm 0:eff01767de02 73
bogdanm 0:eff01767de02 74 /** @addtogroup NRF_SDM_TYPES Types
bogdanm 0:eff01767de02 75 * @{ */
bogdanm 0:eff01767de02 76
bogdanm 0:eff01767de02 77 /**@brief Type representing lfclk oscillator source. */
bogdanm 0:eff01767de02 78 typedef uint32_t nrf_clock_lfclksrc_t;
bogdanm 0:eff01767de02 79
bogdanm 0:eff01767de02 80
bogdanm 0:eff01767de02 81 /**@brief SoftDevice Assertion Handler type.
bogdanm 0:eff01767de02 82 *
bogdanm 0:eff01767de02 83 * When an unexpected error occurs within the SoftDevice it will call the SoftDevice assertion handler callback.
bogdanm 0:eff01767de02 84 * The protocol stack will be in an undefined state when this happens and the only way to recover will be to
bogdanm 0:eff01767de02 85 * perform a reset, using e.g. CMSIS NVIC_SystemReset().
bogdanm 0:eff01767de02 86 *
bogdanm 0:eff01767de02 87 * @note This callback is executed in HardFault context, thus SVC functions cannot be called from the SoftDevice assert callback.
bogdanm 0:eff01767de02 88 *
bogdanm 0:eff01767de02 89 * @param[in] pc The program counter of the failed assert.
bogdanm 0:eff01767de02 90 * @param[in] line_number Line number where the assert failed.
bogdanm 0:eff01767de02 91 * @param[in] file_name File name where the assert failed.
bogdanm 0:eff01767de02 92 */
bogdanm 0:eff01767de02 93 typedef void (*softdevice_assertion_handler_t)(uint32_t pc, uint16_t line_number, const uint8_t * p_file_name);
bogdanm 0:eff01767de02 94
bogdanm 0:eff01767de02 95 /** @} */
bogdanm 0:eff01767de02 96
bogdanm 0:eff01767de02 97 /** @addtogroup NRF_SDM_FUNCTIONS Functions
bogdanm 0:eff01767de02 98 * @{ */
bogdanm 0:eff01767de02 99
bogdanm 0:eff01767de02 100 /**@brief Enables the SoftDevice and by extension the protocol stack.
bogdanm 0:eff01767de02 101 *
bogdanm 0:eff01767de02 102 * Idempotent function to enable the SoftDevice.
bogdanm 0:eff01767de02 103 *
bogdanm 0:eff01767de02 104 * @note Some care must be taken if a low frequency clock source is already running when calling this function:
bogdanm 0:eff01767de02 105 * If the LF clock has a different source then the one currently running, it will be stopped. Then, the new
bogdanm 0:eff01767de02 106 * clock source will be started.
bogdanm 0:eff01767de02 107 *
bogdanm 0:eff01767de02 108 * @note This function has no effect when returning with an error.
bogdanm 0:eff01767de02 109 *
bogdanm 0:eff01767de02 110 * @post If return code is ::NRF_SUCCESS
bogdanm 0:eff01767de02 111 * - SoC library and protocol stack APIs are made available
bogdanm 0:eff01767de02 112 * - A portion of RAM will be unavailable (see relevant SDS documentation)
bogdanm 0:eff01767de02 113 * - Some peripherals will be unavailable or available only through the SoC API (see relevant SDS documentation)
bogdanm 0:eff01767de02 114 * - Interrupts will not arrive from protected peripherals or interrupts
bogdanm 0:eff01767de02 115 * - nrf_nvic_ functions must be used instead of CMSIS NVIC_ functions for reliable usage of the softdevice.
bogdanm 0:eff01767de02 116 * - Interrupt latency may be affected by the SoftDevice (see relevant SDS documentation)
bogdanm 0:eff01767de02 117 * - Chosen low frequency clock source will be running
bogdanm 0:eff01767de02 118 *
bogdanm 0:eff01767de02 119 * @param clock_source Low frequency clock source and accuracy. (Note: In the case of XTAL source, the PPM accuracy of the chosen clock source must be greater than or equal to the actual characteristics of your XTAL clock).
bogdanm 0:eff01767de02 120 * @param assertion_handler Callback for SoftDevice assertions.
bogdanm 0:eff01767de02 121 *
bogdanm 0:eff01767de02 122 * @retval ::NRF_SUCCESS
bogdanm 0:eff01767de02 123 * @retval ::NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION SoftDeviceinterrupt is already enabled, or an enabled interrupt has an illegal priority level
bogdanm 0:eff01767de02 124 * @retval ::NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN Unknown low frequency clock source selected
bogdanm 0:eff01767de02 125 */
bogdanm 0:eff01767de02 126 SVCALL(SD_SOFTDEVICE_ENABLE, uint32_t, sd_softdevice_enable(nrf_clock_lfclksrc_t clock_source, softdevice_assertion_handler_t assertion_handler));
bogdanm 0:eff01767de02 127
bogdanm 0:eff01767de02 128 /**@brief Disables the SoftDevice and by extension the protocol stack.
bogdanm 0:eff01767de02 129 *
bogdanm 0:eff01767de02 130 * Idempotent function to disable the SoftDevice.
bogdanm 0:eff01767de02 131 *
bogdanm 0:eff01767de02 132 * @post SoC library and protocol stack APIs are made unavailable.
bogdanm 0:eff01767de02 133 * @post All interrupts that was protected by the SoftDevice will be disabled and initialized to priority 0 (highest).
bogdanm 0:eff01767de02 134 * @post All peripherals used by the SoftDevice will be reset to default values.
bogdanm 0:eff01767de02 135 * @post All of RAM become available.
bogdanm 0:eff01767de02 136 * @post All interrupts are forwarded to the application.
bogdanm 0:eff01767de02 137 * @post LFCLK source chosen in ::sd_softdevice_enable will be left running.
bogdanm 0:eff01767de02 138 *
bogdanm 0:eff01767de02 139 * @retval ::NRF_SUCCESS
bogdanm 0:eff01767de02 140 */
bogdanm 0:eff01767de02 141 SVCALL(SD_SOFTDEVICE_DISABLE, uint32_t, sd_softdevice_disable(void));
bogdanm 0:eff01767de02 142
bogdanm 0:eff01767de02 143 /**@brief Check if the SoftDevice is enabled.
bogdanm 0:eff01767de02 144 *
bogdanm 0:eff01767de02 145 * @param[out] p_softdevice_enabled If the SoftDevice is enabled: 1 else 0.
bogdanm 0:eff01767de02 146 *
bogdanm 0:eff01767de02 147 * @retval ::NRF_SUCCESS
bogdanm 0:eff01767de02 148 */
bogdanm 0:eff01767de02 149 SVCALL(SD_SOFTDEVICE_IS_ENABLED, uint32_t, sd_softdevice_is_enabled(uint8_t * p_softdevice_enabled));
bogdanm 0:eff01767de02 150
Rohit Grover 37:c29c330d942c 151 /**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the SoftDevice
bogdanm 0:eff01767de02 152 *
Rohit Grover 37:c29c330d942c 153 * This function is only intended to be called when a bootloader is enabled.
bogdanm 0:eff01767de02 154 *
Rohit Grover 37:c29c330d942c 155 * @param[in] address The base address of the interrupt vector table for forwarded interrupts.
Rohit Grover 37:c29c330d942c 156
bogdanm 0:eff01767de02 157 * @retval ::NRF_SUCCESS
bogdanm 0:eff01767de02 158 */
Rohit Grover 37:c29c330d942c 159 SVCALL(SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, uint32_t, sd_softdevice_vector_table_base_set(uint32_t address));
bogdanm 0:eff01767de02 160
bogdanm 0:eff01767de02 161 /** @} */
bogdanm 0:eff01767de02 162
bogdanm 0:eff01767de02 163 #endif // NRF_SDM_H__
bogdanm 0:eff01767de02 164
bogdanm 0:eff01767de02 165 /**
bogdanm 0:eff01767de02 166 @}
bogdanm 0:eff01767de02 167 */