Marc Bax / Mbed 2 deprecated Flexbook180111a

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Dependencies:   SDFileSystem app epson mbed msp430 pl tests

eink.cpp@0:c643d398cdb6, 2018-01-11 (annotated)

Committer:
marcbax
Date:
Thu Jan 11 13:42:27 2018 +0000
Revision:
0:c643d398cdb6
Marc Bax version 180111. It hangs on the WritePartImage in the RedrawAlphabet routine in hangman.cpp. Within that call it does execute Ypos(), but not Xpos().

Who changed what in which revision?

UserRevisionLine numberNew contents of line
marcbax 0:c643d398cdb6 1 //
marcbax 0:c643d398cdb6 2 // Filename: eink.cpp
marcbax 0:c643d398cdb6 3 //
marcbax 0:c643d398cdb6 4 // Flexbook eInk display driver.
marcbax 0:c643d398cdb6 5 //
marcbax 0:c643d398cdb6 6
marcbax 0:c643d398cdb6 7 #include "eink.h"
marcbax 0:c643d398cdb6 8
marcbax 0:c643d398cdb6 9 #include "mbed.h"
marcbax 0:c643d398cdb6 10
marcbax 0:c643d398cdb6 11 #include "ChaN/ff.h"
marcbax 0:c643d398cdb6 12
marcbax 0:c643d398cdb6 13 #include "log.h"
marcbax 0:c643d398cdb6 14 #include "page.h"
marcbax 0:c643d398cdb6 15
marcbax 0:c643d398cdb6 16 #include "pmic-tps65185.h"
marcbax 0:c643d398cdb6 17 #include "vcom.h"
marcbax 0:c643d398cdb6 18
marcbax 0:c643d398cdb6 19 #include <sstream>
marcbax 0:c643d398cdb6 20
marcbax 0:c643d398cdb6 21 const int MAX_INIT_FAILS = 3;
marcbax 0:c643d398cdb6 22
marcbax 0:c643d398cdb6 23 SPI *spi = 0;
marcbax 0:c643d398cdb6 24
marcbax 0:c643d398cdb6 25 #define I2C_PMIC_ADDR_TPS65185 0x68
marcbax 0:c643d398cdb6 26
marcbax 0:c643d398cdb6 27 struct tps65185_info pmic_info;
marcbax 0:c643d398cdb6 28
marcbax 0:c643d398cdb6 29 const char *g_wflib_fatfs_path = "/waveform.dat";
marcbax 0:c643d398cdb6 30
marcbax 0:c643d398cdb6 31 extern "C"
marcbax 0:c643d398cdb6 32 {
marcbax 0:c643d398cdb6 33 // EPSON drivers.
marcbax 0:c643d398cdb6 34 #include "epson/epson-epdc.h"
marcbax 0:c643d398cdb6 35 #include "epson/epson-s1d135xx.h"
marcbax 0:c643d398cdb6 36
marcbax 0:c643d398cdb6 37 // Plastic Logic drivers.
marcbax 0:c643d398cdb6 38 #include "pl/epdc.h"
marcbax 0:c643d398cdb6 39 #include "pl/dispinfo.h"
marcbax 0:c643d398cdb6 40 #include "pl/platform.h"
marcbax 0:c643d398cdb6 41 #include "pl/types.h"
marcbax 0:c643d398cdb6 42
marcbax 0:c643d398cdb6 43 #include "wflib.h"
marcbax 0:c643d398cdb6 44
marcbax 0:c643d398cdb6 45 void mdelay(uint16_t ms)
marcbax 0:c643d398cdb6 46 {
marcbax 0:c643d398cdb6 47 wait_ms(ms);
marcbax 0:c643d398cdb6 48 }
marcbax 0:c643d398cdb6 49
marcbax 0:c643d398cdb6 50 void msleep(uint16_t ms)
marcbax 0:c643d398cdb6 51 {
marcbax 0:c643d398cdb6 52 mdelay(ms);
marcbax 0:c643d398cdb6 53 }
marcbax 0:c643d398cdb6 54
marcbax 0:c643d398cdb6 55 #define EPSON_RESET p16
marcbax 0:c643d398cdb6 56 #define EPSON_CS_0 p14
marcbax 0:c643d398cdb6 57 #define EPSON_HIRQ p15
marcbax 0:c643d398cdb6 58 #define EPSON_HRDY ~0U
marcbax 0:c643d398cdb6 59 #define EPSON_HDC p24
marcbax 0:c643d398cdb6 60 #define EPSON_CLK_EN 1002
marcbax 0:c643d398cdb6 61 #define EPSON_VCC_EN 1003
marcbax 0:c643d398cdb6 62
marcbax 0:c643d398cdb6 63 enum
marcbax 0:c643d398cdb6 64 {
marcbax 0:c643d398cdb6 65 HVSW_CTRL = p17, /* VCOM switch enable */
marcbax 0:c643d398cdb6 66 PMIC_EN = p18, /* HV-PMIC enable */
marcbax 0:c643d398cdb6 67 PMIC_POK = p23, /* HV-PMIC power OK */
marcbax 0:c643d398cdb6 68 PMIC_FLT = 1006 /* HV-PMIC fault condition */
marcbax 0:c643d398cdb6 69 };
marcbax 0:c643d398cdb6 70
marcbax 0:c643d398cdb6 71 static const struct s1d135xx_data g_s1d135xx_data =
marcbax 0:c643d398cdb6 72 {
marcbax 0:c643d398cdb6 73 EPSON_RESET,
marcbax 0:c643d398cdb6 74 EPSON_CS_0,
marcbax 0:c643d398cdb6 75 EPSON_HIRQ,
marcbax 0:c643d398cdb6 76 EPSON_HRDY,
marcbax 0:c643d398cdb6 77 EPSON_HDC,
marcbax 0:c643d398cdb6 78 EPSON_CLK_EN,
marcbax 0:c643d398cdb6 79 EPSON_VCC_EN
marcbax 0:c643d398cdb6 80 };
marcbax 0:c643d398cdb6 81
marcbax 0:c643d398cdb6 82 void printgpio(unsigned int gpio)
marcbax 0:c643d398cdb6 83 {
marcbax 0:c643d398cdb6 84 switch(gpio)
marcbax 0:c643d398cdb6 85 {
marcbax 0:c643d398cdb6 86 case EPSON_RESET:
marcbax 0:c643d398cdb6 87 printf("EPSON_RESET");
marcbax 0:c643d398cdb6 88 break;
marcbax 0:c643d398cdb6 89
marcbax 0:c643d398cdb6 90 case EPSON_CS_0:
marcbax 0:c643d398cdb6 91 printf("EPSON_CS_0");
marcbax 0:c643d398cdb6 92 break;
marcbax 0:c643d398cdb6 93
marcbax 0:c643d398cdb6 94 case EPSON_HIRQ:
marcbax 0:c643d398cdb6 95 printf("EPSON_HIRQ");
marcbax 0:c643d398cdb6 96 break;
marcbax 0:c643d398cdb6 97
marcbax 0:c643d398cdb6 98 case EPSON_HRDY:
marcbax 0:c643d398cdb6 99 printf("EPSON_HRDY");
marcbax 0:c643d398cdb6 100 break;
marcbax 0:c643d398cdb6 101
marcbax 0:c643d398cdb6 102 case EPSON_HDC:
marcbax 0:c643d398cdb6 103 printf("EPSON_HDC");
marcbax 0:c643d398cdb6 104 break;
marcbax 0:c643d398cdb6 105
marcbax 0:c643d398cdb6 106 case EPSON_CLK_EN:
marcbax 0:c643d398cdb6 107 printf("EPSON_CLK_EN");
marcbax 0:c643d398cdb6 108 break;
marcbax 0:c643d398cdb6 109
marcbax 0:c643d398cdb6 110 case EPSON_VCC_EN:
marcbax 0:c643d398cdb6 111 printf("EPSON_VCC_EN");
marcbax 0:c643d398cdb6 112 break;
marcbax 0:c643d398cdb6 113
marcbax 0:c643d398cdb6 114 case HVSW_CTRL:
marcbax 0:c643d398cdb6 115 printf("HVSW_CTRL");
marcbax 0:c643d398cdb6 116 break;
marcbax 0:c643d398cdb6 117
marcbax 0:c643d398cdb6 118 case PMIC_EN:
marcbax 0:c643d398cdb6 119 printf("PMIC_EN");
marcbax 0:c643d398cdb6 120 break;
marcbax 0:c643d398cdb6 121
marcbax 0:c643d398cdb6 122 case PMIC_POK:
marcbax 0:c643d398cdb6 123 printf("PMIC_POK");
marcbax 0:c643d398cdb6 124 break;
marcbax 0:c643d398cdb6 125
marcbax 0:c643d398cdb6 126 default:
marcbax 0:c643d398cdb6 127 printf("Unknown GPIO: %u", gpio);
marcbax 0:c643d398cdb6 128 break;
marcbax 0:c643d398cdb6 129 }
marcbax 0:c643d398cdb6 130 }
marcbax 0:c643d398cdb6 131
marcbax 0:c643d398cdb6 132 //#define LOG_GPIO
marcbax 0:c643d398cdb6 133
marcbax 0:c643d398cdb6 134 extern int msp430_gpio_get(unsigned gpio)
marcbax 0:c643d398cdb6 135 {
marcbax 0:c643d398cdb6 136 #ifdef LOG_GPIO
marcbax 0:c643d398cdb6 137 printf("msp430_gpio_get(");
marcbax 0:c643d398cdb6 138 printgpio(gpio);
marcbax 0:c643d398cdb6 139 printf(")\n");
marcbax 0:c643d398cdb6 140 #endif // LOG_GPIO
marcbax 0:c643d398cdb6 141
marcbax 0:c643d398cdb6 142 int value = 0;
marcbax 0:c643d398cdb6 143 if(gpio != EPSON_CLK_EN && gpio != EPSON_VCC_EN)
marcbax 0:c643d398cdb6 144 {
marcbax 0:c643d398cdb6 145 DigitalIn gpiopin((PinName) gpio);
marcbax 0:c643d398cdb6 146 value = gpiopin;
marcbax 0:c643d398cdb6 147 } else {
marcbax 0:c643d398cdb6 148 #ifdef LOG_GPIO
marcbax 0:c643d398cdb6 149 printf("unused GPIO, ignored\n");
marcbax 0:c643d398cdb6 150 #endif // LOG_GPIO
marcbax 0:c643d398cdb6 151 }
marcbax 0:c643d398cdb6 152
marcbax 0:c643d398cdb6 153 return value;
marcbax 0:c643d398cdb6 154 }
marcbax 0:c643d398cdb6 155
marcbax 0:c643d398cdb6 156 extern void msp430_gpio_set(unsigned gpio, int value)
marcbax 0:c643d398cdb6 157 {
marcbax 0:c643d398cdb6 158 #ifdef LOG_GPIO
marcbax 0:c643d398cdb6 159 printf("msp430_gpio_set(");
marcbax 0:c643d398cdb6 160 printgpio(gpio);
marcbax 0:c643d398cdb6 161 printf(", %d)\n", value);
marcbax 0:c643d398cdb6 162 #endif // LOG_GPIO
marcbax 0:c643d398cdb6 163
marcbax 0:c643d398cdb6 164 if(gpio != EPSON_CLK_EN && gpio != EPSON_VCC_EN)
marcbax 0:c643d398cdb6 165 {
marcbax 0:c643d398cdb6 166 DigitalOut gpiopin((PinName) gpio);
marcbax 0:c643d398cdb6 167 gpiopin = value;
marcbax 0:c643d398cdb6 168 } else {
marcbax 0:c643d398cdb6 169 #ifdef LOG_GPIO
marcbax 0:c643d398cdb6 170 printf("unused GPIO, ignored\n");
marcbax 0:c643d398cdb6 171 #endif // LOG_GPIO
marcbax 0:c643d398cdb6 172 }
marcbax 0:c643d398cdb6 173 }
marcbax 0:c643d398cdb6 174
marcbax 0:c643d398cdb6 175 int _swap_bytes(int bytes)
marcbax 0:c643d398cdb6 176 {
marcbax 0:c643d398cdb6 177 uint16_t ubytes = bytes;
marcbax 0:c643d398cdb6 178 ubytes = (ubytes << 8) + (ubytes >> 8);
marcbax 0:c643d398cdb6 179 return ubytes;
marcbax 0:c643d398cdb6 180 }
marcbax 0:c643d398cdb6 181
marcbax 0:c643d398cdb6 182 int parser_read_file_line(FIL *f, char *buffer, int max_length)
marcbax 0:c643d398cdb6 183 {
marcbax 0:c643d398cdb6 184 Log("parser_read_file_line not implemented, returning FR_OK");
marcbax 0:c643d398cdb6 185 return 0;
marcbax 0:c643d398cdb6 186 }
marcbax 0:c643d398cdb6 187
marcbax 0:c643d398cdb6 188 int parser_read_word(const char *str, const char *sep, unsigned int *out)
marcbax 0:c643d398cdb6 189 {
marcbax 0:c643d398cdb6 190 Log("parser_read_word not implemented, returning 0");
marcbax 0:c643d398cdb6 191 return 0;
marcbax 0:c643d398cdb6 192 }
marcbax 0:c643d398cdb6 193
marcbax 0:c643d398cdb6 194 //#define LOG_SPI
marcbax 0:c643d398cdb6 195
marcbax 0:c643d398cdb6 196 void spi_read_bytes(uint8_t *buff, size_t size)
marcbax 0:c643d398cdb6 197 {
marcbax 0:c643d398cdb6 198 #ifdef LOG_SPI
marcbax 0:c643d398cdb6 199 printf("spi_read_bytes(");
marcbax 0:c643d398cdb6 200 #endif // LOG_SPI
marcbax 0:c643d398cdb6 201 for(size_t i = 0; i < size; i++)
marcbax 0:c643d398cdb6 202 {
marcbax 0:c643d398cdb6 203 buff[i] = spi->write(0);
marcbax 0:c643d398cdb6 204
marcbax 0:c643d398cdb6 205 #ifdef LOG_SPI
marcbax 0:c643d398cdb6 206 int buffint = buff[i];
marcbax 0:c643d398cdb6 207 printf("%02x", buffint);
marcbax 0:c643d398cdb6 208 #endif // LOG_SPI
marcbax 0:c643d398cdb6 209 }
marcbax 0:c643d398cdb6 210
marcbax 0:c643d398cdb6 211 #ifdef LOG_SPI
marcbax 0:c643d398cdb6 212 int sizeint = size;
marcbax 0:c643d398cdb6 213 printf(", %02x)\n", sizeint);
marcbax 0:c643d398cdb6 214 #endif // LOG_SPI
marcbax 0:c643d398cdb6 215 }
marcbax 0:c643d398cdb6 216
marcbax 0:c643d398cdb6 217 void spi_write_bytes(uint8_t *buff, size_t size)
marcbax 0:c643d398cdb6 218 {
marcbax 0:c643d398cdb6 219 #ifdef LOG_SPI
marcbax 0:c643d398cdb6 220 int sizeint = size;
marcbax 0:c643d398cdb6 221 printf("spi_write_bytes(");
marcbax 0:c643d398cdb6 222 for(size_t i = 0; i < size; i++)
marcbax 0:c643d398cdb6 223 {
marcbax 0:c643d398cdb6 224 int buffint = buff[i];
marcbax 0:c643d398cdb6 225 printf("%02x", buffint);
marcbax 0:c643d398cdb6 226 }
marcbax 0:c643d398cdb6 227 printf(", %02x)\n", sizeint);
marcbax 0:c643d398cdb6 228 #endif // LOG_SPI
marcbax 0:c643d398cdb6 229
marcbax 0:c643d398cdb6 230 if(spi)
marcbax 0:c643d398cdb6 231 {
marcbax 0:c643d398cdb6 232 for(size_t i = 0; i < size; i++)
marcbax 0:c643d398cdb6 233 {
marcbax 0:c643d398cdb6 234 spi->write(buff[i]);
marcbax 0:c643d398cdb6 235 }
marcbax 0:c643d398cdb6 236
marcbax 0:c643d398cdb6 237 } else {
marcbax 0:c643d398cdb6 238
marcbax 0:c643d398cdb6 239 printf("ERROR: SPI not set!!!\n");
marcbax 0:c643d398cdb6 240 }
marcbax 0:c643d398cdb6 241 }
marcbax 0:c643d398cdb6 242
marcbax 0:c643d398cdb6 243 } // End '"C" linking.
marcbax 0:c643d398cdb6 244
marcbax 0:c643d398cdb6 245 struct pl_platform g_plat;
marcbax 0:c643d398cdb6 246
marcbax 0:c643d398cdb6 247 struct pl_dispinfo g_dispinfo;
marcbax 0:c643d398cdb6 248
marcbax 0:c643d398cdb6 249 void WriteColour(pl_epdc &epdc, uint8_t colour)
marcbax 0:c643d398cdb6 250 {
marcbax 0:c643d398cdb6 251 if(epdc.fill(&epdc, NULL, colour))
marcbax 0:c643d398cdb6 252 Log("fill failed");
marcbax 0:c643d398cdb6 253
marcbax 0:c643d398cdb6 254 if(epdc.clear_init(&epdc))
marcbax 0:c643d398cdb6 255 Log("clear_init fail");
marcbax 0:c643d398cdb6 256
marcbax 0:c643d398cdb6 257 if(g_plat.psu.on(&g_plat.psu))
marcbax 0:c643d398cdb6 258 Log("PSU on fail");
marcbax 0:c643d398cdb6 259
marcbax 0:c643d398cdb6 260 int wfid = pl_epdc_get_wfid(&epdc, wf_refresh);
marcbax 0:c643d398cdb6 261 if (wfid < 0)
marcbax 0:c643d398cdb6 262 Log("Bad wfid");
marcbax 0:c643d398cdb6 263
marcbax 0:c643d398cdb6 264 if(epdc.update(&epdc, wfid, NULL))
marcbax 0:c643d398cdb6 265 Log("update failed");
marcbax 0:c643d398cdb6 266
marcbax 0:c643d398cdb6 267 if(epdc.wait_update_end(&epdc))
marcbax 0:c643d398cdb6 268 Log("wait update end failed");
marcbax 0:c643d398cdb6 269
marcbax 0:c643d398cdb6 270 if(g_plat.psu.off(&g_plat.psu))
marcbax 0:c643d398cdb6 271 Log("PSU off fail");
marcbax 0:c643d398cdb6 272 }
marcbax 0:c643d398cdb6 273
marcbax 0:c643d398cdb6 274 void WritePicture(pl_epdc &epdc, const char *file)
marcbax 0:c643d398cdb6 275 {
marcbax 0:c643d398cdb6 276 //#ifdef VERBOSE
marcbax 0:c643d398cdb6 277 Log("WritePicture");
marcbax 0:c643d398cdb6 278 //#endif
marcbax 0:c643d398cdb6 279
marcbax 0:c643d398cdb6 280 if(g_plat.epdc.load_image(&g_plat.epdc, file, NULL, 0, 0))
marcbax 0:c643d398cdb6 281 Log("Image load failed");
marcbax 0:c643d398cdb6 282 else Log("Image loaded");
marcbax 0:c643d398cdb6 283 if(g_plat.psu.on(&g_plat.psu))
marcbax 0:c643d398cdb6 284 Log("PSU on fail");
marcbax 0:c643d398cdb6 285 else Log ("PSU on");
marcbax 0:c643d398cdb6 286 int wfid = pl_epdc_get_wfid(&epdc, wf_refresh);
marcbax 0:c643d398cdb6 287 if (wfid < 0)
marcbax 0:c643d398cdb6 288 Log("Bad wfid");
marcbax 0:c643d398cdb6 289 else Log("Good wfid");
marcbax 0:c643d398cdb6 290
marcbax 0:c643d398cdb6 291 if(g_plat.epdc.update(&g_plat.epdc, wfid, NULL))
marcbax 0:c643d398cdb6 292 Log("update failed");
marcbax 0:c643d398cdb6 293 else Log("update succeeded");
marcbax 0:c643d398cdb6 294
marcbax 0:c643d398cdb6 295 if(epdc.wait_update_end(&epdc))
marcbax 0:c643d398cdb6 296 Log("wait update end failed");
marcbax 0:c643d398cdb6 297 else Log("wait update end succeeded");
marcbax 0:c643d398cdb6 298
marcbax 0:c643d398cdb6 299 if(g_plat.psu.off(&g_plat.psu))
marcbax 0:c643d398cdb6 300 Log("PSU off fail");
marcbax 0:c643d398cdb6 301 else Log("PSU off");
marcbax 0:c643d398cdb6 302 }
marcbax 0:c643d398cdb6 303
marcbax 0:c643d398cdb6 304 void WriteImage(const char *file)
marcbax 0:c643d398cdb6 305 {
marcbax 0:c643d398cdb6 306 #ifdef VERBOSE
marcbax 0:c643d398cdb6 307 Log("WritePicture");
marcbax 0:c643d398cdb6 308 #endif
marcbax 0:c643d398cdb6 309
marcbax 0:c643d398cdb6 310 if(g_plat.epdc.load_image(&g_plat.epdc, file, NULL, 0, 0))
marcbax 0:c643d398cdb6 311 Log("Image load failed");
marcbax 0:c643d398cdb6 312 }
marcbax 0:c643d398cdb6 313
marcbax 0:c643d398cdb6 314 void WritePartImage(const char *file, int xd, int yd, int xi, int yi, int w, int h)
marcbax 0:c643d398cdb6 315 {
marcbax 0:c643d398cdb6 316 #ifdef VERBOSE
marcbax 0:c643d398cdb6 317 Log("WritePartImage");
marcbax 0:c643d398cdb6 318 #endif
marcbax 0:c643d398cdb6 319
marcbax 0:c643d398cdb6 320 pl_area area;
marcbax 0:c643d398cdb6 321
marcbax 0:c643d398cdb6 322 area.left = xd;
marcbax 0:c643d398cdb6 323 area.top = yd;
marcbax 0:c643d398cdb6 324 area.width = w;
marcbax 0:c643d398cdb6 325 area.height = h;
marcbax 0:c643d398cdb6 326
marcbax 0:c643d398cdb6 327 if(g_plat.epdc.load_image(&g_plat.epdc, file, &area, xi, yi))
marcbax 0:c643d398cdb6 328 Log("Image load failed");
marcbax 0:c643d398cdb6 329 }
marcbax 0:c643d398cdb6 330
marcbax 0:c643d398cdb6 331 void UpdateDisplay()
marcbax 0:c643d398cdb6 332 {
marcbax 0:c643d398cdb6 333 #ifdef VERBOSE
marcbax 0:c643d398cdb6 334 Log("UpdateDisplay");
marcbax 0:c643d398cdb6 335 #endif
marcbax 0:c643d398cdb6 336
marcbax 0:c643d398cdb6 337 if(g_plat.psu.on(&g_plat.psu))
marcbax 0:c643d398cdb6 338 Log("PSU on fail");
marcbax 0:c643d398cdb6 339
marcbax 0:c643d398cdb6 340 int wfid = pl_epdc_get_wfid(&g_plat.epdc, wf_refresh);
marcbax 0:c643d398cdb6 341 if (wfid < 0)
marcbax 0:c643d398cdb6 342 Log("Bad wfid");
marcbax 0:c643d398cdb6 343
marcbax 0:c643d398cdb6 344 if(g_plat.epdc.update(&g_plat.epdc, wfid, NULL))
marcbax 0:c643d398cdb6 345 Log("update failed");
marcbax 0:c643d398cdb6 346
marcbax 0:c643d398cdb6 347 if(g_plat.epdc.wait_update_end(&g_plat.epdc))
marcbax 0:c643d398cdb6 348 Log("wait update end failed");
marcbax 0:c643d398cdb6 349
marcbax 0:c643d398cdb6 350 if(g_plat.psu.off(&g_plat.psu))
marcbax 0:c643d398cdb6 351 Log("PSU off fail");
marcbax 0:c643d398cdb6 352 }
marcbax 0:c643d398cdb6 353
marcbax 0:c643d398cdb6 354 int pl_i2c_reg_read_8(I2C &i2c, uint8_t i2c_addr, uint8_t reg, uint8_t *data);
marcbax 0:c643d398cdb6 355
marcbax 0:c643d398cdb6 356 int pl_i2c_reg_write_8(I2C &i2c, uint8_t i2c_addr, uint8_t reg, uint8_t data);
marcbax 0:c643d398cdb6 357
marcbax 0:c643d398cdb6 358 void pl_hwinfo_log(const struct pl_hwinfo *info)
marcbax 0:c643d398cdb6 359 {
marcbax 0:c643d398cdb6 360 #if VERBOSE
marcbax 0:c643d398cdb6 361 const struct pl_hw_vcom_info *vcom = &info->vcom;
marcbax 0:c643d398cdb6 362 #endif
marcbax 0:c643d398cdb6 363 const struct pl_hw_board_info *board = &info->board;
marcbax 0:c643d398cdb6 364
marcbax 0:c643d398cdb6 365 #if VERBOSE
marcbax 0:c643d398cdb6 366 printf("Version: %d\n", info->version);
marcbax 0:c643d398cdb6 367 printf("VCOM DAC info: dac[%d]=%d, dac[%d]=%d\n",
marcbax 0:c643d398cdb6 368 vcom->dac_x1, vcom->dac_y1, vcom->dac_x2, vcom->dac_y2);
marcbax 0:c643d398cdb6 369 printf("Gate PSU info: VGPOS=%ld, VGNEG=%ld, swing=%ld\n",
marcbax 0:c643d398cdb6 370 vcom->vgpos_mv, vcom->vgneg_mv, vcom->swing_ideal);
marcbax 0:c643d398cdb6 371 #endif
marcbax 0:c643d398cdb6 372 printf("Board type: %s, version: %d.%d\n",
marcbax 0:c643d398cdb6 373 board->board_type, board->board_ver_maj, board->board_ver_min);
marcbax 0:c643d398cdb6 374 #if VERBOSE
marcbax 0:c643d398cdb6 375 printf("vcom_mode=%d, hv_pmic=%d, vcom_dac=%d, vcom_adc=%d\n",
marcbax 0:c643d398cdb6 376 board->vcom_mode, board->hv_pmic, board->vcom_dac, board->vcom_adc);
marcbax 0:c643d398cdb6 377 printf("io_config=%d, i2c_mode=%d, temp_sensor=%d, frame_buffer=%d\n",
marcbax 0:c643d398cdb6 378 board->io_config, board->i2c_mode, board->temp_sensor,
marcbax 0:c643d398cdb6 379 board->frame_buffer);
marcbax 0:c643d398cdb6 380 printf("epdc_ref=%d, adc_scale_1=%d, adc_scale_2=%d\n",
marcbax 0:c643d398cdb6 381 board->epdc_ref, board->adc_scale_1, board->adc_scale_2);
marcbax 0:c643d398cdb6 382 printf("CRC16: %04X\n", info->crc);
marcbax 0:c643d398cdb6 383 #endif
marcbax 0:c643d398cdb6 384 }
marcbax 0:c643d398cdb6 385
marcbax 0:c643d398cdb6 386 #define CONFIG_DEFAULT_I2C_MODE I2C_MODE_HOST
marcbax 0:c643d398cdb6 387 #define BOARD_MAJ 6
marcbax 0:c643d398cdb6 388 #define BOARD_MIN 3
marcbax 0:c643d398cdb6 389
marcbax 0:c643d398cdb6 390 static const struct pl_hwinfo g_hwinfo_default = {
marcbax 0:c643d398cdb6 391 /* version */
marcbax 0:c643d398cdb6 392 PL_HWINFO_VERSION,
marcbax 0:c643d398cdb6 393 /* vcom */
marcbax 0:c643d398cdb6 394 { 127, 4172, 381, 12490, 25080, -32300, 56886 },
marcbax 0:c643d398cdb6 395 /* board */
marcbax 0:c643d398cdb6 396 { "HB", BOARD_MAJ, BOARD_MIN, 0, HV_PMIC_TPS65185, 0, 0, 0,
marcbax 0:c643d398cdb6 397 CONFIG_DEFAULT_I2C_MODE, TEMP_SENSOR_NONE, 0, EPDC_S1D13541, 1, 1 },
marcbax 0:c643d398cdb6 398 /* CRC16 (not used when not reading from actual EEPROM) */
marcbax 0:c643d398cdb6 399 0xFFFF,
marcbax 0:c643d398cdb6 400 };
marcbax 0:c643d398cdb6 401
marcbax 0:c643d398cdb6 402 FIL g_wflib_fatfs_file;
marcbax 0:c643d398cdb6 403
marcbax 0:c643d398cdb6 404 static struct pl_epdpsu_gpio g_epdpsu_gpio = {
marcbax 0:c643d398cdb6 405 &g_plat.gpio, PMIC_EN, HVSW_CTRL, PMIC_POK, PMIC_FLT, 300, 5, 100
marcbax 0:c643d398cdb6 406 };
marcbax 0:c643d398cdb6 407
marcbax 0:c643d398cdb6 408 struct vcom_cal vcom_cal;
marcbax 0:c643d398cdb6 409
marcbax 0:c643d398cdb6 410 pl_epdc &Get_epdc()
marcbax 0:c643d398cdb6 411 {
marcbax 0:c643d398cdb6 412 return g_plat.epdc;
marcbax 0:c643d398cdb6 413 }
marcbax 0:c643d398cdb6 414
marcbax 0:c643d398cdb6 415 std::ostream &operator<<(std::ostream &s, pl_gpio &gpio)
marcbax 0:c643d398cdb6 416 {
marcbax 0:c643d398cdb6 417 s << "pl_gpio\n";
marcbax 0:c643d398cdb6 418
marcbax 0:c643d398cdb6 419 s << gpio.config << "\n";
marcbax 0:c643d398cdb6 420 s << gpio.get << "\n";
marcbax 0:c643d398cdb6 421 s << gpio.set << "\n";
marcbax 0:c643d398cdb6 422
marcbax 0:c643d398cdb6 423 return s;
marcbax 0:c643d398cdb6 424 }
marcbax 0:c643d398cdb6 425
marcbax 0:c643d398cdb6 426 std::ostream &operator<<(std::ostream &s, pl_epdpsu &epdpsu)
marcbax 0:c643d398cdb6 427 {
marcbax 0:c643d398cdb6 428 s << "pl_epdpsu\n";
marcbax 0:c643d398cdb6 429
marcbax 0:c643d398cdb6 430 s << epdpsu.on << "\n";
marcbax 0:c643d398cdb6 431 s << epdpsu.off << "\n";
marcbax 0:c643d398cdb6 432 s << epdpsu.state << "\n";
marcbax 0:c643d398cdb6 433 s << epdpsu.data << "\n";
marcbax 0:c643d398cdb6 434
marcbax 0:c643d398cdb6 435 return s;
marcbax 0:c643d398cdb6 436 };
marcbax 0:c643d398cdb6 437
marcbax 0:c643d398cdb6 438 std::ostream &operator<<(std::ostream &s, pl_epdc &epdc)
marcbax 0:c643d398cdb6 439 {
marcbax 0:c643d398cdb6 440 s << "pl_epdc\n";
marcbax 0:c643d398cdb6 441
marcbax 0:c643d398cdb6 442 s << epdc.clear_init << "\n";
marcbax 0:c643d398cdb6 443 s << epdc.load_wflib << "\n";
marcbax 0:c643d398cdb6 444 s << epdc.update << "\n";
marcbax 0:c643d398cdb6 445 s << epdc.wait_update_end << "\n";
marcbax 0:c643d398cdb6 446 s << epdc.set_power << "\n";
marcbax 0:c643d398cdb6 447 s << epdc.set_temp_mode << "\n";
marcbax 0:c643d398cdb6 448 s << epdc.update_temp << "\n";
marcbax 0:c643d398cdb6 449 s << epdc.fill << "\n";
marcbax 0:c643d398cdb6 450 s << epdc.pattern_check << "\n";
marcbax 0:c643d398cdb6 451 s << epdc.load_image << "\n";
marcbax 0:c643d398cdb6 452 s << epdc.set_epd_power << "\n";
marcbax 0:c643d398cdb6 453
marcbax 0:c643d398cdb6 454 s << epdc.wf_table << "\n";
marcbax 0:c643d398cdb6 455 s << epdc.dispinfo << "\n";
marcbax 0:c643d398cdb6 456 //struct pl_wflib wflib << "\n";
marcbax 0:c643d398cdb6 457 s << epdc.power_state << "\n";
marcbax 0:c643d398cdb6 458 s << epdc.temp_mode << "\n";
marcbax 0:c643d398cdb6 459 s << epdc.manual_temp << "\n";
marcbax 0:c643d398cdb6 460 s << epdc.xres << "\n";
marcbax 0:c643d398cdb6 461 s << epdc.yres << "\n";
marcbax 0:c643d398cdb6 462 s << epdc.data << "\n";
marcbax 0:c643d398cdb6 463
marcbax 0:c643d398cdb6 464 return s;
marcbax 0:c643d398cdb6 465 };
marcbax 0:c643d398cdb6 466
marcbax 0:c643d398cdb6 467 std::ostream &operator<<(std::ostream &s, pl_platform &g_plat)
marcbax 0:c643d398cdb6 468 {
marcbax 0:c643d398cdb6 469 s << "pl_platform\n";
marcbax 0:c643d398cdb6 470
marcbax 0:c643d398cdb6 471 s << g_plat.gpio << "\n";
marcbax 0:c643d398cdb6 472 s << g_plat.psu << "\n";
marcbax 0:c643d398cdb6 473 s << g_plat.epdc << "\n";
marcbax 0:c643d398cdb6 474 s << g_plat.i2c << "\n";
marcbax 0:c643d398cdb6 475 s << g_plat.sys_gpio << "\n";
marcbax 0:c643d398cdb6 476 s << g_plat.hwinfo << "\n";
marcbax 0:c643d398cdb6 477 s << g_plat.dispinfo << "\n";
marcbax 0:c643d398cdb6 478
marcbax 0:c643d398cdb6 479 return s;
marcbax 0:c643d398cdb6 480 }
marcbax 0:c643d398cdb6 481
marcbax 0:c643d398cdb6 482 void DisplayHardwareSettings()
marcbax 0:c643d398cdb6 483 {
marcbax 0:c643d398cdb6 484 pl_hwinfo_log(g_plat.hwinfo);
marcbax 0:c643d398cdb6 485
marcbax 0:c643d398cdb6 486 #ifdef VERBOSE
marcbax 0:c643d398cdb6 487 printf("Hardware information start\n"):
marcbax 0:c643d398cdb6 488 std::ostringstream info;
marcbax 0:c643d398cdb6 489 info << g_plat << "\n";
marcbax 0:c643d398cdb6 490 printf(info.str().c_str());
marcbax 0:c643d398cdb6 491
marcbax 0:c643d398cdb6 492 printf("Hardware information end\n");
marcbax 0:c643d398cdb6 493 #endif // VERBOSE
marcbax 0:c643d398cdb6 494 }
marcbax 0:c643d398cdb6 495
marcbax 0:c643d398cdb6 496 // Configure the EPSON controller settings.
marcbax 0:c643d398cdb6 497 s1d135xx driver = { &g_s1d135xx_data, NULL };
marcbax 0:c643d398cdb6 498
marcbax 0:c643d398cdb6 499
marcbax 0:c643d398cdb6 500 void InitDisplay(I2C &i2c, SPI &spi_in, DigitalOut &spics, DigitalOut &hven, DigitalOut &rst, DigitalIn &hvpok)
marcbax 0:c643d398cdb6 501 {
marcbax 0:c643d398cdb6 502 spi = &spi_in;
marcbax 0:c643d398cdb6 503
marcbax 0:c643d398cdb6 504 spi->frequency(1000000);
marcbax 0:c643d398cdb6 505 spi->format(8, 0);
marcbax 0:c643d398cdb6 506
marcbax 0:c643d398cdb6 507 rst = 0;
marcbax 0:c643d398cdb6 508 hven = 0;
marcbax 0:c643d398cdb6 509 spics = 1;
marcbax 0:c643d398cdb6 510
marcbax 0:c643d398cdb6 511 // Initialise the platform settings.
marcbax 0:c643d398cdb6 512 g_plat.i2c = NULL;
marcbax 0:c643d398cdb6 513 g_plat.sys_gpio = NULL;
marcbax 0:c643d398cdb6 514 g_plat.hwinfo = &g_hwinfo_default;
marcbax 0:c643d398cdb6 515 g_plat.dispinfo = &g_dispinfo;
marcbax 0:c643d398cdb6 516
marcbax 0:c643d398cdb6 517 g_plat.psu.on = NULL;
marcbax 0:c643d398cdb6 518 g_plat.psu.off = NULL;
marcbax 0:c643d398cdb6 519 g_plat.psu.state = 0;
marcbax 0:c643d398cdb6 520 g_plat.psu.data = NULL;
marcbax 0:c643d398cdb6 521
marcbax 0:c643d398cdb6 522 // Use a 100Khz I2c clock (the PMIC limits are 100-400KHz).
marcbax 0:c643d398cdb6 523 i2c.frequency(100000);
marcbax 0:c643d398cdb6 524
marcbax 0:c643d398cdb6 525 // COnfigure the VCOM settings.
marcbax 0:c643d398cdb6 526 g_dispinfo.info.vcom = 5124; // Note hardcoded VCOM
marcbax 0:c643d398cdb6 527
marcbax 0:c643d398cdb6 528 int fails = 0;
marcbax 0:c643d398cdb6 529 int initfailed = -1;
marcbax 0:c643d398cdb6 530 while(initfailed && fails < MAX_INIT_FAILS)
marcbax 0:c643d398cdb6 531 {
marcbax 0:c643d398cdb6 532 // Enable the TPS65185 PMIC.
marcbax 0:c643d398cdb6 533 // The I2C is now enabled.
marcbax 0:c643d398cdb6 534 hven = 1;
marcbax 0:c643d398cdb6 535 wait(0.2);
marcbax 0:c643d398cdb6 536
marcbax 0:c643d398cdb6 537 // Hard reset the Epson controller.
marcbax 0:c643d398cdb6 538 rst = 0;
marcbax 0:c643d398cdb6 539 mdelay(4);
marcbax 0:c643d398cdb6 540 rst = 1;
marcbax 0:c643d398cdb6 541 mdelay(10);
marcbax 0:c643d398cdb6 542
marcbax 0:c643d398cdb6 543 // Load the display information.
marcbax 0:c643d398cdb6 544 initfailed = pl_wflib_init_fatfs(&g_plat.epdc.wflib, (int *) &g_wflib_fatfs_file, g_wflib_fatfs_path);
marcbax 0:c643d398cdb6 545 if(initfailed != 0)
marcbax 0:c643d398cdb6 546 {
marcbax 0:c643d398cdb6 547 Log("Failed to load display info");
marcbax 0:c643d398cdb6 548 fails++;
marcbax 0:c643d398cdb6 549
marcbax 0:c643d398cdb6 550 } else {
marcbax 0:c643d398cdb6 551
marcbax 0:c643d398cdb6 552 pl_epdpsu_gpio_init(&g_plat.psu, &g_epdpsu_gpio);
marcbax 0:c643d398cdb6 553 vcom_init(&vcom_cal, &g_plat.hwinfo->vcom);
marcbax 0:c643d398cdb6 554 initfailed = tps65185_init(&pmic_info, i2c, I2C_PMIC_ADDR_TPS65185, &vcom_cal);
marcbax 0:c643d398cdb6 555 if(initfailed != 0)
marcbax 0:c643d398cdb6 556 {
marcbax 0:c643d398cdb6 557 Log("Error initalizing TPS65185");
marcbax 0:c643d398cdb6 558 fails++;
marcbax 0:c643d398cdb6 559
marcbax 0:c643d398cdb6 560 } else {
marcbax 0:c643d398cdb6 561
marcbax 0:c643d398cdb6 562 initfailed = tps65185_set_vcom_voltage(&pmic_info, g_plat.dispinfo->info.vcom);
marcbax 0:c643d398cdb6 563 if(initfailed != 0)
marcbax 0:c643d398cdb6 564 {
marcbax 0:c643d398cdb6 565 Log("Error initalizing VCOM");
marcbax 0:c643d398cdb6 566 fails++;
marcbax 0:c643d398cdb6 567
marcbax 0:c643d398cdb6 568 } else {
marcbax 0:c643d398cdb6 569
marcbax 0:c643d398cdb6 570 if(epson_epdc_init(&g_plat.epdc, g_plat.dispinfo, EPSON_EPDC_S1D13541, &driver) != 0)
marcbax 0:c643d398cdb6 571 {
marcbax 0:c643d398cdb6 572 Log("Error initalizing EPDC");
marcbax 0:c643d398cdb6 573
marcbax 0:c643d398cdb6 574 } else {
marcbax 0:c643d398cdb6 575
marcbax 0:c643d398cdb6 576 // Display the hardware settings.
marcbax 0:c643d398cdb6 577 DisplayHardwareSettings();
marcbax 0:c643d398cdb6 578
marcbax 0:c643d398cdb6 579 Log("White screen");
marcbax 0:c643d398cdb6 580 WriteColour(g_plat.epdc, PL_WHITE);
marcbax 0:c643d398cdb6 581
marcbax 0:c643d398cdb6 582 //wait(4);
marcbax 0:c643d398cdb6 583
marcbax 0:c643d398cdb6 584 Log("Black screen");
marcbax 0:c643d398cdb6 585 WriteColour(g_plat.epdc, PL_BLACK);
marcbax 0:c643d398cdb6 586
marcbax 0:c643d398cdb6 587 /*wait(4);
marcbax 0:c643d398cdb6 588
marcbax 0:c643d398cdb6 589 Log("White screen");
marcbax 0:c643d398cdb6 590 WriteColour(g_plat.epdc, PL_WHITE);
marcbax 0:c643d398cdb6 591
marcbax 0:c643d398cdb6 592 wait(4);
marcbax 0:c643d398cdb6 593 Log("Picture");
marcbax 0:c643d398cdb6 594 WritePicture(g_plat.epdc, "/myfile.pgm");*/
marcbax 0:c643d398cdb6 595
marcbax 0:c643d398cdb6 596 /*WriteColour(g_plat.epdc, PL_WHITE);
marcbax 0:c643d398cdb6 597 Log("Picture");
marcbax 0:c643d398cdb6 598 wait(1);
marcbax 0:c643d398cdb6 599 WritePicture(g_plat.epdc, "/logos2.pgm");
marcbax 0:c643d398cdb6 600 wait(5);
marcbax 0:c643d398cdb6 601 //ShortBeep();
marcbax 0:c643d398cdb6 602 WritePicture(g_plat.epdc, "/hang00.pgm");
marcbax 0:c643d398cdb6 603 wait (2);
marcbax 0:c643d398cdb6 604 //ShortBeep();
marcbax 0:c643d398cdb6 605 WritePicture(g_plat.epdc, "/hang01.pgm");
marcbax 0:c643d398cdb6 606 wait (2);
marcbax 0:c643d398cdb6 607 //ShortBeep();
marcbax 0:c643d398cdb6 608 WritePicture(g_plat.epdc, "/hang02.pgm");
marcbax 0:c643d398cdb6 609 wait (2);
marcbax 0:c643d398cdb6 610 //ShortBeep();
marcbax 0:c643d398cdb6 611 WritePicture(g_plat.epdc, "/hang03.pgm");
marcbax 0:c643d398cdb6 612 wait (2);
marcbax 0:c643d398cdb6 613 //ShortBeep();
marcbax 0:c643d398cdb6 614 WritePicture(g_plat.epdc, "/hang04.pgm");
marcbax 0:c643d398cdb6 615 wait (2);
marcbax 0:c643d398cdb6 616 //ShortBeep();
marcbax 0:c643d398cdb6 617 WritePicture(g_plat.epdc, "/hang05.pgm");
marcbax 0:c643d398cdb6 618 wait (2);
marcbax 0:c643d398cdb6 619 //ShortBeep();
marcbax 0:c643d398cdb6 620 WritePicture(g_plat.epdc, "/hang06.pgm");
marcbax 0:c643d398cdb6 621 wait (2);
marcbax 0:c643d398cdb6 622 //ShortBeep();
marcbax 0:c643d398cdb6 623 WritePicture(g_plat.epdc, "/hang07.pgm");
marcbax 0:c643d398cdb6 624 wait (2);
marcbax 0:c643d398cdb6 625 //ShortBeep();
marcbax 0:c643d398cdb6 626 WritePicture(g_plat.epdc, "/hang08.pgm");
marcbax 0:c643d398cdb6 627 wait(2);
marcbax 0:c643d398cdb6 628 //ShortBeep();
marcbax 0:c643d398cdb6 629 WritePicture(g_plat.epdc, "/hang09.pgm");
marcbax 0:c643d398cdb6 630 wait (2);
marcbax 0:c643d398cdb6 631 //ShortBeep();
marcbax 0:c643d398cdb6 632 WritePicture(g_plat.epdc, "/hang10.pgm");
marcbax 0:c643d398cdb6 633 wait (2);
marcbax 0:c643d398cdb6 634 //ShortBeep();
marcbax 0:c643d398cdb6 635 WritePicture(g_plat.epdc, "/hang11.pgm");
marcbax 0:c643d398cdb6 636 wait (2);*/
marcbax 0:c643d398cdb6 637 }
marcbax 0:c643d398cdb6 638 }
marcbax 0:c643d398cdb6 639 }
marcbax 0:c643d398cdb6 640 }
marcbax 0:c643d398cdb6 641 }
marcbax 0:c643d398cdb6 642
marcbax 0:c643d398cdb6 643 if(fails < MAX_INIT_FAILS)
marcbax 0:c643d398cdb6 644 printf("Init done, %d retries\n", fails);
marcbax 0:c643d398cdb6 645 else
marcbax 0:c643d398cdb6 646 printf("Init aborted, retry limit of %d exceeded\n", fails);
marcbax 0:c643d398cdb6 647 }
marcbax 0:c643d398cdb6 648
marcbax 0:c643d398cdb6 649 void WriteImage ( const int number)
marcbax 0:c643d398cdb6 650 {
marcbax 0:c643d398cdb6 651 printf("WriteImage in eink.cpp\n");
marcbax 0:c643d398cdb6 652 switch (number)
marcbax 0:c643d398cdb6 653 {
marcbax 0:c643d398cdb6 654 case 0:
marcbax 0:c643d398cdb6 655 WritePicture(g_plat.epdc, "/hang00.pgm");
marcbax 0:c643d398cdb6 656 break;
marcbax 0:c643d398cdb6 657 case 1:
marcbax 0:c643d398cdb6 658 WritePicture(g_plat.epdc, "/hang01.pgm");
marcbax 0:c643d398cdb6 659 break;
marcbax 0:c643d398cdb6 660 case 2:
marcbax 0:c643d398cdb6 661 WritePicture(g_plat.epdc, "/hang02.pgm");
marcbax 0:c643d398cdb6 662 break;
marcbax 0:c643d398cdb6 663 case 3:
marcbax 0:c643d398cdb6 664 WritePicture(g_plat.epdc, "/hang03.pgm");
marcbax 0:c643d398cdb6 665 break;
marcbax 0:c643d398cdb6 666 case 4:
marcbax 0:c643d398cdb6 667 WritePicture(g_plat.epdc, "/hang04.pgm");
marcbax 0:c643d398cdb6 668 break;
marcbax 0:c643d398cdb6 669 case 5:
marcbax 0:c643d398cdb6 670 WritePicture(g_plat.epdc, "/hang05.pgm");
marcbax 0:c643d398cdb6 671 break;
marcbax 0:c643d398cdb6 672 case 6:
marcbax 0:c643d398cdb6 673 WritePicture(g_plat.epdc, "/hang06.pgm");
marcbax 0:c643d398cdb6 674 break;
marcbax 0:c643d398cdb6 675 case 7:
marcbax 0:c643d398cdb6 676 WritePicture(g_plat.epdc, "/hang07.pgm");
marcbax 0:c643d398cdb6 677 break;
marcbax 0:c643d398cdb6 678 case 8:
marcbax 0:c643d398cdb6 679 WritePicture(g_plat.epdc, "/hang08.pgm");
marcbax 0:c643d398cdb6 680 break;
marcbax 0:c643d398cdb6 681 default:
marcbax 0:c643d398cdb6 682 break;
marcbax 0:c643d398cdb6 683 }
marcbax 0:c643d398cdb6 684 }