File content as of revision 0:af630aa9a00d:

#ifndef __MAX1120X_H__
#define __MAX1120X_H__

#include "mbed.h"

// Status flag
#define NOT_READY       1
#define READY           0

// Start bit
#define START           0x80

// Mode selection
#define MODE_ACTION     (0<<6)
#define MODE_REGISTER   (1<<6)

// Mode 0 Actions table
#define ACT_SELF_CAL    0x10
#define ACT_SYS_OFF_CAL 0x20
#define ACT_SYS_GAN_CAL 0x30
#define ACT_POWERDOWN   0x08
#define ACT_CONV_1SPS   0x00
#define ACT_CONV_2_5SPS 0x01
#define ACT_CONV_5SPS   0x02
#define ACT_CONV_10SPS  0x03
#define ACT_CONV_15SPS  0x04
#define ACT_CONV_30SPS  0x05
#define ACT_CONV_60SPS  0x06
#define ACT_CONV_120SPS 0x07

// Mode 1 Registers table
#define REG_DO_READ     1       // Point register for read   
#define REG_DO_WRITE    0       // Point register for write
#define REG_STAT1       (0<<1)  // Status flags
#define REG_CTRL1       (1<<1)  // Converter operation settings
#define REG_CTRL2       (2<<1)  // GPIO pins control
#define REG_CTRL3       (3<<1)  // Gain & Calibration settings
#define REG_DATA        (4<<1)  // Sample result
#define REG_SOC         (5<<1)  // Offset Sys Calibration value
#define REG_SGC         (6<<1)  // Gain Sys Calibration value
#define REG_SCOC        (7<<1)  // Offset Self-Calibration value
#define REG_SCGC        (8<<1)  // gain Self-Calibration value

// Registers' bits
#define STAT1_RDY       (1<<0)
#define STAT1_MSTAT     (1<<1)
#define STAT1_OR        (1<<3)
#define STAT1_UR        (1<<4)

#define CTRL1_SCYCLE    (1<<1)
#define CTRL1_FORMAT    (1<<2)
#define CTRL1_SIGBUF    (1<<3)
#define CTRL1_REFBUF    (1<<4)
#define CTRL1_EXTCLK    (1<<5)
#define CTRL1_UNIP_BIP  (1<<6)
#define CTRL1_LINEF     (1<<7)

#define CTRL2_DIR_MASK  0xF0
#define CTRL2_DIO_MASK  0x0F

#define CTRL3_DGAIN_MASK 0xE0
#define CTRL3_NOSYSG    (1<<4)
#define CTRL3_NOSYSO    (1<<3)
#define CTRL3_NOSCG     (1<<2)
#define CTRL3_NOSCO     (1<<1)

#endif /*__MAX1120X_H__*/